JP2007135287A - Dc-dc converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a synchronous rectification switching DC-DC converter free from the restriction of ensuring the minimum on time of a main switch element under the condition of high input voltage and no load. <P>SOLUTION: The DC-DC converter includes: an inductor 2; a main switch 1; a rectification switch 4; a smoothing capacitor 3; an error amplifier 7 that outputs an error signal V<SB>e</SB>; a current detection circuit 8 that outputs a current detection signal; and a control drive circuit 17 that, when the signal level of the current detection signal reaches the signal level of the error signal V<SB>e</SB>, turns off the main switch 1 and turns on the rectification switch 4. The control drive circuit 17 includes: a voltage detection circuit 14 that detects that an output direct-current voltage V<SB>o</SB>is higher than a target value based on the output direct-current voltage V<SB>o</SB>or the error signal V<SB>e</SB>, and outputs a voltage detection signal V<SB>k</SB>corresponding to the difference between the output direct-current voltage V<SB>o</SB>and the target value; and an on voltage regulation circuit 15 that regulates voltage drop according to the voltage detection signal V<SB>k</SB>when the main switch 1 and the rectification switch 4 are on. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a DC-DC converter that supplies stable direct-current power to various electronic devices, and more particularly to a switching DC-DC converter having a synchronous rectifier circuit.

  In recent years, DC-DC converters having a synchronous rectification circuit in which rectification loss is reduced by using a switching element such as a MOSFET as the rectification element are frequently used for switching type DC-DC converters that supply power supply voltage to various electronic devices. Has been. A DC-DC converter having a synchronous rectifier circuit operates differently at a light load depending on whether or not current is allowed to flow in the reverse direction of the rectifying switch element. For example, Patent Document 1 relates to an invention that does not allow current to flow in the reverse direction as compared to the conventional example in which current flows through the rectifying switch element in the reverse direction.

<First Conventional Example>
FIG. 20A shows a circuit configuration of a DC-DC converter according to a first conventional example. Specifically, for example, a circuit of a synchronous rectification step-down converter disclosed in FIG. The configuration is shown.

As shown in FIG. 20A, the DC-DC converter according to the first conventional example includes a main switch element 81 that performs an on / off operation according to a signal input to a control terminal, and an on / off state of the main switch element 81. An inductor 82 that repeatedly stores and releases magnetic energy in response to an off operation (note that the inductance of the inductor 82 is L), a smoothing capacitor 83 that smoothes the current flowing through the inductor 82, and the main switch element 81 The rectifying switch element 84 performs on / off operation complementarily with the on / off operation. The main switch element 81 is applied with an input DC voltage V _i (which is a DC voltage from the voltage input terminal), and is output from the smoothing capacitor 83 to an output DC voltage V _o (a DC voltage serving as a DC power supply voltage for various electronic circuits). Is output to the load 85.

  The operation of the DC-DC converter according to the first conventional example having the above configuration will be described below.

First, when the main switch element 81 is in the ON state, a current flows from the voltage input side to the voltage output side via the main switch element 81 and the inductor 82, and magnetic energy is accumulated in the inductor 82. When the conduction resistance of the main switch element 81 is ignored, the inductor current I _L flowing through the inductor 82 when the main switch element 81 is in the on state increases linearly. Here, when the main switch element 81 is ON time denoted T _on, increase of the inductor current I _L becomes _{(V i -V o) × T} on / L.

On the other hand, when the main switch element 81 is in the OFF state, a current flows to the output side through the rectifying switch element 84 and the inductor 82, and the magnetic energy accumulated in the inductor 82 is released. The forward voltage drop that occurs in the rectifying switch element 84 has less rectification loss than when a diode is used as the rectifying means. If the conduction resistance of the rectifying switch element 84 is ignored, the inductor current I _L flowing through the inductor 82 when the main switch element 81 is in the off state decreases linearly. Assuming that the switching period of the main switch element 81 is T, the off time is (T−T _on ), and therefore the amount of decrease in the inductor current I _L is V _o × (T−T _on ) / L.

The above operation is repeated, and the inductor current I _L that increases or decreases due to the switching operation of the main switch element 81 is averaged by the smoothing action of the smoothing capacitor 83 and output from the smoothing capacitor 83 to the load 85 as the output DC current I _O. .

In the steady state, since equal to the increase and decrease of the inductor current I _L,
(V _i −V _o ) × T _on / L = V _o × (T−T _on ) / L
The following input / output relational expression (1) is obtained from the above expression.

V _o = (T _on / T) × V _i = D × V _i (1)
Here, as shown in the equation (1), the ratio (T _on / T) of the on time T _on to the switching cycle T of the main switch element 81 can be expressed as the duty ratio D, which is apparent from the equation (1). As described above, the output DC voltage V _o can be controlled by adjusting the duty ratio D.

FIG. 20 (b) shows a waveform diagram of the inductor current I _L at the time of heavy load and a light load.

As shown in FIG. 20B, in the DC-DC converter according to the first conventional example, when the load 85 is light and the output DC current _Io is small, when the main switch element 81 is in the ON state, the inductor current While I _L flows backward from the output side to the input side, a period of back flow from the output side to the ground potential occurs when the main switch element 81 is off. In theory, if the no-load condition as an output DC current I _o = 0, the magnetic energy is equal, the average value inductor current I _L to be regenerated and the magnetic energy supplied to the output side to the input side A waveform that vibrates positively and negatively to be zero is shown.

<Second Conventional Example>
FIG. 21A shows a circuit configuration of a DC-DC converter according to a second conventional example. Specifically, for example, a circuit of a synchronous rectification step-down converter disclosed in FIG. The configuration is shown.

  As shown in FIG. 21 (a), the DC-DC converter according to the second conventional example includes the main switch element 81, the inductor 82, the smoothing capacitor 83, and the rectifying switch element 84 described above. This is the same as the circuit configuration of the DC-DC converter according to the first conventional example shown in FIG. On the other hand, the difference from the circuit configuration of the DC-DC converter according to the first conventional example shown in FIG. 20A is that the comparator 86 is used to detect the voltage drop of the rectifying switch element 84 and the voltage drop. The on / off operation of the rectifying switch element 84 is performed depending on the direction.

  The operation of the DC-DC converter according to the second conventional example shown in FIG. 21A having the above configuration will be described below.

FIG. 21 (b) shows a waveform diagram of the inductor current I _L at the time of heavy load and a light load.

As shown in FIG. 21B, in the case of a heavy load with a large output DC current _Io , the operation of the DC-DC converter according to the second conventional example is the same as that shown in FIG. This is the same as the operation of the DC-DC converter according to the conventional example.

On the other hand, in the case of a light load, the DC-DC converter according to the second conventional example operates as follows. First, when the main switch element 81 is in the ON state, a current that linearly increases from the input side to the output side through the main switch element 81 and the inductor 82, and magnetic energy is accumulated in the inductor 82. Next, when the main switch element 81 is turned off, the rectifying switch element 84 is in an off state, but current flows to the output side via the parasitic diode of the rectifying switch element 84 and the inductor 82, and the magnetic energy of the inductor 82 is released. Begin to. At this time, the comparator 86 outputs an H level due to the voltage drop of the parasitic diode of the rectifying switch element 84, and the rectifying switch element 84 is turned on. The inductor current I _L flowing through the inductor 82 flows through the rectifying switch element 84 and the inductor 82 to the output side, and the magnetic energy of the inductor 82 is released. At this time, the comparator 86 outputs the H level due to the voltage drop of the rectifying switch element 84, and the rectifying switch element 84 remains on. The inductor current I _L eventually reaches zero and tries to flow backward, but since the voltage drop of the rectifying switch element 84 is inverted, the comparator 86 outputs L level and the rectifying switch element 84 is turned off. Therefore, according to the DC-DC converter according to the second conventional example, the ground potential from the output side when the main switch element 81 is in the OFF state, which existed in the case of the DC-DC converter according to the first conventional example. It is possible to almost eliminate the period of backflow. As a result, there is almost no power regeneration from the output side to the input side.

  The difference between the operation of the DC-DC converter according to the first conventional example described above and the operation of the DC-DC converter according to the second conventional example will be described.

  The DC-DC converter according to the first conventional example configured to allow a reverse flow in the synchronous rectifier circuit is configured to continuously operate an inductor current at a heavy load (Continuous Conductive Mode :) by power regeneration from the output side to the input side at a light load. On the other hand, the DC-DC converter according to the second conventional example having a configuration that does not allow the reverse flow in the synchronous rectifier circuit has the main switch element and the rectifier switch element at the time of light load. Inductive current discontinuous operation (abbreviated as DCM), in which both periods are off, is present. Compared with the DC-DC converter according to the first conventional example in which a large operating current flows even though the load is light, the DC-DC converter according to the second conventional example with a small operating current at a light load is a light load. It has the feature that the efficiency of time is excellent.

  However, as compared with the DC-DC converter according to the second conventional example in which the operation mode changes between a light load and a heavy load, the DC-DC according to the first conventional example that operates with the CCM regardless of the light load. The converter has a fast response to load fluctuations. In particular, when the load suddenly becomes light, power regeneration from the output side to the input side is possible, so it has the feature that it suppresses overshoot that occurs in the output DC voltage and quickly returns to the target value. .

  By the way, there is a current peak value control type DC-DC converter that detects and adjusts the peak value of the inductor current for the purpose of controlling the output DC voltage. The DC-DC converter of the current peak value control system has an advantage that the inductor is equivalently used as a current source circuit, so that the influence of LC resonance with the smoothing capacitor is small, the control is easy, and the transient response performance is fast.

  However, the DC-DC converter of the current peak value control system has a restriction that the duty ratio D cannot be made zero because there is a minimum value in the ON time of the main switch element due to its control operation. In particular, when detecting the peak value of the inductor current that flows through the inductor when the main switch element is in the ON state, the specified time from turn-on is set as the dead time in order to prevent false detection due to surge current that occurs when the main switch element is turned on. Set as Such a dead time also increases the minimum value of the on-time. For this reason, in the case of a DC-DC converter having a configuration that does not allow reverse flow in the synchronous rectifier circuit, like the DC-DC converter according to the second conventional example, in order to achieve output stabilization at light load It is necessary to extend the off time of the main switch element, and theoretically, the switching frequency reaches zero when there is no load. A large change in the switching frequency due to the load condition degrades the transient response performance to a sudden load change or the like. From the above, in the DC-DC converter of the current peak value control system, in many cases, the synchronous rectifier circuit is configured to allow a backflow for the purpose of utilizing high-speed response.

<Third conventional example>
FIG. 22 shows a circuit configuration of a DC-DC converter according to a third conventional example. Specifically, the circuit configuration of a current peak value control type step-down converter configured to allow backflow in the synchronous rectifier circuit described above. Is shown.

As shown in FIG. 22, the DC-DC converter according to the third conventional example is the first conventional example in that it includes a main switch element 81, an inductor 82, a smoothing capacitor 83, and a rectifying switch element 84. The circuit configuration of the DC-DC converter according to FIG. On the other hand, the difference from the DC-DC converter according to the first conventional example shown in FIG. 20A is that the output DC voltage V _o is detected to generate an error signal V _{e in} which the error from the target value is amplified. An error amplification circuit 87, a current detection circuit 88 that generates a current detection signal V _c corresponding to the current of the main switch element 81, a comparison circuit 89 that compares the error signal V _e and the current detection signal V _c , and a predetermined circuit NOR an oscillation circuit 90 for generating a clock signal V _ck having a switching frequency and pulse width, a NOR gate 91 is input with the output clock signal V _ck of the comparator circuit 32, while being set by the clock signal V _ck A latch circuit 92 that is reset by the output of the gate 91 and generates a drive signal DR, a first drive signal V _g 1 that inputs the drive signal DR and drives the main switch element 81, and a rectifier switch The drive circuit 93 is configured to generate the second drive signal V _g 2 that drives the element 84.

When the drive signal DR becomes H level, the drive circuit 93 changes the second drive signal V _g 2 from H level to L level, turns off the rectifying switch element 84, and changes the first drive signal V _g 1 from H level. The main switch element 81 is turned on at the L level. On the other hand, when the drive signal DR becomes the L level, the drive circuit 93 changes the first drive signal V _g 1 from the L level to the H level, turns off the main switch element 81, and sets the second drive signal V _g 2 to the L level. The rectifying switch element 84 is turned on from the level to the H level.

  The operation of the DC-DC converter according to the third conventional example shown in FIG. 22 having the above configuration will be described below.

When the clock signal _Vck rises, the latch circuit 92 raises the drive signal DR, and the drive circuit 93 turns off the rectifying switch element 94 while turning on the main switch element 81. When the main switch element 81 is in the ON state, the inductor current I _L flowing through the main switch element 81 increases. Similarly, the current detection signal V _c from the current detection circuit 88 increases. Eventually, when the current detection signal V _c reaches and exceeds the error signal V _e , the comparison circuit 89 inverts the output to the L level. At this time, if the clock signal _Vck is at the L level, the NOR gate 91 outputs the H level, and the latch circuit 92 is reset. Then, the drive signal DR output from the latch circuit 92 becomes L level, and the drive circuit 93 turns off the main switch element 81 while turning on the rectifying switch element 84.

As described above, the DC-DC converter according to the third conventional example shown in FIG. 22 turns off the rectifying switch element 84 and turns on the main switch element 81 when the clock signal _{Vck rises} , When the detection signal V _c reaches and exceeds the error signal V _e , the operation of turning off the main switch element 81 and turning on the rectifying switch element 84 is repeated. The time during which the main switch element 81 is in the on state is shorter as the level of the error signal V _e is lower. However, the output of the comparison circuit 89 is ignored by the NOR gate 91 while the clock signal _Vck is at the H level. Therefore, the pulse width of the clock signal _Vck becomes the minimum value during the time when the main switch element 81 is in the ON state.
Utility Model No. 2555245

  In a DC-DC converter of a current peak value control system (see the third conventional example described above) having a configuration that allows reverse flow in the synchronous rectifier circuit in order to make use of high-speed response, the minimum on-time of the main switch element is minimized. There is an on-time. For this reason, if the input / output voltage is determined and the on time calculated from the input / output relationship is reduced from the minimum on time, the output voltage will rise above the target value. Therefore, the minimum on-time of the main switch element must be ensured under the maximum input voltage no-load condition. However, securing the minimum on-time under a high input voltage no-load condition has a problem that the LC component is downsized and the switching frequency that improves the high-speed response is hindered.

  An object of the present invention is to limit the minimum on-time of a main switch element in a high input voltage no-load condition in a DC-DC converter of a current peak value control system configured to allow reverse flow in a synchronous rectifier circuit. In addition, the present invention is to provide a DC-DC converter capable of reducing the size of LC parts by increasing the switching frequency and improving the high-speed response.

  In order to solve the above problems, a DC-DC converter according to an aspect of the present invention is complementary to an inductor, a first switch to which an input DC voltage is supplied, and an on / off operation of the first switch. A second switch that rectifies the inductor voltage, smoothes the current flowing through the inductor to generate an output DC voltage, and outputs the DC voltage and a given reference voltage. An output error detection unit that generates an error signal according to the error, a current detection unit that generates a current detection signal according to the magnitude of the current flowing into the inductor when the first switch is on, and a current detection signal When the signal level of the error signal reaches the signal level of the error signal, the control drive unit is configured to turn off the first switch and turn on the second switch. Based on the DC voltage or the error signal, a voltage detection unit that detects that the output DC voltage is larger than the target value and outputs a voltage detection signal corresponding to the difference between the output DC voltage and the target value, and a voltage detection signal And an on-voltage adjusting unit that adjusts a voltage drop when at least one of the first switch and the second switch is turned on.

  According to the DC-DC converter according to one aspect of the present invention, when the output DC voltage is larger than the target value, the voltage drop when at least one of the first switch and the second switch is turned on is increased. Thus, the conduction loss can be increased and the output DC voltage can be reduced.

  In the DC-DC converter according to one aspect of the present invention, the voltage detection unit includes a signal generation circuit that generates a reference signal corresponding to the input DC voltage, and an error signal and a reference when the output DC voltage is greater than a target value. It is preferable to have an amplifier circuit that generates a voltage detection signal by amplifying a difference from the signal.

  In this way, the voltage detection unit can appropriately detect that the output DC voltage increases beyond the target value.

  In the DC-DC converter according to one aspect of the present invention, at least one of the first switch and the second switch is formed of a MOSFET, and the on-voltage adjusting unit includes the first switch and the second switch. At least one of the on-resistances is adjusted.

  In the DC-DC converter according to one aspect of the present invention, the first switch and the second switch are both formed of MOSFETs, and the on-voltage adjusting unit includes a gate and a gate input to the first switch and the second switch. There may be a configuration in which the source-to-source voltage is adjusted and the on-resistances of the first switch and the second switch are adjusted.

  In the DC-DC converter according to one aspect of the present invention, at least the second switch is made of a MOSFET, and the on-voltage adjusting unit adjusts the gate-source voltage input to the second switch, The switch may be configured to adjust the on-resistance of the switch.

  In the DC-DC converter according to one aspect of the present invention, each of the first switch and the second switch is formed by connecting a plurality of switches in parallel, and the on-voltage adjusting unit includes the plurality of switches. The voltage drop at the time of ON of the 1st switch and the 2nd switch may be adjusted by selectively driving either.

  In the DC-DC converter according to one aspect of the present invention, the second switch includes a plurality of switches connected in parallel, and the on-voltage adjustment unit selectively selects one of the plurality of switches. It may be configured to adjust the voltage drop when the second switch is turned on by driving.

  In a DC-DC converter of a current peak value control system configured to allow a reverse flow in the synchronous rectifier circuit, if the output DC voltage is to be larger than the target value by the voltage detection circuit, the voltage when the main switch element or the rectifier switch element is turned on By increasing the drop, an increase in the output DC voltage is suppressed. As a result, there is no restriction of ensuring the minimum on-time of the main switch element under a high input voltage no-load condition, and the LC component can be downsized by increasing the switching frequency, and high-speed response can be improved. .

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 shows a circuit configuration of a DC-DC converter according to a first embodiment of the present invention.

  As shown in FIG. 1, the DC-DC converter according to the first embodiment of the present invention includes a chopper circuit 16 and a control drive circuit (control unit) 17.

  The chopper circuit 16 performs an on / off operation in response to a signal input to the control terminal. For example, the main switch element (first switch) 1 made of a MOSFET and the energy storage by the on / off operation of the main switch element 1 Complementary to the ON / OFF operation of the main switch element 1, the inductor 2 that repeats discharging (note that the inductance of the inductor 2 is L), the smoothing capacitor (smoothing unit) 3 that smoothes the current flowing through the inductor 2 It is constituted by a rectifying switch element (second switch) 4 made of, for example, a MOSFET that performs an on / off operation.

Drive control circuit 17, an error amplifier circuit (output error detecting unit) 7 for generating an error signal V _e obtained by amplifying the error between the target value by detecting the output DC voltage V _o, depending on the current of the main switching element 1 and a current detection circuit (current detection portion) 8 for generating a current detection signal V _c, the comparator circuit 9 that compares the error signal V _e and the current detection signal V _c, the clock signal V having a predetermined switching frequency and pulse width _The oscillation circuit 10 for generating _ck , the NOR gate 11 to which the output of the comparison circuit 9 and the clock signal V _ck are input, and the reset by the output of the NOR gate 11 while being set by the clock signal V _ck and the drive signal DR Based on the output DC voltage V _o , the latch circuit 12 that generates the drive signal DR, the drive circuit 13 that receives the drive signal DR and generates the first signal V _g 1 _x and the second signal V _g 2 _x , target output DC voltage V _o is A voltage detection circuit 14 for detecting that greater than, depending on the output of the voltage detection circuit 14, to adjust the level of the first signal V _g 1 _x and a second signal V _g 2 _x, the main switch The on-voltage adjusting circuit 15 generates a first drive signal V _g 1 for driving the element 1 and a second drive signal V _g 2 for driving the rectifying switch element 4. With the above configuration, the control drive circuit 17 controls the on / off operation of the main switch element 1 and the rectifying switch element 4. The first signal V _g 1 _x and the second signal V _g 2 _x are signals for driving the main switch element 1 and the rectifying switch element 4 in normal operation, respectively.

  Hereinafter, the operation of the DC-DC converter according to the first embodiment of the present invention will be described separately for the operation of the chopper circuit 16 and the operation of the control drive circuit 17.

  First, the operation of the chopper circuit will be described.

When the main switch element 1 is in the on state, current flows from the input side to the output side via the main switch element 1 and the inductor 2, and energy is stored in the inductor 2. Ignoring like conduction resistance of the main switching element 1, the inductor current I _L at this time increases linearly. When the on time of the main switch element 1 is T _on , the amount of increase in the inductor current I _L is (V _i −V _o ) × T _on / L. Next, when the main switch element 1 is in the OFF state, a current flows to the output side via the rectifying switch element 4 and the inductor 2, and the energy of the inductor 2 is released. Ignoring like conduction resistance of the rectifying switching element 4, the inductor current I _L at this time decreases linearly. Assuming that the switching period of the main switch element 1 is T, the off time is (T−T _on ), so the amount of decrease in the inductor current I _L is V _o × (T−T _on ) / L.

Above operation is repeated, the inductor current I _L to increase or decrease by the switching operation of the main switching element 1 are averaged by the smoothing effect of the smoothing capacitor 3, is outputted from the smoothing capacitor 3 to the load 6 as an output DC current I _o.

In the steady state, since equal to the increase and decrease of the inductor current I _L,
(V _i −V _o ) × T _on / L = V _o × (T−T _on ) / L
The following input / output relational expression (1) is obtained from the above expression.

V _o = (T _on / T) × V _i = D × V _i (1)
Here, as shown in the equation (1), the ratio (T _on / T) of the on-time T _on to the switching cycle T of the main switch element 1 can be expressed as the duty ratio D, which is apparent from the equation (1). As described above, the output DC voltage V _o can be controlled by adjusting the duty ratio D.

  Next, the operation of the control drive circuit 17 will be described.

First, in the normal state where the output DC voltage V _o is controlled to the target value, the detection signal V _k of the voltage detection circuit 14 is at the zero level, and therefore the on-voltage adjustment circuit 15 that operates according to the detection signal V _k. Outputs the input first signal V _g 1 _x and second signal V _g 2 _{x as} they are. Accordingly, the first drive signal V _g 1 is equal to the first signal V _g 1 _x and the second drive signal V _g 2 is equal to the second signal V _g 2 _x .

When the clock signal V _ck output from the oscillation circuit 9 rises, the latch circuit 12 raises the drive signal DR, and the first drive signal V _g 1 output from the drive circuit 13 via the on-voltage adjusting circuit 15 The second drive signal V _g 2 turns off the rectifying switch element 4 and turns on the main switch element 1. When the main switching device 1 is turned on, the inductor current I _L flowing through the main switching device 1 increases. Similarly, the current detection signal V _c from the current detection circuit 8 also increases. When the current detection signal V _c eventually reaches and exceeds the error signal V _e , the comparison circuit 9 inverts the output to a low level. At this time, if the clock signal _Vck is also at a low level, the NOR gate 11 outputs a high level, and the latch circuit 12 is reset. Then, the drive signal DR output from the latch circuit 12 becomes a low level, and the first drive signal V _g 1 and the second drive signal V _g 2 output from the drive circuit 13 via the on-voltage adjusting circuit 15 Turns on the rectifying switch element 4 while turning off the main switch element 1.

When the main switch 1 is in the off state, the inductor current I _L flowing through the rectifying switch element 4 decreases. Thereafter, the clock signal _{Vck rises} again, the latch circuit 12 raises the drive signal DR, and as described above, the rectifying switch element 4 is turned off while the main switch element 1 is turned on.

As described above, the DC-DC converter shown in FIG. 1 turns off the rectifying switch element 4 while turning on the main switch element 1 at the rising _edge of the clock signal _Vck , and the current detection signal _Vc becomes the error signal Vc. _{When e} reaches and exceeds _e , the above operation of turning off the main switch element 1 and turning on the rectifying switch element 4 is repeated.

The on-time of the main switch element 1 becomes shorter as the level of the error signal V _e is lower. However, while the clock signal _Vck is at a high level, the output of the comparison circuit 9 is ignored by the NOR gate 11. Therefore, the pulse width of the clock signal _Vck becomes the minimum value during the time when the main switch element 1 is in the ON state.

Next, when the input DC voltage V _i is high and no load is applied, the output DC voltage is decreased when the ON time T _on for stabilizing the output DC voltage V _o to the target value is less than the minimum ON time. An operation for suppressing the voltage V _o from rising will be described.

When the output DC voltage V _o becomes larger than the target value, the on-voltage adjustment circuit 15 operates according to the detection signal V _k from the voltage detection circuit 14. The output voltage level of the drive signal V _g 1 and V _g 2 to the on-time adjustment circuit 15, the output DC voltage V _o is adjusted to be lower higher than the target value. Thus, the on-resistance of the main switching element 1 and the rectifying switch element 4 increases, the voltage drop when in the ON state is increased, increase in the output DC voltage V _o is suppressed.

  Further, the configuration and operation of the voltage detection circuit 14 and the on-voltage adjustment circuit 15 that constitute the control drive circuit 17 will be described below with reference to FIGS.

  FIG. 2 is a circuit configuration diagram illustrating the configurations of the voltage detection circuit 14 and the on-voltage adjustment circuit 15.

As shown in FIG. 2, the voltage detection circuit 14 detects the voltage detected by the clamp circuit 21, the voltage detection resistor 22, and the voltage detection resistor 22 that are set to allow current to flow when the output DC voltage V _o is exceeded. And amplifying circuit 23 for amplifying. Here, the clamp circuit 21 is, for example, a Zener diode or a shunt regulator, the voltage is set to a value slightly larger than the target value of the output DC voltage V _o.

FIG. 3 shows the relationship between the output DC voltage V _o that is the input of the voltage detection circuit 14 and the detection signal V _k that is the output of the voltage detection circuit 14.

As shown in FIG. 3, if the output DC voltage V _o is the voltage of the control target value or a voltage equal to or lower than the target value, the output DC voltage V _o that is the input of the voltage detection circuit 14 to the clamp circuit 21. Therefore, no voltage is generated across the voltage detection resistor 22. On the other hand, when the output DC voltage V _o rises above the control target value, the output DC voltage V _o is applied to the clamp circuit 21 and the voltage detection resistor 22, so that a voltage is generated across the voltage detection resistor 22. It amplifies the voltage of the voltage across sense resistor 22 by the amplifier circuit 23, and outputs to the subsequent turn-on voltage adjusting circuit 15 as a detection signal V _k.

2, the ON voltage adjusting circuit 15, a subtraction circuit 24 where the signal V _s of the detection signal V _k from the input DC voltage V _i is subtracted is outputted, the bias and the detection signal V _k and the input DC voltage V _i A first signal V _g 1 _x is input as a voltage, and the first drive signal V _g 1 is output, and the signal V _s is a bias voltage and a second signal V _g 2 _x is input. And an amplifier circuit 26 that outputs the second drive signal V _g 2.

FIG. 4A shows the relationship between the detection signal V _k input to the on-voltage adjusting circuit 15, the bias voltage V _r of the amplifier circuit 25, and the bias voltage V _s of the amplifier circuit 26. _{Are the} first signal V _g 1 _x and the second signal V _g 2 _x that are input to the on-voltage adjusting circuit 15 and the first drive signal V _g that is output according to the bias voltages V _r and V _s. 1 and the second shows the relationship between the drive signal V _g 2.

As is clear from FIGS. 4A and 4B, the amplifier circuit 25 outputs the first drive signal V _g 1 that oscillates between the input voltage V _i and the bias voltage V _r, and the main switch The element 1 is turned on / off. The amplifier circuit 26 outputs a second drive signal V _g 2 that oscillates between the bias voltage V _s , which is the output of the subtracting circuit 24, and the ground potential, and turns on / off the rectifying switch element 4. .

From the above, when the output DC voltage V _o increases beyond the target value, the detection signal V _k is output from the voltage detection circuit 14 according to the increase level of the output DC voltage V _o and is input to the on-voltage adjustment circuit 15. . Then, according to the detection signal V _k from the voltage detection circuit 14, the on-voltage adjustment circuit 15 reduces the amplitudes of the first signal V _g 1 _x and the second signal V _g 2 _x , and the first driving is performed. The signal V _g 1 and the second drive signal V _g 2 are output. For this reason, the on-resistance of the main switch element 1 and the rectifying switch element 4 is increased. Therefore, when the on resistance of the main switching element 1 and the rectifying switch element 4 is increased, the voltage drop is also increased at the time of conduction, since the conduction loss increases, increase in the output DC voltage V _o is suppressed.

(Second Embodiment)
Hereinafter, a DC-DC converter according to a second embodiment of the present invention will be described.

  FIG. 5 shows a circuit configuration of a DC-DC converter according to the second embodiment of the present invention. In FIG. 5, constituent elements corresponding to the constituent elements of the DC-DC converter according to the first embodiment of the present invention shown in FIG. 1 are denoted by the same reference numerals, and description thereof will not be repeated.

The DC-DC converter according to the second embodiment of the present invention uses a voltage for detecting the error signal V _e instead of the voltage detection circuit 14 (see FIG. 1) for detecting the output DC voltage V _o shown in FIG. The detection circuit 18 is provided, and the difference from the DC-DC converter according to the first embodiment of the present invention is that the error signal V _e from the error amplification circuit 7 is input to the voltage detection circuit 18.

Here, the voltage detection circuit 18 has a function of outputting a detection signal V _k by detecting the level of the error signal V _e to be output DC voltage V _o rises above the target value.

  The operation of the DC-DC converter according to the second embodiment of the present invention will be described below.

  First, during normal operation, the DC-DC converter according to the second embodiment of the present invention shown in FIG. 5 is the same as the operation of the DC-DC converter according to the first embodiment of the present invention shown in FIG. Since it is similar, the description thereof will not be repeated.

The DC-DC converter according to the second embodiment of the present invention shown in FIG. 5 has a high input DC voltage V _i and no load, and an on-time for stabilizing the output DC voltage V _o to a target value. T _on is below the minimum on time, the output DC voltage V _o is in terms of the operation of the voltage detection circuit 18 for detecting that rises above the target value, the first embodiment of the present invention shown in FIG. 1 This is different from the operation of the DC-DC converter according to the above.

  Next, the voltage detection circuit 18 will be described with reference to FIG.

  FIG. 6 shows a circuit configuration of the voltage detection circuit 18 in the DC-DC converter according to the second embodiment of the present invention.

As shown in FIG. 6, the voltage detection circuit 18 includes a resistor 31 to the input DC voltage V _i is input, a resistor 32 connected to a resistor 31 in series, the input DC voltage V _i is the resistor 31 and 32 a comparison circuit 33 that the divided voltage and the error signal V _e is input, is biased by the ground potential and the output of the comparator circuit 33, the amplifier circuit 34 the error signal V _e is inputted, the comparator circuit The subtracting circuit 35 is biased by the output of 33 and the ground potential, and outputs a difference between the voltage obtained by dividing the input DC voltage V _i by the resistors 31 and 32 and the output signal of the amplifier circuit 34. Yes. Here, the subtraction circuit 35 includes an operational amplifier 36 and resistors 37, 38, 39, and 40, and the resistors 37, 38, 39, and 40 have the same resistance value.

  Next, the operation of the voltage detection circuit 18 shown in FIG. 6 will be described with reference to FIG.

The error signal V _e, by performing the comparison between the peak value of the inductor current I _L, to switch on and off operation of the main switching element 1 and the rectifying switch element 4. For this reason, when the error signal V _e increases, the peak value of the inductor current I _L increases, whereas when the error signal V _e decreases, the peak value of the inductor current I _L decreases.

Here, the peak value Ip of the inductor current I _L at no load is expressed by the following equation (2).
Ip = (V _i −V _o ) × T _on / (2L) (2)
Although represented as, when the on-time T _on is less than the minimum on-time, the output DC voltage V _o rises. For this reason, the error amplifying circuit 7 outputs the error voltage V _e even smaller due to the increased output DC voltage V _o . Therefore, the error signal V _e corresponding to the peak value Ip of the inductor current I _{L at} the minimum on-time is obtained as the switching value V _f , and when the error signal V _e falls below the switching value V _f , the output DC voltage V _o becomes the target value. It is possible to detect that it has risen beyond.

In FIG. 6, the switching value V _f is set by dividing the input DC voltage V _i by the resistors 31 and 32 and is input to the comparison circuit 33. This is because the peak value Ip of the inductor current I _{L at} the minimum on-time becomes higher as the input DC voltage V _i is higher, as shown by the above equation (2), that is, the switching value is higher as the input is higher. This is because _Vf also needs to be increased. In this embodiment, the resistance voltage is simply divided, but the switching value is input-corrected with higher accuracy by connecting a constant voltage source circuit corresponding to the target value of the output DC voltage V _o in series with the resistor 31. be able to.

The comparison circuit 33 receives the error signal V _e and the switching value V _f . In a normal case, since the error signal V _e is larger than the switching value V _f, the output of the comparison circuit 33 shows a low level, so that the amplification circuits 34 and 35 using the output of the comparison circuit 33 as a bias do not operate. In contrast, below the on-time T _on of the main switching element 11 is minimum on time, when the output DC voltage V _o rises above the target value, small error signal V _e of the switching value V _f Therefore, since the output of the comparison circuit 33 indicates a high level, the amplifier circuits 34 and 35 operate. Then, the error signal V _e passes through the amplification circuit 34 and is input to the subtraction circuit 35. Subtraction circuit 35 is the voltage obtained by subtracting the error signal V _e from the switching value V _f of the error signal V _e (V _f -V _e) is output.

Figure 7 is a input-output characteristic diagram showing the relationship between the detection signals V _k output an error signal V _e to be input to the voltage detection circuit 18 shown in FIG.

From the above, as shown in FIG. 7, the voltage detection circuit 18 outputs a zero if the error signal V _e of the switching value V _f of the error signal V _e is large, on the other hand, the error signal V _{When the} error signal V _e is smaller than the switching value V _{f of e} , (V _f −V _e ) is output. Thus, the voltage detection circuit 18 exhibits the input / output characteristics shown in FIG.

In the present embodiment, also in the voltage detection circuit 18 that detects the error signal V _e , the on-resistance of the switch element can be adjusted according to the increase in the output DC voltage V _o , as in the first embodiment. Is possible.

(Third embodiment)
Hereinafter, a DC-DC converter according to a third embodiment of the present invention will be described.

  FIG. 8 shows a circuit configuration of a DC-DC converter according to the third embodiment of the present invention. In FIG. 8, constituent elements corresponding to the constituent elements of the DC-DC converter according to the first embodiment of the present invention shown in FIG. 1 are given the same reference numerals, and the description thereof will not be repeated.

DC-DC converter according to a third embodiment of the present invention shown in FIG. 8, the main switching element and the first driving signal V _g 1 1 and the second rectifying switch element 4 and a drive signal V _g 2 Instead of the on-voltage adjusting circuit 15 to output, an on-voltage adjusting circuit 19 that outputs only the second drive signal V _g 2 of the rectifying switch element 4 is provided, and a function of adjusting only the on-resistance of the rectifying switch element 4 This is different from the DC-DC converter according to the first embodiment of the present invention.

Output becomes ON time for stabilization is smaller than the minimum on-time, the phenomenon that the output DC voltage V _o increases beyond the target value, can occur up to the input voltage at the time of no load when the on-time is minimized Is expensive. Therefore, the rectifying switch element 4 but also to adjust the voltage drop of the ON state, shows it is possible to obtain the effect of suppressing the increase in the output DC voltage V _o, the circuit scale of the on-voltage adjustment circuit 19 in FIG. 1 The ON time adjustment circuit 15 can be made smaller.

  FIG. 9 shows a circuit configuration of the on-voltage adjusting circuit 19.

As shown in FIG. 9, the detection signal V _k is input to the subtraction circuit 24, and the subtraction circuit 24 outputs a voltage (V _i −V _k ) _obtained by subtracting the detection signal V _k from the input DC voltage V _i . The output (V _i −V _k ) from the subtracting circuit 24 becomes the bias voltage V _s of the amplifying circuit 26. The amplifier circuit 26 receives the second signal V _k 2 _x and outputs the second drive signal V _k 2.

FIG. 10A shows the relationship between the detection signal V _k input to the on-voltage adjustment circuit 19 and the bias voltage V _s of the amplifier circuit 26, and FIG. 10B shows the input to the on-voltage adjustment circuit 19. and a second signal V _k 2 _x the first drive signal _{V k 1 (= V k 1} x) being a relationship between the second driving signal V _k 2 which is output in accordance with a bias voltage V _s Show.

As is clear from FIGS. 10A and 10B, when the output DC voltage V _o rises above the target value, the second drive signal V _k 2 input between the gate and source of the rectifying switch element 4. There is reduced, by the on-resistance of the rectifying switching element 4 is increased, the voltage drop during conduction of the rectifying switching element 4 is increased, since the conduction loss increases, increase in the output DC voltage V _o is suppressed.

(Fourth embodiment)
Hereinafter, a DC-DC converter according to a fourth embodiment of the present invention will be described.

  FIG. 11 shows a circuit configuration of a DC-DC converter according to the fourth embodiment of the present invention. In FIG. 11, components corresponding to the components of the DC-DC converter according to the third embodiment of the present invention shown in FIG. 8 are denoted by the same reference numerals, and description thereof will not be repeated.

DC-DC converter according to a fourth embodiment of the present invention shown in FIG. 11, instead of the voltage detection circuit 14 for detecting an output DC voltage V _o, includes a voltage detection circuit 18 for detecting an error signal V _e The output of the comparison circuit 9 is connected to the input of the voltage detection circuit 18, detects that the output DC voltage V _o has increased according to the level of the error signal V _e , and outputs a detection signal V _k. This is different from the DC-DC converter according to the third embodiment of the present invention.

  The voltage detection circuit 18 in the DC-DC converter according to the fourth embodiment of the present invention is similar to the voltage detection circuit 18 in the DC-DC converter according to the second embodiment of the present invention shown in FIG. The input / output characteristics shown in FIG. The input / output characteristics are similar to the input / output characteristics of the voltage detection circuit 14 shown in FIG.

DC-DC converter according to a fourth embodiment of the present invention, the third instead of detecting the output DC voltage V _o as the DC-DC converter according to the embodiment, the error amplifier circuit 7 of the present invention By detecting this error signal V _{e, it} is detected that the output DC voltage V _o has risen beyond the target value. With this configuration, as in the third embodiment, the increase in the output DC voltage V _o can be suppressed. Note that this point is the same as that of the DC-DC converter according to the first embodiment of the present invention in which the voltage detection circuit detects the output DC voltage V _o and the voltage detection circuit in which the error signal V _e is detected. This is the same as the relationship with the DC-DC converter according to the second embodiment.

(Fifth embodiment)
Hereinafter, a DC-DC converter according to a fifth embodiment of the present invention will be described.

  FIG. 12 shows a circuit configuration of a DC-DC converter according to the fifth embodiment of the present invention. 12, constituent elements corresponding to the constituent elements of the DC-DC converter according to the first embodiment of the present invention shown in FIG. 1 are denoted by the same reference numerals, and the description thereof will not be repeated.

DC-DC converter according to a fifth embodiment of the present invention shown in FIG. 12, instead of the voltage detection circuit 14 and the ON voltage adjustment circuit 15 for detecting an output DC voltage V _o, the voltage detection circuit 41 and the ON voltage It differs from the DC-DC converter according to the first embodiment of the present invention in that it has the adjustment circuit 42. Further, the main switch element 1 and the rectifying switch element 4 in the present embodiment are each configured by a plurality of MOSFETs having gate terminals and connected in parallel to each other.

  FIG. 13 shows a circuit configuration of the voltage detection circuit 41, the on-voltage adjustment circuit 42, the main switch element 1, and the rectifying switch element 4.

As shown in FIG. 13, the voltage detection circuit 41 includes a comparison circuit 51 that compares the output DC voltage V _o input to the voltage detection circuit 41 with the reference voltage V _a , and the output DC voltage V _o and the reference voltage (V _a + V _b ) and a comparison circuit 52 for comparing with _{( a} + V _b ). Here, the output of the comparison circuit 51 is a signal V _ka and the output of the comparison circuit 52 is a signal V _kb . Here, the case where the voltage detection circuit 41 is configured by two comparison circuits will be described. However, the present embodiment is not limited to this, and may be configured by one comparison circuit. A configuration in which three or more comparison circuits are connected in parallel may be used. The reference voltage V _a is set according to a level higher than the target value of the output DC voltage V _o.

The on-voltage adjusting circuit 42 receives an OR gate 54a to which the signal V _ka and the first signal V _g 1 _x from the comparison circuit 51 are input, and the signal V _kb and the first signal V _g 1 from the comparison circuit 52. _The OR gate 54b to which _x is input, the AND gate 55a to which the signal V _ka from the comparison circuit 51 is inverted by the inverter 55a and the second signal V _g 2 _x are input, and the comparison circuit 52 The signal V _kb is inverted by an inverter 55b and an AND gate 56b to which a second signal V _g 2 _x is input. The outputs of the OR gates 54a and 54b are the signal V _g 1A and the signal V _g 1B, respectively, and the outputs of the AND gates 56a and 56b are the signals V _g 2A and V _g 2B, respectively.

The main switch element 1 is composed of three P-channel type MOSFETs 1a, 1b and 1c sharing a drain and a source. The gates of the MOSFETs 1a, 1b and 1c are connected to signals V _g 1A, V _g 1B and first The signal V _g 1 _x is input.

The rectifying switch element 4 is constituted by three N-channel MOSFETs 4a, 4b and 4c sharing a drain and a source. The gates of the MOSFETs 4a, 4b and 4c are connected to the signals V _g 2A, V _g 2B and the second The signal V _g 2 _x is input.

  The operation of the DC-DC converter according to the fifth embodiment of the present invention will be described below.

  First, during normal operation, the DC-DC converter according to the fifth embodiment of the present invention shown in FIG. 12 is the same as the operation of the DC-DC converter according to the first embodiment of the present invention shown in FIG. Since it is similar, the description thereof will not be repeated.

The operation of the DC-DC converter according to the fifth embodiment of the present invention shown in FIG. 13 is different from the operation of the DC-DC converter according to the first embodiment of the present invention shown in FIG. DC voltage V _o is the operation of the voltage detection circuit 41 and the oN voltage adjusting circuit 42 and the main switching element 1 and the rectification switching element 4 for detecting the voltage level in the case of rise above the target value.

  First, operations of the voltage detection circuit 41 and the on-voltage adjustment circuit 42 will be described.

When the output DC voltage V _o is controlled to the target value and the output DC voltage V _o is compared with the reference voltage, the output DC voltage V _o is smaller, so the output V _ka from the comparison circuits 51 and 52 is smaller. And V _kb indicates a low level. In this state, when the first signal V _g 1 _x indicates a high level, the outputs V _g 1A and V _g 1B of the OR gates 54a and 54b output a high level, while the first signal V _g 1 _{When x} indicates a low level, the outputs V _g 1A and V _g 1B of the OR gates 54a and 54b indicate a low level, so that the MOSFETs 1a, 1b, and 1c constituting the main switch element 1 are all the first signal V. driven by _g 1 _x . Since the low level signals V _ka and V _kb are all inverted to the high level via the inverters 55a and 55b, the outputs of the AND gates 56a and 56b are the same as the second signal V _g 2 _x. . Accordingly, the MOSFETs 4a, 4b and 4c constituting the rectifying switch element 4 are all driven by the second signal V _g 2 _x .

When the output DC voltage V _o rises above the target value and exceeds the reference voltage V _a , the output V _kb of the comparison circuit 52 shows a low level, but the output V _ka of the comparison circuit 51 shows a high level. In this state, the output V _g 1A of the OR gate 54a is fixed to the high level, the output V _g 2A of the OR gate 54b is fixed to the low level, and the MOSFET 1a among the MOSFETs constituting the main switch element 1 is turned off. Of the MOSFETs that are fixed and constitute the rectifying switch element 4, the MOSFET 4a is fixed in the OFF state.

When the output DC voltage V _o further rises and exceeds the reference voltage (V _a + V _b ), the output V _{kb of the} comparison circuit 52 also shows a high level. Of the MOSFETs constituting the main switch element 1, the MOSFETs 1a and 1b are fixed in the off state, and among the MOSFETs constituting the rectifying switch element 4, the MOSFETs 4a and 4b are fixed in the off state.

As described above, as the output DC voltage V _o increases beyond the target value, the comparison circuit of the voltage detection circuit 41 operates to output the output signal V _k , and the main switch element 1 and the rectifying switch element 4. By sequentially stopping a plurality of switch elements (MOSFETs) connected in parallel constituting each of the above, the voltage drop during the overall conduction of the main switch element 1 and the rectifying switch element 4 is increased, increase in the output DC voltage V _o for conduction losses increase is suppressed.

(Sixth embodiment)
Hereinafter, a DC-DC converter according to a sixth embodiment of the present invention will be described.

  FIG. 14 shows a circuit configuration of a DC-DC converter according to the sixth embodiment of the present invention. 14, components corresponding to the components of the DC-DC converter according to the fifth embodiment of the present invention shown in FIG. 12 are denoted by the same reference numerals, and the description thereof will not be repeated.

DC-DC converter according to a sixth embodiment of the present invention shown in FIG. 14, instead of the voltage detection circuit 41 for detecting an output DC voltage V _o, includes a voltage detection circuit 43 for detecting an error signal V _e and is the error signal V _e from the error amplifier circuit 7 is input to the voltage detection circuit 43, the voltage detection circuit 43 that the output DC voltage V _o rises above the target value, the level of the error signal V _e This is different from the DC-DC converter according to the fifth embodiment of the present invention in that it has a function of detecting the output signal _Vk and outputting the detection signal Vk.

  FIG. 15 shows a circuit configuration of the voltage detection circuit 43, the on-voltage adjustment circuit 42, the main switch element 1, and the rectifying switch element 4.

The basic operation of the DC-DC converter according to the sixth embodiment of the present invention shown in FIG. 14 is the same as the operation of the DC-DC converter according to the fifth embodiment shown in FIG. The operation relating to the voltage detection circuit 43 for detecting the level of the error signal V _e is different.

  First, the configuration of the voltage detection circuit 43 shown in FIG. 15 will be described.

Voltage detection circuit 43 shown in FIG. 15, a comparator circuit 57 for comparing the error signal V _e and the reference voltage V _aa, a comparator circuit 58 for comparing the error signal V _e and the reference voltage (V _aa + V _bb) It is constituted by. An output from the comparison circuit 57 is a signal V _ka and an output from the comparison circuit 58 is a signal V _kb . Here, the case where the voltage detection circuit 43 is configured by two comparison circuits will be described. However, the present embodiment is not limited to this, and may be configured by one comparison circuit. A configuration in which three or more comparison circuits are connected in parallel may be used. The reference voltage (V _aa + V _bb ) is set in accordance with a level lower than the error signal V _e when the output DC voltage V _o is controlled to the target value.

  Next, the operation of the voltage detection circuit 43 will be described.

When the output DC voltage V _o is controlled to the target value, when the error signal V _e is compared with the reference voltage, the error signal V _e is larger, so the outputs V _ka and V from the comparison circuits 57 and 58 are larger. _kb indicates a low level. In this state, when the first signal V _g 1 _x indicates a high level, the outputs V _g 1A and V _g 1B of the OR gates 54a and 54b output a high level, while the first signal V _g 1 _{When x} indicates a low level, the outputs V _g 1A and V _g 1B of the OR gates 54a and 54b indicate a low level, so that the MOSFETs 1a, 1b, and 1c constituting the main switch element 1 are all the first signal V. driven by _g 1 _x . Since the low level signals V _ka and V _kb are all inverted to the high level via the inverters 55a and 55b, the outputs of the AND gates 56a and 56b are the same as the second signal V _g 2 _x. . Accordingly, the MOSFETs 4a, 4b and 4c constituting the rectifying switch element 4 are all driven by the second signal V _g 2 _x .

When the output DC voltage V _o rises above the target value, the error signal V _e decreases accordingly, and the voltage level of the error signal V _e falls below the reference voltage (V _aa + V _bb ), the output V of the comparison circuit 58 _{Although kb} indicates a low level, the output V _ka of the comparison circuit 57 indicates a high level. In this state, the output V _g 1A of the OR gate 54a is fixed to the high level, the output V _g 2A of the OR gate 54b is fixed to the low level, and the MOSFET 1a among the MOSFETs constituting the main switch element 1 is turned off. Of the MOSFETs that are fixed and constitute the rectifying switch element 4, the MOSFET 4a is fixed in the OFF state.

When the output DC voltage V _o further increases, the error signal V _e further decreases, and the voltage level of the error signal V _e falls below the reference voltage V _aa , the output V _kb of the comparison circuit 57 also shows a high level. Of the MOSFETs constituting the main switch element 1, the MOSFETs 1a and 1b are fixed in the off state, and among the MOSFETs constituting the rectifying switch element 4, the MOSFETs 4a and 4b are fixed in the off state.

As described above, as the output DC voltage V _o increases beyond the target value, the comparison circuit of the voltage detection circuit 43 operates to output the output signal V _k , and the main switch element 1 and the rectifying switch element 4. By sequentially stopping a plurality of switch elements (MOSFETs) connected in parallel constituting each of the above, the voltage drop during the overall conduction of the main switch element 1 and the rectifying switch element 4 is increased, increase in the output DC voltage V _o for conduction losses increase is suppressed.

(Seventh embodiment)
Hereinafter, a DC-DC converter according to a seventh embodiment of the present invention will be described.

  FIG. 16 shows a circuit configuration of a DC-DC converter according to the seventh embodiment of the present invention. In FIG. 16, components corresponding to the components of the DC-DC converter according to the fifth embodiment of the present invention shown in FIG. 12 are denoted by the same reference numerals, and description thereof will not be repeated.

The DC-DC converter according to the seventh embodiment of the present invention shown in FIG. 16 is connected in parallel in that it has an on-voltage adjusting circuit 44 configured to adjust a voltage drop when only the rectifying switch element 4 is turned on. The DC− according to the fifth embodiment of the present invention has a configuration for adjusting the voltage drop at the time of ON by selectively stopping the main switch element 1 and the rectifying switch element 4 constituted by a plurality of switches. It is different from the DC converter. As described in the third embodiment described above, the phenomenon that the output DC voltage V _o increases beyond the target value is likely to occur to the highest input voltage at the time of no load when the on-time is minimized. Therefore, the rectifying switch element 4 but also to adjust the voltage drop of the ON state, shows it is possible to obtain the effect of suppressing the increase in the output DC voltage V _o, the circuit scale of the on-voltage adjustment circuit 44 in FIG. 12 The ON time adjustment circuit 42 can be made smaller.

  The operation of the DC-DC converter according to the seventh embodiment of the present invention will be described below.

  First, in the normal operation, the DC-DC converter according to the seventh embodiment of the present invention shown in FIG. 16 operates as the DC-DC converter according to the fifth embodiment of the present invention shown in FIG. The description thereof will not be repeated.

  The operation of the DC-DC converter according to the seventh embodiment of the present invention shown in FIG. 16 is different from the operation of the DC-DC converter according to the fifth embodiment of the present invention shown in FIG. 17 shows the operation of the on-voltage adjusting circuit 44 shown in FIG.

  Hereinafter, the configuration and operation of the on-voltage adjusting circuit 44 will be described in detail.

  FIG. 17 shows a circuit configuration of the voltage detection circuit 41, the on-voltage adjustment circuit 44, the main switch element 1, and the rectifying switch element 4.

As shown in FIG. 17, the on-voltage adjusting circuit 44 includes an AND gate 56a to which a signal obtained by inverting the output V _ka from the voltage detection circuit 41 by the inverter 55a and the second signal V _g 2 _x are input. The output V _kb from the voltage detection circuit 41 is configured by an AND gate 56b to which a signal obtained by inverting the output V _kb by the inverter 55b and the second signal V _g 2 _x are input.

When the output DC voltage V _o is controlled to the target value and the output DC voltage V _o is compared with the reference voltage V _a , the output DC voltage V _o is smaller. V _ka and V _kb indicate low levels. In this state, since the outputs of the AND gates 56a and 56b are the same as the second signal V _g 2 _x , the MOSFETs 4a, 4b and 4c constituting the rectifying switch element 4 are all the second signal V Driven by _g 2 _x .

When the output DC voltage V _o rises above the target value and exceeds the reference voltage V _a , the output V _kb from the comparison circuit 52 shows a low level, but the output V _ka of the comparison circuit 51 shows a high level. In this state, the output V _g 2A of the OR gate 54b is fixed to the low level, and the MOSFETs 4a and 4b among the MOSFETs constituting the rectifying switch element 4 are fixed to the off state. On the other hand, the first signal V _g 1 _x drives the main switch element 1 without going through the on-voltage adjusting circuit 44. That is, the first drive signal V _g 1 is equal to the first signal V _g 1 _x .

As described above, as the output DC voltage V _o increases beyond the target value, the comparison circuit of the voltage detection circuit 41 operates to output the output signal V _k , thereby configuring the rectifying switch element 4. by stopping a plurality of switching elements connected in parallel (MOSFET) sequentially, the voltage drop at the overall conduction of the rectifying switching element 4 increases, conduction losses of the output DC voltage V _o to increase The rise is suppressed.

(Eighth embodiment)
The DC-DC converter according to the eighth embodiment of the present invention will be described below.

  FIG. 18 shows a circuit configuration of a DC-DC converter according to the eighth embodiment of the present invention. In FIG. 18, components corresponding to the components of the DC-DC converter according to the seventh embodiment of the present invention illustrated in FIG. 16 are denoted by the same reference numerals, and description thereof will not be repeated.

DC-DC converter according to an eighth embodiment of the present invention shown in FIG. 18, instead of the voltage detection circuit 41 for detecting an output DC voltage V _o, includes a voltage detection circuit 43 for detecting an error signal V _e and is the error signal V _e from the error amplifier circuit 7 is input to the voltage detection circuit 43, the voltage detection circuit 43 that the output DC voltage V _o rises above the target value, the level of the error signal V _e detection signal V _k in that it has a function of outputting is different from the first 7 DC-DC converter according to an embodiment of the present invention is detected by.

  The operation of the DC-DC converter according to the eighth embodiment of the present invention will be described below.

  First, in normal operation, the DC-DC converter according to the eighth embodiment of the present invention shown in FIG. 18 operates as the DC-DC converter according to the seventh embodiment of the present invention shown in FIG. The description thereof will not be repeated.

The difference between the operation of the DC-DC converter according to the eighth embodiment of the present invention shown in FIG. 18 and the operation of the DC-DC converter according to the seventh embodiment of the present invention shown in FIG. This is the operation of the voltage detection circuit 43 that detects the level of the signal V _e .

In FIG. 18, the voltage detection circuit 43 is the same as the configuration of the voltage detection circuit 43 in the DC-DC converter according to the sixth embodiment shown in FIGS. 14 and 15, and the operation is also the same. That is, in a state where the output DC voltage V _o is controlled to the target value, the outputs V _ka and V _kb from the comparison circuits 58 and 57 show a low level, and as the output DC voltage V _o rises above the target value. The output V _ka from the comparison circuit 58 shows a high level, and the output V _kb from the comparison circuit 57 also becomes a high level. Thus, in a state where the output DC voltage V _o is controlled to the target value, the MOSFETs 4a, 4b and 4c constituting the rectifying switch element 4 are all driven by the second signal V _g 2 _x and the output DC voltage V _{As o} rises above the target value, among the MOSFETs constituting the rectifying switch element 4, the MOSFET 4a is fixed in the off state, and further, the MOSFETs 4a and 4b are fixed in the off state. On the other hand, the first signal V _g 1 _x drives the main switch element 1 without going through the on-voltage adjusting circuit 44. That is, the first drive signal V _g 1 is equal to the first signal V _g 1 _x .

As described above, as the output DC voltage V _o increases beyond the target value, the comparison circuit of the voltage detection circuit 43 operates to output the output signal V _k , thereby configuring the rectifying switch element 4. by stopping a plurality of switching elements connected in parallel (MOSFET) sequentially, the voltage drop at the overall conduction of the rectifying switching element 4 increases, conduction losses of the output DC voltage V _o to increase The rise is suppressed.

In the DC-DC converter according to the first to eighth embodiments described above, the step-down converter is used. However, the present invention is not limited to the step-down converter.

All synchronous rectification type switching types that obtain output by rectifying and smoothing the inductor voltage by repeatedly storing and releasing energy in the inductor by the main switch element and rectifier switch element that alternately turn on and off. The present invention can be applied to a DC-DC converter.

  Although the step-down converter has been described as the DC-DC converter according to the first to eighth embodiments described above, the present invention is not limited to the step-down converter. A DC-DC converter which has a synchronous rectifier circuit and controls an output DC voltage by detecting and adjusting a peak value of an inductor current or a current of a main switch element, and backflows to the rectifier switch element 4 at a light load The present invention can be applied to all switching DC-DC converters that can maintain a continuous operation mode by allowing

Further, the DC-DC converters according to the first to eighth embodiments described above have a more preferable circuit configuration in which the drive circuit 13 that outputs the first and second signals V _g 1 _x and V _g 2 _x is provided. However, the drive circuit 13 is not necessarily an essential circuit, and the first and second signals V _g 1 _x and V _g 2 _x may be output from the latch circuit 12.

As described above, the DC-DC converters according to the first, third, fifth, and seventh embodiments are configured to include a voltage detection circuit that directly monitors the output DC voltage V _o, and thus the error signal. Compared to the DC-DC converters according to the second, fourth, sixth and eighth embodiments having the voltage detection circuit for monitoring V _e , there is an advantage that the response characteristic is excellent.

  The present invention is useful for a power supply circuit capable of supplying a stable DC voltage to various electronic circuits.

1 is a circuit configuration diagram of a DC-DC converter according to a first embodiment of the present invention. It is a circuit block diagram of the voltage detection circuit and ON voltage adjustment circuit in the DC-DC converter which concerns on the 1st Embodiment of this invention. It is an input-output characteristic figure of the voltage detection circuit in the DC-DC converter which concerns on the 1st Embodiment of this invention. (A) is a bias characteristic diagram of the on-voltage adjusting circuit in the DC-DC converter according to the first embodiment of the present invention, and (b) is a DC-DC converter according to the first embodiment of the present invention. FIG. 6 is an input / output characteristic diagram of an on-voltage adjusting circuit in FIG. It is a circuit block diagram of the DC-DC converter which concerns on the 2nd Embodiment of this invention. It is a circuit block diagram of the voltage detection circuit in the DC-DC converter which concerns on the 2nd Embodiment of this invention. It is an input-output characteristic figure of the voltage detection circuit in the DC-DC converter which concerns on the 2nd Embodiment of this invention. It is a circuit block diagram of the DC-DC converter which concerns on the 3rd Embodiment of this invention. It is a circuit block diagram of the ON voltage adjustment circuit in the DC-DC converter which concerns on the 3rd Embodiment of this invention. (A) is a bias characteristic view of the on-voltage adjusting circuit in the DC-DC converter according to the third embodiment of the present invention, and (b) is a DC-DC converter according to the third embodiment of the present invention. FIG. 6 is an input / output characteristic diagram of an on-voltage adjusting circuit in FIG. It is a circuit block diagram of the DC-DC converter which concerns on the 4th Embodiment of this invention. It is a circuit block diagram of the DC-DC converter which concerns on the 5th Embodiment of this invention. It is a circuit block diagram of the voltage detection circuit, ON voltage adjustment circuit, main switch element, and rectifier switch in the DC-DC converter which concerns on the 5th Embodiment of this invention. It is a circuit block diagram of the DC-DC converter which concerns on the 6th Embodiment of this invention. It is a circuit block diagram of the voltage detection circuit in the DC-DC converter which concerns on the 6th Embodiment of this invention, an ON voltage adjustment circuit, a main switch element, and a rectifier switch. It is a circuit block diagram of the DC-DC converter which concerns on the 7th Embodiment of this invention. It is a circuit block diagram of the voltage detection circuit in the DC-DC converter which concerns on the 7th Embodiment of this invention, an ON voltage adjustment circuit, a main switch element, and a rectifier switch element. It is a circuit block diagram of the DC-DC converter which concerns on the 8th Embodiment of this invention. It is a circuit block diagram of the voltage detection circuit, ON voltage adjustment circuit, main switch element, and rectification switch element in the DC-DC converter which concerns on the 8th Embodiment of this invention. (A) is a circuit block diagram of the DC-DC converter which concerns on a 1st prior art example, (b) is a waveform figure of the inductor current of the DC-DC converter which concerns on a 1st prior art example. (A) is a circuit block diagram of the DC-DC converter which concerns on a 2nd prior art example, (b) is a waveform figure of the inductor current of the DC-DC converter which concerns on a 2nd prior art example. It is a circuit block diagram of the DC-DC converter which concerns on a 3rd prior art example.

Explanation of symbols

1 Main switch element (first switch)
2 Inductor 3 Smoothing capacitor (smoothing part)
4 Rectifier switch element (second switch)
6 Load 7 Error amplification circuit (output error detector)
8 Current detection circuit (current detection unit)
9 Comparison Circuit 10 Oscillation Circuit 11 NOR Gate 12 Latch Circuit 13 Drive Circuits 14 and 18 Voltage Detection Circuit (Voltage Detection Unit)
15, 19 ON voltage adjustment circuit (ON voltage adjustment unit)
16 Chopper circuit 17 Control drive circuit (control unit)

Claims (7)

An inductor;
A first switch to which an input DC voltage is supplied;
A second switch that performs on / off operation complementary to the on / off operation of the first switch and rectifies the voltage of the inductor;
A smoothing unit that smoothes a current flowing through the inductor to generate an output DC voltage;
An output error detector that generates an error signal according to an error between the output DC voltage and a given reference voltage;
A current detection unit that generates a current detection signal according to a magnitude of a current flowing into the inductor when the first switch is in an ON state;
When the signal level of the current detection signal reaches the signal level of the error signal, a control drive unit that turns off the first switch while turning on the second switch,
The control drive unit is
Based on the output DC voltage or the error signal, a voltage detection unit that detects that the output DC voltage is larger than a target value and outputs a voltage detection signal corresponding to the difference between the output DC voltage and the target value When,
A DC-DC converter comprising: an on-voltage adjusting unit that adjusts a voltage drop when at least one of the first switch and the second switch is turned on according to the voltage detection signal. The voltage detector is
A signal generation circuit for generating a reference signal according to the input DC voltage;
An amplification circuit that generates the voltage detection signal by amplifying a difference between the error signal and the reference signal when the output DC voltage is larger than the target value. The DC-DC converter according to claim 1. At least one of the first switch and the second switch is a MOSFET,
2. The DC-DC converter according to claim 1, wherein the on-voltage adjusting unit adjusts an on-resistance of at least one of the first switch and the second switch. The first switch and the second switch are both composed of the MOSFET,
The on-voltage adjusting unit adjusts the gate-source voltage input to the first switch and the second switch, and adjusts the on-resistance of the first switch and the second switch. 4. The DC-DC converter according to claim 3, wherein At least the second switch comprises the MOSFET;
4. The DC-DC according to claim 3, wherein the on-voltage adjusting unit adjusts an on-resistance of the second switch by adjusting a gate-source voltage input to the second switch. converter. Each of the first switch and the second switch comprises a plurality of switches connected in parallel,
The on-voltage adjusting unit adjusts a voltage drop when the first switch and the second switch are turned on by selectively driving any one of the plurality of switches. The DC-DC converter according to claim 1. The second switch comprises a plurality of switches connected in parallel,
The on-voltage adjusting unit adjusts a voltage drop when the second switch is on by selectively driving any one of the plurality of switches. DC-DC converter.

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