JP2007106017A - Printing head and imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To correct the amount of light of LED correspondingly with the dispersion of a position between the LED's in an LED printing head. <P>SOLUTION: A signal generating circuit 100 which generates a lighting signal ΦI in order to control the amount of light of the LED, decides an output value of the lighting signal ΦI by adding a correction value of the amount of light for setting the amount of light of each LED to a specified target value and a positional error level from an arrangement position from a viewpoint of design of the LED. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a print head used for a print head of an image forming apparatus such as a copying machine or a printer, and more particularly to a print head using an LED as a light emitting element.

  In recent years, an LED print head (LPH: LED Print Head) composed of a self-scanning LED (SLED) array is used as a print head for an image forming apparatus such as an electrophotographic copying machine or printer. ) Has been developed. Such an SLED can employ a thyristor structure in a switching unit that selectively turns on and off an LED, which is a light emitting element, so that the switching unit and the LED can be arranged on the same chip. In addition, since the LED can be driven by two signal lines that transmit a timing signal for setting the LED to an on / off state and one signal line that transmits an image signal to the LED. It is also possible to simplify the wiring. Therefore, LPH using SLED is a very effective print head for downsizing the apparatus.

In such SLED, each LED is transmitted by transmitting (scanning) the lighting-enabled state (on state) of each LED one after another by a switching unit having a thyristor structure, and transmitting a pulse width modulated image signal in synchronization therewith. Lights up. Therefore, the amount of light emitted from each LED of the SLED is set by the pulse width of the image signal.
However, in each LED in the SLED, even if a signal having the same pulse width is received as an image signal, the amount of emitted light of each LED generally differs. That is, the amount of LED light emitted from the LPH varies due to differences in emission characteristics of the LEDs due to manufacturing variations, variations in the arrangement positions of the LEDs, and the like. In an LPH with a structure in which LEDs are arranged in a line in the main scanning direction, variations in the amount of light of each LED have a large effect on image quality, and image quality defects such as streaks along the sub-scanning direction and density unevenness in the main scanning direction Will be generated. Therefore, it is necessary to correct the light amount of each LED arranged in the LPH so that the light amounts of all the LEDs are within a predetermined range.

Thus, as a conventional technique for correcting the light amount of each light emitting element, there is a technique for reducing the variation in the light amount of each LED by controlling the current supplied to the SLED according to the light amount correction value data (for example, , See Patent Document 1).
In addition, since streaks and density irregularities are likely to be noticeable depending on the screen angle of the image, the correction of the beam area with respect to the variation of the beam area of each LED and the weight correction according to the screen angle of the pixel data are used as the light amount correction value. There is also a technique of superimposing (see, for example, Patent Document 2).

JP-A-10-297017 (page 3-4) Japanese Patent Laying-Open No. 2004-148652 (page 5-6)

By the way, in the LPH, usually, a plurality of (for example, 128) LEDs are arranged in an array on one chip, and the chips are connected to a circuit board in a plurality of (for example, 58) lines. It is constituted by. In particular, in a high-definition LPH such as 1200 dpi, adjacent chips are alternately arranged in a staggered manner in order to increase the accuracy of the continuity of each LED array at the connecting portion between the chips.
However, even if the chips are arranged in a staggered manner to improve the continuity of the LED arrangement, the LED arrangement positions are likely to be displaced from the designed arrangement positions between adjacent chips. In addition, at the time of manufacturing, even in the same chip, there is a possibility that the arrangement positions of the LEDs vary.
For this reason, when an image is formed in an image forming apparatus equipped with an LPH, due to variations in the positions of the LEDs in the sub-scanning direction and / or main scanning direction, the formed image depends on the screen angle. There may be image defects such as black stripes and white stripes.

  Note that, as in the technique described in Patent Document 1 described above, simply correcting the light amount for each pixel based on the light amount correction value data for each LED eliminates image defects caused by variations in the position between the LEDs. It cannot be resolved. Moreover, even if the weight correction according to the screen angle is superimposed on the light amount correction value as in the technique described in Patent Document 2, the degree of occurrence of black stripes and white stripes depends on the amount of positional deviation between the LEDs. Because of differences, it is difficult to adequately cope with the above problems.

  Accordingly, the present invention has been made to solve the technical problems as described above, and an object of the present invention is to correct the amount of light of the LED in the LED print head corresponding to the variation in position between the LEDs. Is to realize.

  For this purpose, the print head of the present invention is a print head for exposing an image carrier in an image forming apparatus, and controls a plurality of light emitting elements arranged in a line and the light quantity of the light emitting elements. A driving circuit that generates a lighting signal for the light emitting element, and the driving circuit includes a light amount correction value for setting the light amount of each of the light emitting elements to a predetermined target value, and a positional error amount from a design arrangement position of the light emitting element. In consideration of the above, the output value of the lighting signal is determined.

Here, the drive circuit converts the positional error amount of the light emitting element into an image density change amount in an image formed by the image forming apparatus, and the image density change amount converted by the conversion table by the light emitting element. It is possible to provide a density / light quantity conversion unit for converting to a light quantity correction value. In particular, the drive circuit uses the conversion table to convert the positional error amount of the light emitting element in the sub-scanning direction into an image density change amount corresponding to the screen angle of the image formed by the image forming apparatus. You can also.
The drive circuit may include a conversion table that converts a positional error amount of the light emitting element into a light amount correction value in the light emitting element. In particular, the drive circuit uses the conversion table to convert a positional error amount of the light emitting element in the sub-scanning direction into a light amount correction value corresponding to the screen angle of the image formed by the image forming apparatus. You can also.

In addition, the drive circuit may be characterized by using a position error amount of the light emitting element in the main scanning direction and / or the sub scanning direction. Furthermore, a memory in which the light amount correction value and the position error amount are stored in advance is further provided, and the drive circuit can acquire the light amount correction value and the position error amount from the memory. In particular, the drive circuit may be characterized in that the light amount correction value and the position error amount are acquired by being downloaded from the memory when the image forming apparatus is activated.
In addition, the light emitting elements are arranged in plural on the chip members alternately arranged in a staggered pattern, and the drive circuit is arranged in the sub-scanning direction of the light emitting elements due to the chip members arranged in a staggered pattern. It is possible to use a positional error amount corrected in consideration of the positional deviation in advance.

Further, the present invention is regarded as an image forming apparatus, and the image forming apparatus of the present invention outputs a photoconductor, a print head for exposing the photoconductor, and screen angle data indicating a screen angle of an image formed on the photoconductor. The print head includes a plurality of light-emitting elements arranged in a line, and a drive circuit that controls the light amount of the light-emitting elements by pulse width modulation. The pulse width is determined in consideration of the light amount correction value for setting the value to the predetermined target value, the position error amount from the design arrangement position of the light emitting element, and the screen angle data output from the image processing unit. It is characterized by that.
Here, the drive circuit adds the light amount correction value generated based on the position error amount in the sub-scanning direction and the screen angle data to the light amount correction value for setting the light amount of the light emitting element to a predetermined target value. It is possible to generate density unevenness correction data and determine the pulse width based on the density unevenness correction data. In addition, the drive circuit corrects density unevenness by further adding the light amount correction value generated corresponding to the position error amount in the main scanning direction to the light amount correction value for setting the light amount of the light emitting element to a predetermined target value. It can also be characterized by generating data.

  According to the present invention, it is possible to obtain a high-quality image in which the occurrence of streaks and image density unevenness is suppressed even when there is variation in the arrangement position of each LED in the LED print head.

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.
FIG. 1 is a diagram showing an overall configuration of an image forming apparatus using an LED print head to be measured in the present embodiment. The image forming apparatus shown in FIG. 1 is a so-called tandem digital color printer 1, and includes an image forming process unit 10 that forms an image corresponding to image data of each color, a control unit 30 that controls the image forming process unit 10, For example, an image processing unit (IPS: Image Processing System) 40 that is connected to a personal computer (PC) 2 and an image reading device (IIT) 3 and performs predetermined image processing on image data received from these devices is provided. .

The image forming process unit 10 includes four image forming units 11Y, 11M, 11C, and 11K that are arranged in parallel at a predetermined interval. The image forming units 11Y, 11M, 11C, and 11K uniformly charge the surface of the photosensitive drum 12 as an image carrier that forms an electrostatic latent image and carries a toner image with a predetermined potential. The charger 13, the LED print head (LPH) 14 as an exposure device that exposes the photosensitive drum 12 charged by the charger 13, the developing device 15 that develops the electrostatic latent image obtained by the LPH 14, and the photosensitive after transfer A cleaner 16 for cleaning the surface of the body drum 12 is provided.
Further, a density detection circuit 17 that detects the toner image density of a test patch (density sample) formed on the photosensitive drum 12 is provided in the vicinity of the downstream side of the developing device 15 so as to face the photosensitive drum 12. It has been. The density detection circuit 17 is connected to the control unit 30 and outputs a toner image density detection value.
Here, the image forming units 11Y, 11M, 11C, and 11K are configured in substantially the same manner except for the toner stored in the developing unit 15. The image forming units 11Y, 11M, 11C, and 11K respectively form yellow (Y), magenta (M), cyan (C), and black (K) toner images.

  In addition, the image forming process unit 10 includes an intermediate transfer belt 21 to which the toner images of the respective colors formed on the photosensitive drums 12 of the image forming units 11Y, 11M, 11C, and 11K are transferred in a multiple manner, and the image forming units 11Y and 11Y. A primary transfer roll 22 as a primary transfer charger for sequentially transferring (primary transfer) each color toner image of 11M, 11C, and 11K to the intermediate transfer belt 21, and a superimposed toner image transferred onto the intermediate transfer belt 21 as a recording material (recording) A secondary transfer roll 23 serving as a secondary transfer charger that performs batch transfer (secondary transfer) on the paper P, which is a paper, and a fixing device 25 that fixes the secondary transferred image on the paper P.

  In the digital color printer 1 of the present embodiment, the image forming process unit 10 performs an image forming operation based on a control signal such as a synchronization signal supplied from the control unit 30. At that time, the image data input from the PC 2 or IIT 3 is subjected to image processing by the image processing unit 40 and supplied to each of the image forming units 11Y, 11M, 11C, and 11K via the interface. In the yellow image forming unit 11Y, for example, the surface of the photosensitive drum 12 uniformly charged at a predetermined potential by the charger 13 is exposed by the LPH 14 that emits light based on the image data obtained from the image processing unit 40. Thus, an electrostatic latent image is formed on the photosensitive drum 12. The formed electrostatic latent image is developed by the developing device 15, and a yellow toner image is formed on the photosensitive drum 12. Similarly, magenta, cyan, and black toner images are formed in the image forming units 11M, 11C, and 11K.

The color toner images formed by the image forming units 11Y, 11M, 11C, and 11K are sequentially electrostatically attracted by the primary transfer roll 22 onto the intermediate transfer belt 21 that rotates in the direction of arrow A in FIG. A toner image superimposed on the belt 21 is formed. The superimposed toner image is conveyed to a region (secondary transfer portion) where the secondary transfer roll 23 is disposed as the intermediate transfer belt 21 moves. When the superimposed toner image is conveyed to the secondary transfer unit, the paper P is supplied to the secondary transfer unit in accordance with the timing at which the toner image is conveyed to the secondary transfer unit. Then, the superimposed toner images are collectively electrostatically transferred onto the conveyed paper P by the transfer electric field formed by the secondary transfer roll 23 in the secondary transfer portion.
Thereafter, the sheet P on which the superimposed toner image has been electrostatically transferred is peeled off from the intermediate transfer belt 21 and conveyed to the fixing device 25 by the conveying belt 24. The unfixed toner image on the paper P conveyed to the fixing device 25 is fixed on the paper P by being subjected to a fixing process by heat and pressure by the fixing device 25. Then, the paper P on which the fixed image is formed is conveyed to a paper discharge mounting portion (not shown) provided in the discharge portion of the image forming apparatus.

  FIG. 2 is a view showing a configuration of an LED print head (LPH) 14 that is an exposure unit. 2, the LPH 14 includes a housing 61 as a support, a self-scanning LED array (SLED) 63 constituting a light emitting unit, and a drive circuit (signal generation circuit) 100 (drive signal generation means for driving the SLED 63 and SLED 63). The LED circuit board 62 and the rod lens array 64, which are optical members for forming an image of the light from the SLED 63 on the surface of the photosensitive drum 12, and the rod lens array 64 are supported from the outside. A shielding holder 65 and a leaf spring 66 for urging the housing 61 toward the rod lens array 64 are provided.

The housing 61 is formed of a block or sheet metal such as aluminum or SUS, and supports the LED circuit board 62. The holder 65 supports the housing 61 and the rod lens array 64, and is set so that the light emitting point of the SLED 63 and the focal point of the rod lens array 64 coincide. Furthermore, the holder 65 is configured to seal the SLED 63. Therefore, it is possible to prevent dust from adhering to the SLED 63 from the outside. On the other hand, the leaf spring 66 urges the LED circuit board 62 toward the rod lens array 64 via the housing 61 so as to maintain the positional relationship between the SLED 63 and the rod lens array 64.
The LPH 14 configured as described above is configured to be movable in the optical axis direction of the rod lens array 64 by an adjustment screw (not shown), and the imaging position (focal plane) of the rod lens array 64 is the surface of the photosensitive drum 12. It is adjusted so that it is located above.

As shown in FIG. 3 (plan view of the LED circuit board 62), the LED circuit board 62 includes, for example, SLEDs 63 composed of 58 SLED chips (CHIP1 to CHIP58) in parallel with the axial direction of the photosensitive drum 12. It is arranged in a line with high accuracy. In this case, the SLED chips are alternately staggered so that each LED array is continuously arranged at the connection portion between the SLED chips at the end boundary of the LED arrays arranged in each SLED chip (CHIP1 to CHIP58). Is arranged.
The LED circuit board 62 includes a signal generation circuit 100, a level shift circuit 104, a three-terminal regulator 101 that outputs a power supply voltage, an EEPROM 102 that stores light amount correction value data in the SLED 63, and the digital color printer 1 main body. A harness 103 for transmitting and receiving signals is provided.

Next, the wiring configuration on the LED circuit board 62 will be described.
FIG. 4 is a diagram showing a wiring diagram formed on the LED circuit board 62. As shown in FIG. 4, on the LED circuit board 62, a + 3.3V power supply line 105 that supplies power to each SLED chip, a grounded (GND) power supply line 106, and the signal generation circuit 100 to each SLED chip. Signal lines 107 (107_1 to 107_58) for transmitting lighting signals ΦI (ΦI1 to ΦI58), signal lines 108 (108_1 to 108_6) for transmitting transfer signals CK1 (CK1_1 to 1_6), and transfer signals CK2 (CK2_1 to 2_6) ) For transmitting signal lines 109 (109_1 to 109_6).
And the lighting signal (PHI) I with respect to CHIP1-CHIP58 is input into each SLED chip (CHIP1-CHIP58) via the signal line 107. FIG. Further, the transfer signal CK1 (CK1_1 to 1_6) is input to the CHIP1 to CHIP58 via the signal line 108, and the transfer signal CK2 (CK2_1 to 2_6) is input to the CHIP1 to CHIP58 via the signal line 108, respectively.

Next, the circuit configuration of the SLED 63 will be described.
FIG. 5 is a diagram illustrating the circuit configuration of the SLED 63. The SLED 63 of this embodiment is connected to the signal generation circuit 100 via the level shift circuit 104. The level shift circuit 104 has a configuration in which a resistor R1B and a capacitor C1, and a resistor R2B and a capacitor C2 are arranged in parallel, one end of each being connected to the input terminal of the SLED 63, and the other end of the signal generating circuit 100. Connected to the output terminal. Based on the transfer signals CK1R and CK1C and the transfer signals CK2R and CK2C output from the signal generation circuit 100, the transfer signal CK1 and the transfer signal CK2 are output to the SLED 63.
In addition, although 58 SLED chips are arranged in series in the SLED 63 of the present embodiment, only one SLED chip is shown in FIG. In the following description, the SLED chip is referred to as SLED 63 for convenience.

As shown in FIG. 5, the SLED 63 includes 128 thyristors S1 to S128 as switching elements, 128 LEDs L1 to L128 as light emitting elements, 128 diodes D1 to D128, and 128 resistors R1 to R128. In addition, the transfer current limiting resistors R1A and R2A are configured to prevent excessive current from flowing through the signal lines Φ1 and Φ2.
Here, a part mainly composed of thyristors S1 to S128 and diodes D1 to D128 for controlling supply of current to the LEDs L1 to L128 is referred to as a transfer unit.

In the SLED 63 of the present embodiment, the anode terminals (input terminals) A1 to A128 of the thyristors S1 to S128 are connected to the power supply line 105. A power supply voltage VDD (= + 3.3 V) is supplied to the power supply line 105.
A transfer signal CK1 is transmitted from the signal generation circuit 100 to the cathode terminals (output terminals) K1, K3,..., K127 of the odd-numbered thyristors S1, S3,. Is done.
.., S128 to the even-numbered thyristors S2, S4,..., S128 from the signal generation circuit 100 through the level shift circuit 104 and the transfer current limiting resistor R2A. CK2 is transmitted.

On the other hand, gate terminals (control terminals) G1 to G128 of the thyristors S1 to S128 are respectively connected to the power supply line 106 via resistors R1 to R128 provided corresponding to the thyristors S1 to S128. The power supply line 106 is grounded (GND).
The gate terminals G1 to G128 of the thyristors S1 to S128 are connected to the gate terminals of the LEDs L1 to L128 provided corresponding to the thyristors S1 to S128, respectively.
Furthermore, the cathode terminals of the diodes D1 to D128 are connected to the gate terminals G1 to G128 of the thyristors S1 to S128. The gate terminals G1 to G127 of the thyristors S1 to S127 are connected to the anode terminals of the next-stage diodes D2 to D128, respectively. That is, the diodes D1 to D128 are connected in series with the gate terminals G1 to G127 interposed therebetween.
The anode terminal of the diode D1 is connected to the signal generation circuit 100 via the transfer current limiting resistor R2A and the level shift circuit 104, and the transfer signal CK2 is transmitted. Further, the cathode terminals of the LEDs L1 to L128 are connected to the signal generation circuit 100, and the lighting signal ΦI is transmitted.

  Further, the light shielding mask 50 is disposed in the SLED 63 so as to cover the thyristors S1 to S128 and the diodes D1 to D128 in the transfer unit. This is because during the image forming operation, light emission from the thyristors S1 to S128 in the on state and current is flowing, and from the diodes D1 to D128 in the current flow state is blocked, and unnecessary light is removed from the photoconductor. It is provided to suppress exposure of the drum 12.

Next, a signal (drive signal) for driving the SLED 63 output from the signal generation circuit 100 and the level shift circuit 104 will be described.
FIG. 6 is a timing chart showing drive signals output from the signal generation circuit 100 and the level shift circuit 104. Note that the timing chart shown in FIG. 6 shows a case where all LEDs perform optical writing (light emission).
(1) First, when a reset signal (RST) is input from the image forming apparatus to the signal generation circuit 100, the signal generation circuit 100 transfers the transfer signal CK1C to a high level (hereinafter referred to as “H”) and transfers. The signal CK1R is set to “H”, the transfer signal CK1 is set to “H”, the transfer signal CK2C is set to low level (hereinafter referred to as “L”), the transfer signal CK2R is set to “L”, and the transfer signal CK2 is set. Is set to a low level (“L”), and all thyristors S1 to S128 are set to an off state (FIG. 6A).
(2) Following the reset signal (RST), the line synchronization signal Lsync output from the signal generation circuit 100 becomes “H” (FIG. 6A), and the operation of the SLED 63 is started. Then, in synchronization with the line synchronization signal Lsync, as shown in FIGS. 6E, 6F, and 6G, the transfer signal CK2C and the transfer signal CK2R are set to “H”, and the transfer signal CK2 is set to “H”. (FIG. 6B).
(3) Next, as shown in FIG. 6C, the transfer signal CK1R is set to “L” (FIG. 6C).

(4) Subsequently, as shown in FIG. 6B, the transfer signal CK1C is set to “L” (FIG. 6D).
In this state, the gate current of the thyristor S1 starts to flow. At that time, the tri-state buffer B1R of the signal generation circuit 100 is set to high impedance (Hiz) to prevent current backflow.
Thereafter, the thyristor S1 starts to be turned on by the gate current of the thyristor S1, and the gate current gradually increases. At the same time, when a current flows into the capacitor C1 of the level shift circuit 104, the potential of the transfer signal CK1 also gradually increases.

(5) After a lapse of a predetermined time (time when the transfer signal CK1 potential becomes close to GND), the tristate buffer B1R of the signal generation circuit 100 is set to “L” (FIG. 6E). As a result, the potential of the signal line Φ1 and the potential of the transfer signal CK1 rise due to the rise of the gate G1 potential, and accordingly, a current starts to flow to the resistor R1B side of the level shift circuit 104. On the other hand, the current flowing into the capacitor C1 of the level shift circuit 104 gradually decreases as the potential of the transfer signal CK1 increases.
When the thyristor S1 is completely turned on and becomes a steady state, a current for maintaining the on state of the thyristor S1 flows to the resistor R1B of the level shift circuit 104, but does not flow to the capacitor C1.
At this time, as shown in FIG. 6B, the tristate buffer B1C of the signal generation circuit 100 is set to high impedance (Hiz) (FIG. 6E).

  (6) With the thyristor S1 completely turned on, the lighting signal ID is set to “L” as shown in FIG. 6H (FIG. 6F). At this time, since the potential of the gate G1> the potential of the gate G2, the LED L1 having a thyristor structure is turned on earlier and lights up. As the LED L1 is turned on, the potential of the signal line Φ1 rises, so that the LEDs after the LED L2 are not turned on. That is, for the LEDs L1, L2, L3, L4,..., Only the LED L1 having the highest gate voltage is turned on (lighted).

(7) Next, as shown in FIG. 6 (F), when the transfer signal CK2R is set to “L” (FIG. 6 (g)), a current flows as in the case of FIG. A voltage is generated across the capacitor C2 104.
(8) As shown in FIG. 6E, when the transfer signal CK2C is set to “L” in this state (FIG. 6H), the thyristor switch S2 is turned on.
(9) Then, as shown in FIGS. 6B and 6C, when the transfer signals CK1C and CK1R are simultaneously set to “H” (FIG. 6I), the thyristor switch S1 is turned off and passes through the resistor R1. As a result, the potential of the gate G1 gradually decreases. At that time, the thyristor switch S2 is completely turned on. Therefore, by turning on / off the lighting signal ΦI corresponding to the image data from the lighting signal terminal ID, the LED L2 can be turned on / off. In this case, since the potential of the gate G1 is already lower than the potential of the gate G2, the LED L1 is not turned on.

  (10) The above-described operation is sequentially performed to sequentially turn on the LEDs L1 to L128. Then, after the “transfer operation period” in FIG. 6 when the termination LED L128 is turned off, the transfer signals CK1C and CK1R are set to “H”, the transfer signal CK1 is set to “H”, and the transfer signals CK2C and CK2R are set to “H”. The transfer signal CK2 is set to “H” as “H”, and both the transfer signal CK1 and the transfer signal CK2 are kept in the “H” state for a predetermined time (“transfer thyristor is turned off” in FIG. 6). As a result, all thyristors S1 to S128 are turned off. Therefore, in this state, no current flows through all the thyristors S1 to S128, so that the thyristors S1 to S128 are held in the off state (not lit).

(11) Furthermore, after keeping both the transfer signals CK1 and CK2 at the “H” state for a predetermined time, the transfer signals CK2C and CK2R are set to “L” and the transfer signal CK2 is set to “L” (in FIG. 6, “Period during which no current flows through the transfer unit”). Thereby, since no current flows through the diodes D1 to D128, all the diodes D1 to D128 are also kept in the non-lighted state.
As a result, during the unsteady operation including the state where the photosensitive drum 12 (see FIG. 1) stops rotating after the lighting signal ΦI is output and the image formation is completed, the transfer unit of the SLED 63 is operated. No current is applied. Therefore, in a state where the photosensitive drum 12 stops rotating, current does not flow through the thyristors S1 to S128 and the diodes D1 to D128 arranged in the transfer unit as well as the LEDs L1 to L128, and the thyristors S1 to S128. Since no light is emitted from the diodes D1 to D128, unnecessary exposure of the photosensitive drum 12 is suppressed.

Next, the configuration of the signal generation circuit 100 will be described in detail.
FIG. 7 is a block diagram showing the configuration of the signal generation circuit 100. The signal generation circuit 100 includes an image data development unit 110, a density unevenness correction data unit 112, a timing signal generation unit 114, a reference clock generation unit 116, and lighting time control / corresponding to each SLED chip (CHIP1 to CHIP58). The driving unit 118-1 to 118-58 constitutes a main part.
Image data is serially transmitted from the image processing unit (IPS) 40 to the image data development unit 110. The image data development unit 110 divides the transmitted image data into image data for each SLED chip (CHIP1 to CHIP58) and 1st to 128th dot, 129 to 256th dot,..., 7297 to 7424th dot. The image data developing unit 110 is connected to the lighting time control / drive units 118-1 to 118-58, and outputs the divided image data to the corresponding lighting time control / drive units 118-1 to 118-58.

  When the machine power is turned on, the light intensity correction value data Corr_E and the LED position error data (Corr_X, Corr_Y) stored in advance in the EEPROM 102 are downloaded to the density unevenness correction data unit 112 and stored therein. . Further, at the time of image formation by the machine, screen angle data is input from the image processing unit (IPS) 40. Accordingly, the density unevenness correction data unit 112 performs image formation based on the stored light amount correction value data Corr_E for each LED, position error data (Corr_X, Corr_Y) for each LED, and input screen angle data. Sometimes density unevenness correction data is generated. Then, in synchronization with the data read signal from the density unevenness correction data unit 112, the density unevenness correction data is output to the lighting time control / drive units 118-1 to 118-58. This density unevenness correction data is data set for each LED in order to correct image density unevenness at the time of image formation caused by variations in the amount of light for each LED in the SLED 63 and variations in the LED arrangement position. is there. In this embodiment, the density unevenness correction data is formed as 8-bit (0 to 255) data. The generation of density unevenness correction data will be described in detail later.

Here, a method of generating light amount correction value data Corr_E for each LED and position error data (Corr_X, Corr_Y) for each LED stored in the EEPROM 102 will be described. The light amount correction value data Corr_E for each LED and the position error data (Corr_X, Corr_Y) of each LED are measured by measuring the light amount distribution of the light emitted from the LPH 14 by the optical profile measuring device 200 as described below. The generated light quantity distribution is generated by data processing.
First, FIG. 8 is a diagram illustrating a configuration of the optical profile measuring apparatus 200. As shown in FIG. 8, the optical profile measuring device 200 has a light receiving surface facing the light emitting portion (SLED 63) of the LPH 14, and a line CCD (Charge Coupled Device) 261 in which a plurality of pixels are arranged in a line. A CCD board 270 that includes the line CCD 261 and uses the output from the line CCD 261 to measure the light amount distribution from the LPH 14, and a magnifying optical that enlarges the light from the light emitting portion (SLED 63) of the LPH 14 onto the surface of the line CCD 261 Driving signals are output to the moving stage 262 that moves the CCD board 270, the stage driver 263 that moves the moving stage 262 at a constant speed, and the LPH 14 with the direction in which the SLED 63 of the system 260 and LPH 14 are arranged (main scanning direction) as the moving direction LPH driver to turn on each SLED 63 64, and a CCD interface 280 for processing the data signal transferred from the CCD board 270.

Processing of the obtained data signal, movement control of the moving stage 262, control of the LPH driver 264, and the like are executed by a personal computer (PC) 266 that is a processing unit. The PC 266 includes a frame grabber 267 for capturing image data, a digital I / O 268 that controls the input of status signals and data signals, the output of control signals, and the like, a motor controller 269 that controls the drive of the stage driver 263, and the like. Yes.
The optical profile measuring apparatus 200 converts the data into a digital value and takes it into the PC 266 while moving the CCD board 270 having the line CCD 261 at a constant speed in the main scanning direction.

Next, FIG. 9 is a flowchart showing a flow of processing when generating light amount correction value data Corr_E and position error data (Corr_X, Corr_Y) for each LED.
First, the PC 266 outputs a control signal instructing the LPH driver 264 to turn on the LPH 14 with 4 on 4 off from the digital I / O 268. Thereby, the LPH driver 264 turns on the LPH 14 with 4 on 4 off (S1).
Here, 4on4off lighting means that, as shown in FIG. 10, in the LED array arranged in the SLED 63 of the LPH 14, four adjacent LEDs are turned on, and further, the four adjacent LEDs are turned off. A lighting form. Thus, the reason why the LPH 14 is turned on 4 on 4 off is that when all the lights are turned on, the total light quantity becomes too large, and it is difficult to accurately measure the peak and valley coordinate points of the light quantity by each LED. In addition, as long as each LED is turned on / off alternately, it is possible to use 2on2off lighting in addition to 4on4off lighting.

Next, the PC 266 outputs a control signal for moving the moving stage 262 to the stage driver 263 via the motor controller 269, and moves the CCD board 270 and the magnifying optical system 260 in the arrangement direction of the SLED 63 (main scanning). Direction) (S2).
Further, the PC 266 outputs a control signal for instructing measurement of the light amount distribution of the LPH 14 to the CCD board 270 from the digital I / O 268 via the CCD interface 280. Then, the CCD board 270 measures the light quantity distribution of the LPH 14 using the line CCD 261 (S3).

  Next, the PC 266 acquires the light amount distribution data measured in step 3 from the CCD board 270 via the CCD interface 280. Here, FIG. 11 is a diagram showing an example of the light amount distribution data in three dimensions. Using the light quantity distribution data shown in FIG. 11, the coordinates (Xn, Yn) in the main scanning direction (X) and sub-scanning direction (Y) of the position (peak position) with the largest light quantity are detected. Then, for each LED, the peak position coordinates are compared with the designed arrangement position, and the positional deviation amount (hereinafter, referred to as “X”) from the designed arrangement position of the peak position coordinates (Xn, Yn). And a positional deviation amount in the sub-scanning direction (Y). The calculated position error amounts in the main scanning direction (X) and the sub-scanning direction (Y) are set as position error data (Corr_X, Corr_Y) of each light emitting point (LED) (S4). In this case, the positional error amount Corr_Y in the sub-scanning direction (Y) is corrected in consideration of the shift amount in consideration of the shift of the arrangement positions of the SLED chips due to the staggered arrangement described above.

  At the same time, with respect to the light amount distribution data shown in FIG. 11, the integrated value in the sub-scanning direction (Y) at each coordinate position (X) in the main scanning direction is calculated, and the light amount distribution (light profile) in the main scanning direction is calculated. (S5). At that time, black level correction and shading correction are performed based on the black level correction value and the shading correction value relating to the line CCD 261 obtained in advance.

Subsequently, the PC 266 detects a peak position and a valley position in the main scanning direction (X) for the light profile calculated in Step 5. Then, the light quantity from the valley to the valley in the light profile is integrated, and the integrated value is divided by the distance from the valley to the valley, thereby calculating the light quantity (exposure energy) density in the region between the valleys. The exposure energy density of each area thus obtained is set as the correction characteristic value (%) of each light emitting point (LED) (see FIG. 12) (S6).
Further, the PC 266 increases or decreases the amount of light according to the error from the target value so that the correction characteristic value matches the predetermined target value, so that the correction characteristic value (%) in all regions is flat. To be. By such flattening processing, a light amount correction value for each region, that is, a light amount correction value Corr_E for each LED is calculated (S7).
Then, the PC 266 stores the position error data (Corr_X, Corr_Y) and the light amount correction value data Corr_E for each LED that is turned on by 4on4off lighting (S8).

Next, the PC 266 outputs a control signal instructing the LPH driver 264 to turn on the LPH 14 with 4off4on from the digital I / O 268. Thereby, the LPH driver 264 lights the LPH 14 with 4off4on (S10). That is, the setting is changed to a lighting mode in which the LED turned on in Step 1 is turned off and the LED turned off in Step 1 is turned on.
Then, Step 2 to Step 7 are performed in the same manner, and the PC 266 stores the position error data (Corr_X, Corr_Y) and the light amount correction value data Corr_E for each LED that is turned on with 4off4on lighting (S8).
After the measurement in the 4off4on lighting mode is completed (S9), the PC 266 lights the stored position error data (Corr_X, Corr_Y) and light amount correction value data Corr_E for each LED lit in the 4on4off lighting. The position error data (Corr_X, Corr_Y) and the light amount correction value data Corr_E for each of the LEDs are rearranged according to the arrangement order of the LEDs in the LPH 14, and the position error data (Corr_X, Corr_Y) and light amount correction value data Corr_E. Then, this is stored in the memory as position error data (Corr_X, Corr_Y) and light amount correction value data Corr_E of LPH 14 (S11).
In this way, position error data (Corr_X, Corr_Y) and light amount correction value data Corr_E for each LED in the LPH 14 (SLED 63) are generated. The generated position error data (Corr_X, Corr_Y) and light amount correction value data Corr_E are stored from the PC 266 into the EEPROM 102 disposed on the LED circuit board 62 (see FIGS. 2 and 3).

Next, the reference clock generator 116 is connected to the main controller 30, the timing signal generator 114, and the lighting time control / drive units 118-1 to 118-58.
As shown in FIG. 13 (a block diagram illustrating the configuration of the reference clock generation unit 116), the reference clock generation unit 116 includes a crystal oscillator 140, a frequency divider 1 / M142, a frequency divider 1 / N144, and a phase comparator. 146 and a voltage controlled oscillator 148, and a PLL circuit 134 and a lookup table (LUT) 132. The LUT 132 stores a table for determining the frequency division ratios M and N based on the light amount adjustment data from the control unit 30. The crystal oscillator 140 is connected to the frequency divider 1 / N144, oscillates at a predetermined frequency, and outputs the oscillated signal to the frequency divider 1 / N144. The frequency divider 1 / N 144 is connected to the LUT 132 and the phase comparator 146, and divides the signal oscillated by the crystal oscillator 140 based on the frequency division ratio N determined by the light amount adjustment data from the LUT 132. The phase comparator 146 is connected to the frequency divider 1 / M142, the frequency divider 1 / N144, and the voltage controlled oscillator 148, and the output signal from the frequency divider 1 / M142 and the frequency divider 1 / N144. Is compared with the output signal. The control voltage supplied to the voltage controlled oscillator 148 is controlled according to the comparison result (phase difference) by the phase comparator 146. The voltage controlled oscillator 148 outputs a reference clock signal at a frequency based on the control voltage. In the present embodiment, a control voltage corresponding to a frequency that divides the possible lighting period into 256 is supplied, and a reference clock signal having this frequency is generated, and all lighting time control / drive units 118-1 to 118-58 are generated. Output to. The voltage controlled oscillator 148 is also connected to the frequency divider 1 / M142, and the reference clock signal output from the voltage controlled oscillator 148 is also branched and input to the frequency divider 1 / M142. The frequency divider 1 / M 142 divides the clock signal fed back from the voltage controlled oscillator 148 based on the frequency division ratio M determined by the light amount adjustment data from the LUT 132.

The timing signal generation unit 114 is connected to the control unit 30 and the reference clock generation unit 116, and is synchronized with the horizontal synchronization signal (Lsync) from the control unit 30 based on the reference clock signal from the reference clock generation unit 116. Thus, transfer signals CK1R and CK1C and transfer signals CK2R and CK2C are generated. The transfer signals CK1R and CK1C and the transfer signals CK2R and CK2C are output to the LPH 14 as the transfer signal CK1 and the transfer signal CK2 through the level shift circuit.
The timing signal generation unit 114 is connected to the density unevenness correction data unit 112 and the image data development unit 110 and is synchronized with the Lsync signal from the control unit 30 based on the reference clock signal from the reference clock generation unit 116. Then, a data read signal for reading image data corresponding to each pixel (each LED) from the image data development unit 110, and data for reading density unevenness correction data corresponding to each pixel from the density unevenness correction data unit 112 A read signal is output to each. Further, the timing signal generation unit 114 is also connected to the lighting time control / drive units 118-1 to 118-58, and based on the reference clock signal from the reference clock generation unit 116, the Lsync signal from the control unit 30. In synchronization, a trigger signal for starting lighting of the SLED 63 is output.

The lighting time control / drive units 118-1 to 118-58 correct the lighting time of each pixel (each LED) based on the density unevenness correction data and the delay selection data, and control signals for lighting each pixel of the SLED 63. (Lighting signals) ΦI1 to ΦI58 are generated.
Specifically, as shown in FIG. 14 (block diagram for explaining the configuration of the lighting time control / drive unit 118), the lighting time control / drive units 118-1 to 118-58 are presettable digital one-shot multi A vibrator (PDOMV) 160, a linearity correction unit 162, and an AND circuit 170 are included.
The AND circuit 170 is connected to the image data development unit 110 and the timing signal generation unit 114. When the image data from the image data development unit 110 is 1 (ON), the trigger signal (TRG) from the timing signal generation unit 114 is displayed. ) Is output to the PDOMV 160, and when the image data is 0 (OFF), the trigger signal is set not to be output. The PDOMV 160 is connected to the AND circuit 170, the OR circuit 168, the density unevenness correction data unit 112, and the reference clock generation unit 116, and the number of clocks corresponding to the density unevenness correction data in synchronization with the trigger signal from the AND circuit 170. A lighting pulse (output value) is generated.

The linearity correction unit 162 corrects and outputs the lighting pulse signal from the PDOMV 160 in order to correct the variation in the light emission start time of each LED in the SLED 63. Specifically, the linearity correction unit 162 includes a plurality of delay circuits 164 (eight in this embodiment, 164-0 to 164-7), a delay selection register 166, a delay signal selection unit 165, and an AND circuit 167. , An OR circuit 168, and a lighting signal selection unit 169.
The delay circuits 164-0 to 164-7 are connected to the PDOMV 160, and different times for delaying the lighting pulse signal from the PDOMV 160 are set. The delay selection register 166 is connected to the delay signal selection unit 165 and the lighting signal selection unit 169, and the delay selection register 166 stores delay selection data for each LED in the SLED 63 and lighting signal selection data. . Delay selection data and lighting signal selection data for each LED are measured in advance and stored in the EEPROM 102. The delay selection data and lighting signal selection data stored in the EEPROM 102 are downloaded to the delay selection register 166 via the density unevenness correction data unit 112 when the machine power is turned on. Note that a flash ROM can also be used as the storage means, and in that case, the flash ROM itself can function as the delay selection register 166.

Here, the delay selection data stored in the EEPROM 102 will be described. FIG. 15 is a diagram showing the relationship between the pulse width of the lighting signal ΦI for lighting the LED and the light quantity of the LED. In FIG. 15 (a), the solid line indicates the distance from the LED when the pulse width of the lighting signal ΦI (for example, the length of L1 in FIG. 6 (H)) is changed for any one LED in the SLED 63. It is a light quantity measurement value of the light emitted through the rod lens array 64 (see FIG. 2). A broken line is a target light quantity characteristic (target light quantity characteristic) required when the LED is actually driven.
As shown in FIG. 15A, when light is actually emitted from the LED, the light emission start time is delayed because the output waveform of the lighting signal ΦI does not become a complete rectangle. The delay time usually has a variation of about 3 to 15 nsec. Therefore, in the LPH 14 of the present embodiment, the linearity correction unit 162 causes the lighting signal ΦI so that the light amount characteristic of the light from the LED substantially matches the target light amount characteristic in the pulse width region used in the image forming apparatus. The pulse width is offset.
FIG. 15B shows the light quantity characteristic (solid line) of the LED when offset correction is performed on the pulse width of the lighting signal ΦI to the LED. In FIG. 15B, the offset amount is determined so that the light amount of the LED matches the target light amount at the lower limit pulse width (offset correction position) of the pulse width region to be used. The offset amount is measured for each LED by such a method and stored in the EEPROM 102 as delay selection data.

The delay signal selection unit 165 is connected to the AND circuit 167 and the OR circuit 168, and is one of outputs from the delay circuits 164-0 to 164-7 based on the delay selection data stored in the delay selection register 166. Select one. The AND circuit 167 is a logical product of the lighting pulse signal from the PDOMV 160 and the delayed lighting pulse signal selected by the delay signal selection unit 165, that is, both the lighting pulse signal before the delay and the lighting pulse signal after the delay are in the lighting state. If so, a lighting pulse is output. The OR circuit 168 is a logical sum of the lighting pulse signal from the PDOMV 160 and the delayed lighting pulse signal selected by the delay signal selection unit 165, that is, at least one of the lighting pulse signal before the delay and the lighting pulse signal after the delay is in the lighting state. If so, a lighting pulse is output.
The lighting signal selection unit 169 selects one of the outputs from the AND circuit 167 or the OR circuit 168 based on the lighting selection data stored in the delay selection register 166. Then, a lighting signal ΦI having an output value of the selected lighting pulse is output to the LPH 14 via the MOSFET 172.

By the way, as described above, the PDOMV 160 generates a lighting pulse of the number of clocks corresponding to the density unevenness correction data in synchronization with the trigger signal from the AND circuit 170 and outputs it to the AND circuit 167 and the OR circuit 168. Therefore, the lighting pulse input to the linearity correction unit 162 has already been corrected by the density unevenness correction data in the PDOMV 160. Therefore, the lighting pulse output to the LPH 14 via the MOSFET 172 as the lighting signal ΦI is output in a state where density unevenness correction (gain correction) and offset correction are performed.
FIG. 16 is a diagram showing the light quantity characteristics of the LED subjected to gain correction and offset correction. FIG. 16 shows a case where gain correction is performed with reference to the center position (gain correction position) of the pulse width region used in the image forming apparatus as an example.
As described above, in the lighting time control / drive units 118-1 to 118-58 of the present embodiment, the lighting pulse (pulse width) of each pixel (each LED) is corrected based on the density unevenness correction data and the delay selection data. As a result, the light amount characteristic in the pulse width region used in the image forming apparatus is substantially matched with the target light amount characteristic, and is output to the LPH 14. Thereby, the light quantity of all the LEDs is set to fall within a predetermined range in the use pulse width region.

  Further, as shown in FIG. 7, a three-terminal regulator 101 is connected to the LPH 14, and a stable + 3.3V voltage is supplied from the three-terminal regulator 101 to the LPH 14.

Next, density unevenness correction data generated in the density unevenness correction data unit 112 will be described.
First, FIG. 17 is a diagram showing a distance (μm) between two adjacent LEDs in the main scanning direction (X) and the sub-scanning direction (Y). FIG. 17 shows the LPH 14 corresponding to a pixel density of 1200 dpi, and the horizontal axis represents array numbers 1 to 14080 of 14080 LED chips. As shown in FIG. 17, there is a position variation between adjacent LEDs in the main scanning direction (X) and the sub-scanning direction (Y). In particular, the position variation is large at the coupling portion of the SLED chip. Such variation in position is a factor that causes black and white stripes in the image, as described below. In FIG. 17, the distance (μm) between two adjacent LEDs in the sub-scanning direction (Y) is corrected for the positional deviation between the SLED chips caused by the staggered arrangement.

FIG. 18 shows the positional deviation of the LED in the sub-scanning direction (Y) generated at the connecting portion between the adjacent SLED chip (CHIP N) and the SLED chip (CHIP N + 1), and black streaks and whites generated in the image accordingly. It is a figure explaining a stripe.
As shown in FIG. 18 (a), since the SLED chips are arranged in a staggered manner in LPH14, adjacent SLED chips (CHIP N) and SLED chips (CHIP N + 1) are connected to the LEDs arranged respectively. Has a positional deviation in the sub-scanning direction (Y). Therefore, normally, by adjusting the lighting timing of the LEDs arranged in the adjacent SLED chip (CHIP N) and SLED chip (CHIP N + 1) according to the respective arrangement positions, The alignment at the time of image formation is aimed at.
However, when they are arranged in a staggered pattern, manufacturing installation errors are likely to occur between adjacent SLED chips (CHIP N) and SLED chips (CHIP N + 1). When such an installation error of the SLED chip occurs, the position of the LED in the sub-scanning direction (Y) varies from the designed arrangement position (distance in the sub-scanning direction from the designed arrangement position = the above-mentioned. Position error amount Corr_Y). Therefore, even if the lighting timing is matched, black stripes and white stripes are generated depending on the screen angle of the image as follows.

For example, in FIG. 18A, CHIP N is located upstream of CHIP N + 1 in the sub-scanning direction (Y), that is, upstream of the rotation direction of the photosensitive drum 12, and the sub-scanning direction of the LEDs on CHIP N It is assumed that the position error amount Corr_Y of (Y) has a positive value (when shifted to the upstream side in the sub-scanning direction from the designed arrangement position). In this case, the position error amount Corr_X of the LED on CHIP N in the main scanning direction (X) is set to zero. Further, the position error amount Corr_X in the main scanning direction (X) and the position error amount Corr_Y in the sub-scanning direction (Y) of the LED of CHIP N + 1 are both set to zero.
Then, at the time of image formation, the CHIP N LED and the CHIP N + 1 LED are shifted in the lighting timing assumed in the design, and the lighting timing of the CHIP N LED is relatively earlier. Therefore, as shown in FIG. 18B, for example, when the screen angle is 30 ° (upward on the photosensitive drum 12 in the advancing direction of the photosensitive drum 12), the CHIP N LED is used. A positional shift amount P on the image corresponding to the positional error amount Corr_Y at CHIP N occurs at the boundary between the exposed portion and the exposed portion by the LED of CHIP N + 1. Therefore, at this screen angle (30 °), the overlapping area at the exposed portion boundary becomes large. That is, even if it is assumed that the exposure spots (solid lines) by the respective LEDs have the same size, the exposure areas are widened (broken lines), so that the exposure areas overlap, and the exposure amount at the exposure part boundary is To increase. For this reason, black streaks occur at the boundary between the exposed portion of the CHIP N LED and the exposed portion of the CHIP N + 1 LED.

On the other hand, as shown in FIG. 18C, for example, when the screen angle is 150 ° (downward on the photosensitive drum 12 in the traveling direction of the photosensitive drum 12), the CHIP N LED is used. The overlapping area at the boundary between the exposed portion and the exposed portion by the LED of CHIP N + 1 becomes smaller due to the occurrence of the positional shift amount P on the image. That is, at this screen angle (150 °), even if the exposure spot (solid line) spread by each LED (broken line) is included, the exposure area overlap is small, so the exposure amount in the boundary area decreases. For this reason, white streaks occur at the boundary between the exposed portion of the CHIP N LED and the exposed portion of the CHIP N + 1 LED.
As described above, black streaks and white streaks are generated according to the screen angle of the image due to the difference in the position error amount Corr_Y in the sub-scanning direction (Y) between the LED on CHIP N and the LED on CHIP N + 1. In the above description, the positional deviation in the sub-scanning direction (Y) between CHIP N and CHIP N + 1 is used as an example. In general, however, the positional deviation in the sub-scanning direction (Y) between the LEDs arranged in the SLED chip is generally used. If present, a phenomenon occurs in which the image density formed by adjacent LEDs changes according to the screen angle of the image.

  Similarly, even when there is a positional shift in the main scanning direction (X) between the LEDs arranged in the SLED chip, a change occurs in the image density due to exposure from adjacent LEDs. However, even if there is a positional shift in the main scanning direction (X), the overlapping state of the exposure areas varies depending on the screen angle of the image, unlike the positional shift in the sub-scanning direction (Y). There is nothing. Therefore, with respect to the main scanning direction (X), there is no screen angle dependency in the image density formed by adjacent LEDs.

  Here, FIG. 19 shows the positional deviation in the main scanning direction (X) of the LED generated at the connecting portion between the adjacent SLED chip (CHIP N) and the SLED chip (CHIP N + 1), and the black generated in the image along with this. It is a figure explaining a stripe and a white stripe. As shown in FIG. 19A, for example, there is a variation between the design arrangement position in the main scanning direction (X) between adjacent SLED chips (CHIP N) and SLED chips (CHIP N + 1). Suppose it has occurred. For example, when the position error amount Corr_X of the LED on CHIP N + 1 in the main scanning direction (X) is 0 and the position error amount Corr_X of the LED on CHIP N has a positive value, the LED of CHIP N and CHIP Since the LED of N + 1 is located farther from the design value, the image on the image corresponding to the position error amount Corr_X at CHIP N at the boundary between the exposed portion of the LED of CHIP N and the exposed portion of the LED of CHIP N + 1. A positional shift amount Q is generated. For this reason, the overlapping area at the boundary with the exposed portion becomes smaller. In other words, even if the exposure spot (solid line) spread (broken line) by each LED is included, the overlap of the exposure areas is reduced, so that the exposure amount in the boundary area is reduced. As a result, regardless of the screen angle of the image, white streaks occur at the boundary between the exposed portion of the CHIP N LED and the exposed portion of the CHIP N + 1 LED (see FIG. 19B).

On the other hand, in the above case, if the position error amount Corr_X of the LED on CHIP N has a negative value, the positional deviation on the image including the spread (broken line) of the exposure spot (solid line) by each LED is included. Since the overlap of the exposure areas is increased by the amount Q, the exposure amount in the boundary area is increased. As a result, regardless of the screen angle of the image, a black streak occurs at the boundary between the exposed portion of the CHIP N LED and the exposed portion of the CHIP N + 1 LED (see FIG. 19C).
As described above, black stripes and white stripes are also generated by the position error amount Corr_X in the main scanning direction (X) between the LED on CHIP N and the LED on CHIP N + 1. That is, generally, even when there is a positional shift in the main scanning direction (X) between the LEDs arranged in the SLED chip, there is no dependency on the screen angle of the image, but an image formed by adjacent LEDs. The concentration of varies.

As described above, when the LED has the position error amount Corr_Y in the sub-scanning direction (Y) and the position error amount Corr_X in the main scanning direction (X), the image density formed by adjacent LEDs changes. The relationship is shown in FIG. 20 and FIG. FIG. 20 is a diagram showing the relationship between the position error amount Corr_Y of the LED in the sub-scanning direction (Y) and the density of the image formed by adjacent LEDs for each screen angle of the image. FIG. 21 is a diagram showing the relationship between the position error amount Corr_X of the LED in the main scanning direction (X) and the density of the image formed by the adjacent LED. In FIGS. 20 and 21, the amount of change in image density with respect to the position error amount is shown with reference to the density of an image formed with the LED position error amount being zero.
In the LPH 14 of the present embodiment, the density unevenness correction data unit 112 considers the relationship shown in FIGS. 20 and 21 with respect to the light amount correction value data Corr_E for each LED obtained by the processing shown in FIG. As a result, density unevenness correction data corresponding to the variation in the position of each LED is generated. By using the density unevenness correction data generated in this way, it is possible to realize LED light amount correction corresponding to the screen angle of the image. As a result, the occurrence of black and white lines due to the screen angle is suppressed, and a high-quality image can be formed.

Next, the configuration of the density unevenness correction data unit 112 of the present embodiment that generates such density unevenness correction data will be described.
The density unevenness correction data unit 112 is based on the relationship between the variation in the position of each LED and the image density change amount shown in FIGS. 20 and 21 and the light amount correction value data Corr_E for each LED. Is generated.
FIG. 22 is a block diagram illustrating the configuration of the density unevenness correction data unit 112. As shown in FIG. 22, the density unevenness correction data unit 112 stores the light amount correction value data Corr_E for each LED downloaded from the EEPROM 102 and the position error data (Corr_X, Corr_Y) for each LED. 180, the screen angle data from the image processing unit (IPS) 40 and the position error data Corr_Y in the sub-scanning direction (Y) of each LED stored in the light amount correction value storage memory 180 are input, and the sub-scanning direction The LUT_Y 181 for calculating the density correction amount Dy related to (Y) and the position error data Corr_X in the main scanning direction (X) of each LED stored in the light amount correction value storage memory 180 are inputted, and the main scanning direction (X) is related. LUT_X182 for calculating the density correction amount Dx, and further, a sub output from the LUT_Y181. A density / light quantity conversion unit 183 that converts the density correction amount Dy in the scanning direction (Y) into a light quantity correction value Ey, and a density in which the density correction quantity Dx in the main scanning direction (X) output from the LUT_X 182 is converted into a light quantity correction value Ex. The light amount correction value Ey related to the sub-scanning direction (Y) output from the / light amount conversion unit 184 and the density / light amount conversion unit 183, and the light amount correction value Ex related to the main scanning direction (X) output from the density / light amount conversion unit 184. And an adder 185 that adds the light amount correction value data Corr_E for each LED stored in the light amount correction value storage memory 180 to generate density unevenness correction data.

  Based on the relationship shown in FIG. 20, the LUT_Y 181 has a conversion table for converting the position error amount Corr_Y in the sub-scanning direction (Y) for each LED into an image density change amount for each screen angle of the image. During the image forming operation, the position error amount Corr_Y of each LED in the sub-scanning direction (Y) is acquired from the light amount correction value storage memory 180 in synchronization with the data read signal from the timing signal generator 114, and image processing is performed. Screen angle data is acquired from the unit (IPS) 40. Then, the density correction amount Dy corresponding to the position error amount Corr_Y in the sub-scanning direction (Y) and the screen angle is generated by the conversion table based on the relationship shown in FIG. The LUT_Y 181 can also be configured to calculate the density correction amount Dy corresponding to the screen angle data by data interpolation based on the conversion table.

  The LUT_X 182 has a conversion table for converting the position error amount Corr_X in the main scanning direction (X) for each LED into an image density change amount based on the relationship shown in FIG. Then, during the image forming operation, the position error amount Corr_X in the main scanning direction (X) of each LED is acquired from the light amount correction value storage memory 180 in synchronization with the data read signal from the timing signal generation unit 114. Then, the density correction amount Dx corresponding to the position error amount Corr_X in the main scanning direction (X) is generated by the conversion table based on the relationship shown in FIG.

The density / light quantity conversion unit 183 acquires the density correction amount Dy from the LUT_Y 181. Then, for example, a light amount correction value Ey in the sub-scanning direction (Y) is generated by multiplying the density correction amount Dy by a density / light amount conversion coefficient. It should be noted that if a conversion table that takes into account the density / light quantity conversion coefficient is formed in the LUT_Y 181, the light quantity correction value Ey can be generated only by the LUT_Y 181 without providing the density / light quantity conversion unit 183.
In addition, the density / light quantity conversion unit 184 acquires the density correction amount Dx from the LUT_X182. Then, the light quantity correction value Ex in the main scanning direction (X) is generated by multiplying the density correction amount Dx by the density / light quantity conversion coefficient. It should be noted that if the conversion table taking into account the density / light quantity conversion coefficient is also formed in the LUT_X 182, the light quantity correction value Ex can be generated only by the LUT_X 182 without providing the density / light quantity conversion unit 184.

The adder 185 acquires the light amount correction value Ey from the density / light amount conversion unit 183 and also acquires the light amount correction value Ex from the density / light amount conversion unit 184. Further, light amount correction value data Corr_E for each LED is acquired from the light amount correction value storage memory 180. Then, density unevenness correction data is generated by adding the light amount correction value Ey and the light amount correction value Ex to the light amount correction value data Corr_E.
The density unevenness correction data generated in this way is output to the lighting time control / drive units 118-1 to 118-58 in synchronization with the data read signal from the timing signal generation unit 114. Then, lighting signals ΦI1 to ΦI58 subjected to light amount correction in consideration of variations in positions between the LEDs are output to the LPH 14 from the lighting time control / drive units 118-1 to 118-58.

  Note that the density unevenness correction data unit 112 of the present embodiment uses the LUT_Y 181 and the density / light quantity conversion unit 183, and the LUT_X 182 and the density / light quantity conversion unit 184 to use the position error amount Corr_Y and the sub-scanning direction (Y). Density unevenness correction data is generated based on the position error amount Corr_X in the main scanning direction (X). However, the present invention is not limited to such a configuration, and any one of the LUT_Y 181 and the density / light quantity conversion unit 183 and the LUT_X 182 and the density / light quantity conversion unit 184 is used to position the error in the sub-scanning direction (Y). The density unevenness correction data may be generated based on the amount Corr_Y or the position error amount Corr_X in the main scanning direction (X).

  As described above, in the LPH 14 of the present embodiment, the position error data for each LED, that is, the position error amount Corr_Y in the sub-scanning direction (Y) and the main scanning direction (in the light amount correction value data Corr_E for each LED). The density unevenness correction data is generated by taking into consideration both or one of the position error amount Corr_X of X). And the light quantity correction | amendment of each LED is performed using the density | concentration unevenness correction data produced | generated in this way. Thereby, it is possible to realize density unevenness correction corresponding to the screen angle in the formed image. As a result, the occurrence of black and white lines due to the screen angle is suppressed, and a high-quality image can be formed.

1 is a diagram illustrating an overall configuration of an image forming apparatus using an LED print head according to an embodiment. It is the figure which showed the structure of the LED print head (LPH). It is a top view of a LED circuit board. It is the figure which showed the wiring diagram currently formed on the LED circuit board. It is a figure explaining the circuit structure of SLED. It is a timing chart which shows the drive signal output from a signal generation circuit. It is a block diagram which shows the structure of a signal generation circuit. It is the figure which showed the structure of the optical profile measuring device. It is a flowchart which shows the flow of the process at the time of producing | generating the light quantity correction value data for every LED, and position error data. It is a figure explaining the lighting state of 4on4off. It is the figure which represented an example of the light quantity distribution data in three dimensions. It is a figure explaining a correction characteristic value. It is a block diagram explaining the structure of a reference clock generation part. It is a block diagram explaining the structure of lighting time control and a drive part. It is the figure which showed the relationship between the pulse width of lighting signal (PHI) I which makes LED light, and the light quantity of LED. It is the figure which showed the light quantity characteristic of LED in which gain correction and offset correction were performed. It is the figure which showed the distance between two adjacent LED in the main scanning direction (X) and a subscanning direction (Y). The positional deviation in the sub-scanning direction (Y) of the LED generated at the connecting portion between the adjacent SLED chip (CHIP N) and the SLED chip (CHIP N + 1), and the black and white stripes generated in the formed image along with the positional deviation. It is a figure explaining. The positional deviation in the main scanning direction (X) of the LED generated at the connecting portion between the adjacent SLED chip (CHIP N) and the SLED chip (CHIP N + 1), and the black and white stripes generated in the formed image along with the positional deviation. It is a figure explaining. It is the figure which showed the relationship between the positional error amount Corr_Y of the sub-scanning direction (Y) between LED, and the density of the image formed by adjacent LED for every screen angle of an image. It is the figure which showed the relationship between the positional error amount Corr_X of the main scanning direction (X) of LED mutual, and the density of the image formed by adjacent LED. It is a block diagram explaining the structure of a density nonuniformity correction data part.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Digital color printer, 10 ... Image formation process part, 11Y, 11M, 11C, 11K ... Image formation unit, 12 ... Photosensitive drum, 14 ... LED print head (LPH), 30 ... Control part, 40 ... Image processing part (IPS), 62 ... LED circuit board, 63 ... self-scanning LED array (SLED), 64 ... rod lens array, 100 ... drive circuit (signal generation circuit), 101 ... three-terminal regulator, 102 ... EEPROM, 104 ... level Shift circuit 110... Image data development unit 112. Density unevenness correction data unit 114. Timing signal generation unit 116. Reference clock generation unit 118-1 to 118-58. Lighting time control / drive unit 180. Correction value storage memory, 181... LUT_Y, 182... LUT_X, 183, 184... Density / light quantity conversion unit, 185 Adder, 200 ... optical profile measuring apparatus

Claims (12)

A print head for exposing an image carrier in an image forming apparatus,
A plurality of light emitting elements arranged in a line;
A drive circuit for generating a lighting signal for controlling the light amount of the light emitting element,
The drive circuit outputs the lighting signal in consideration of a light amount correction value for setting the light amount of each of the light emitting elements to a predetermined target value and a positional error amount from a design arrangement position of the light emitting elements. A print head characterized by determining a value.   The drive circuit converts the positional error amount of the light emitting element into an image density change amount in an image formed by the image forming apparatus, and the image density change amount converted by the conversion table. The print head according to claim 1, further comprising a density / light quantity conversion unit that converts the light quantity into a light quantity correction value for the light emitting element.   The drive circuit converts the position error amount in the sub-scanning direction of the light emitting element into the image density change amount corresponding to a screen angle of an image formed by the image forming apparatus using the conversion table. The print head according to claim 2.   The print head according to claim 1, wherein the drive circuit includes a conversion table that converts the positional error amount of the light emitting element into a light amount correction value of the light emitting element.   The drive circuit converts the position error amount in the sub-scanning direction of the light emitting element into the light amount correction value corresponding to a screen angle of an image formed by the image forming apparatus using the conversion table. 5. A print head according to claim 4, wherein   The print head according to claim 1, wherein the driving circuit uses the position error amount of the light emitting element in the main scanning direction and / or the sub scanning direction. A memory storing the light amount correction value and the position error amount in advance;
The print head according to claim 1, wherein the drive circuit acquires the light amount correction value and the position error amount from the memory.    The print head according to claim 7, wherein the drive circuit acquires the light amount correction value and the position error amount by being downloaded from the memory when the image forming apparatus is activated.   The light emitting elements are arranged in plural on chip members alternately arranged in a staggered pattern, and the drive circuit is arranged in a sub-scanning direction of the light emitting elements by arranging the chip members in a staggered pattern. The print head according to claim 1, wherein the positional error amount corrected in consideration of a positional deviation at a predetermined position is used. A photoreceptor,
A print head for exposing the photoreceptor;
An image processing unit that outputs screen angle data indicating a screen angle of an image formed on the photoconductor,
The print head is
A plurality of light emitting elements arranged in a line;
A drive circuit for controlling the light quantity of the light emitting element by pulse width modulation,
The drive circuit includes a light amount correction value for setting the light amount of the light emitting element to a predetermined target value, a position error amount from a design arrangement position of the light emitting element, and the output from the image processing unit. An image forming apparatus, wherein the pulse width is determined in consideration of screen angle data.   The drive circuit generates density unevenness correction data in which a light amount correction value generated based on the position error amount in the sub-scanning direction and the screen angle data is added to the light amount correction value, and the density unevenness correction data The image forming apparatus according to claim 10, wherein the pulse width is determined based on the image quality.   12. The density unevenness correction data is generated by further adding the light amount correction value generated corresponding to the position error amount in the main scanning direction to the light amount correction value. The image forming apparatus described.

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