JP2007104872A - Power converter - Google Patents

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Publication number
JP2007104872A
JP2007104872A JP2005295161A JP2005295161A JP2007104872A JP 2007104872 A JP2007104872 A JP 2007104872A JP 2005295161 A JP2005295161 A JP 2005295161A JP 2005295161 A JP2005295161 A JP 2005295161A JP 2007104872 A JP2007104872 A JP 2007104872A
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Japan
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output
inverters
voltage
power converter
switching
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JP2005295161A
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Japanese (ja)
Inventor
Yosuke Harada
Isami Norikoshi
Motoyasu Sato
Masa Tai
勇美 乗越
元保 佐藤
陽介 原田
政 戴
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Ebara Densan Ltd
株式会社荏原電産
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Priority to JP2005295161A priority Critical patent/JP2007104872A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To make the operation frequency of a power converter into a higher frequency, and to achieve high efficiency, small size and light weight, in a power converter for converting a power form by using a pulse width modulation (PWM) control high frequency transformer. <P>SOLUTION: The power converter is provided with two sets of inverters 12, 13 in which the center points of two switching elements Q3, Q1 (Q4, Q2) connected in series which alternately turns on/off at 50% of an on-time ratio are connected to one end of the primary winding of a high frequency transformer T1 (T2), the two switching elements and a capacitor C1 (C2) are connected in series in a closed loop, and the other end of the primary winding of the high frequency transformer is connected to a common DC power source 11. The secondary winding of the high frequency transformer of the two sets of inverters is connected in series so as to add or deduct each inverter output, and the on/off operation timing of the two switching elements of the inverter is shifted by shifting the output phase of the second set of inverter relative to the output phase of the first set of inverter to form a pulse width modulation waveform at the output terminal. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention supplies, for example, a DC power source such as a fuel cell or a solar cell to a connected load or distribution system by converting the power form into, for example, a DC power having a different voltage or an AC power connected to the system power source. The present invention relates to power converters such as converters and inverters.

For example, as a means for converting the power form of a DC power source such as a fuel cell or a solar cell and supplying it to a load, a so-called PWM (pulse width) is connected to a high-frequency transformer and a switching element is connected to control the on-time time ratio. Modulation control converters are widely used as an effective means. In order to achieve high efficiency, a soft switching system is increasingly used as a switching system, and one of them is an active clamp system.
JP 59-159675 A

In order to realize the demand for reduction in size and weight, it is conceivable to increase the operating frequency of the converter. At this time, the on-time ratio that can be practically realized by PWM control is physically limited. That is, in the PWM control converter, when the on-time ratio becomes high, the maximum and minimum values of the on-time ratio are determined by the capability of the switching element, which restricts the output voltage waveform to be controlled.
In order to ensure the operation of the soft switching control using the active clamp method, it is necessary to limit the maximum value and the minimum value of the on-time ratio within the optimum value range.

  The present invention solves such a problem. In a power converter for converting a power form using a high frequency transformer based on pulse width modulation (PWM) control with a DC power supply as an input, the operating frequency is further increased. It is intended for high efficiency, small size and light weight.

  The power converter of the present invention is a DC power supply, two sets of inverters that are turned on and off at an on-time ratio of 50%, and the two sets of inverters and the primary side are connected to add or subtract the secondary side output. A high-frequency transformer connected in this manner, and by adding or subtracting the output phase of the second set of inverters from the output phase of the first set of the two sets of inverters, A predetermined pulse width modulation waveform is formed on the secondary side.

  The two switching elements of the inverter are alternately turned on and off at an on-time ratio of 50%, and the PWM waveform boosted by the high-frequency transformer is obtained by adding and subtracting the outputs of the two sets of inverters shifted in phase. can get. Since the switching element itself is turned on and off alternately at an on-time ratio of 50%, there is no problem such as an increase in voltage applied to the element due to a high modulation rate, and any switching element including a high modulation rate at the output end PWM waveform can be formed. Therefore, the ability of the switching element frees the problem of restricting the PWM output voltage waveform to be controlled, and a highly accurate PWM waveform can be formed at a high frequency using an easily available switching element. Thereby, size reduction and weight reduction of a device and high efficiency can be achieved.

  Embodiments of the present invention will be described below with reference to the accompanying drawings. In addition, in each figure, the same code | symbol is attached | subjected to the member or element which has the same effect | action or function, and the overlapping description is abbreviate | omitted.

  FIG. 1 shows a power converter according to a first embodiment of the present invention. The DC power source 11 is a DC output power source such as a fuel cell or a solar cell, and can obtain a DC output with a relatively low voltage of, for example, 50 V or less. The first inverter 12 is connected in series with two high-frequency transformers T1 and one side of the primary winding of the high-frequency transformer T1 connected to the + side of the DC power supply 11 and the other side alternately turned on and off. The switching elements Q1 and Q3 are connected to the midpoint. The two switching elements Q1, Q3 and the capacitor C1 are connected in series in a closed loop. A second inverter 13 having exactly the same configuration is configured to connect the high-frequency transformer T2 and one side of the primary winding of the high-frequency transformer T2 to the + side of the common DC power source 11, and alternately turn on and off the opposite side 2 The switching elements Q2 and Q4 connected in series are connected to the middle point, and the two switching elements Q2 and Q4 and the capacitor C2 are connected in series in a closed loop.

  The secondary windings of the high-frequency transformers T1 and T2 are connected in series, and connected so as to add or subtract their outputs to form an integrated configuration. At this time, the secondary windings of the respective high-frequency transformers T1 and T2 may be used independently by providing a plurality of sets connected as described above, or may be used by connecting with a center tap method. Good. The output terminal 15 of the secondary winding of the high-frequency transformers T1 and T2 connected in series outputs rectangular high-frequency AC power that is PWM-modulated according to a predetermined program.

  The inverters 12 and 13 operate with the same fixed frequency and the on-time ratio fixed at 50%. That is, switching elements Q1, Q3 are alternately turned on / off at the same on-time ratio of 50%, and switching elements Q2, Q4 are alternately turned on / off at the same on-time ratio of 50%. Then, the on / off waveform of the first set of inverters 12 is adjusted by adjusting the output phase of the on / off waveform of the second set of inverters 13 according to the turn ratio with a high frequency transformer, and the secondary winding output. Is added / subtracted by connection to form a pulse width modulation (PWM) waveform at the output end 15. Therefore, although a PWM waveform is obtained at the output terminal 15, the individual switching elements are turned on / off at the same on-time ratio of 50%, and the individual switching elements do not form the PWM waveform. .

  For this reason, the drive control circuit 16 includes a clock source 21 serving as a reference for the cycle time, a PWM signal setting unit 25 that outputs a required PWM signal according to a program, a first set of inverters based on the required PWM signal, A waveform timing adjustment unit 22 that adjusts the shift amount (shift amount) of the output phase of the second set of inverters, a driver 23 that drives the switching elements Q1 and Q3 on and off based on the adjusted signal, and a switching element And a driver 24 for driving on and off based on the adjusted signal obtained by phase-shifting Q2 and Q4 in accordance with the modulation rate. Switching elements Q1, Q3 and Q2, Q4 are alternately turned on / off at an on-time ratio of 50%.

  Next, the operation of the power converter will be described. The inverters 12 and 13 that output a high-frequency rectangular wave have exactly the same configuration, and the operation will be described only with the inverter 12. Due to the circuit configuration of the inverter, the high-frequency transformer T1 and the switching element Q1 constitute a forward converter circuit that uses the DC power supply 11 as a power source, and supplies power to the high-frequency transformer T1 when the circuit is turned on. Further, the exciting inductance Lt1 of the primary winding (not shown) of the high-frequency transformer T1 and the built-in diode Dq3 of the switching element Q3 also constitute a booster circuit (boost converter) using the capacitor C1 as a load, and the switching element Q1 Is turned on, the energy stored in the exciting inductance of the high-frequency transformer T1 is added to the voltage E of the DC power source 11 when the switching element Q1 is turned off to charge the capacitor C1 (for this reason, the voltage of the capacitor C1 is 2E). Become). Further, the capacitor C1, the switching element Q3, the high-frequency transformer T1, and the DC power source 11 constitute a step-down circuit (back converter) circuit that uses the capacitor C1 as a power source and the DC power source 11 as a load. When the element Q3 is on, the forward converter operates to supply power from the capacitor C1 to the high-frequency transformer T1.

The switching elements Q1 and Q3 are repeatedly turned on and off alternately while having a slight off period called a dead time based on a signal sent from the driver 23. By having a dead time period, the charge of the parasitic capacitance of Q1 or Q3 is discharged during that period, and soft switching is realized.
The repetition frequency at this time is fixed, and the on-time ratios of the switching elements Q1 and Q3 are each fixed to 50%. Thus, the voltage of the capacitor C1 is always kept at a value 2E that is twice the voltage E of the DC power supply 11. Therefore, when the switching element Q3 is turned on, a reverse current flows with the same magnitude as when the switching element Q1 is turned on from the capacitor C1 to the DC power source 11 via the primary winding of the high-frequency transformer T1. Thus, an inverter similar to the push-pull type is configured.

  Furthermore, since the two switching elements Q1, Q3 and the capacitor C1 are connected in series in a closed loop, and each of the switching elements Q1, Q3 has a built-in diode, an auto clamp circuit is configured and stable operation is achieved. Is possible.

  The control circuit 16 includes a PWM signal setting unit 25 programmed to supply a PWM waveform having a target modulation factor, and the waveform timing adjustment unit 22 outputs the output waveform phase of the second set of inverters to the first set of inverters. By adjusting, a pulse width modulation waveform is formed at the output end 15.

  FIG. 2 shows a time chart of each part. The uppermost “PWM signal” is a PWM signal waveform of a command modulation rate according to the program of the PWM signal setting unit 25. In synchronism with the rise of the PWM signal waveform, the driver 23 turns on and off the switching elements Q1 and Q3 alternately at an on-time ratio of 50% (frequency fixed), and two pulse signals “Q1 gate signal” and “Q3 gate signal”. ". One set of Q1 and Q3 gate signals synchronizes the start of the cycle when the PWM signal rises (falls), and the other set synchronizes the start of the cycle when the PWM signal falls (rises) To control. The waveform timing adjustment unit 22 and the driver 23 finely adjust the timing of the above signals, such as a predetermined dead time, and send a gate signal for turning on / off the switching elements Q1, Q3.

  The waveform shown in FIG. 2 is for the connection of the transformer polarity shown in FIG. 1. From the top, the PWM signal (command signal), the Q1 gate signal, the Q3 gate signal, the Q2 gate signal, the Q4 gate signal, and the high-frequency transformer T1 Winding voltage VT1, winding voltage VT2 of high-frequency transformer T2, output voltage Vout to which a load is connected, switching element currents IQ1, IQ2, IQ3, IQ4, and DC power source input current Iin. In this case, assuming that the maximum ON ratio of the PWM signal waveform does not exceed 50%, the PWM signal waveform frequency (cycle time) and the output signal waveform frequency (cycle time) of the inverters 12 and 13 are the same. And

  It is assumed that the modulation rate (modulation width) of the PWM signal is determined at the timing of the falling edge B. The Q3 gate signal is lowered at the rise A of the PWM signal, and the Q1 gate signal is raised after the dead time. The switching elements Q1 and Q3 are alternately turned on / off at a 50% on-time ratio while having a dead time within one cycle. The Q2 gate signal is lowered at the falling edge B of the PWM signal, and the Q4 gate signal is raised after the dead time. Similarly, the switching elements Q2 and Q4 are alternately turned on / off at a 50% on-time ratio while having a dead time.

  The winding voltages VT1 and VT2 of the high-frequency transformers T1 and T2 generate a positive voltage when the switching elements Q1 and Q2 are turned on corresponding to the Q1 gate signal and the Q2 gate signal, and a current flows due to the voltage E of the DC power supply. When the switching elements Q3 and Q4 are turned on corresponding to the Q3 gate signal and the Q4 gate signal, a current flows from the voltage 2E of the capacitors C1 and C2 toward the DC power supply (voltage E), and a negative voltage is generated. Here, the magnitudes of the positive winding voltage and the negative winding voltage are equal, and a push-pull type booster circuit is obtained.

  The relationship between the winding voltages VT1 and VT2 of the high frequency transformers T1 and T2 and the output voltage Vout may be added or subtracted depending on the combination of the polarities of the secondary windings. Addition means a state in which voltage is output to the output while both inverters 12 and 13 are on or off of Q1 (Q2). Subtraction means that Q1 of inverter 12 is on and Q2 of inverter 13 is off. Or, conversely, it means a state in which an output voltage is generated when the corresponding switching element is a combination of on and off. This addition / subtraction can be selected by selecting the polarity of the winding and the polarity of the gate signal of the switching element. Therefore, the output voltage Vout can be synchronized with the PWM signal that is the command signal, and the output in the case of addition and the case of subtraction can be made the same by changing the combination.

  According to the power converter described above, all four switching elements are operated at an on-time ratio of 50%, so that a wide PWM waveform of 0% to 100% is output at the output end without being affected by the characteristics of the elements. Can be formed. For example, by adopting a clock frequency of about 100 kHz, an output voltage waveform of about 200-400 V can be formed from a relatively low DC voltage of 50 V or less while miniaturizing a high frequency transformer, and can be connected to an AC power supply system. It can be efficiently converted into AC power. Thereby, size reduction and weight reduction of a device and high efficiency can be achieved.

  FIG. 3 shows a power converter according to the second embodiment of the present invention. This embodiment is an example of a power converter in which two sets of inverters are subtracted and connected, and the polarity of the primary winding of the transformer of the inverter on one side is reversed compared to the example of FIG. FIG. 4 is a time chart showing the operation of the power converter of FIG.

  The waveforms shown in FIG. 4 are, in order from the top, the PWM signal, the Q1 gate signal, the Q3 gate signal, the Q2 gate signal, the Q4 gate signal, the winding voltage VT1 of the high frequency transformer T1, the winding voltage VT2 of the high frequency transformer T2, and the output voltage. Vout, switching element currents IQ1, IQ2, IQ3, IQ4, and DC power supply input current Iin are shown, respectively. The difference from FIG. 2 is that the polarity of the gate signals of Q2 and Q4 is switched and the polarity of the primary winding of one of the high-frequency transformers is switched so that the two sets of outputs of the high-frequency transformer are in a subtracted connection state.

  Also in this case, the Q3 gate signal is lowered at the rising edge A of the PWM signal, and the Q1 gate signal is raised after the dead time. The Q4 gate signal is lowered at the fall B of the PWM signal, and the Q2 gate signal is raised after the dead time.

  Also in this connection method, as shown in the figure, the output voltage Vout can be obtained as a PWM waveform boosted by a high-frequency transformer synchronized with a PWM signal that is a command signal. Since all four switching elements are operated at an on-time ratio of 50%, it is of course possible to realize a high modulation rate at the output end and form an arbitrary PWM waveform without being restricted by the characteristics of the elements. The same.

  In this embodiment, the input current Iin of the DC power supply is all positive, no negative current is present, and the amount of high-frequency ripple current is reduced. A negative current means a direct current that flows from a negative electrode to a positive electrode through a direct current power source. In particular, in a fuel cell or the like based on the power generation principle of a chemical reaction, the deterioration may be remarkably accelerated. For this reason, in the addition / subtraction connection method of two sets of inverter outputs, the above connection is effective when reduction of the high-frequency ripple current is important.

  When a PWM signal having a maximum on-time ratio exceeding 50% is used, as shown in FIG. 5, Q1 to Q4 so that the inverters 11 and 12 that output a rectangular wave have one cycle in two cycles of the PWM signal. It is sufficient to switch the gate signal, and this is applied regardless of the addition / subtraction method of the two sets of inverter outputs. In this case, the Q3 gate signal is lowered at the rise A of the PWM signal in the first cycle, and the Q1 gate signal is raised after the dead time. The Q2 gate signal is lowered at the falling edge B of the PWM signal in the first cycle, and the Q4 gate signal is raised after the dead time. Then, the Q1 gate signal is lowered at the rising edge C of the PWM signal in the second cycle, and the Q3 gate signal is raised after the dead time. The Q4 gate signal is lowered at the fall D of the PWM signal in the second cycle, and the Q2 gate signal is raised after the dead time. By controlling in this way, a pulse width modulation waveform can be formed at the output end as in the case where the on-time ratio of the PWM waveform is 50%.

FIG. 6 shows a power converter according to a third embodiment of the present invention. This embodiment is different from the first embodiment in the connection method of the switching elements Q1 to Q4 and the capacitors C1 and C2. The first inverter 12 is connected in series with a high-frequency transformer T1 and one side of the primary winding of the high-frequency transformer T1 connected to the negative side of the DC power supply 11 and the other side alternately turned on and off. The switching elements Q1 and Q3 are connected to the midpoint. The second inverter 13 having exactly the same configuration connects the high-frequency transformer T2 and one side of the primary winding of the high-frequency transformer T2 to the negative side of the common DC power supply 11, and alternately turns on and off the opposite side 2 The switching elements Q2 and Q4 connected in series are connected to the middle point.
Although the arrangement of the switching elements Q1 to Q4 and the capacitors C1 and C2 is different from that of the first embodiment, control can be performed by the same method as that of the first embodiment.

  FIG. 7 shows a power converter according to a fourth embodiment of the present invention. This embodiment is an example of a power converter in which two sets of inverters are subtracted and connected in the same manner as in the second embodiment by the connection method of the switching elements Q1 to Q4 and capacitors C1 and C2 of the third embodiment. Compared with the third embodiment, the polarity of the primary winding of the transformer of the inverter on one side is reversed. Although the arrangement of the switching elements Q1 to Q4 and the capacitors C1 and C2 is different from that of the second embodiment, the control can be performed by the same method as that of the second embodiment.

In the third embodiment or the fourth embodiment, the negative side of the capacitor C1 and the negative side of the capacitor C2 may be connected. By doing so, it is possible to stabilize the voltage across the capacitor C1 or C2 caused by variations in component characteristics or the like.
In addition, by using the capacitors C1 and C2 as one capacitor, the component mounting area and cost can be reduced.

  FIG. 8 shows a system configuration example in the case of performing DC output as the final output of the power converter. Since the operation on the primary side of the transformer is the same as the operation described above, description thereof is omitted here. At the output end of the converter 14 that outputs the PWM waveform, a rectifying unit 31 that full-wave rectifies the PWM signal voltage Vout to a plus voltage by a diode bridge, and a smoothing unit 32 that smoothes the rectified voltage by the choke coil L1 and the capacitor C3. The load 33 is connected. A voltage detector 35 that sends an output voltage (Vdc) detection value to the control unit 34 is connected to the output terminal to which the load 33 is connected. In addition, an operation unit 36 is provided that sends an output voltage command value to a control unit from commands from various input means or command values stored in a memory or the like. The control unit 34 generates a PWM signal so that the detected voltage value matches the output voltage command value, and sends the gate signals of the switching elements Q1 to Q4 to the drive unit 37. Drive unit 37 outputs the signal sent from control unit 34 to the gates of switching elements Q1-4.

  When the transformer output voltage Vout is rectified by the rectifying unit 31 and smoothed by the smoothing unit 32, a DC voltage of the output voltage Vdc is obtained as shown in FIG. Therefore, an output voltage Vdc which is a smooth output corresponding to the PWM modulation factor of one cycle is obtained. The transformer output voltage Vout corresponds to the PWM signal waveform, and the modulation rate is determined corresponding to the amount (shift amount) of shifting the output phase of the second set of inverters relative to the output phase of the first set of inverters. Come. Therefore, the DC output voltage Vdc can be obtained by making the shift amount of the output phase of the second set of inverters constant for each cycle. The transformer output voltage Vout becomes a pulse width modulation signal waveform (rectangular waveform) synchronized with the PWM signal. Since this PWM waveform can be changed in a wide range of modulation rate 0% to 100%, the output after smoothing The voltage level of the voltage Vdc can also be changed in a wide range. Therefore, a control device 34 is provided that compares the voltage detected by the voltage detector 35 with the voltage command value and feeds back the output phase of the second set of inverters with respect to the output phase of the first set of inverters. As a result, even if the output DC voltage of the DC power supply 11 fluctuates, it is possible to perform control such that the DC voltage Vdc supplied to the load 33 is always kept constant.

  FIG. 10 shows a circuit configuration example in the case of performing AC output linked to the commercial power supply system as the final output of the power converter. S1 to S4 are rectification units 41 configured by bidirectional switch elements. The rectifying unit 41 rectifies the PWM waveform AC voltage Vout at the carrier frequency into a positive voltage or a negative voltage by a drive signal synchronized with the carrier frequency from the drive unit 37. That is, since the PWM voltage waveform output Vout is alternately output with the same voltage on the + side and − side (see FIG. 11), the switch elements S1 and S3 are turned on for the + side voltage. The negative voltage can be rectified to a positive voltage by turning on the switch elements S2 and S4. Further, the voltage can be rectified to a negative voltage by reversing the combination.

  The filter unit 42 is a filter that removes high-frequency noise. All high-frequency components of the PWM waveform are removed, and a smooth output for each cycle is obtained on the output side. The PWM waveform output voltage Vout is output to the converter output terminal connected so as to add or subtract the outputs of two sets of inverters that are turned on / off at an on-time ratio of 50%. The modulation rate is determined corresponding to the amount (shift amount) of shifting the output phase of the second set of inverters relative to the output phase of the first set of inverters. Therefore, by determining the shift amount for each cycle so that the modulation factor for each cycle becomes a time function of a sine wave, a smooth output after passing through the smoothing circuit 42 is obtained, and the smooth output for each cycle is obtained. A sine wave output voltage Vsys is obtained continuously. That is, an AC output power supply can be configured by shifting the output phase of the second set of inverters in a sine wave pattern in each cycle with respect to the output phase of the first set of inverters.

  A voltage detector 35 or a current detector 38 for detecting the AC output voltage Vsys or the AC output current Iout is provided, the voltage or current detected by the detector is compared with a command value, and the output phase of the first set of inverters is compared. By providing the control device 34 that feeds back the amount of shift of the output phase of the second set of inverters, it is possible to control the AC output voltage Vsys or the AC output current Iout so as to match the command value. As a result, a sine wave output power source that can be connected to a commercial power source system of 50 Hz or 60 Hz is obtained.

  The voltage detector 35 detects the system voltage (Vsys) and sends the detected value to the control unit 34. The current detector 38 detects the output current (Iout) and sends the detected value to the control unit 34. The operation unit 36 sends an output current command value or an output power command value to the control unit 34 based on commands from various input means and command values stored in a memory or the like. The control unit 34 calculates the voltage detection value, the current detection value and the output current command value, or the output power command value, generates a PWM signal, and supplies the gate signal of the switching elements Q1 to Q4 and S1 to S4 to the drive unit 37. Send. The drive unit 37 outputs the signal sent from the control unit 34 to the gates of the switching elements Q1 to Q4 and S1 to S4.

  This circuit is a grid-connected inverter that boosts a low DC voltage with a high-frequency transformer, converts it to AC, and links it to the grid. The high-frequency inverter unit 14 operates in the same manner as the two sets of inverters 12 and 13 shown in FIG. An AC output power supply is configured by shifting the output phase of the second set of inverters in a sine wave form with respect to the output phase of the first set of inverters. That is, the overlapping period of the switching elements Q1 and Q2 and Q3 and Q4 is changed for each cycle of the carrier frequency, and the output current Iout is controlled to be a sine wave. Further, when the gate signal ON / OFF timing of the switching elements S1 to S4 is changed and the output power factor is 1, the output current is controlled to be positive or negative in synchronization with the system voltage cycle.

  FIG. 11 shows voltage waveforms and signal waveforms of each part. The voltage Vout is generated at the output of the transformer during the period in which Hi of the switching elements Q1 and Q2 and Q3 and Q4 overlap. The switching elements Q1 to Q4 are overlapped so that the voltage output period of Vout becomes the shortest when the period of the system voltage is 0 degree or near 180 degrees, and the voltage output period of Vout becomes the longest near 90 degrees or 270 degrees. The period is PWM controlled to obtain a sine wave output current waveform.

  When the system voltage Vsys is a positive cycle, the gate signals of the switching elements S1 to S4 are synchronized with the gate signal of the switching element Q1, and when the switching elements S1 and 3 are Hi, the switching elements S2 and 4 are Low, and the switching element S1 , 3 is Low, the switching elements S2, 4 become Hi, and the transformer voltage Vout can be rectified to a positive voltage. Further, when the system voltage Vsys is a negative cycle, the switching elements S1, 3 are Low, the switching elements S2, 4 are Hi, and the switching elements S1, 3 are Low while the switching element Q1 is Low, when the switching element Q1 is Hi. The transformer output voltage Vout can be rectified to a negative voltage by changing the timing of Hi and switching elements S2 and 4 to Low and switching elements S1 to S4. Note that the gate signals of the switching elements S1 to S4 are switched in synchronization with any of the switching elements Q1 to Q4. Or, in order to avoid generation of surge voltage and increase in switching loss by switching the switching elements S1 to S4 when voltage is generated in the transformer output voltage Vout, the high level and low level of Q1 and Q2 or Q3 and Q4 It is preferable to switch the gate signals of the switching elements S1 to S4 during periods with different levels (periods when no voltage is generated at Vout).

  Further, as shown in FIG. 12, the switching elements Q1 to Q4 corresponding to the rise and fall of the PWM signal are fixed, and the Hi and Low levels of the PWM signal are inverted between the plus cycle and the minus cycle of the system voltage Vsys. Thus, the output timing of the positive voltage and the negative voltage of the transformer output voltage Vout can be changed, and the switching for obtaining the positive voltage (negative voltage) of the switch elements S1 to S4 is not required depending on the cycle of the system voltage Vsys. It is possible to always switch with the same logic, and to simplify the control logic.

  In the above-described embodiment, the description has been made with the configuration in which one end of two sets of inverters is connected to the negative side of the DC power source. However, the same control is performed even if the connection is connected to the positive side and the polarity of the switching element is reversed. It is possible to implement the present invention in a method. In the present embodiment, an example in which a forward converter using an active clamp system is used as a primary side converter of a transformer has been described. However, a converter that can output positively or negatively at an on-time ratio of 50%. For example, it is possible to perform the same control using any converter method such as a full bridge method, a half bridge method, and a center tap method.

  Although one embodiment of the present invention has been described so far, the present invention is not limited to the above-described embodiment, and may of course be implemented in various forms within the scope of the technical idea.

It is a circuit diagram showing a power converter of a 1st embodiment of the present invention. It is a time chart which shows operation | movement of each part of the said power converter. It is a circuit diagram which shows the power converter of 2nd Embodiment of this invention. It is a time chart which shows operation | movement of each part of the said power converter. It is a time chart which shows operation | movement of each part of the said power converter in the case of utilizing the PWM signal in which the maximum ON time ratio exceeds 50%. It is a circuit diagram which shows the power converter of 3rd Embodiment of this invention. It is a circuit diagram which shows the power converter of 4th Embodiment of this invention. It is a figure which shows the system configuration example in the case of performing DC output as the final output of a power converter. It is a time chart which shows operation | movement of each part of the said system. It is a figure which shows the system structural example in the case of performing the alternating current output linked with the commercial power supply system as the final output of a power converter. It is a time chart which shows operation | movement of switching element Q1-Q4 and S1-S4 in the said system. It is a time chart which shows the modification of FIG.

Explanation of symbols

11 DC power supply 12, 13 inverter 14 high frequency inverter unit 15 output terminal 16 drive control circuit 21 clock source 22 waveform timing adjustment unit 23, 24 driver 25 PWM signal setting unit 31 rectification unit 32 smoothing unit 34 control unit 35 voltage detector 36 operation Unit 37 drive unit 38 current detector 41 rectifier unit 42 filter unit (smoothing circuit)

Claims (8)

  1. DC power supply,
    Two sets of inverters that turn on / off at an on-time ratio of 50%, and
    A high-frequency transformer connected to the primary side of the two sets of inverters and connected to add or subtract the secondary side output;
    A predetermined pulse width modulation is performed on the secondary side of the high-frequency transformer by shifting or adding or subtracting the output phase of the second set of inverters to the output phase of the first set of the two sets of inverters. A power converter characterized by forming a waveform.
  2.   One end of the primary winding of the high-frequency transformer is connected to the midpoint of two series-connected switching elements that are alternately turned on and off at an on-time ratio of 50%, and the two switching elements and the capacitor are connected to each other. 2. The power converter according to claim 1, comprising the two sets of inverters connected in series in a closed loop and having the other end of the primary winding of the high-frequency transformer connected to a common DC power source. .
  3.   The first set of inverter outputs rises or falls in synchronization with the rise of the pulse width modulation waveform output from the PWM signal setting unit, and the second set of inverter outputs in synchronization with the fall of the pulse width modulation waveform. The power converter according to claim 1, wherein the power converter falls or rises.
  4.   2. The power converter according to claim 1, wherein the inverter output outputs a pulse width modulation waveform having an amplitude equal to positive and negative.
  5.   A rectifier circuit and a smoothing filter circuit are connected to the output end of the power converter, and the output phase of the second set of inverters is shifted by a certain amount with respect to the output phase of the first set of inverters, thereby providing a DC output power supply. The power converter according to claim 1, wherein the power converter is configured.
  6.   The voltage detector for detecting the output voltage of the DC output power supply, the voltage detected by the voltage detector and the voltage command value are compared, and the output phase of the first set of inverters is compared with that of the second set of inverters. The power converter according to claim 5, further comprising a control device that feeds back an output phase shift amount.
  7.   By connecting a bidirectional switch circuit and a filter circuit to the output terminal of the power converter and shifting the output phase of the second set of inverters in a sine wave form with respect to the output phase of the first set of inverters, an AC The power converter according to claim 1, wherein the power converter is configured as an output power source.
  8.   The voltage detector for detecting the output voltage of the AC output power supply, or the current detector for detecting the output current, and the voltage or current detected by the detector is compared with a command value, and the output phase of the first set of inverters 8. A power converter according to claim 7, further comprising a control device that feeds back an amount of shifting an output phase of the second set of inverters.
JP2005295161A 2005-10-07 2005-10-07 Power converter Pending JP2007104872A (en)

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