JP2007097389A - Electric power conversion equipment - Google Patents

Electric power conversion equipment Download PDF

Info

Publication number
JP2007097389A
JP2007097389A JP2006165598A JP2006165598A JP2007097389A JP 2007097389 A JP2007097389 A JP 2007097389A JP 2006165598 A JP2006165598 A JP 2006165598A JP 2006165598 A JP2006165598 A JP 2006165598A JP 2007097389 A JP2007097389 A JP 2007097389A
Authority
JP
Japan
Prior art keywords
voltage
phase
frequency
carrier
pulse width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2006165598A
Other languages
Japanese (ja)
Other versions
JP4929863B2 (en
Inventor
Hisashi Fujimoto
久 藤本
Ryuji Yamada
隆二 山田
Koya Yoshioka
康哉 吉岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Holdings Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Holdings Ltd filed Critical Fuji Electric Holdings Ltd
Priority to JP2006165598A priority Critical patent/JP4929863B2/en
Publication of JP2007097389A publication Critical patent/JP2007097389A/en
Application granted granted Critical
Publication of JP4929863B2 publication Critical patent/JP4929863B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electric power conversion equipment that permits to fulfill two-arm modulation and the reduction of similar average switching frequency without entailing stepped changes of output potentials, to eliminate the need for large-sized common mode filter and insulating transformer, to achieve reduced size and light weight, and to inhibit output distortions during soft starting and during output transients caused by making and breaking loads. <P>SOLUTION: In the electric power conversion equipment for converting three-phase AC voltage into DC voltage, or DC voltage to three-phase AC voltage, a pulse width modulation is performed using carrier waves with different frequencies depending on phase and instantaneous value of the AC voltage. And, in the vicinity of zero-cross of phase voltage of the AC voltage, the pulse width modulation is performed using a carrier wave with a first frequency; and in the vicinity of peak of phase voltage of the AC voltage, using a carrier wave with a second frequency having a smaller value than that of the first frequency. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、交流−直流変換または直流−交流変換を行う電力変換装置の損失低減のためのパルス幅変調(PWM)制御に関する。   The present invention relates to pulse width modulation (PWM) control for reducing loss of a power converter that performs AC-DC conversion or DC-AC conversion.

図6に制御対象となる電力変換装置として三相直流−交流変換回路の構成例を、図7にそのパルス幅変調方法の例として、正弦波−三角波変調方式を示す。図6において、1および2は直流電源、3〜8は半導体スイッチ、9〜11はACリアクトル、12〜14はコンデンサである。また15はコモンモードリアクトル、16〜18は接地コンデンサ、19は装置の対地寄生キャパシタンスである。
図7において、正弦波状の各相信号波と三角波の搬送波(キャリア)を比較し、結果に応じて図6のスイッチング素子3〜8をオン・オフする。
即ち、U相信号波>キャリアの期間で半導体スイッチ3を、U相信号波<キャリアの期間で半導体スイッチ4を、V相信号波>キャリアの期間で半導体スイッチ5を、V相信号波<キャリアの期間で半導体スイッチ6を、W相信号波>キャリアの期間で半導体スイッチ7を、W相信号波<キャリアの期間で半導体スイッチ8を、それぞれオンする。
U1、V1、W1各点の電位は半導体スイッチ3、5、7がそれぞれオンのときP点電位に等しく、半導体スイッチ4、6、8がそれぞれオンのときN点電位に等しい。
U1、V1、W1各点間の電圧は方形波状となるが、これをリアクトル9〜11とコンデンサ12〜14からなるLCフィルタで平滑することにより、正弦波電圧を交流出力端子U、V、W各点間に得る。この方法は正弦波変調方式として広く知られている。
FIG. 6 shows a configuration example of a three-phase DC-AC conversion circuit as a power conversion device to be controlled, and FIG. 7 shows a sine wave-triangular wave modulation method as an example of the pulse width modulation method. In FIG. 6, 1 and 2 are DC power sources, 3 to 8 are semiconductor switches, 9 to 11 are AC reactors, and 12 to 14 are capacitors. 15 is a common mode reactor, 16 to 18 are grounding capacitors, and 19 is a parasitic capacitance to the ground of the device.
In FIG. 7, the sine wave signal waves and the triangular carrier wave are compared, and the switching elements 3 to 8 in FIG. 6 are turned on / off according to the result.
That is, the semiconductor switch 3 in the U phase signal wave> carrier period, the semiconductor switch 4 in the U phase signal wave <carrier period, the semiconductor switch 5 in the V phase signal wave> carrier period, and the V phase signal wave <carrier. The semiconductor switch 6 is turned on during the period of W, the semiconductor switch 7 is turned on during the period of W-phase signal wave> carrier, and the semiconductor switch 8 is turned on during the period of W-phase signal wave <carrier.
The potentials at the points U1, V1, and W1 are equal to the P point potential when the semiconductor switches 3, 5, and 7 are on, respectively, and are equal to the N point potential when the semiconductor switches 4, 6, and 8 are on.
The voltage between each of the points U1, V1, and W1 is a square wave. By smoothing the voltage with an LC filter including the reactors 9 to 11 and the capacitors 12 to 14, the sine wave voltage is converted into the AC output terminals U, V, and W. Get between each point. This method is widely known as a sinusoidal modulation method.

半導体スイッチはオン、オフ動作すなわちスイッチングにともないスイッチング損失を発生する。スイッチング損失が大きいと装置の変換効率の低下と冷却装置の大型化を招くが、スイッチング損失を低減するためにスイッチング周波数を下げると波形制御性能の低下を招く。
なお、図7においては図を見やすくするために、信号波とキャリアとは比較的近い周波数で描かれているが、実際には信号波は数10〜数100Hz、キャリアは5kHz〜50kHz程度とするのが一般的である。
また、制御性能の低下を最低限としつつスイッチング周波数を下げる方法として、図8に示す2アーム変調方式がある。これは、各相信号波のいずれか1つがキャリアの振幅を超えるよう操作を加えることで、その相のスイッチングが一定期間休止するようにし、平均スイッチング周波数が低くなるようにするものである。たとえば、図7の変調方式において、U相信号波の正のピーク付近では半導体スイッチ3のオンデューティは100%に近くなり、負のピーク付近では半導体スイッチ4のオンデューティが100%に近くなる。スイッチングの波形に対する影響はデューティ50%で最も大きく、これから外れるに従い小さくなる。このためスイッチングを休止してしまっても波形制御性能はそれほど低下しない。
A semiconductor switch generates a switching loss in accordance with an on / off operation, that is, switching. When the switching loss is large, the conversion efficiency of the device is lowered and the cooling device is enlarged. However, when the switching frequency is lowered to reduce the switching loss, the waveform control performance is lowered.
In FIG. 7, the signal wave and the carrier are drawn at relatively close frequencies to make the drawing easier to see, but the signal wave is actually several tens to several hundreds Hz and the carrier is about 5 kHz to 50 kHz. It is common.
Further, there is a two-arm modulation method shown in FIG. 8 as a method for lowering the switching frequency while minimizing the reduction in control performance. This is to apply an operation so that any one of the signal waves of each phase exceeds the amplitude of the carrier, so that the switching of the phase is stopped for a certain period, and the average switching frequency is lowered. For example, in the modulation system of FIG. 7, the on-duty of the semiconductor switch 3 is close to 100% near the positive peak of the U-phase signal wave, and the on-duty of the semiconductor switch 4 is close to 100% near the negative peak. The effect on the switching waveform is greatest at a duty of 50%, and decreases as the duty is deviated. For this reason, even if switching is stopped, the waveform control performance does not deteriorate so much.

この操作による電位の変化が各相間の電圧に現れないよう、即ち各信号波間の差が正弦波になるように他の相の信号波の値も同時に操作するので、出力線間電圧は正弦波に保たれる。2アーム変調方式は、たとえば特許文献1に示されている。
また、スイッチング周波数を切替える方法として、キャリアを変更する方式がある。キャリアを変更する手法自体は、たとえば特許文献2、特許文献3に示されているが、特許文献2においてはフィードバック制御により連続的にキャリア周波数を変えるので、本発明の対象装置では後述のキャリアの山谷の不一致を生じるため適当でない。また特許文献3では出力電流に応じてキャリアを切り替えており、本発明の特徴である電圧波形への影響が小さいタイミングでキャリア周波数を低減するという配慮がなされていないので、電圧波形に対する制御性能低下が避けられない。
特開平1−274668号公報 特開平3−52565号公報 特開2002−314345号公報
Since the change in potential due to this operation does not appear in the voltage between the phases, that is, the value of the signal wave in the other phase is also operated so that the difference between the signal waves becomes a sine wave, the output line voltage is the sine wave. To be kept. The two-arm modulation method is disclosed in Patent Document 1, for example.
As a method for switching the switching frequency, there is a method of changing the carrier. For example, Patent Document 2 and Patent Document 3 show the technique for changing the carrier. However, in Patent Document 2, the carrier frequency is continuously changed by feedback control. This is not appropriate because it causes inconsistencies in the mountains and valleys. In Patent Document 3, the carrier is switched according to the output current, and no consideration is given to reducing the carrier frequency at a timing with a small influence on the voltage waveform, which is a feature of the present invention. Is inevitable.
JP-A-1-274668 JP-A-3-52565 JP 2002-314345 A

図7に示す正弦波変調方式と図8に示す2アーム変調方式では、線間電圧は等しくなるが、各相の電位(たとえば図6におけるM点に対する電位)の挙動が異なったものとなる。
図6におけるM点に対するU1、V1、W1点の電位は、スイッチングに伴い高周波で変動するが、2アーム変調方式では、さらに信号波のステップ状の変化によって、ステップ状の電位変動が重畳する。これはスイッチングによるものよりも低い周波数成分を含む。スイッチング周波数成分の電位変動はコモンモードリアクトル15、接地コンデンサ16〜18からなるコモンモードフィルタで除去することが可能であるが、ステップ状の電位変動を除去するには、低周波成分に対応したコモンモードフィルタ、または絶縁変圧器が必要となり、いずれの場合も大幅な外形、質量の増加を伴う。たとえば電子機器のような負荷では、大きな電位変動があると、大地との間に流れる漏洩電流により誤動作を生じる危険性が高い。この理由により2アーム変調方式は電子機器等を負荷とする装置には適用が困難であり、専ら電動機等の電位変動が問題になりにくい負荷を対象とした装置に用いられている。
In the sine wave modulation method shown in FIG. 7 and the two-arm modulation method shown in FIG. 8, the line voltage is equal, but the behavior of the potential of each phase (for example, the potential at point M in FIG. 6) is different.
The potentials at points U1, V1, and W1 with respect to point M in FIG. 6 fluctuate at a high frequency with switching. However, in the two-arm modulation method, step-like potential fluctuations are further superimposed due to step-like changes in the signal wave. This includes lower frequency components than those due to switching. Although the potential fluctuation of the switching frequency component can be removed by a common mode filter including the common mode reactor 15 and the ground capacitors 16 to 18, in order to remove the step-like potential fluctuation, the common corresponding to the low frequency component is used. A mode filter or an isolation transformer is required, and in either case, a significant increase in external shape and mass is involved. For example, in a load such as an electronic device, if there is a large potential fluctuation, there is a high risk of malfunction due to a leakage current flowing between the ground and the ground. For this reason, the two-arm modulation method is difficult to apply to a device that uses an electronic device or the like as a load, and is used exclusively for a device that targets a load such as an electric motor that is less likely to cause a potential fluctuation.

第1の発明では、半導体スイッチにより構成され、信号波−搬送波比較方式パルス幅変調制御によって三相交流電圧を直流電圧に変換、または直流電圧を三相交流電圧に変換する電力変換装置において、前記交流電圧の位相または瞬時値に応じて、異なる周波数の搬送波を用いてパルス幅変調を行い、前記交流電圧の相電圧のゼロクロス付近では第1の周波数の搬送波を、前記交流電圧の相電圧のピーク付近では第1の周波数よりも低い値の第2の周波数の搬送波を用いてパルス幅変調を行う。
第2の発明では、第1の発明において、第1の周波数は、第2の周波数に対し、整数かつ奇数倍とする。
第3の発明では、半導体スイッチにより構成され、信号波−搬送波比較方式パルス幅変調制御によって三相交流電圧を直流電圧に変換、または直流電圧を三相交流電圧に変換する電力変換装置において、搬送波に同期して信号波を補正することにより、単一の周波数の搬送波を用いて第1の発明および第2の発明と同様のパルス幅変調動作をさせる。
According to a first aspect of the present invention, there is provided a power converter that includes a semiconductor switch and converts a three-phase AC voltage into a DC voltage or a DC voltage into a three-phase AC voltage by signal wave-carrier wave comparison pulse width modulation control. Depending on the phase or instantaneous value of the AC voltage, pulse width modulation is performed using a carrier wave of a different frequency, and the carrier wave of the first frequency is set near the zero cross of the phase voltage of the AC voltage, and the peak of the phase voltage of the AC voltage. In the vicinity, pulse width modulation is performed using a carrier wave having a second frequency lower than the first frequency.
In the second invention, in the first invention, the first frequency is an integer and an odd multiple of the second frequency.
According to a third aspect of the present invention, there is provided a power converter configured by a semiconductor switch, which converts a three-phase AC voltage into a DC voltage or converts a DC voltage into a three-phase AC voltage by signal wave-carrier wave comparison pulse width modulation control. By correcting the signal wave in synchronism with the above, a pulse width modulation operation similar to that of the first and second inventions is performed using a carrier wave having a single frequency.

第4の発明では、変換装置出力指令が所定の値を超えた期間のみ上述の第1の発明から第3の発明を実施する。   In the fourth invention, the first to third inventions described above are implemented only during a period when the conversion device output command exceeds a predetermined value.

本発明では、2アーム変調と同様の平均スイッチング周波数の低減を、出力電位のステップ状の変化を伴わずに実現できるため、大型のコモンモードフィルタや絶縁変圧器が不要となり、装置の小型化と軽量化を達成できる。また、ソフトスタート時や負荷投入遮断等による出力過渡変動時の出力歪みを抑制することが可能となる。   In the present invention, since the average switching frequency can be reduced similarly to the two-arm modulation without stepwise change in output potential, a large common mode filter and an insulation transformer are not required, and the apparatus can be downsized. Weight reduction can be achieved. In addition, it is possible to suppress output distortion at the time of soft start or load transient fluctuation due to load interruption.

本発明の要点は、周波数が異なり、その周波数比率が奇数倍である二つのキャリアを用いてパルス幅変調制御し、一時的にも各相電位の大小関係が逆転することがなく、W1とU1間またはW1とV1間の電圧が片極性となるようにパルス幅変調結果を各相の半導体スイッチに分配することにより、ACリアクトル9〜11のリプルを最小限にすることである。   The gist of the present invention is that pulse width modulation control is performed using two carriers having different frequencies and the frequency ratio of which is an odd multiple, so that the magnitude relationship between the phase potentials is not reversed temporarily, and W1 and U1 The ripples of the AC reactors 9 to 11 are minimized by distributing the pulse width modulation results to the semiconductor switches of the respective phases so that the voltage between them or between W1 and V1 is unipolar.

図1に本発明の第1の実施例を示す。これは、信号波の1周期から、U、W相が正および負のピーク付近、V相がゼロクロス付近のタイミング部分を取り出したものである。
V相はキャリア1に、U相およびW相はキャリア1に対し3倍の周期のキャリア2によってパルス幅変調を行う。即ち、デューティが50%付近で波形への影響が大きいV相は高周波でスイッチングを行うことで波形の制御性能を確保し、50%からはずれたU相およびW相ではV相よりスイッチング周波数を下げることで、制御性能をなるべく損なわない範囲で平均スイッチング周波数を下げるようにしている。
ここでキャリア2の周期をキャリア1の周期の3倍とした理由は、2つのキャリアを同期させ、かつキャリアの山(正のピーク)とキャリアの谷(負のピーク)が一致するようにするためである。これは以下の理由による。
FIG. 1 shows a first embodiment of the present invention. This is a timing portion where the U and W phases are near the positive and negative peaks and the V phase is near the zero cross from one period of the signal wave.
Pulse width modulation is performed with carrier 1 for the V phase and carrier 2 with a period three times that of carrier 1 for the U and W phases. In other words, the V phase, which has a large influence on the waveform when the duty is near 50%, secures the waveform control performance by switching at a high frequency, and the switching frequency is lower than the V phase in the U phase and W phase, which deviate from 50%. Thus, the average switching frequency is lowered within a range that does not impair the control performance as much as possible.
The reason why the period of carrier 2 is three times the period of carrier 1 is that the two carriers are synchronized and the peak of the carrier (positive peak) and the valley of the carrier (negative peak) match. Because. This is due to the following reason.

図1のタイミングでは、各相の電位はU相>V相>W相の関係にある。ここでW1電位がPに等しい期間(T1)においてはU1、V1の電位もPに等しく、他の期間ではW1電位はNであるのでW1電位が他の相を上回る期間がない。同様にU1電位がNとなる期間(T2)においてはV1、W1の電位もNに等しく、U1電位が他の相を下回る期間がない。このように、一時的にも各相電位の大小関係が逆転することがなく、W1とU1間またはW1とV1間の電圧が片極性となるのでACリアクトル9〜11のリプルを最小限にできる。
キャリアの山または谷が不一致の場合、たとえばT1においてキャリア1が谷ではなく山になった場合、V1はN点電位となり、本来の線間電圧と逆極性の電位差がV1−W1間に発生する。これによってW1とV1間の電圧は両極性となり、ACリアクトル9〜11のリプルが大きくなる。
At the timing of FIG. 1, the potential of each phase has a relationship of U phase> V phase> W phase. Here, in the period (T1) in which the W1 potential is equal to P, the potentials of U1 and V1 are also equal to P. In the other periods, the W1 potential is N, so there is no period in which the W1 potential exceeds the other phases. Similarly, in the period (T2) in which the U1 potential is N, the potentials of V1 and W1 are also equal to N, and there is no period in which the U1 potential is lower than the other phases. Thus, the magnitude relationship between the phase potentials is not reversed temporarily, and the voltage between W1 and U1 or between W1 and V1 is unipolar, so that ripples in the AC reactors 9 to 11 can be minimized. .
If the peaks or valleys of the carriers do not match, for example, if carrier 1 is not a valley but a peak in T1, V1 becomes the N-point potential, and a potential difference of opposite polarity to the original line voltage occurs between V1 and W1. . As a result, the voltage between W1 and V1 becomes bipolar, and the ripples of the AC reactors 9 to 11 increase.

キャリア2の周期をキャリア1の周期の偶数倍、たとえば2倍とすると、キャリアの山または谷のどちらかが不一致となることが避けられない。キャリア1、2の周期が整数倍の関係にないときはキャリアの山谷の不一致が発生するのは言うまでもない。
この制御は、各信号波ごとにキャリアを設け、その周波数を信号波の大きさまたは位相により切り替えるか、常に2種類のキャリアと比較した上でどちらかの比較結果を選択することによって可能となる。
交流電圧が三相の場合、キャリア2に基づき制御する範囲を、信号波の位相が正負のピーク±60°以内、または信号波の瞬時値が振幅の0.5倍以上とすると、少なくとも1つの相がキャリア1に基づき制御されるため、波形制御性能の低下を最低限に留めることができる。
If the period of the carrier 2 is an even multiple of the period of the carrier 1, for example, twice, it is inevitable that either the peak or valley of the carrier will not match. Needless to say, when the periods of the carriers 1 and 2 are not in an integral multiple relationship, a mismatch between the peaks and valleys of the carriers occurs.
This control is possible by providing a carrier for each signal wave and switching its frequency according to the magnitude or phase of the signal wave, or by always comparing either of the two types of carriers and selecting one of the comparison results. .
When the AC voltage is three-phase, the range controlled based on the carrier 2 is at least one when the phase of the signal wave is within ± 60 ° of the positive / negative peak, or the instantaneous value of the signal wave is 0.5 times or more of the amplitude. Since the phase is controlled based on the carrier 1, the deterioration of the waveform control performance can be minimized.

この制御により発生する電位変動の周波数の範囲は、キャリア2の周波数以上であり、2アーム変調のステップ状の電位変動に含まれる周波数成分より十分高いものとなる。   The frequency range of the potential fluctuation generated by this control is equal to or higher than the frequency of the carrier 2 and is sufficiently higher than the frequency component included in the step-like potential fluctuation of the two-arm modulation.

図2に本発明の第2の実施例を示す。図2(a)は第1図と同じ変調方法であるが、図2(b)に示すように、キャリアの周波数を変えずに信号波を操作することで同じ比較結果を得ることができる。たとえばU相において、キャリアの周期を3倍にするということは
(1)信号波<キャリアとなる回数が元のキャリアのピーク3回のうち1回となる。
(2)1回あたりの信号波<キャリアとなる期間は3倍となる。
ということになるので、
(イ)キャリアの3周期の内2周期は元の信号波にかかわらず、新たな信号波をキャリア振幅またはそれ以上とする。
(ロ)キャリアの3周期の内1周期は、元の信号波とキャリア振幅との差ΔAを3倍した値を、キャリア振幅から差し引いた値を新たな信号波とする。
以上の操作により、キャリアの周期を変えたのと等しい結果を得ることができる。
FIG. 2 shows a second embodiment of the present invention. FIG. 2A shows the same modulation method as FIG. 1, but the same comparison result can be obtained by manipulating the signal wave without changing the carrier frequency, as shown in FIG. 2B. For example, in the U phase, to triple the carrier period means (1) the number of times that the signal wave <carrier becomes one out of the three peaks of the original carrier.
(2) The period in which the signal wave per carrier <carrier is tripled.
So that means
(A) New signal wave is set to carrier amplitude or more in 2 of 3 periods of the carrier, regardless of the original signal wave.
(B) In one of the three carrier cycles, a value obtained by subtracting a value obtained by multiplying the difference ΔA between the original signal wave and the carrier amplitude by three from the carrier amplitude is a new signal wave.
By the above operation, a result equivalent to changing the carrier cycle can be obtained.

ワンチップマイコン等を制御装置に用いる場合、内蔵タイマを利用してパルス幅変調制御を行う場合が多いが、マイコンの機能の制約上、2つのキャリアを設けることが困難な場合がある。この実施例によれば、このような場合にも所望の動作が可能となる。   When a one-chip microcomputer or the like is used for a control device, pulse width modulation control is often performed using a built-in timer. However, it may be difficult to provide two carriers due to restrictions on the functions of the microcomputer. According to this embodiment, a desired operation is possible even in such a case.

一般に、電力変換装置の起動時は、出力をゼロから傾斜を持って定格まで出力する、いわゆるソフトスタートを行う。実施例1及び実施例2のパルス幅変調方法を適用した状態で、ソフトスタートを行うと、低出力領域で出力歪が発生し、負荷に悪影響を及ぼす可能性がある。以下に理由を説明する。
3相フルブリッジ回路において、V相が第1の周波数の搬送波(キャリア1)によりパルス幅変調(PWM)し、U相とW相は第2の周波数の搬送波(キャリア2、キャリア1の3倍周期)によりパルス幅変調(PWM)する場合の各相のゲート信号を図4、図5に示す。
図4は出力制御指令が定格近傍にある場合の各相のゲート信号を示している。 図中の下部に第1の搬送波のピーク−ピーク期間内に発生するスイッチング回数を示している。スイッチング回数が“2”の部分は2相が波形制御を行なっている期間であり、スイッチング回数が“1”の部分は1相のみが波形制御を行なっている期間である。図5は出力制御指令が低出力領域にある場合の各相のゲート信号を示している。図4と図5を比較すると明らかなように、低出力領域では、1相のみが波形制御を行なう期間が多くなっている。通常、波形制御ゲインや変換装置の回路定数は定格出力状態において調整を行なうため、低出力領域では制御性能が低下し出力歪が増加してしまう。
特に、ソフトスタート時には出力制御指令の過渡期に前記スイッチングモードが混在する期間があるため更に出力歪を増幅する可能性がある。
In general, when starting up the power converter, a so-called soft start is performed in which the output is output from zero to the rated value with a slope. If soft start is performed in a state where the pulse width modulation method of the first and second embodiments is applied, output distortion may occur in a low output region, which may adversely affect the load. The reason will be described below.
In a three-phase full-bridge circuit, the V phase is pulse width modulated (PWM) by the carrier wave of the first frequency (carrier 1), and the U phase and the W phase are the carrier waves of the second frequency (carrier 2 and carrier 3 times). FIG. 4 and FIG. 5 show gate signals of respective phases when pulse width modulation (PWM) is performed according to (period).
FIG. 4 shows the gate signal of each phase when the output control command is in the vicinity of the rating. The number of times of switching that occurs within the peak-peak period of the first carrier wave is shown in the lower part of the figure. The portion where the number of switching is “2” is a period in which two phases are performing waveform control, and the portion where the number of switching is “1” is a period in which only one phase is performing waveform control. FIG. 5 shows a gate signal for each phase when the output control command is in the low output region. As is clear from comparison between FIG. 4 and FIG. 5, in the low output region, the period during which only one phase performs waveform control increases. Normally, since the waveform control gain and the circuit constant of the converter are adjusted in the rated output state, the control performance is reduced and the output distortion is increased in the low output region.
In particular, at the time of soft start, there is a possibility that the output distortion is further amplified because there is a period in which the switching mode is mixed in the transition period of the output control command.

この問題を解決するための制御ブロック図を図3に示す。以下に、その動作を説明する。
出力基準V*と出力検出Vの偏差を減算器21で求め、後段の電圧調節器(AVR)22に入力し、出力制御信号λを得る。出力制御信号λはPWM回路23で、キャリア発生器31の出力である第1の搬送波(キャリア1)とキャリア発生器32の出力である第2の搬送波(キャリア2、キャリア1より低い周波数)によりパルス幅変調(PWM)される。電圧調節器(AVR)22の出力制御信号λは更に比較信号設定器33の出力λ1、比較信号設定器34の出力λ2と各々比較される。λ1およびλ2はゲート信号を第1の搬送波によりパルス幅変調(PWM)した信号とするか、第2の搬送波によりパルス幅変調(PWM)した信号とするかを判断するための比較レベルであり、λ>λ1 もしくは λ<λ2 の場合、第2の搬送波によるPWM信号を切替スイッチ29で選択する。比較信号(λ1、λ2)を適切な値に設定することにより、低出力時には全ての相が第1の搬送波(キャリア1)によりPWM信号が決定され、出力歪は抑制される。また、定格近傍においては第2の搬送波(キャリア2)によりPWM信号が決定され、変換装置のスイッチング損失を低減することが出来る。
A control block diagram for solving this problem is shown in FIG. The operation will be described below.
The difference between the output reference V * and the output detection V is obtained by the subtracter 21 and is input to the voltage regulator (AVR) 22 at the subsequent stage to obtain the output control signal λ. The output control signal λ is generated by the PWM circuit 23 according to the first carrier wave (carrier 1) which is the output of the carrier generator 31 and the second carrier wave (carrier 2 and lower frequency than the carrier 1) which is the output of the carrier generator 32. Pulse width modulated (PWM). The output control signal λ of the voltage regulator (AVR) 22 is further compared with the output λ1 of the comparison signal setter 33 and the output λ2 of the comparison signal setter 34, respectively. λ1 and λ2 are comparison levels for determining whether the gate signal is a pulse width modulated (PWM) signal using the first carrier wave or a pulse width modulated (PWM) signal using the second carrier wave, When λ> λ1 or λ <λ2, the changeover switch 29 selects the PWM signal based on the second carrier wave. By setting the comparison signals (λ1, λ2) to appropriate values, PWM signals are determined by the first carrier wave (carrier 1) for all phases at the time of low output, and output distortion is suppressed. In the vicinity of the rating, the PWM signal is determined by the second carrier wave (carrier 2), and the switching loss of the converter can be reduced.

本発明は、交流−直流変換回路や直流−交流変換回路を用いる無停電電源装置、直流電源装置、交流安定化電源装置などへの適用が可能である。   The present invention can be applied to an uninterruptible power supply apparatus, a DC power supply apparatus, an AC stabilized power supply apparatus, and the like using an AC-DC conversion circuit or a DC-AC conversion circuit.

本発明の第1実施例の動作タイムチャートを示す。2 shows an operation time chart of the first embodiment of the present invention. 本発明の第2実施例の動作タイムチャートを示す。The operation | movement time chart of 2nd Example of this invention is shown. 本発明の第3の実施例を示す制御回路図を示す。FIG. 5 is a control circuit diagram showing a third embodiment of the present invention. 図3の第1の動作説明図を示す。FIG. 4 shows a first operation explanatory diagram of FIG. 図3の第2の動作説明図を示す。FIG. 4 shows a second operation explanatory diagram of FIG. 3; 制御対象となる三相直流−交流変換回路の構成例を示す。The structural example of the three-phase DC-AC conversion circuit used as control object is shown. 正弦波−三角波変調の原理図を示す。The principle diagram of sine wave-triangular wave modulation is shown. 2アーム変調の原理図を示す。The principle figure of 2 arm modulation is shown.

符号の説明Explanation of symbols

1、2・・・直流電源 3〜8・・・半導体スイッチ
9〜11・・・ACリアクトル 12〜14・・・コンデンサ
15・・・コモンモードリアクトル 16〜18・・・接地コンデンサ
19・・・対地寄生キャパシタンス
21・・・減算器 22・・・電圧調節器(AVR)
23・・・PWM回路 24・・・判定回路
25、26、27、28・・・比較器 29・・・切替スイッチ
30・・・論理積回路 31、32・・・キャリア発生器
33、34・・・比較信号設定器
DESCRIPTION OF SYMBOLS 1, 2 ... DC power supply 3-8 ... Semiconductor switch 9-11 ... AC reactor 12-14 ... Capacitor 15 ... Common mode reactor 16-18 ... Grounding capacitor 19 ... Parasitic capacitance to ground 21 ... Subtractor 22 ... Voltage regulator (AVR)
DESCRIPTION OF SYMBOLS 23 ... PWM circuit 24 ... Determination circuit 25, 26, 27, 28 ... Comparator 29 ... Changeover switch 30 ... AND circuit 31, 32 ... Carrier generator 33, 34. ..Comparison signal setting device

Claims (4)

半導体スイッチにより構成され、信号波−搬送波比較方式パルス幅変調制御によって三相交流電圧を直流電圧に変換、または直流電圧を三相交流電圧に変換する電力変換装置において、
前記交流電圧の位相または瞬時値に応じて、異なる周波数の搬送波を用いてパルス幅変調を行い、前記交流電圧の相電圧のゼロクロス付近では第1の周波数の搬送波を、前記交流電圧の相電圧のピーク付近では第1の周波数よりも低い値の第2の周波数の搬送波を用いてパルス幅変調を行うことを特徴とした電力変換装置。
In a power converter configured by a semiconductor switch and converting a three-phase AC voltage to a DC voltage or converting a DC voltage to a three-phase AC voltage by signal wave-carrier wave comparison pulse width modulation control,
Depending on the phase or instantaneous value of the AC voltage, pulse width modulation is performed using a carrier wave of a different frequency, and the carrier wave of the first frequency is set near the zero cross of the phase voltage of the AC voltage. A power converter that performs pulse width modulation using a carrier having a second frequency lower than the first frequency near a peak.
前記第1の周波数は、第2の周波数に対し、整数かつ奇数倍とすることを特徴とした請求項1に記載の電力変換装置。   The power converter according to claim 1, wherein the first frequency is an integer and an odd multiple of the second frequency. 半導体スイッチにより構成され、信号波−搬送波比較方式パルス幅変調制御によって三相交流電圧を直流電圧に変換、または直流電圧を三相交流電圧に変換する電力変換装置において、
搬送波に同期して信号波を補正することにより、単一の周波数の搬送波を用いて請求項1または請求項2と同様のパルス幅変調動作をさせることを特徴とした電力変換装置。
In a power converter configured by a semiconductor switch and converting a three-phase AC voltage to a DC voltage or converting a DC voltage to a three-phase AC voltage by signal wave-carrier wave comparison pulse width modulation control,
3. A power conversion device that performs a pulse width modulation operation similar to that of claim 1 or 2 using a carrier wave having a single frequency by correcting a signal wave in synchronization with the carrier wave.
変換装置の出力指令が所定の値を超えた期間にのみ請求項1から請求項3に記載のパルス幅変調を行うことを特徴とした電力変換装置。
4. The power converter according to claim 1, wherein the pulse width modulation according to claim 1 is performed only during a period when an output command of the converter exceeds a predetermined value.
JP2006165598A 2005-08-30 2006-06-15 Power converter Active JP4929863B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006165598A JP4929863B2 (en) 2005-08-30 2006-06-15 Power converter

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2005249112 2005-08-30
JP2005249112 2005-08-30
JP2006165598A JP4929863B2 (en) 2005-08-30 2006-06-15 Power converter

Publications (2)

Publication Number Publication Date
JP2007097389A true JP2007097389A (en) 2007-04-12
JP4929863B2 JP4929863B2 (en) 2012-05-09

Family

ID=37982372

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006165598A Active JP4929863B2 (en) 2005-08-30 2006-06-15 Power converter

Country Status (1)

Country Link
JP (1) JP4929863B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010035260A (en) * 2008-07-25 2010-02-12 Honda Motor Co Ltd Inverter generator
JP2011109739A (en) * 2009-11-13 2011-06-02 Hitachi Ltd Power conversion apparatus
JP2012065515A (en) * 2010-09-17 2012-03-29 Toshiba Corp Switching method of electric power conversion system
US8466667B2 (en) 2007-10-31 2013-06-18 Harman Becker Automotive Systems Gmbh Controllable circuit
CN105977983A (en) * 2016-07-05 2016-09-28 北京千驷驭电气有限公司 Carrier wave phase shift method and system
JP6195185B1 (en) * 2017-03-23 2017-09-13 利春 森園 Ito can disaster prevention tool
WO2017179150A1 (en) * 2016-04-13 2017-10-19 三菱電機株式会社 Power conversion device and method for controlling same
KR20190139402A (en) * 2018-06-08 2019-12-18 현대자동차주식회사 Charging apparatus capable of reducing low frequency leakage current

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118363A (en) * 1984-07-05 1986-01-27 Mitsubishi Electric Corp Pwm control circuit of inverter device
JPH01218363A (en) * 1988-02-25 1989-08-31 Toshiba Corp Inverter controller
JPH02168895A (en) * 1988-12-21 1990-06-28 Fuji Electric Co Ltd Method of decreasing peak current value of voltage-type pulse width modulation control inverter
JPH10201246A (en) * 1997-01-13 1998-07-31 Mitsubishi Electric Corp Pwm inverter apparatus
JPH11196579A (en) * 1997-12-26 1999-07-21 Japan Atom Energy Res Inst Semiconductor power converter controller

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118363A (en) * 1984-07-05 1986-01-27 Mitsubishi Electric Corp Pwm control circuit of inverter device
JPH01218363A (en) * 1988-02-25 1989-08-31 Toshiba Corp Inverter controller
JPH02168895A (en) * 1988-12-21 1990-06-28 Fuji Electric Co Ltd Method of decreasing peak current value of voltage-type pulse width modulation control inverter
JPH10201246A (en) * 1997-01-13 1998-07-31 Mitsubishi Electric Corp Pwm inverter apparatus
JPH11196579A (en) * 1997-12-26 1999-07-21 Japan Atom Energy Res Inst Semiconductor power converter controller

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8466667B2 (en) 2007-10-31 2013-06-18 Harman Becker Automotive Systems Gmbh Controllable circuit
JP2010035260A (en) * 2008-07-25 2010-02-12 Honda Motor Co Ltd Inverter generator
JP2011109739A (en) * 2009-11-13 2011-06-02 Hitachi Ltd Power conversion apparatus
JP2012065515A (en) * 2010-09-17 2012-03-29 Toshiba Corp Switching method of electric power conversion system
WO2017179150A1 (en) * 2016-04-13 2017-10-19 三菱電機株式会社 Power conversion device and method for controlling same
JPWO2017179150A1 (en) * 2016-04-13 2018-06-07 三菱電機株式会社 Power converter and control method thereof
CN105977983A (en) * 2016-07-05 2016-09-28 北京千驷驭电气有限公司 Carrier wave phase shift method and system
JP6195185B1 (en) * 2017-03-23 2017-09-13 利春 森園 Ito can disaster prevention tool
KR20190139402A (en) * 2018-06-08 2019-12-18 현대자동차주식회사 Charging apparatus capable of reducing low frequency leakage current
KR102542941B1 (en) 2018-06-08 2023-06-14 현대자동차주식회사 Charging apparatus capable of reducing low frequency leakage current

Also Published As

Publication number Publication date
JP4929863B2 (en) 2012-05-09

Similar Documents

Publication Publication Date Title
US10224830B2 (en) System and method for controlling a back-to-back three-level converter with voltage ripple compensation
US6411530B2 (en) Drive and power supply with phase shifted carriers
Tarisciotti et al. Multiobjective modulated model predictive control for a multilevel solid-state transformer
Holmes et al. An improved three-phase variable-band hysteresis current regulator
EP2214301B1 (en) Power conversion systems and methods for controlling harmonic distortion
JP4929863B2 (en) Power converter
CA2689503C (en) Prediction scheme for step wave power converter and inductive inverter topology
KR101266278B1 (en) Method of controlling power conversion device
KR102009512B1 (en) Apparatus and method for generating offset voltage of 3-phase inverter
JP2011109739A (en) Power conversion apparatus
CN101119073A (en) Control method for direct power converter
JP6142926B2 (en) Power converter
KR102409013B1 (en) power converter
JP7008222B2 (en) Power conversion system
JP2006238621A (en) Uninterruptible power supply
EP3051685A1 (en) Dc-to-ac conversion apparatus and method of operating the same
US9438132B2 (en) Multilevel AC/DC power converting method and converter device thereof
Nannapaneni et al. Control of indirect matrix converter by using improved SVM method
KR20160117675A (en) H-bridge multi-level inverter
KR101648002B1 (en) Switching signal generator and Switching signal generating method for 3-phase 3-level rectifier
Behrouzian et al. Individual capacitor voltage balancing in H-bridge cascaded multilevel STATCOM at zero current operating mode
KR100713194B1 (en) Apparatus for minimizing ripple of DC output voltage of plasma power supply
JP5428744B2 (en) Power converter control method
Tez̆ak et al. Adaptive PWM control scheme of interleaved boost converter for AC traction application
JP2019193377A (en) Series multiple power converter

Legal Events

Date Code Title Description
RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20081215

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20090219

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20090313

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110801

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110809

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20111005

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120117

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120130

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

Ref document number: 4929863

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150224

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250