JP2006324298A - Apparatus and method for manufacturing semiconductor integrated circuit device - Google Patents

Apparatus and method for manufacturing semiconductor integrated circuit device Download PDF

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Publication number
JP2006324298A
JP2006324298A JP2005143714A JP2005143714A JP2006324298A JP 2006324298 A JP2006324298 A JP 2006324298A JP 2005143714 A JP2005143714 A JP 2005143714A JP 2005143714 A JP2005143714 A JP 2005143714A JP 2006324298 A JP2006324298 A JP 2006324298A
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Prior art keywords
semiconductor
integrated circuit
spacer
circuit device
semiconductor integrated
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JP2005143714A
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Japanese (ja)
Inventor
Toshitaka Akaboshi
Yuya Okada
有矢 岡田
年隆 赤星
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Matsushita Electric Ind Co Ltd
松下電器産業株式会社
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Priority to JP2005143714A priority Critical patent/JP2006324298A/en
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector

Abstract

A semiconductor integrated circuit device manufacturing apparatus and a semiconductor integrated circuit device manufacturing method capable of realizing a semiconductor integrated circuit device having high reliability are provided.
A semiconductor integrated circuit device manufacturing apparatus in which a first semiconductor device and a second semiconductor device having an external connection terminal are stacked via solder balls mounted on the external connection terminal. The lower end of the movable pin 5 is mounted on the main surface of the jig 4, and the spacers 6, 7, 8 and the spacers provided on the jig 4 and passing through the movable pin 5 to be fixed therein. The movable pin 5 includes a stopper 9 for fixing, and the lower end of the movable pin 5 can operate in a direction parallel to the main surface of the jig 4 according to the size of the semiconductor substrate 1b. The first to fifth spacers (6a, 7a, 8, 7b, and 6b) that are operable in the direction have a shape corresponding to the size of the semiconductor substrate 1b.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor integrated circuit device manufacturing apparatus and a semiconductor integrated circuit device manufacturing method.

  In recent years, with the miniaturization and weight reduction of portable information devices and the like, there has been a demand for higher density, smaller size, and thinner semiconductor devices.

  In order to meet these requirements, it is necessary to realize a semiconductor integrated circuit device in which as many IC chips as possible are mounted in a plurality of stages.

  For this reason, in recent years, a three-dimensional mounting technique for stacking a plurality of IC chips has been proposed and developed by each company.

  In recent years, technology for recording audio or images as digital signals in flash memory has become widespread, and with increasing capacity of flash memory, higher density, smaller size, and thinner flash memory are required. Yes.

  In order to meet these demands, as many flash memory devices as possible must be mounted in a standard-sized housing.

  For this reason, in recent years, a semiconductor integrated circuit device in which IC chips on which flash memory elements are formed is mounted in multiple stages has been proposed (for example, see Patent Document 1).

  Hereinafter, a semiconductor integrated circuit device manufacturing method according to the prior art will be described with reference to FIGS. 13A and 13B, taking as an example a semiconductor integrated circuit device in which IC chips are mounted in two stages. .

  13 (a) and 13 (b) are cross-sectional views showing main steps of a method for manufacturing a semiconductor integrated circuit device according to the prior art.

  First, a semiconductor substrate 31b having external connection terminals 32 on the surface is formed on a base metal plate (not shown).

  Subsequently, by selectively etching desired regions in the semiconductor substrate 31b and the external connection terminals 32, an opening (not shown) from which the base metal plate is exposed is formed.

  Subsequently, etching is performed from the side of the base metal plate facing the side where the semiconductor substrate 31b is formed. As a result, portions of the base metal plate other than the portion existing at the peripheral edge of the semiconductor substrate 31b are completely removed. In this way, the frame-shaped spacer 33 made of the base metal plate is formed on the peripheral edge of the semiconductor substrate 31b.

  At this time, since the portion of the opening in the base metal plate is completely removed, the through hole 34 can be formed in the region of the semiconductor substrate 31b where the external connection terminal 32 exists.

  Subsequently, the IC chip 31a is mounted on the semiconductor substrate 31b by flip chip mounting. Thereby, a semiconductor device 31A in which the IC chip 31a is mounted on the semiconductor substrate 31b having the external connection terminals 32 is formed.

  In this way, as shown in FIG. 13 (a), the through hole 34 is formed in the region of the semiconductor substrate 31b where the external connection terminal 32 exists, and the spacer 33 is formed on the peripheral edge of the semiconductor substrate 31b. A semiconductor device 31 </ b> A in which is formed can be formed.

  Subsequently, a solder paste 35 is filled into the through hole 34 of the semiconductor substrate 31b.

  Next, the semiconductor devices 31A are stacked in a plurality of stages.

  At this time, each of the semiconductor devices 31A is arranged in a plurality of stages while being positioned using a predetermined jig (not shown). Therefore, each of the through holes 34 of the semiconductor substrate 31b is disposed so as to penetrate between the stacked semiconductor devices 31A.

  At this time, each of the semiconductor devices 31A is arranged in a plurality of stages while fixing the stacking interval by using the spacer 33 formed on the semiconductor substrate 31b. Therefore, each of the semiconductor substrates 31A is arranged so that the stacking interval is constant.

  Subsequently, as shown in FIG. 13B, after one metal pin 36 is passed through each of the through holes 34 of the semiconductor substrate 31b filled with the solder paste 35, one end of the metal pin 36 is inserted. A solder ball 37 is mounted on the part.

  Next, a solder reflow process is performed.

  Accordingly, the external connection terminal 32 and the metal pin 36 are electrically connected via the solder paste 35, and the metal pin 36 and the solder ball 37 are electrically connected via the solder paste 35.

In this manner, in the method of manufacturing a semiconductor integrated circuit device according to the conventional technique, the semiconductor integrated circuit device 31 having a three-dimensional mounting structure in which the semiconductor devices 31A are electrically joined to each other can be manufactured.
JP 2002-76240 A

  However, in the method of manufacturing a semiconductor integrated circuit device according to the related art, the semiconductor substrate 31b is deformed due to thermal expansion during the solder reflow process, so that an interlayer connection failure occurs between each of the stacked semiconductor devices 31A. Therefore, the reliability of the semiconductor integrated circuit device 31 is lowered.

  Furthermore, in the method of manufacturing a semiconductor integrated circuit device according to the prior art, the surface area of the semiconductor substrate 31b is reduced by the spacer 33 formed on the semiconductor substrate 31b, which causes deterioration of heat dissipation characteristics in the semiconductor substrate 31b. Therefore, the reliability of the semiconductor integrated circuit device 31 is further reduced.

  In view of the above, an object of the present invention is to provide a semiconductor integrated circuit device manufacturing apparatus and a semiconductor integrated circuit device manufacturing method having high reliability.

  In order to solve the above-described problems, a first semiconductor integrated circuit device manufacturing apparatus according to the present invention includes a first semiconductor device in which an IC chip is mounted on a semiconductor substrate having external connection terminals, and a second semiconductor device. A semiconductor integrated circuit device manufacturing apparatus in which a semiconductor device is stacked via solder balls mounted on external connection terminals, the lower end of which is mounted on the main surface of the jig, and a movable pin provided on the jig A first spacer which penetrates and fixes the movable pin inside, and is provided on the first spacer, fixes the first semiconductor device at a predetermined position, and penetrates the movable pin inside. Fixed on the second spacer, the distance between the first semiconductor device and the second semiconductor device is fixed, and the movable pin is passed through and fixed. 3rd space And a fourth spacer provided on the third spacer, fixing the second semiconductor device at a predetermined position, and fixing the movable pin through the inside, and provided on the fourth spacer. A fifth spacer for penetrating and fixing the movable pin therein, and a stopper provided on the fifth spacer for fixing the first to fifth spacers, the movable pin being a semiconductor Depending on the size of the substrate, the lower end can operate in a direction parallel to the main surface of the jig, and can operate in a circumferential direction centered on the lower end, and the first to fifth spacers are semiconductors. It has a shape corresponding to the size of the substrate.

  According to the first semiconductor integrated circuit device manufacturing apparatus of the present invention, the first and second semiconductor devices can be stacked as desired by using the first to fourth spacers through which the movable pins pass. The second semiconductor device is fixed on the first semiconductor device with a desired stacking interval so that the second semiconductor device is aligned with the position, and on the jig through the first to fourth spacers. The first and second semiconductor devices can be stacked.

  Specifically, by interposing a third spacer between the first semiconductor device and the second semiconductor device, the interval between the first semiconductor device and the second semiconductor device is controlled to a desired interval. can do.

  Specifically, the first semiconductor device can be arranged so that the side surface of the semiconductor substrate and the side surface of the second spacer are in contact with each other, so that the position where the first semiconductor device is arranged can be set as desired. The position can be controlled.

  Similarly, since the second semiconductor device can be disposed so that the side surface of the semiconductor substrate and the side surface of the fourth spacer are in contact with each other, the position where the second semiconductor device is disposed is controlled to a desired position. be able to.

  Therefore, in the first semiconductor integrated circuit device manufacturing apparatus according to the present invention, the first and second semiconductor devices can be stacked with a desired stacking position and a desired stacking interval.

  According to the first semiconductor integrated circuit device manufacturing apparatus of the present invention, the first semiconductor device is disposed on the jig via the first spacer having a shape corresponding to the size of the semiconductor substrate. Therefore, the first semiconductor device can be arranged on the jig without the IC chip in the first semiconductor device being in direct contact with the jig.

  For this reason, in the manufacturing apparatus of the first semiconductor integrated circuit device according to the present invention, the IC chip in the first semiconductor device is prevented from being damaged by the IC chip and the jig coming into contact with each other. can do.

  Further, according to the first semiconductor integrated circuit device manufacturing apparatus of the present invention, the first to fourth spacers having a shape corresponding to the size of the semiconductor substrate are arranged according to the size of the semiconductor substrate. Penetrate the movable pin.

  As described above, in the first semiconductor integrated circuit device manufacturing apparatus according to the present invention, the first to fourth spacers whose shapes are adjusted according to the size of the semiconductor substrate are used, and the size of the semiconductor substrate is determined. Thus, a movable pin whose arrangement position is adjusted is used.

  Therefore, in the first semiconductor integrated circuit device manufacturing apparatus according to the present invention, even when the size of the semiconductor substrate in the first semiconductor device and the size of the semiconductor substrate in the second semiconductor device are different from each other, the desired The first and second semiconductor devices can be stacked with a stacking position and a desired stacking interval.

  Furthermore, according to the first apparatus for manufacturing a semiconductor integrated circuit device of the present invention, by providing a stopper on the fourth spacer via the fifth spacer, the first to fourth spacers are interposed. Thus, the stacked first and second semiconductor devices can be fixed.

  As a result, the first and second semiconductor devices stacked are fixed by the pressure of the fasteners in a state where the first and second semiconductor devices are stacked at a desired stacking position and a desired stacking interval. Can do.

  Therefore, in the first semiconductor integrated circuit device manufacturing apparatus according to the present invention, the first and second semiconductor devices are stacked with a desired stacking position and a desired stacking interval when manufacturing the semiconductor integrated circuit device. Can be prevented from being displaced.

  According to the first semiconductor integrated circuit device manufacturing apparatus of the present invention, the fastener is provided on the fourth spacer via the fifth spacer having a shape corresponding to the size of the semiconductor substrate. Therefore, the fastener is not directly provided on the semiconductor substrate in the second semiconductor device.

  For this reason, in the manufacturing apparatus of the 1st semiconductor integrated circuit device concerning this invention, it can prevent that the semiconductor substrate in a 2nd semiconductor device is damaged by the pressure by a fastener.

  Furthermore, according to the first semiconductor integrated circuit device manufacturing apparatus of the present invention, the first and second semiconductor devices stacked with a desired stacking position and a desired stacking interval are fixed and soldered. By performing the reflow process, the external connection terminal in the first semiconductor device and the external connection terminal in the second semiconductor device are electrically connected to each other via the solder ball mounted on the external connection terminal. A semiconductor integrated circuit device can be manufactured.

  For this reason, in the first semiconductor integrated circuit device manufacturing apparatus according to the present invention, during the solder reflow process, the first and second semiconductor devices are prevented from being displaced, and the semiconductor substrate is warped due to thermal expansion. Can be prevented.

  Therefore, in the manufacturing apparatus of the first semiconductor integrated circuit device according to the present invention, the first semiconductor device and the second semiconductor device stacked due to warpage of the semiconductor substrate due to thermal expansion during the solder reflow process. Since it is possible to prevent an interlayer connection failure from occurring, a semiconductor integrated circuit device having high reliability can be provided.

  In the first apparatus for manufacturing a semiconductor integrated circuit device according to the present invention, it is preferable that at least one of the first to fifth spacers is made of a low elastic body.

  If it does in this way, the 1st and 2nd semiconductor device laminated | stacked via the 1st-4th spacer will be fixed with the fastener provided via the 5th spacer on the 4th spacer. At this time, the shape of the first to fifth spacers is deformed, so that the magnitude of pressure by the stopper weighted against the semiconductor substrate can be reduced.

  For example, in the solder reflow process, the first to fifth spacers made of a low elastic body are deformed in accordance with the warp of the semiconductor substrate due to thermal expansion, so that the weighting is applied to the semiconductor substrate. Therefore, it is possible to prevent the pressure from being excessively applied to the semiconductor substrate.

  Therefore, in the first semiconductor integrated circuit device manufacturing apparatus according to the present invention, when the semiconductor integrated circuit device is manufactured (particularly during the solder reflow process), the pressure on the semiconductor substrate is applied to the semiconductor substrate. Since an excessive pressure is not applied, the semiconductor substrate can be prevented from being broken, and thus a semiconductor integrated circuit device having high reliability can be provided.

  In the first semiconductor integrated circuit device manufacturing apparatus according to the present invention, the fastener is preferably a screw.

  In the first apparatus for manufacturing a semiconductor integrated circuit device according to the present invention, it is preferable that a spring is interposed between the screw and the fifth spacer.

  In this case, when the first and second semiconductor devices stacked via the first to fourth spacers are fixed by the screws provided on the fifth spacer, the spring expands and contracts. Thus, it is possible to adjust the magnitude of the pressure applied by the screw that is applied to the semiconductor substrate.

  For example, during the solder reflow process, the spring expands and contracts according to the warp of the semiconductor substrate due to thermal expansion, so that the amount of pressure applied by the screw that is applied to the semiconductor substrate can be adjusted. It is possible to prevent an excessive pressure from being applied to the substrate.

  For this reason, in the first apparatus for manufacturing a semiconductor integrated circuit device according to the present invention, when the semiconductor integrated circuit device is manufactured (particularly during the solder reflow process), the semiconductor substrate is excessively affected by the pressure from the screw. Therefore, the semiconductor substrate can be prevented from being broken, so that a semiconductor integrated circuit device having high reliability can be provided.

  In the first apparatus for manufacturing a semiconductor integrated circuit device according to the present invention, the stopper is preferably a weight or a pressure device.

  In this case, when the first and second semiconductor devices stacked via the first to fourth spacers are fixed by the weight or pressure device provided on the fifth spacer, the semiconductor It is possible to adjust the magnitude of the pressure applied to the substrate by the weight or pressure device.

  For example, during the solder reflow process, the weight applied to the semiconductor substrate can be adjusted according to the warp of the semiconductor substrate due to thermal expansion, or the pressure applied by the pressure device can be adjusted. Therefore, it is possible to prevent excessive pressure from being applied.

  For this reason, in the first semiconductor integrated circuit device manufacturing apparatus according to the present invention, when the semiconductor integrated circuit device is manufactured (particularly during the solder reflow process), the semiconductor substrate is subjected to pressure by a weight or a pressure device. Since an excessive pressure is not applied to the semiconductor substrate, it is possible to prevent the semiconductor substrate from being broken, so that a semiconductor integrated circuit device having high reliability can be provided.

  In the first apparatus for manufacturing a semiconductor integrated circuit device according to the present invention, it is preferable that at least one of the jig, the first to fifth spacers, and the movable pin has a heat generating mechanism.

  In this way, the thermal history of the first semiconductor device and the thermal history of the second semiconductor device can be adjusted equally.

  As a result, during the solder reflow process, the amount of heat applied to the semiconductor substrate in the first semiconductor device and the amount of heat applied to the semiconductor substrate in the second semiconductor device can be adjusted equally.

  For this reason, in the manufacturing apparatus of the first semiconductor integrated circuit device according to the present invention, the magnitude of the warp caused to the semiconductor substrate in the first semiconductor device and the semiconductor substrate in the second semiconductor device during the solder reflow process. It is possible to prevent a difference from occurring between the magnitude of warpage caused.

  Therefore, in the first semiconductor integrated circuit device manufacturing apparatus according to the present invention, during the solder reflow process, the warpage of the semiconductor substrate in the first semiconductor device and the warpage of the semiconductor substrate in the second semiconductor device are large. Is different from each other, it is possible to prevent an interlayer connection failure between the stacked first semiconductor device and the second semiconductor device, thereby providing a highly reliable semiconductor integrated circuit device. can do.

  According to the second semiconductor integrated circuit device manufacturing apparatus of the present invention, the first semiconductor device and the second semiconductor device in which the IC chip is mounted on the semiconductor substrate having the external connection terminals are mounted on the external connection terminals. A device for manufacturing a semiconductor integrated circuit device, which is laminated via solder balls, and has a movable pin attached to the main surface of the jig and a lower end provided on the jig and penetrating through the movable pin. Fixed on the first spacer, the distance between the first semiconductor device and the second semiconductor device is fixed, and the movable pin is passed through and fixed. A second spacer provided on the second spacer, a third spacer for fixing the movable pin through the inside, and a third spacer provided on the third spacer, wherein the first to third spacers are Fix The movable pin is provided with a stopper, and the lower end can be operated in a direction parallel to the main surface of the jig according to the size of the semiconductor substrate, and can be operated in a circumferential direction centering on the lower end. The first to third spacers have shapes corresponding to the size of the semiconductor substrate, and the side surfaces of the semiconductor substrate are fixed by contacting each of the first and second semiconductor devices with the movable pin. As described above, the movable pin has a shape that meshes with the side surface of the movable pin.

  According to the second semiconductor integrated circuit device manufacturing apparatus of the present invention, the first and second semiconductor substrates having a shape that meshes with the shape of the side surface of the movable pin on the side surface, and the movable pin is penetrated inside. By using this spacer, the first and second semiconductor devices are arranged with a desired stacking position, and the second semiconductor device is stacked on the first semiconductor device with a desired stacking interval. While being fixed, the first and second semiconductor devices can be stacked on the jig via the first and second spacers.

  Specifically, the interval between the first semiconductor device and the second semiconductor device is controlled to a desired interval by interposing the second spacer between the first semiconductor device and the second semiconductor device. can do.

  Specifically, since the first and second semiconductor devices can be arranged so that the side surface of the semiconductor substrate and the side surface of the movable pin are in contact with each other, the first and second semiconductor devices are arranged. Can be controlled to a desired position.

  Therefore, in the second semiconductor integrated circuit device manufacturing apparatus according to the present invention, the first and second semiconductor devices can be stacked with a desired stacking position and a desired stacking interval.

  According to the second semiconductor integrated circuit device manufacturing apparatus of the present invention, the first semiconductor device is disposed on the jig via the first spacer having a shape corresponding to the size of the semiconductor substrate. Therefore, the first semiconductor device can be arranged on the jig without the IC chip in the first semiconductor device being in direct contact with the jig.

  For this reason, in the second semiconductor integrated circuit device manufacturing apparatus according to the present invention, the IC chip in the first semiconductor device is prevented from being damaged by the IC chip and the jig coming into contact with each other. can do.

  According to the second semiconductor integrated circuit device manufacturing apparatus of the present invention, as a means for fixing the position where the first and second semiconductor devices are arranged, the side surface has a shape that meshes with the side surface shape of the movable pin. A semiconductor substrate is used.

  Therefore, in the second semiconductor integrated circuit device manufacturing apparatus according to the present invention, the first and second semiconductor devices are arranged as in the above-described first semiconductor integrated circuit device manufacturing apparatus according to the present invention. As a means for fixing the position, the first and second semiconductors can be used without using spacers (corresponding to the second and fourth spacers described above) arranged so as to be in contact with the side surfaces of the semiconductor substrate in the semiconductor device. Since the position where the device is disposed can be fixed, the manufacturing cost of the semiconductor integrated circuit device manufacturing apparatus can be reduced.

  Further, according to the second semiconductor integrated circuit device manufacturing apparatus of the present invention, the first and second spacers having a shape corresponding to the size of the semiconductor substrate are arranged according to the size of the semiconductor substrate. Penetrate the movable pin.

  Thus, in the second apparatus for manufacturing a semiconductor integrated circuit device according to the present invention, the first and second spacers whose shapes are adjusted according to the size of the semiconductor substrate are used, and the size of the semiconductor substrate is determined. Thus, a movable pin whose arrangement position is adjusted is used.

  Therefore, in the second semiconductor integrated circuit device manufacturing apparatus according to the present invention, even when the size of the semiconductor substrate in the first semiconductor device and the size of the semiconductor substrate in the second semiconductor device are different from each other, the desired The first and second semiconductor devices can be stacked with a stacking position and a desired stacking interval.

  Further, according to the second semiconductor integrated circuit device manufacturing apparatus of the present invention, by providing a stopper on the second spacer via the third spacer, the first and second spacers are interposed. Thus, the stacked first and second semiconductor devices can be fixed.

  As a result, the first and second semiconductor devices stacked are fixed by the pressure of the fasteners in a state where the first and second semiconductor devices are stacked at a desired stacking position and a desired stacking interval. Can do.

  Therefore, in the second semiconductor integrated circuit device manufacturing apparatus according to the present invention, the first and second semiconductor devices are stacked with a desired stacking position and a desired stacking interval when manufacturing the semiconductor integrated circuit device. Can be prevented from being displaced.

  According to the second semiconductor integrated circuit device manufacturing apparatus of the present invention, the fastener is provided on the second spacer via the third spacer having a shape corresponding to the size of the semiconductor substrate. Therefore, the fastener is not directly provided on the semiconductor substrate in the second semiconductor device.

  For this reason, in the second semiconductor integrated circuit device manufacturing apparatus according to the present invention, it is possible to prevent the semiconductor substrate in the second semiconductor device from being damaged by the pressure of the stopper.

  Furthermore, according to the second semiconductor integrated circuit device manufacturing apparatus of the present invention, the first and second semiconductor devices stacked with a desired stacking position and a desired stacking interval are fixed and soldered. By performing the reflow process, the external connection terminal in the first semiconductor device and the external connection terminal in the second semiconductor device are electrically connected to each other via the solder ball mounted on the external connection terminal. A semiconductor integrated circuit device can be manufactured.

  For this reason, in the manufacturing apparatus of the second semiconductor integrated circuit device according to the present invention, during the solder reflow process, the first and second semiconductor devices are prevented from being misaligned and the semiconductor substrate is warped due to thermal expansion. Can be prevented.

  Therefore, in the second semiconductor integrated circuit device manufacturing apparatus according to the present invention, the first semiconductor device and the second semiconductor device stacked due to warpage of the semiconductor substrate due to thermal expansion during the solder reflow process. Since it is possible to prevent an interlayer connection failure from occurring, a semiconductor integrated circuit device having high reliability can be provided.

  A first method for manufacturing a semiconductor integrated circuit device according to the present invention is a method for manufacturing a semiconductor integrated circuit device using the first apparatus for manufacturing a semiconductor integrated circuit device according to the present invention. The first and second semiconductor devices are stacked at predetermined positions using the first to fourth spacers while adjusting the size according to the size of the semiconductor substrate, and the fifth is placed on the fourth spacer. The first semiconductor device and the second semiconductor device are joined by fixing the first to fifth spacers using a stopper provided via the spacer and reflowing the solder balls. And a step of removing the stopper and pulling out the first to fifth spacers from the movable pin.

  According to the first method for manufacturing a semiconductor integrated circuit device of the present invention, the first and second semiconductor devices can be stacked as desired by using the first to fourth spacers through which the movable pins pass. The first semiconductor device is arranged on the jig through the first to fourth spacers while fixing the second semiconductor device so that the second semiconductor device is stacked on the first semiconductor device with a desired stacking interval. The first and second semiconductor devices can be stacked.

  Specifically, by interposing a third spacer between the first semiconductor device and the second semiconductor device, the interval between the first semiconductor device and the second semiconductor device is controlled to a desired interval. can do.

  Specifically, the first semiconductor device can be arranged so that the side surface of the semiconductor substrate and the side surface of the second spacer are in contact with each other, so that the position where the first semiconductor device is arranged can be set as desired. The position can be controlled.

  Similarly, since the second semiconductor device can be disposed so that the side surface of the semiconductor substrate and the side surface of the fourth spacer are in contact with each other, the position where the second semiconductor device is disposed is controlled to a desired position. be able to.

  Therefore, in the first method for manufacturing a semiconductor integrated circuit device according to the present invention, the first and second semiconductor devices can be stacked with a desired stacking position and a desired stacking interval.

  According to the first method for manufacturing a semiconductor integrated circuit device of the present invention, the first semiconductor device is arranged on the jig via the first spacer having a shape corresponding to the size of the semiconductor substrate. Therefore, the first semiconductor device can be arranged on the jig without the IC chip in the first semiconductor device being in direct contact with the jig.

  For this reason, in the first method for manufacturing a semiconductor integrated circuit device according to the present invention, the IC chip in the first semiconductor device is prevented from being damaged by the IC chip and the jig coming into contact with each other. can do.

  According to the first method for manufacturing a semiconductor integrated circuit device of the present invention, the first to fourth spacers having a shape corresponding to the size of the semiconductor substrate are arranged according to the size of the semiconductor substrate. Penetrate the movable pin.

  As described above, in the first method for manufacturing a semiconductor integrated circuit device according to the present invention, the first to fourth spacers whose shapes are adjusted according to the size of the semiconductor substrate are used, and the size according to the size of the semiconductor substrate is used. Thus, a movable pin whose arrangement position is adjusted is used.

  Therefore, in the first method for manufacturing a semiconductor integrated circuit device according to the present invention, even when the size of the semiconductor substrate in the first semiconductor device and the size of the semiconductor substrate in the second semiconductor device are different from each other, a desired The first and second semiconductor devices can be stacked with a stacking position and a desired stacking interval.

  Furthermore, according to the manufacturing method of the first semiconductor integrated circuit device according to the present invention, the stopper is provided on the fourth spacer via the fifth spacer, so that the first to fourth spacers are interposed. Thus, the stacked first and second semiconductor devices can be fixed.

  As a result, the first and second semiconductor devices stacked are fixed by the pressure of the fasteners in a state where the first and second semiconductor devices are stacked at a desired stacking position and a desired stacking interval. Can do.

  Therefore, in the first method for manufacturing a semiconductor integrated circuit device according to the present invention, the first and second semiconductor devices are stacked with a desired stacking position and a desired stacking interval when manufacturing the semiconductor integrated circuit device. Can be prevented from being displaced.

  According to the first method for manufacturing a semiconductor integrated circuit device of the present invention, the fastener is provided on the fourth spacer via the fifth spacer having a shape corresponding to the size of the semiconductor substrate. Therefore, the fastener is not directly provided on the semiconductor substrate in the second semiconductor device.

  For this reason, in the manufacturing method of the 1st semiconductor integrated circuit device concerning the present invention, it can prevent that the semiconductor substrate in the 2nd semiconductor device is damaged by the pressure by a stopper.

  Furthermore, according to the manufacturing method of the first semiconductor integrated circuit device according to the present invention, the soldering is performed with the first and second semiconductor devices stacked with a desired stacking position and a desired stacking interval being fixed. By performing the reflow process, the external connection terminal in the first semiconductor device and the external connection terminal in the second semiconductor device are electrically connected to each other via the solder ball mounted on the external connection terminal. A semiconductor integrated circuit device can be manufactured.

  For this reason, in the first method for manufacturing a semiconductor integrated circuit device according to the present invention, during the solder reflow process, misalignment of the first and second semiconductor devices is prevented, and the warpage of the semiconductor substrate due to thermal expansion is prevented. Can be prevented.

  Therefore, in the first method of manufacturing a semiconductor integrated circuit device according to the present invention, the first semiconductor device and the second semiconductor device stacked due to warpage of the semiconductor substrate due to thermal expansion during the solder reflow process. Since it is possible to prevent an interlayer connection failure from occurring, a semiconductor integrated circuit device having high reliability can be provided.

  In the first method for manufacturing a semiconductor integrated circuit device according to the present invention, after the first and second semiconductor devices are stacked, solder reflow processing is performed to mount the external connection terminal and the external connection terminal. The solder balls can be electrically connected to each other, and the external connection terminals in the first semiconductor device and the external connection terminals in the second semiconductor device can be electrically connected to each other via the solder balls.

  Therefore, in the first method for manufacturing a semiconductor integrated circuit device according to the present invention, the external connection terminals and the solder balls mounted on the external connection terminals are electrically connected before the first and second semiconductor device stacking steps. It is not necessary to perform a solder reflow process for connection.

  Therefore, in the first method for manufacturing a semiconductor integrated circuit device according to the present invention, the semiconductor integrated circuit device can be manufactured through one solder reflow process. It is possible to reduce the thermal stress on the first and second semiconductor devices and reduce the TAT of the manufacturing process.

  In addition, according to the first method for manufacturing a semiconductor integrated circuit device of the present invention, the semiconductor integrated circuit device can be manufactured without leaving a spacer on the semiconductor substrate as in the prior art.

  For this reason, in the first method for manufacturing a semiconductor integrated circuit device according to the present invention, the spacer remaining on the semiconductor substrate does not reduce the surface area of the semiconductor substrate. At the same time, deformation of the semiconductor substrate due to the weight of the spacer can be prevented.

  Therefore, the first method for manufacturing a semiconductor integrated circuit device according to the present invention can provide a semiconductor integrated circuit device having high reliability.

  A semiconductor substrate manufacturing method according to the present invention is a semiconductor substrate manufacturing method for manufacturing a semiconductor substrate used in a second semiconductor integrated circuit device manufacturing apparatus according to the present invention, wherein a plurality of semiconductor substrates are formed. The step of processing the side surfaces of the plurality of semiconductor substrates so that the side surfaces of the plurality of semiconductor substrates have a shape that meshes with the side surface shape of the movable pin by the same process with respect to the sheet-like substrate, And a step of separating a plurality of semiconductor substrates from the sheet-like substrate after processing the side surface.

  According to the semiconductor substrate manufacturing method of the present invention, it is possible to obtain a semiconductor substrate having a shape that meshes with the side shape of the movable pin on the side surface.

  For this reason, in the second method for manufacturing a semiconductor integrated circuit device according to the present invention, the position where the first and second semiconductor devices are arranged is fixed by applying the method for manufacturing a semiconductor substrate according to the present invention. As a means, a semiconductor substrate having a shape that meshes with the side shape of the movable pin on the side surface can be used.

  Therefore, in the second method for manufacturing a semiconductor integrated circuit device according to the present invention, the first and second semiconductor devices are arranged as in the method for manufacturing the first semiconductor integrated circuit device according to the present invention described above. As means for fixing the position, the first and second semiconductor devices can be used without using spacers (corresponding to the second and fourth spacers described above) arranged so as to be in contact with the side surface of the semiconductor substrate in the semiconductor device. Therefore, the manufacturing cost of the semiconductor integrated circuit device can be reduced.

  Further, according to the method for manufacturing a semiconductor substrate according to the present invention, the side surfaces of the plurality of semiconductor substrates can be processed by the same process, so that the manufacturing cost of the semiconductor substrate can be reduced.

  Therefore, in the second method for manufacturing a semiconductor integrated circuit device according to the present invention, the manufacturing cost of the semiconductor integrated circuit device can be further reduced by applying the method for manufacturing a semiconductor substrate according to the present invention. .

  According to the semiconductor integrated circuit device manufacturing apparatus and the semiconductor integrated circuit device manufacturing method according to the present invention, the first and second semiconductor devices stacked with a desired stacking position and a desired stacking interval are fixed. By performing the solder reflow process, the external connection terminal in the first semiconductor device and the external connection terminal in the second semiconductor device are electrically connected to each other via the solder ball mounted on the external connection terminal. The manufactured semiconductor integrated circuit device can be manufactured.

  For this reason, in the semiconductor integrated circuit device manufacturing apparatus and the semiconductor integrated circuit device manufacturing method according to the present invention, during the solder reflow process, the first and second semiconductor devices are prevented from being misaligned and also due to thermal expansion. Warpage of the semiconductor substrate can be prevented.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus and semiconductor integrated circuit device manufacturing method according to the present invention, the first semiconductor device and the second semiconductor device stacked due to warpage of the semiconductor substrate due to thermal expansion during the solder reflow process. Since it is possible to prevent an interlayer connection failure between the semiconductor device and the semiconductor device, a semiconductor integrated circuit device having high reliability can be provided.

  Embodiments of the present invention will be described below with reference to the drawings.

(First embodiment)
The semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention will be described below with reference to FIG.

  FIG. 1 is a cross-sectional view showing the structure of a semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention.

  In the apparatus for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, as shown in FIG. 1, a first semiconductor device 1A and a second semiconductor device in which an IC chip 1a is mounted on a semiconductor substrate 1b. A case where the semiconductor device 1B manufactures a semiconductor integrated circuit device stacked in two stages will be described as an example.

  As shown in FIG. 1, a pair of movable pins 5 are provided on the jig 4.

  A first spacer 6a is provided between the jig 4 and the first semiconductor device 1A by passing the movable pin 5 through the first spacer 6a made of a low elastic body. The movable pin 5 is fixed by one spacer 6a.

  By allowing the movable pin 5 to pass through the second spacer 7a made of a low elastic body, the first spacer 6a is placed along the side surface of the semiconductor substrate 1b in the first semiconductor device 1A. A second spacer 7a formed in a frame shape is provided, and the stacked position of the first semiconductor device 1A is fixed and the movable pin 5 is fixed by the second spacer 7a.

  The third spacer 8 is provided on the first semiconductor device 1A and the second spacer 7a by passing the movable pin 5 through the third spacer 8 made of a low elastic body. The third spacer 8 fixes the stacking interval I (see FIG. 1) between the first semiconductor device 1A and the second semiconductor device 1B, and the movable pin 5 is fixed.

  By passing the movable pin 5 inside the second spacer 7b made of a low elastic body, the third spacer 8 is placed on the side of the semiconductor substrate 1b in the second semiconductor device 1B. A second spacer 7b formed in a frame shape is provided, and the position where the second semiconductor device 1B is stacked is fixed and the movable pin 5 is fixed by the second spacer 7b. .

  The first spacer 6b is provided on the second semiconductor device 1B and the second spacer 7b by passing the movable pin 5 through the first spacer 6b made of a low elastic body. The movable pin 5 is fixed by the first spacer 6b.

  A screw 9 is installed on the first spacer 6b, and the first semiconductor device is stacked by the screw 9 via the first to third spacers (6a, 7a, 8, and 7b). 1A and the second semiconductor device 1B are fixed.

  As described above, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the first to third spacers (6 a, 7 a, 8, and 7 b) having the movable pin 5 penetrated therein. The first semiconductor device 1A and the second semiconductor device 1B can be stacked on the jig 4 via the first to third spacers.

  According to the semiconductor integrated circuit device manufacturing apparatus of the first embodiment of the present invention, the first to third spacers (6a, 7a, 8, and 7b) having the movable pin 5 penetrated therein are used. As a result, the first semiconductor device 1A and the second semiconductor device 1B are aligned with a desired stacking position, and the second semiconductor device 1B is stacked on the first semiconductor device 1A with a desired stacking interval I. The first semiconductor device 1 </ b> A and the second semiconductor device 1 </ b> B can be stacked on the jig 4 via the first to third spacers while being fixed.

  Specifically, as shown in FIG. 1, by interposing a third spacer 8 between the first semiconductor device 1A and the second semiconductor device 1B, the first semiconductor device 1A and the second semiconductor device 1A The interval I with the semiconductor device 1B can be controlled to a desired interval.

  Specifically, as shown in FIG. 1, the first semiconductor device 1A can be arranged so that the side surface of the semiconductor substrate 1b and the side surface of the second spacer 7a are in contact with each other. The position where the semiconductor device 1A is disposed can be controlled to a desired position.

  Similarly, since the second semiconductor device 1B can be disposed so that the side surface of the semiconductor substrate 1b and the side surface of the second spacer 7b are in contact with each other, the position where the second semiconductor device 1B is disposed can be set as desired. The position can be controlled.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the first semiconductor device 1A and the second semiconductor device 1B are stacked with a desired stacking position and a desired stacking interval I. be able to.

  In addition, according to the semiconductor integrated circuit device manufacturing apparatus of the first embodiment of the present invention, the first spacer 6a having a shape corresponding to the size of the semiconductor substrate 1b is placed on the jig 4 through the first spacer 6a. Since the semiconductor device 1A can be disposed, the first semiconductor device 1A can be disposed on the jig 4 without the IC chip 1a in the first semiconductor device 1A being in direct contact therewith.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the IC chip 1a in the first semiconductor device 1A and the jig 4 are in contact with each other, whereby the IC chip in the first semiconductor device 1A is contacted. It is possible to prevent 1a from being damaged.

  Furthermore, according to the semiconductor integrated circuit device manufacturing apparatus of the first embodiment of the present invention, as shown in FIG. 1, the screw 9 is installed on the second spacer 7b via the first spacer 6b. Thus, the first semiconductor device 1A and the second semiconductor device 1B stacked via the first to third spacers (6a, 7a, 8, and 7b) can be fixed.

  As a result, the first semiconductor device 1A and the second semiconductor device 1B are stacked with a desired stacking position and a desired stacking interval I, and the first semiconductor device 1A stacked with the pressure by the screw 9 is stacked. In addition, the second semiconductor device 1B can be fixed.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the first semiconductor stacked with a desired stacking position and a desired stacking interval I when the semiconductor integrated circuit device is manufactured. It is possible to prevent the device 1A and the second semiconductor device 1B from being displaced.

  Further, according to the semiconductor integrated circuit device manufacturing apparatus of the first embodiment of the present invention, the first spacer 6b having a shape corresponding to the size of the semiconductor substrate 1b is disposed on the second spacer 7b. Since the screw 9 can be provided, the screw 9 is not provided directly on the semiconductor substrate 1b in the second semiconductor device 1B.

  For this reason, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the semiconductor substrate 1b in the second semiconductor device 1B can be prevented from being damaged by the pressure of the screw 9.

  Furthermore, according to the semiconductor integrated circuit device manufacturing apparatus of the first embodiment of the present invention, the first semiconductor device 1A and the second semiconductor device 1B are stacked with a desired stacking position and a desired stacking interval I. In a state in which the external connection terminal 2 is fixed, the external connection terminal 2 in the first semiconductor device 1A and the second semiconductor device are connected via the solder ball 3 mounted on the external connection terminal 2 by performing a solder reflow process. A semiconductor integrated circuit device in which the external connection terminals 2 in 1B are electrically connected to each other can be manufactured.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, during the solder reflow process, the first semiconductor device 1A and the second semiconductor device 1B are prevented from being misaligned, Warpage of the semiconductor substrate 1b due to thermal expansion can be prevented.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the first semiconductor device 1A and the second semiconductor device stacked due to warpage of the semiconductor substrate 1b due to thermal expansion during the solder reflow process. Since it is possible to prevent an interlayer connection failure between the semiconductor device 1B and the semiconductor device 1B, a semiconductor integrated circuit device having high reliability can be provided.

  Further, according to the semiconductor integrated circuit device manufacturing apparatus of the first embodiment of the present invention, the material constituting the first to third spacers (6a and 6b, 7a and 7b, and 8) is a low-elasticity material. Is used.

  As described above, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the low-elasticity material is used as the material constituting the first to third spacers (6a and 6b, 7a and 7b, and 8). , The first semiconductor device 1A and the second semiconductor device 1A are stacked on the second spacer 7b via the first to third spacers by the screw 9 provided via the first spacer 6b. When the semiconductor device 1B is fixed, the shape of the first to third spacers is deformed, so that the pressure applied by the screw 9 applied to the semiconductor substrate 1b can be reduced.

  For example, when the semiconductor integrated circuit device is manufactured, the pressure by the screw 9 for preventing the positional displacement of the first semiconductor device 1A and the second semiconductor device 1B acts on the semiconductor substrate 1b.

  In particular, during the solder reflow process, not only the pressure by the screw 9 for preventing the positional displacement of the first semiconductor device 1A and the second semiconductor device 1B with respect to the semiconductor substrate 1b, but also the semiconductor due to thermal expansion. The pressure by the screw 9 for preventing the warpage of the substrate 1b also works.

  As described above, during the solder reflow process, the screw 9 for preventing the warp of the semiconductor substrate 1b by antagonizing the pressure due to the warp of the semiconductor substrate 1b caused by thermal expansion on the semiconductor substrate 1b. As a result of this, the semiconductor substrate 1b may be destroyed.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, during the solder reflow process, the first to first layers made of a low elastic body correspond to the warp of the semiconductor substrate 1b due to thermal expansion. Since the shape of the three spacers (6a and 6b, 7a and 7b, and 8) is deformed, the magnitude of the pressure applied by the screw 9 applied to the semiconductor substrate 1b can be relaxed, so that the semiconductor substrate 1b It is possible to prevent an excessive pressure from being applied to the pressure.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, when the semiconductor integrated circuit device is manufactured (particularly during the solder reflow process), the semiconductor substrate 1b Since an excessive pressure is not applied to the semiconductor substrate 1b, it is possible to prevent the semiconductor substrate 1b from being broken. Therefore, a semiconductor integrated circuit device having high reliability can be provided.

  Hereinafter, the structure of the jig 4 in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention will be described in detail with reference to FIGS. 2 (a) and 2 (b).

  2 (a) is a plan view showing the structure of the jig 4, and FIG. 2 (b) is a cross-sectional view showing the structure of the jig 4, specifically, IIb shown in FIG. 2 (a). It is sectional drawing in the -IIb line.

  As shown in FIG. 2 (a), a groove 5 a is formed in the jig 4, and a movable pin 5 is disposed in the groove 5 a in the jig 4.

  The end of the movable pin 5 on the side in contact with the groove 5a is adjusted so that it can move in the groove 5a as shown in FIG. 2 (b).

  Specifically, as shown in FIG. 2 (b), the movable pin 5 moves at an angle A, for example, that is, the end of the movable pin 5 on the side in contact with the groove 5a is the central axis. It is possible to move in the circumferential direction.

  Specifically, as shown in FIG. 2B, the movable pin 5 slides, for example, a distance D, that is, the end of the movable pin 5 on the side in contact with the groove 5a The jig 4 can move in the groove 5a in a direction parallel to the surface on which the movable pin 5 is disposed.

  For this reason, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the arrangement positions of the movable pins 5 can be adjusted according to the size of the semiconductor substrate. A semiconductor integrated circuit device using the substrate can be manufactured.

  Hereinafter, an apparatus for manufacturing a semiconductor integrated circuit device according to the present invention when semiconductor substrates having different sizes are used will be described with reference to FIG.

  FIG. 3 is a sectional view showing the structure of a semiconductor integrated circuit device manufacturing apparatus according to the present invention.

  Here, as shown in FIG. 3, the first semiconductor device in which the IC chip 10a is mounted on the semiconductor substrate 10b and the second semiconductor device in which the IC chip 10a is mounted on the semiconductor substrate 10c. An example of manufacturing a semiconductor integrated circuit device in which and are stacked will be described below.

  As shown in FIG. 3, a pair of movable pins 5 is provided in a groove (not shown) in the jig 4.

  The first spacer 16a is provided between the jig 4 and the first semiconductor device by passing the movable pin 5 through the first spacer 16a made of a low elastic body. The movable pin 5 is fixed by the spacer 16a.

  By allowing the movable pin 5 to pass through the second spacer 17a made of a low elastic body, a frame is formed on the first spacer 16a along the side surface of the semiconductor substrate 10b in the first semiconductor device. A second spacer 17a formed in a shape is provided, and the stack position of the first semiconductor device is fixed and the movable pin 5 is fixed by the second spacer 17a.

  The third spacer 18 is provided on the first semiconductor device and the second spacer 17a by passing the movable pin 5 through the third spacer 18 made of a low elastic body. The third spacer 18 fixes the stacking interval I (see FIG. 3) between the first semiconductor device and the second semiconductor device and also fixes the movable pin 5.

  A frame is formed on the third spacer 18 along the side surface of the semiconductor substrate 10c in the second semiconductor device by passing the movable pin 5 through the second spacer 17b made of a low elastic body. A second spacer 17b formed in a shape is provided, and the stack position of the second semiconductor device is fixed and the movable pin 5 is fixed by the second spacer 17b.

  The first spacer 16b is provided on the second semiconductor device and the second spacer 17b by penetrating the movable pin 5 inside the first spacer 16b made of a low elastic body. The movable pin 5 is fixed by the first spacer 16b.

  A screw 9 is installed on the first spacer 16b, and the first and second semiconductor devices stacked via the spacers (16a, 17a, 18, and 17b) are fixed by the screw 9. ing.

  As described above, in the semiconductor integrated circuit device manufacturing apparatus according to the present invention, the shapes of the first to third spacers (16a, 17a, 18, and 17b) depend on the size of the semiconductor substrates (10b and 10c). By adjusting the size of the semiconductor substrate (10b and 10c), the end of the movable pin 5 on the side in contact with the groove performs at least one of sliding movement and inclined movement (see FIG. 2 (b)), the arrangement position of the movable pin 5 is adjusted.

  According to the semiconductor integrated circuit device manufacturing apparatus of the present invention, as shown in FIG. 3, the first to third spacers (16a, 17a, 18, 18) having shapes corresponding to the sizes of the semiconductor substrates (10b and 10c). And 17b), the movable pin 5 arranged according to the size of the semiconductor substrate (10b and 10c) is penetrated.

  Thus, in the semiconductor integrated circuit device manufacturing apparatus according to the present invention, the first to third spacers (16a, 17a, 18 and 18) whose shapes are adjusted according to the size of the semiconductor substrates (10b and 10c). 17b) and the movable pin 5 whose arrangement position is adjusted according to the size of the semiconductor substrate (10b and 10c) is used.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the present invention, not only the semiconductor substrates having the same size but also the semiconductor substrates (10b and 10c) having different sizes are used. Since the first and second semiconductor devices can be stacked with a desired stacking interval I, the same effects as those of the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention described above can be obtained. Can do.

  In the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, as a fixing means for fixing the semiconductor devices stacked via the spacer, the pressure by the screw 9 is used and the fixing means is used. In addition, spacers (6a and 6b, 7a and 7b, and 8) made of a low-elasticity material were used as a relaxation means for relaxing the pressure by the fixing means that is weighted against the semiconductor substrate. It is not limited to.

  Hereinafter, other specific examples of the fixing means and the relaxation means will be described with reference to FIG. 4 and FIGS. 5 (a) and 5 (b).

  4 and 5 (a) and 5 (b) are sectional views showing the structure of the semiconductor integrated circuit device manufacturing apparatus according to the present invention.

  4 and FIGS. 5A and 5B, the same components as those in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention described above are denoted by the same reference numerals. Therefore, in the following description, the same description as the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention will not be repeated.

  As a first specific example, as shown in FIG. 4, a screw 9 is arranged on a first spacer 6b via a spring 11, and the pressure by the screw 9 via the spring 11 from above the first spacer 6b. To fix the first and second semiconductor devices (1A and 1B) stacked on the jig 4 via the first to third spacers (6a, 7a, 8, and 7b). .

  As described above, in the semiconductor integrated circuit device manufacturing apparatus according to the present invention, as shown in FIG. 4, the screw 9 is used as the fixing means and the spring 11 is used as the relaxing means.

  According to the semiconductor integrated circuit device manufacturing apparatus of the present invention, as shown in FIG. 4, the spring 11 is interposed between the first spacer 6 b and the screw 9 so as to be provided on the first spacer 6 b. When the first and second semiconductor devices (1A and 1B) stacked via the first to third spacers (6a, 7a, 8, and 7b) are fixed by the formed screws 9, the spring 11 By expanding and contracting, it is possible to adjust the magnitude of the pressure applied by the screw 9 applied to the semiconductor substrate 1b.

  For example, when the solder reflow process is performed, the spring 11 expands and contracts according to the warp of the semiconductor substrate 1b due to thermal expansion, thereby adjusting the magnitude of the pressure applied by the screw 9 applied to the semiconductor substrate 1b. Therefore, it is possible to prevent an excessive pressure from being applied to the semiconductor substrate 1b.

  For this reason, in the semiconductor integrated circuit device manufacturing apparatus according to the present invention, when the semiconductor integrated circuit device is manufactured (particularly during the solder reflow process), excessive pressure is applied to the semiconductor substrate 1b by the pressure of the screw 9. Since the pressure is not applied, it is possible to prevent the semiconductor substrate 1b from being broken, so that a semiconductor integrated circuit device having high reliability can be provided.

  As a second specific example, as shown in FIG. 5 (a), a weight 12 is disposed on the first spacer 6b, and pressure is applied by the weight 12 from above the first spacer 6b. On the jig 4, the first and second semiconductor devices (1A and 1B) stacked via first to third spacers (6a, 7a, 8, and 7b) are fixed.

  Further, as a third specific example, as shown in FIG. 5 (b), a pressurizing device 13 is installed on the first spacer 6b, and the pressure by the pressurizing device 13 is applied from above the first spacer 6b. By adding, the 1st and 2nd semiconductor device (1A and 1B) laminated | stacked through the 1st-3rd spacer (6a, 7a, 8, and 7b) on the jig 4 is fixed.

  As described above, in the semiconductor integrated circuit device manufacturing apparatus according to the present invention, as shown in FIGS. 5 (a) and 5 (b), the weight 12 or the pressurizing device is used as the means having both the fixing means and the relaxing means. 13 is used.

  According to the semiconductor integrated circuit device manufacturing apparatus of the present invention, as shown in FIGS. 5 (a) and 5 (b), the weight 12 or the pressure device 13 is provided on the first spacer 6b, whereby the weight 12 Alternatively, when the first and second semiconductor devices (1A and 1B) stacked via the first to third spacers (6a, 7a, 8, and 7b) are fixed by the pressure device 13, the semiconductor The magnitude of the pressure applied by the weight 12 or the pressure device 13 applied to the substrate 1b can be adjusted.

  For example, in the solder reflow process, according to the warp of the semiconductor substrate 1b due to thermal expansion, it is possible to adjust the magnitude of the pressure applied by the weight 12 or the pressure device 13 to the semiconductor substrate 1b. It is possible to prevent an excessive pressure from being applied to the semiconductor substrate 1b.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the present invention, when the semiconductor integrated circuit device is manufactured (particularly during the solder reflow process), the semiconductor substrate 1b is subjected to pressure by the weight 12 or the pressurizing device 13. Since an excessive pressure is not applied to the semiconductor substrate 1b, it is possible to prevent the semiconductor substrate 1b from being broken. Therefore, a semiconductor integrated circuit device having high reliability can be provided.

  In the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the jig 4, the movable pin 5, the first spacers (6a and 6b), the second spacers (7a and 7b), and At least one of the third spacers 8 may be adjusted to have a heat generating mechanism.

  For example, the heating element is charged inside the jig 4, the movable pin 5, the first spacer (6 a and 6 b), the second spacer (7 a and 7 b), and the third spacer 8.

  In this way, the thermal history of the first semiconductor device 1A and the second semiconductor device 1B can be adjusted equally.

  As a result, during the solder reflow process, the amount of heat applied to the semiconductor substrate 1b in the first semiconductor device 1A and the amount of heat applied to the semiconductor substrate 1b in the second semiconductor device 1B can be adjusted equally.

  Therefore, during the solder reflow process, there is a difference between the magnitude of the warp caused to the semiconductor substrate 1b in the first semiconductor device 1A and the magnitude of the warp caused to the semiconductor substrate 1b in the second semiconductor device 1B. It can be prevented from occurring.

  Therefore, during the solder reflow process, the first semiconductor device 1A is different from the warp of the semiconductor substrate 1b in the first semiconductor device 1A and the warp of the semiconductor substrate 1b in the second semiconductor device 1B. Since an interlayer connection failure can be prevented from occurring between the semiconductor device 1A and the second semiconductor device 1B, a highly reliable semiconductor integrated circuit device can be provided.

  A method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention will be described below with reference to FIGS.

  6, 7, and 8 are cross-sectional views illustrating main steps of the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention.

  First, after forming the first semiconductor device 1A and the second semiconductor device 1B on which the IC chip 1a is mounted on the semiconductor substrate 1b having the external connection terminals 2, external connection in the first semiconductor device 1A is performed. The solder ball 3 is mounted on the terminal 2 and the solder ball 3 is mounted on the external connection terminal 2 in the second semiconductor device 1B.

  In this way, as shown in FIG. 6, the first semiconductor device 1A and the second semiconductor device 1A are formed by mounting the IC chip 1a on the semiconductor substrate 1b having the external connection terminals 2 on which the solder balls 3 are mounted. The semiconductor device 1B is formed in advance.

  Subsequently, as shown in FIG. 6, a pair of movable pins 5 is provided in a groove (not shown) in the jig 4.

  At this time, depending on the size of the semiconductor substrate 1b, the end of the movable pin 5 on the side in contact with the groove performs at least one of sliding movement and tilting movement in the groove (FIG. 2B). The arrangement position of the movable pin 5 is appropriately adjusted.

  Subsequently, the first spacer 6 a for fixing the movable pin 5 is disposed on the jig 4 by passing the movable pin 5 through the first spacer 6 a made of a low elastic body.

  Subsequently, by passing the movable pin 5 through the inside of the frame-shaped second spacer 7a made of a low elastic body, the position where the first semiconductor device 1A is disposed on the first spacer 6a and The second spacer 7a for fixing the movable pin 5 is disposed, and the first semiconductor device 1A is disposed such that the side surface of the second spacer 7a and the side surface of the semiconductor substrate 1b are in contact with each other.

  Subsequently, by allowing the movable pin 5 to pass through the third spacer 8 made of a low elastic body, the second semiconductor device 1B is placed on the first semiconductor device 1A and the second spacer 7a. An interval I (see FIG. 6) stacked on one semiconductor device 1A and a third spacer 8 for fixing the movable pin 5 are arranged.

  Subsequently, a position where the second semiconductor device 1B is disposed on the third spacer 8 by passing the movable pin 5 inside the frame-shaped second spacer 7b made of a low elastic body and The second spacer 7b for fixing the movable pin 5 is disposed, and the second semiconductor device 1B is disposed such that the side surface of the second spacer 7b and the side surface of the semiconductor substrate 1b are in contact with each other.

  Subsequently, in order to fix the movable pin 5 on the second semiconductor device 1B and the second spacer 7b by passing the movable pin 5 through the first spacer 6b made of a low elastic body. The first spacer 6b is arranged.

  In this way, on the jig 4, the first spacer 6a, the first semiconductor device 1A and the second spacer 7a, the third spacer 8, the second semiconductor device 1B and the second spacer 7b, and The first spacer 6b is arranged in order from the bottom.

  Next, as shown in FIG. 7, a screw 9 is installed on the second spacer 7b via the first spacer 6b, so that the first to third spacers (6a , 7a, 8, and 7b), the first semiconductor device 1A and the second semiconductor device 1B stacked together are fixed.

  Subsequently, by performing a solder reflow process, the external connection terminals 2 in the first semiconductor device 1A and the second semiconductor device 1B and the solder balls 3 mounted on the external connection terminals 2 are electrically connected. At the same time, the external connection terminals 2 in the first semiconductor device 1A and the external connection terminals 2 in the second semiconductor device 1B are electrically connected via the solder balls 3 mounted on the external connection terminals 2.

  In this way, the semiconductor integrated circuit device 1 in which the first semiconductor device 1A and the second semiconductor device 1B are electrically joined via the solder balls 3 is manufactured.

  Next, as shown in FIG. 8, by removing the screw 9 from the movable pin 5, the first spacer 6b, the second spacer 7b, the semiconductor integrated circuit device 1, the third spacer 8, and the second spacer 7a and the first spacer 6a are pulled out in order from the top.

  In this way, the semiconductor integrated circuit device 1 is manufactured.

  According to the method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, as shown in FIG. 7, the first to third spacers (6a, 7a, 8 having the movable pin 5 penetrated therein are provided. , And 7b) so that the first semiconductor device 1A and the second semiconductor device 1B are aligned with a desired stacking position, and the second semiconductor device 1B is placed on the first semiconductor device 1A. The first semiconductor device 1A and the second semiconductor device 1B can be stacked on the jig 4 via the first to third spacers while being fixed so as to be stacked with a desired stacking interval I. .

  Specifically, by interposing the third spacer 8 between the first semiconductor device 1A and the second semiconductor device 1B, the distance I between the first semiconductor device 1A and the second semiconductor device 1B. Can be controlled to a desired interval.

  Specifically, since the first semiconductor device 1A can be disposed such that the side surface of the semiconductor substrate 1b and the side surface of the second spacer 7a are in contact with each other, the first semiconductor device 1A is disposed. The position can be controlled to a desired position.

  Similarly, since the second semiconductor device 1B can be disposed so that the side surface of the semiconductor substrate 1b and the side surface of the second spacer 7b are in contact with each other, the position where the second semiconductor device 1B is disposed can be set as desired. The position can be controlled.

  Therefore, in the method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, the first semiconductor device 1A and the second semiconductor device 1B are stacked with a desired stacking position and a desired stacking interval I. be able to.

  Further, according to the method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, the first spacer 6a having a shape corresponding to the size of the semiconductor substrate 1b is provided on the jig 4 through the first spacer 6a. Since the semiconductor device 1A can be disposed, the first semiconductor device 1A can be disposed on the jig 4 without the IC chip 1a in the first semiconductor device 1A being in direct contact therewith.

  For this reason, in the method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, the IC chip 1a in the first semiconductor device 1A and the jig 4 are brought into contact with each other, whereby the IC chip in the first semiconductor device 1A. It is possible to prevent 1a from being damaged.

  Further, according to the method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, as shown in FIG. 7, the first to third spacers (6a, The movable pins 5 arranged according to the size of the semiconductor substrate 1b are passed through 7a, 8 and 7b).

  Thus, in the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention, the first to third spacers (6a, 7a, 8) whose shapes are adjusted according to the size of the semiconductor substrate 1b. , And 7b), and the movable pin 5 whose arrangement position is adjusted according to the size of the semiconductor substrate 1b can be used.

  For this reason, in the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention, not only the semiconductor substrate 1b having the same size but also the semiconductor substrate having different sizes are used. The first semiconductor device 1A and the second semiconductor device 1B can be stacked with a stacking position and a desired stacking interval I.

  Furthermore, according to the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention, as shown in FIG. 7, the screw 9 is installed on the second spacer 7b via the first spacer 6b. Thus, the first semiconductor device 1A and the second semiconductor device 1B stacked via the first to third spacers (6a, 7a, 8, and 7b) can be fixed.

  As a result, the first semiconductor device 1A and the second semiconductor device 1B are stacked with a desired stacking position and a desired stacking interval I, and the first semiconductor device 1A stacked with the pressure by the screw 9 is stacked. In addition, the second semiconductor device 1B can be fixed.

  For this reason, in the method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, when the semiconductor integrated circuit device 1 is manufactured, the first stacked with a desired stacking position and a desired stacking interval I are used. It is possible to prevent the semiconductor device 1A and the second semiconductor device 1B from being displaced.

  In addition, according to the method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, the first spacer 6b having a shape corresponding to the size of the semiconductor substrate 1b is disposed on the second spacer 7b. Since the screw 9 can be provided, the screw 9 is not provided directly on the semiconductor substrate 1b in the second semiconductor device 1B.

  For this reason, in the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention, the semiconductor substrate 1b in the second semiconductor device 1B can be prevented from being damaged by the pressure by the screw 9.

  Furthermore, according to the method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, as shown in FIG. 7, the first semiconductor device 1A is stacked with a desired stacking position and a desired stacking interval I. In addition, the external connection terminals in the first semiconductor device 1A are connected via the solder balls 3 mounted on the external connection terminals 2 by performing a solder reflow process in a state where the second semiconductor device 1B is fixed. 2 and the external connection terminal 2 in the second semiconductor device 1B can be manufactured.

  For this reason, in the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention, during the solder reflow process, the first semiconductor device 1A and the second semiconductor device 1B are prevented from being misaligned, Warpage of the semiconductor substrate 1b due to thermal expansion can be prevented.

  Therefore, in the method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, the first semiconductor device 1A and the second semiconductor device stacked due to warpage of the semiconductor substrate 1b due to thermal expansion during the solder reflow process. Since it is possible to prevent an interlayer connection failure with the semiconductor device 1B, the semiconductor integrated circuit device 1 having high reliability can be provided.

  In the method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, the external connection is performed by performing a solder reflow process after the stacking process of the first semiconductor device 1A and the second semiconductor device 1B. The terminals 2 and the solder balls 3 mounted on the external connection terminals 2 are electrically connected, and the external connection terminals 2 in the first semiconductor device 1A and the external connections in the second semiconductor device 1B are connected via the solder balls 3. The terminals 2 can be electrically connected to each other.

  For this reason, in the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention, the external connection terminal 2 and the external connection terminal are provided before the stacking process of the first semiconductor device 1A and the second semiconductor device 1B. It is not necessary to perform a solder reflow process for electrically connecting the solder balls 3 mounted on 2.

  Therefore, in the method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, the semiconductor integrated circuit device 1 can be manufactured through one solder reflow process. At this time, it is possible to reduce the thermal stress on the first semiconductor device 1A and the second semiconductor device 1B and to reduce the TAT of the manufacturing process.

  Further, according to the method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, a spacer (see FIG. 13 (b): 33) is not left on the semiconductor substrate 1b as in the prior art. The semiconductor integrated circuit device 1 can be manufactured.

  Therefore, in the method of manufacturing the semiconductor integrated circuit device according to the first embodiment of the present invention, the surface area of the semiconductor substrate 1b is not reduced by the spacer remaining on the semiconductor substrate 1b. In addition, it is possible to improve the heat dissipation characteristics of the semiconductor substrate 1 and prevent the semiconductor substrate 1b from being deformed by the weight of the spacer.

  Therefore, in the method for manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention, the semiconductor integrated circuit device 1 having high reliability can be provided.

(Second Embodiment)
A semiconductor integrated circuit device manufacturing apparatus according to the second embodiment of the present invention will be described below with reference to FIG.

  FIG. 9 is a cross-sectional view showing the structure of a semiconductor integrated circuit device manufacturing apparatus according to the second embodiment of the present invention.

  In the semiconductor integrated circuit device manufacturing apparatus according to the present embodiment, as shown in FIG. 9, the first semiconductor device 1C and the second semiconductor device 1D, in which the IC chip 1a is mounted on the semiconductor substrate 1c, An example of manufacturing a semiconductor integrated circuit device stacked in two stages will be described.

  In FIG. 9, the same components as those of the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention described above are denoted by the same reference numerals. Therefore, in this embodiment, the description similar to that of the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention will not be repeated.

  The present embodiment aims to provide a semiconductor integrated circuit device having high reliability, similar to the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention described above.

  Hereinafter, the semiconductor integrated circuit device manufacturing apparatus according to the present embodiment will be described specifically in terms of differences from the above-described semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention.

  As described above, in the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention, the second spacer (FIG. 1: 7a and 7b described above) is used as means for fixing the position where the semiconductor device is disposed. In the semiconductor integrated circuit device manufacturing apparatus according to the present embodiment, as shown in FIG. 9, the side surface of the movable pin 5 is used as a means for fixing the position where the semiconductor device is disposed. A semiconductor substrate 1c having a contact surface S that can be in contact with the substrate is used.

  As described above, according to the semiconductor integrated circuit device manufacturing apparatus of the second embodiment of the present invention, the semiconductor substrate 1c having the contact surface S that can contact the side surface of the movable pin 5 on the side surface is used. By using the first and third spacers (6a and 8) through which the movable pin 5 penetrates, the first semiconductor device 1C and the second semiconductor device 1D are aligned with a desired stacking position. The second semiconductor device 1D is fixed on the first semiconductor device 1C so as to be stacked with a desired stacking interval I, and on the jig 4, via the first and third spacers. One semiconductor device 1C and second semiconductor device 1D can be stacked.

  Specifically, as shown in FIG. 9, by interposing a third spacer 8 between the first semiconductor device 1C and the second semiconductor device 1D, the first semiconductor device 1C and the second semiconductor device 1C The interval I with the semiconductor device 1D can be controlled to a desired interval.

  Specifically, as shown in FIG. 9, the first semiconductor device 1C and the second semiconductor device 1D are arranged so that the contact surface S of the semiconductor substrate 1c and the side surface of the movable pin 5 are in contact with each other. Therefore, the position where the first semiconductor device 1C and the second semiconductor device 1D are arranged can be controlled to a desired position.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the second embodiment of the present invention, the first semiconductor device 1C and the second semiconductor device 1D are stacked with a desired stacking position and a desired stacking interval I. Therefore, the same effects as those of the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention described above can be obtained.

  Furthermore, according to the semiconductor integrated circuit device manufacturing apparatus of the second embodiment of the present invention, the positions where the first semiconductor device 1C and the second semiconductor device 1D are arranged are fixed as shown in FIG. As a means for this, the semiconductor substrate 1c having a contact surface S that can contact the side surface of the movable pin 5 on the side surface is used.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus according to the second embodiment of the present invention, the first and second semiconductor integrated circuit device manufacturing apparatuses according to the first embodiment of the present invention described above, as in the first and second embodiments. The first semiconductor device 1C and the second semiconductor device 1D are arranged without using the second spacer (see FIGS. 1: 7a and 7b described above) as means for fixing the position where the semiconductor device is arranged. Therefore, the manufacturing cost of the semiconductor integrated circuit device manufacturing apparatus can be reduced.

  A method for manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention will be described below with reference to FIGS. 10 (a) to 10 (c), FIG. 11 and FIG.

  10 (a) to 10 (c), FIG. 11 and FIG. 12 are principal part process diagrams showing a method of manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention. Specifically, FIG. FIGS. 10 (a) to (c) and FIG. 11 are perspective views of the principal part process showing the manufacturing method of the semiconductor integrated circuit device according to the second embodiment of the present invention, and FIG. It is principal part process sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device which concerns on this embodiment.

  10 (a) to 10 (c), FIG. 11 and FIG. 12, the same components as those of the semiconductor integrated circuit device manufacturing apparatus according to the first embodiment of the present invention described above are denoted by the same reference numerals. Therefore, in this embodiment, the same description as the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention will not be repeated.

  First, as shown in FIG. 10A, a sheet-like substrate 20 formed with a plurality of semiconductor substrates 1c is formed.

  Next, as shown in FIG. 10 (b), a desired region on the side surface of the semiconductor substrate 1c is punched and processed collectively according to the side surface shape of the movable pin (not shown). Specifically, according to the shape of the side surface of the movable pin, the portion at the corner of the semiconductor substrate 1c is punched and processed all at once.

  Next, as shown in FIG. 10C, a semiconductor having a contact surface S that can come into contact with the side surface of the movable pin on the side surface by separating a plurality of semiconductor substrates 1c from the sheet-like substrate 20. A substrate 1c is formed.

  Subsequently, as described above, the first semiconductor device 1C and the second semiconductor device 1D, in which the IC chip 1a is mounted on the semiconductor substrate 1c having the external connection terminals 2 on which the solder balls 3 are mounted, are obtained. After being formed in advance, the movable pin 5 is provided in a groove (not shown) in the jig 4.

  At this time, depending on the size of the semiconductor substrate 1c, the end of the movable pin 5 on the side in contact with the groove performs at least one of sliding movement and inclination movement in the groove (FIG. 2B). The arrangement position of the movable pin 5 is appropriately adjusted.

  Subsequently, as described above, the first spacer for fixing the movable pin 5 on the jig 4 by passing the movable pin 5 through the first spacer 6a made of a low elastic body. 6a is arranged.

  Subsequently, as shown in FIG. 11, the first semiconductor device 1C is arranged on the first spacer 6a so that the contact surface S of the semiconductor substrate 1c and the side surface of the movable pin 5 are in contact with each other.

  Subsequently, as described above, the movable pin 5 is passed through the inside of the third spacer 8 made of a low elastic body, whereby the second semiconductor device 1D is placed on the first semiconductor device 1C. A third spacer 8 for fixing the interval I and the movable pin 5 stacked on the semiconductor device 1C is disposed.

  Subsequently, the second semiconductor device 1D is disposed on the third spacer 8 so that the contact surface S of the semiconductor substrate 1c and the side surface of the movable pin 5 are in contact with each other.

  Subsequently, as described above, the movable pin 5 is fixed on the second semiconductor device 1D by passing the movable pin 5 through the first spacer 6b made of a low elastic body. The first spacer 6b is disposed.

  In this way, the first spacer 6a, the first semiconductor device 1C, the third spacer 8, the second semiconductor device 1D, and the first spacer 6b are arranged on the jig 4 in order from the bottom.

  Next, as shown in FIG. 12, by installing a screw 9 on the second semiconductor device 1D via the first spacer 6b, the first and third spacers ( The first semiconductor device 1C and the second semiconductor device 1D stacked via 6a and 8) are fixed.

  Subsequently, as described above, by performing a solder reflow process, the external connection terminals 2 and the solder balls 3 mounted on the external connection terminals 2 in the first semiconductor device 1C and the second semiconductor device 1D are formed. The external connection terminals 2 in the first semiconductor device 1C and the external connection terminals 2 in the second semiconductor device 1D are electrically connected via the solder balls 3 mounted on the external connection terminals 2 while being electrically connected. Connect.

  In this manner, a semiconductor integrated circuit device in which the first semiconductor device 1C and the second semiconductor device 1D are electrically joined via the solder balls 3 is manufactured.

  Next, as described above, by removing the stopper 9 from the movable pin 5, the first spacer 6b, the semiconductor integrated circuit device, the third spacer 8, and the first spacer 6a are sequentially pulled out from the top.

  In this way, a semiconductor integrated circuit device is manufactured.

  According to the method of manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention, the semiconductor substrate 1c having the contact surface S that can contact the side surface of the movable pin 5 on the side surface is used, and the movable substrate is movable inside. By using the first and third spacers (6a and 8) penetrating the pins 5, the first semiconductor device 1C and the second semiconductor device 1D are aligned with a desired stacking position, and the second The first semiconductor device 1D is fixed on the jig 4 via the first and third spacers while being fixed so that the semiconductor device 1D is stacked on the first semiconductor device 1C with a desired stacking interval I. 1C and the second semiconductor device 1D can be stacked.

  Therefore, in the method for manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention, the first semiconductor device 1C and the second semiconductor device 1D are stacked with a desired stacking position and a desired stacking interval I. Therefore, the same effect as that of the method for manufacturing the semiconductor integrated circuit device according to the first embodiment of the present invention described above can be obtained.

  Furthermore, according to the method of manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention, the positions where the first semiconductor device 1C and the second semiconductor device 1D are arranged are fixed as shown in FIG. As a means for this, the semiconductor substrate 1c having a contact surface S that can contact the side surface of the movable pin 5 on the side surface is used.

  For this reason, in the manufacturing method of the semiconductor integrated circuit device according to the second embodiment of the present invention, the first and second methods are the same as the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention described above. As means for fixing the position where the semiconductor device is arranged, the first semiconductor device 1C and the second semiconductor device 1D are arranged without using the second spacer (see FIG. 7: 7a and 7b described above). Therefore, the manufacturing cost of the semiconductor integrated circuit device can be reduced.

  Furthermore, according to the method of manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention, as shown in FIG. 10 (b), the side surface of the movable pin 5 is formed on the side surface by a single punching process. Since the semiconductor substrate 1c having the contact surface S that can be contacted can be obtained, the manufacturing cost of the semiconductor integrated circuit device can be further reduced.

  In the semiconductor integrated circuit device manufacturing apparatus and the semiconductor integrated circuit device manufacturing method according to the first and second embodiments of the present invention, the semiconductor integrated circuit device in which the semiconductor devices are stacked in two stages has been described. The present invention is not limited to this.

  According to the semiconductor integrated circuit device manufacturing apparatus and the semiconductor integrated circuit device manufacturing method of the present invention, the semiconductor integrated circuit device is manufactured while fixing the semiconductor devices stacked via each of the plurality of spacers with a stopper. Therefore, even in a semiconductor integrated circuit device in which semiconductor devices are stacked in multiple stages, it is the same as the semiconductor integrated circuit device manufacturing apparatus and the semiconductor integrated circuit device manufacturing method according to the first and second embodiments of the present invention. The effect of can be obtained.

  Therefore, in the semiconductor integrated circuit device manufacturing apparatus and the semiconductor integrated circuit device manufacturing method according to the present invention, a semiconductor integrated circuit device having high reliability even in a semiconductor integrated circuit device in which IC chips are mounted at a higher density. Can be realized.

  The present invention can provide a highly reliable semiconductor integrated circuit device, and is therefore useful as a method for manufacturing a semiconductor integrated circuit device and a manufacturing apparatus for a semiconductor integrated circuit device.

It is sectional drawing which shows the structure of the manufacturing apparatus of the semiconductor integrated circuit device based on the 1st Embodiment of this invention. (a) is a top view which shows the structure of a jig | tool, (b) is sectional drawing which shows the structure of a jig | tool. It is sectional drawing which shows the structure of the manufacturing apparatus of the semiconductor integrated circuit device based on this invention. It is sectional drawing which shows the structure of the manufacturing apparatus of the semiconductor integrated circuit device based on this invention. (a) And (b) is sectional drawing which shows the structure of the manufacturing apparatus of the semiconductor integrated circuit device based on this invention. It is principal part process sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device which concerns on the 1st Embodiment of this invention. It is principal part process sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device which concerns on the 1st Embodiment of this invention. It is principal part process sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device which concerns on the 1st Embodiment of this invention. It is sectional drawing which shows the structure of the manufacturing apparatus of the semiconductor integrated circuit device which concerns on the 2nd Embodiment of this invention. (a)-(c) is a principal part process perspective view showing the manufacturing method of the semiconductor integrated circuit device concerning a 2nd embodiment of the present invention. It is a principal part process perspective view which shows the manufacturing method of the semiconductor integrated circuit device which concerns on the 2nd Embodiment of this invention. It is principal part process sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device which concerns on the 2nd Embodiment of this invention. (a) And (b) is principal part process sectional drawing which shows the manufacturing method of the semiconductor integrated circuit device based on a prior art.

Explanation of symbols

1a, 10a IC chip 1b, 1c, 10b, 10c Semiconductor substrate 1A, 1B, 1C, 1D Semiconductor device 1 Semiconductor integrated circuit device 2 External connection terminal 3 Solder ball 4 Jig 5 Movable pin 5a Groove 6a, 6b, 16a, 16b 1st spacer 7a, 7b, 17a, 17b 2nd spacer 8, 18 3rd spacer 9 Screw 11 Spring 12 Weight 13 Pressure device 20 Sheet substrate A Angle D Distance I Interval 31a IC chip 31b Semiconductor substrate 31A Semiconductor Device 31 Semiconductor integrated circuit device 32 External connection terminal 33 Spacer 34 Through hole 35 Solder paste 36 Metal pin 37 Solder ball




Claims (9)

  1. A semiconductor integrated circuit device in which a first semiconductor device and a second semiconductor device in which an IC chip is mounted on a semiconductor substrate having external connection terminals are stacked via solder balls mounted on the external connection terminals Manufacturing equipment,
    A movable pin with a lower end attached to the main surface of the jig;
    A first spacer which is provided on the jig and fixes the movable pin through the interior;
    A second spacer provided on the first spacer, fixing the first semiconductor device in a predetermined position, and fixing the movable pin through the interior;
    A third spacer provided on the second spacer, fixed at a fixed interval between the first semiconductor device and the second semiconductor device, and fixed through the movable pin; ,
    A fourth spacer provided on the third spacer, fixing the second semiconductor device in a predetermined position, and fixing the movable pin through the interior;
    A fifth spacer which is provided on the fourth spacer and fixes the movable pin through the interior;
    A stopper provided on the fifth spacer and fixing the first to fifth spacers;
    The movable pin can be operated in a direction parallel to the main surface of the jig and in a circumferential direction centered on the lower end according to the size of the semiconductor substrate. And the said 1st thru | or 5th spacer has the shape according to the size of the said semiconductor substrate, The manufacturing apparatus of the semiconductor integrated circuit device characterized by the above-mentioned.
  2.   2. The apparatus for manufacturing a semiconductor integrated circuit device according to claim 1, wherein at least one of the first to fifth spacers is made of a low elastic body.
  3.   2. The semiconductor integrated circuit device manufacturing apparatus according to claim 1, wherein the fastener is a screw.
  4.   4. The apparatus for manufacturing a semiconductor integrated circuit device according to claim 3, wherein a spring is interposed between the screw and the fifth spacer.
  5.   The apparatus for manufacturing a semiconductor integrated circuit device according to claim 1, wherein the stopper is a weight or a pressure device.
  6.   2. The semiconductor integrated circuit device according to claim 1, wherein at least one of the jig, the first to fifth spacers, and the movable pin has a heat generating mechanism. apparatus.
  7. A semiconductor integrated circuit device in which a first semiconductor device and a second semiconductor device in which an IC chip is mounted on a semiconductor substrate having external connection terminals are stacked via solder balls mounted on the external connection terminals Manufacturing equipment,
    A movable pin with a lower end attached to the main surface of the jig;
    A first spacer which is provided on the jig and fixes the movable pin through the interior;
    A second spacer which is provided on the first spacer and fixes the distance between the first semiconductor device and the second semiconductor device to be constant and fixes the movable pin through the interior; ,
    A third spacer which is provided on the second spacer and fixes the movable pin through the interior;
    A stopper provided on the third spacer and fixing the first to third spacers;
    The movable pin can be operated in a direction parallel to the main surface of the jig and in a circumferential direction centered on the lower end according to the size of the semiconductor substrate. And the first to third spacers have a shape corresponding to the size of the semiconductor substrate,
    The side surface of the semiconductor substrate has a shape that meshes with the side surface shape of the movable pin so that each of the first and second semiconductor devices is fixed in contact with the movable pin. An apparatus for manufacturing a semiconductor integrated circuit device.
  8. A semiconductor integrated circuit device manufacturing method using the semiconductor integrated circuit device manufacturing apparatus according to claim 1,
    The first and second semiconductor devices are stacked at predetermined positions by using the first to fourth spacers while adjusting the position of the movable pin according to the size of the semiconductor substrate. Process,
    Fixing the first to fifth spacers using the fastener provided on the fourth spacer via the fifth spacer;
    Bonding the first semiconductor device and the second semiconductor device by reflowing the solder balls;
    A method for manufacturing a semiconductor integrated circuit device, comprising: removing the stopper and extracting the first to fifth spacers from the movable pin.
  9. A semiconductor substrate manufacturing method for manufacturing the semiconductor substrate used in the semiconductor integrated circuit device manufacturing apparatus according to claim 7,
    With respect to the sheet-like substrate formed with a plurality of semiconductor substrates, the plurality of semiconductor substrates are formed in the same process so that the side surfaces of the plurality of semiconductor substrates mesh with the side surfaces of the movable pins. Processing the side surface;
    And a step of separating the plurality of semiconductor substrates from the sheet-like substrate after processing the side surfaces of the plurality of semiconductor substrates.







JP2005143714A 2005-05-17 2005-05-17 Apparatus and method for manufacturing semiconductor integrated circuit device Pending JP2006324298A (en)

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Application Number Priority Date Filing Date Title
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009117428A (en) * 2007-11-01 2009-05-28 Hitachi Ltd Method for power semiconductor module, fabrication, its apparatus, power semiconductor module thereof and its junction method
JP2014208534A (en) * 2008-08-29 2014-11-06 ミシュラン ルシェルシュ エ テクニーク ソシエテ アノニム 1-D tire patch device and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009117428A (en) * 2007-11-01 2009-05-28 Hitachi Ltd Method for power semiconductor module, fabrication, its apparatus, power semiconductor module thereof and its junction method
JP2014208534A (en) * 2008-08-29 2014-11-06 ミシュラン ルシェルシュ エ テクニーク ソシエテ アノニム 1-D tire patch device and method

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