JP2006217072A - Turbo decoder and turbo decoding method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To configure a turbo decoder in which a data stream subjected to error correction coding by a turbo code is decoded by a MAP decoding at a high speed, with a single port memory while suppressing an increase in memory capacity. <P>SOLUTION: A data range in which window processing consisting of calculations of forward probability per window range and calculation of a backward probability per window range is repeated at predetermined times is equally divided into two. In one data range, a second state probability calculation means 104 calculates the backward probability first, and then, a first state probability calculating means 103 calculates the forward probability. In the other data range, a third state probability calculating means 105 calculates the forward probability first, and then, a fourth state probability calculating means 106 calculates the backward probability. A memory selecting means 109 switches a state probability for reading and writing between two state probability storage means 107 and 108 for each window processing. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a turbo decoding device and a turbo decoding method to which a maximum a posteriori probability decoding method using a sliding window algorithm is applied to error correction decoding for a data sequence that has been error correction encoded by a turbo code.

  The turbo code has been used in many fields in recent years as a code that is close to the theoretical limit value of the correction capability of the error control code presented by Shannon and can be realized with a realistic processing amount. For example, in the third generation mobile communication, it is used as one of standard encodings.

  The turbo encoder is configured by using a plurality of element encoders in parallel via an interleaver (interleaver). At the time of decoding, a plurality of element decoders perform soft decision decoding corresponding to each element encoder, and mutually exchange decoding information which is an external value to improve error correction capability. In addition, in order to control the data length after encoding, a method of changing the encoding rate by performing puncturing processing that periodically deletes redundant data output from each element encoder is employed.

  In decoding of this turbo code, the Maximum A posteriori Probability (MAP) decoding method is well known. In this MAP decoding method, the state at the time of encoding of the internal data of the encoder is estimated from the data sequence input to the element decoder, and the encoder input to be changed to the state where the generated probability is estimated to be highest is estimated. In this method, the decoding result is used.

  The estimation of the encoder input is based on the state probability value obtained by calculating the forward probability that sequentially estimates the state from the beginning (end) to the end (end) of the data sequence, and from the end (end) of the data sequence. It is performed using both the state probability value obtained by calculating the backward probability that sequentially estimates the state toward the beginning (starting edge), but when realized by a circuit, either one of the probability values is preceded. And then storing all of them in the memory, then sequentially calculating the other probability value, and simultaneously estimating the encoder input from one probability value stored in the memory.

  In this estimation method, the memory for storing the probability value needs to have a storage capacity of a size according to the length of the data series × the number of state probabilities, which is a heavy load when the circuit is realized. As a method for solving this, a sliding window algorithm is known (Non-Patent Document 1). In this sliding window algorithm, the data series is divided by a certain window length, and the probability value is stored by sequentially performing the decoding process while estimating the state value at the window boundary for each window range. The storage capacity of the memory can be reduced to a size according to window length × number of state probabilities. Hereinafter, a conventional turbo decoding apparatus using the MAP decoding method will be schematically described.

  FIG. 8 is a block diagram showing a configuration example of a conventional turbo decoding device that realizes a sliding window algorithm. The turbo decoding apparatus 800 shown in FIG. 8 includes an input data storage unit 801, a transition probability calculation unit 802, a first state probability calculation unit 803, a second state probability calculation unit 804, and a first state probability storage. Means 805, first log likelihood calculation means 806, external value calculation means 807, external value storage means 808, and output data storage means 809 are provided.

  In addition, in this figure and the following figures, the symbol indicating the interleaver is not described, but it is assumed that it is given as a turbo code at a predetermined position.

  In FIG. 8, the received and demodulated input data is temporarily stored in the input data storage unit 801. The transition probability calculation means 802 calculates transition probabilities between time points based on data strings read in units of window lengths from the input data storage means 801 and the external value storage means 808, respectively. The calculation results are output to the first log likelihood calculation means 806, the first state probability calculation means 803, and the second state probability calculation means 804, respectively.

  The first state probability calculation means 803 repeatedly calculates the forward probability for each window length in ascending order from the beginning to the end of the window length in a predetermined data range, and the calculation result is a first log likelihood calculation. Output to means 806. The second state probability calculation means 804 calculates the backward probability for each window length in descending order from the end of the window length to the start end, and stores the calculation result in the first state probability storage means 805 with predetermined data. Repeat in range.

  Between the first state probability calculation means 803 and the second state probability calculation means 804, the second state probability calculation means 804 first calculates the backward probability as described above, and then the first state probability. The calculation means 803 calculates the forward probability as described above.

  The first log likelihood calculation means 806 is the same as the transition probability input from the transition probability calculation means 802, the forward probability input from the first state probability calculation means 803, and the same read from the first state probability storage means 805. The log likelihood ratio is calculated according to the backward probability of the position.

  The external value calculation unit 807 calculates an external value from the log likelihood ratio obtained by the first log likelihood calculation unit 806 and stores it in the external value storage unit 808. The above operation is repeated a predetermined number of times of decoding. The log-likelihood ratio obtained by the first log-likelihood calculation unit 806 when the predetermined number of decoding times has elapsed is stored in the output data storage unit 809 as output data for hard decision.

  By the way, the sliding window algorithm takes advantage of the fact that it can be calculated independently for each window, and usually divides the data range that repeats the window processing consisting of forward probability calculation and backward probability calculation a predetermined number of decoding times into a plurality of data ranges. The decoding time is shortened by executing window processing in parallel in each data range.

  FIG. 9 is a block diagram illustrating a configuration example of a conventional turbo decoding device in a case where a data range in which window processing is repeated a predetermined number of times of decoding is equally divided into two and window processing is executed in parallel in each data range. . In FIG. 9, the same or similar components as those shown in FIG. 8 are denoted by the same reference numerals.

  That is, as shown in FIG. 9, a conventional turbo decoding apparatus 900 that executes window processing in parallel in two data ranges has a third state probability for calculating a forward probability with respect to the configuration shown in FIG. The calculation means 901, the fourth state probability calculation means 902 for calculating the backward probability, the second state probability storage means 903 for storing the backward probability, and the second log likelihood calculation for calculating the log likelihood ratio Means 904 are added. As a result, the external value calculation means 807 calculates an external value from the log likelihood ratios obtained by the first log likelihood calculation means 806 and the second log likelihood calculation means 904, respectively, and stores them as external values. It is stored in the means 808.

  The first log likelihood calculation means 806 reads out the transition probability input from the transition probability calculation means 802, the forward probability input from the first state probability calculation means 803, and the second state probability storage means 903. The log likelihood ratio is calculated according to the backward probability of the same position. The second log likelihood calculation means 904 reads out the transition probability input from the transition probability calculation means 802, the forward probability input from the third state probability calculation means 901, and the first state probability storage means 805. The log likelihood ratio is calculated based on the backward probability of the same position.

  Next, the operation will be outlined with reference to FIG. FIG. 10 is a time chart for explaining the access timing to the first and second state probability storage means shown in FIG. As shown in FIG. 10, it is assumed that the data range is 48, and the sliding window range that is the window length described above is 8. Therefore, at the start of decoding, the data range from the time point “0” to the time point “47” includes a data range starting at the time point “0” and ending at the time point “23”, and a data range starting from the time point “24” as the starting point. The data range is divided into two equal parts, with the data range terminating at “47”. In each data range, three window processes are sequentially executed, but two corresponding window processes are executed in parallel between the two divided data ranges.

  In FIG. 10, the sequence number at the time is shown in “□”, but this “□” display indicates that a “write request to the memory”, a “read request to the memory”, and a “memory” The data occupation period "is shown at the same time. This “□” display is common in the following drawings.

  Now, in FIG. 10, when the decoding process starts, the decoding process is executed from the beginning of each target data range in units of the sliding window range. Here, the target data ranges of the first state probability calculation unit 803, the second state probability calculation unit 804, and the first state probability storage unit 805 have the time point “0” as the start point and the time point “23” as the end point. Suppose that it is a data range. Further, the target data ranges of the third state probability calculation unit 901, the fourth state probability calculation unit 902, and the second state probability storage unit 903 are data having the time point “24” as the start point and the time point “47” as the end point. Suppose that it is a range. In both cases, the decryption process with the same content is performed in the same procedure. Here, the decoding process in the data range starting at time “0” and ending at time “23” will be described.

  In the data range starting at the time “0” and ending at the time “23”, when the decoding process is started, first, data is read from the data input storage unit 801 in the descending order from the time “7” to the time “0”. It is. Then, the backward probability of the time “7” is calculated by the second state probability calculation means 804. The calculated backward probability is written to the address “7” in the first state probability storage means 805. Next, the backward probability at the time “6” is calculated by the second state probability calculating means 804 and written to the address “6” by the first state probability storing means 805. This process is repeated until the backward probability calculation at time “0”, and after the backward probability calculation at time “0”, the calculation of the forward probability by the first state probability calculation means 803 is started.

  The calculation of the forward probability starts from the time “0” in ascending order. Simultaneously with the calculation of the forward probability, the backward probabilities at the same position are read out in ascending order from the first state probability storage means 805 and used for calculating the log likelihood ratio. That is, in the first state probability storage unit 805, writing is performed in descending order. When the backward probability calculation at the time point “0” is finished, the backward from the time point “0” to the time point “7” in ascending order from the immediately subsequent timing. The probability is read out.

  The above window processing is similarly performed on the data from the next time point “8” to the time point “15” and the data from the time point “16” to the time point “23”. The same applies to the data range starting at time “24” and ending at time “47”. As described above, since the predetermined data range is divided into two equal parts and parallel processing can be performed, decoding can be performed at high speed.

  Here, the storage widths of the first state probability storage unit 805 and the second state probability storage unit 903 are usually the same width 8 as the sliding window range 8 respectively. For this reason, since the write request cannot be issued until the reading of the first state probability storage unit 805 and the second state probability storage unit 903 is completed, it is difficult to further increase the speed of decoding. . For example, at the timing when the backward probability writing request at the time “13” is made to the address “5” of the first state probability storage unit 805, the first state probability storage unit 805 is used for calculating the log likelihood ratio. Therefore, the backward probability at the time “5” written in the previous window processing is not read. In this case, if the backward probability write request at the time point “13” is issued before the backward probability at the time point “5” written in the previous window processing is read for the purpose of further speeding up the decoding, This is because the accuracy of data cannot be guaranteed.

  Therefore, in order to further increase the speed of decoding, for example, as shown in FIG. 11, the capacities of the first state probability storage means 805 and the second state probability storage means 903 are set to the sliding window range × It is necessary to ensure the accuracy of the data by making it larger than the number of states. FIG. 11 is a diagram illustrating an example in the case of further increasing the speed of the MAP decoding illustrated in FIG. 11 (1) and 11 (2), the first state probability storage means 805 and the second state probability storage means 903 are divided into two banks (bank 1, bank 2) each having the same capacity as the sliding window range 8. In this example, the banks used are alternately changed in units of window ranges.

As a measure for solving this problem, for example, in Patent Document 1, the addresses of descending order writing and ascending order reading required in a system such as a mobile communication system are assumed to be virtual addresses, and the actual memory (first state probability storage means 805 and The memory address is controlled so that the physical address given to the second state probability storage means 903) is ascending write descending read in the processing performed after the ascending read, and descending write ascending read is performed in the processing performed after the descending read. A method has been proposed.
JP 2003-32126 A “An intuitive justification and a simplified implementation of the MAP decoder for convolutional codes”, IEEE J. Sel. Areas Commun., Vol.16, no.2, pp.260-264, Feb.1998.

  However, the method disclosed in Patent Document 1 requires an address translation unit that translates a virtual address required in the system into a physical address. In addition, since writing is started before the completion of reading, the memory cannot be configured with a single port memory, and it is necessary to configure with a dual port memory.

  Usually, the dual port memory has a larger circuit scale than the single port memory, and therefore becomes larger. In circuit design using an ASIC, design is often performed on the basis of a single port memory. Therefore, it is desirable that the circuit can be configured using a single port memory.

  The present invention has been made in view of such a point, and in the case of decoding a data sequence error-corrected by a turbo code at a high speed by MAP decoding, a single-port memory while suppressing an increase in memory capacity. An object of the present invention is to provide a turbo decoding device and a turbo decoding method that can be configured.

  In order to solve such a problem, the turbo decoding apparatus according to the present invention employs a maximum a posteriori probability decoding method using a sliding window algorithm for error correction decoding of a data sequence error-corrected by a turbo code. In a turbo decoding device, a data range that repeats a predetermined number of times a window process consisting of forward probability calculation and backward probability calculation in units of window ranges is equally divided into even numbers, and one of the two data ranges The first window processing means for calculating the backward probability first as the window processing for the data sequence in the above, and then calculating the forward probability, and the window processing for the data sequence in the other data range first as the window processing. Calculate the forward probability, and then calculate the backward probability. State probability storage means having window storage means, two storage areas, and storing the calculation result of the backward probability in the first window processing means and the calculation result of the forward probability in the second window processing means, respectively. Log likelihood ratio based on the forward probability calculation result in the first window processing means and the backward probability calculation result stored in the state probability storage means, and the backward probability in the second window processing means. Between the log likelihood calculation means for calculating the log likelihood ratio based on the calculation result and the calculation result of the forward probability stored in the state probability storage means, and between the two storage areas of the state probability storage means, The first window processing means writes the calculation result of the backward probability, and the log likelihood calculation means reads the storage area, and the second window processing means calculates the forward probability. Results writes it with the log-likelihood calculation unit reads the storage area employs a configuration having a memory selection means for switching alternately every the window processing.

  According to this configuration, not all window processes are performed from the same direction as usual, but the corresponding window processes proceed in opposite directions in the two data ranges. As a result, write requests to the state probability storage means that occur at the same timing exist in both ascending and descending order, and read requests also exist in both ascending and descending order. Therefore, when writing the state probabilities into the storage means, the state probability of the window that performs ascending order writing is selected for the storage means that has been read in ascending order, and descending order writing is performed for the storage means that has been read in descending order By selecting the state probability of the window for performing the special address conversion means can be eliminated. As a result, the accuracy of the data in the storage means can be ensured without increasing the circuit scale and the capacity of the storage means, and high-speed MAP decoding can be realized.

  The turbo decoding device according to the present invention, in the above invention, manages each of the two storage areas of the state probability storage means by dividing each of the two storage areas into a plurality of small areas having a capacity equal to or less than a window width. In order to prevent contention between writing and reading in the storage area selected by the means, an address control means is provided which performs control for assigning addresses to be accessed to the plurality of small areas.

  According to this configuration, in each of the two storage areas possessed by the state probability storage means, descending order writing ascending order reading and ascending order writing descending order reading occur alternately, but the storage area of each storage means is divided into a plurality of Since the management and the access address are assigned, it is possible to avoid the simultaneous occurrence of the write request and the read request. Therefore, the state probability storage means can be constituted by a single port memory having a small mounting area.

  The turbo decoding device according to the present invention employs a configuration in which, in the above invention, the address control means controls the allocation to the plurality of small areas by a logical value of lower bits of an address to be accessed.

  According to this configuration, the address control means can be realized with a simple configuration.

  A turbo decoding method according to the present invention is a turbo decoding method in which a maximum a posteriori probability decoding method using a sliding window algorithm is applied to error correction decoding for a data sequence that has been error correction encoded by a turbo code. A data range in which a window process consisting of forward probability calculation and backward probability calculation in units is repeated a predetermined number of times is divided into even numbers, and the window process is performed on a data string in one data range of two data ranges. First calculating the backward probability, and then calculating the forward probability, and then calculating the forward probability as the window processing for the data string in the other data range, A second window processing step for calculating the backward probability thereafter Storing the calculation result of the backward probability in the first window processing step and the calculation result of the forward probability in the second window processing step in two storage areas of the state probability storage means, A log likelihood ratio based on the calculation result of the forward probability in the first window processing step and the calculation result of the backward probability stored in the state probability storage means, and the calculation result of the backward probability in the second window processing step; Between the log likelihood calculation step of calculating the log likelihood ratio based on the calculation result of the forward probability stored in the state probability storage means, and between the two storage areas of the state probability storage means, the first A storage area in which the calculation result of the backward probability is written in the window processing step and is read in the log likelihood calculation step, and the calculation result of the forward probability in the second window processing step And a storage area for reading writes it in the log-likelihood calculation step was to and a memory selection step alternately switching every said window processing.

  According to this method, not all window processes are performed from the same direction as usual, but the corresponding window processes proceed in opposite directions in the two data ranges. As a result, write requests to the state probability storage means that occur at the same timing exist in both ascending and descending order, and read requests also exist in both ascending and descending order. Therefore, when writing the state probabilities into the storage means, the state probability of the window that performs ascending order writing is selected for the storage means that has been read in ascending order, and descending order writing is performed for the storage means that has been read in descending order By selecting the state probability of the window for performing the special address conversion means can be eliminated. As a result, the accuracy of the data in the storage means can be ensured without increasing the circuit scale and the capacity of the storage means, and high-speed MAP decoding can be realized.

  In the turbo decoding method according to the present invention, in the above invention, each of the two storage areas of the state probability storage means is divided into a plurality of small areas having a capacity equal to or less than a window width and managed, and the memory selection is performed. An address control step of performing control to allocate addresses to be accessed to the plurality of small regions is provided so that writing and reading do not compete in the storage area selected in the step.

  According to this method, in each of the two storage areas of the state probability storage means, descending order writing ascending order reading and ascending order writing descending order reading occur alternately, but the storage area of each storage means is divided into a plurality of Since the management and the access address are assigned, it is possible to avoid the simultaneous occurrence of the write request and the read request. Therefore, the state probability storage means can be constituted by a single port memory having a small mounting area.

  In the turbo decoding method according to the present invention, in the above invention, in the address control step, allocation to the plurality of small areas is controlled by a logical value of lower bits of an address to be accessed.

  According to this method, the address control can be realized by a simple method.

  According to the present invention, a turbo decoding device that decodes a data sequence that has been error correction encoded by a turbo code at a high speed by MAP decoding can be configured with a single-port memory while suppressing an increase in memory capacity.

  The essence of the present invention is that, in a turbo decoding device to which a MAP decoding method using a sliding window algorithm is applied to error correction decoding of a data sequence that has been error correction encoded by a turbo code, the forward direction in units of window ranges is used. A data range that repeats the window processing consisting of probability calculation and backward probability calculation a predetermined number of times is equally divided into even numbers, and in the two data ranges, the corresponding window processing calculates the forward probability and backward probability. And the two state probability storage means alternately perform a descending write ascending read request and an ascending write descending read request alternately. To switch between writing and reading between each window processing, actually one state The rate storage unit is to ensure that the sequential writing of the read in the same direction takes place before the sequential reading is completed.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
FIG. 1 is a block diagram showing a configuration of a turbo decoding apparatus according to Embodiment 1 of the present invention. The turbo decoding apparatus 100 shown in FIG. 1 includes an input data storage unit 101, a transition probability calculation unit 102, a first state probability calculation unit 103, a second state probability calculation unit 104, and a third state probability calculation. Means 105, fourth state probability calculation means 106, first state probability storage means 107, second state probability storage means 108, memory selection means 109, address control means 110, and first logarithm. Likelihood calculation means 111, second log likelihood calculation means 112, external value calculation means 113, external value storage means 114, and output data storage means 115 are provided.

  In FIG. 1, received and demodulated input data is temporarily stored in the input data storage means 101. The transition probability calculation means 102 calculates the transition probability between time points based on the data strings read in units of window lengths from the input data storage means 101 and the external value storage means 114, respectively. The calculation results are the first state probability calculation unit 103, the second state probability calculation unit 104, the third state probability calculation unit 105, the fourth state probability calculation unit 106, and the first log likelihood. It is output to the calculation means 111 and the second log likelihood calculation means 112, respectively.

  The first state probability calculating means 103 repeatedly calculates the forward probability for each window length in ascending order from the beginning to the end of the window length in a predetermined data range, and the calculation result is a first log likelihood calculation. Output to means 111. The second state probability calculation means 104 calculates backward probabilities for each window length in descending order from the end of the window length to the start end, and the calculation results are the first state probability storage means 107 and the second state probability storage means. Of the data 108, the writing to the state probability storage means selected by the memory selection means 109 is repeated in a predetermined data range.

  Between the first state probability calculation means 103 and the second state probability calculation means 104, the second state probability calculation means 104 first calculates the backward probability as described above, and then the first state probability The calculation means 103 calculates the forward probability as described above.

  The third state probability calculation means 105 calculates the forward probability for each window length in ascending order from the beginning to the end of the window length, and the calculation results are the first state probability storage means 107 and the second state probability storage means. Of the data 108, the writing to the state probability storage means selected by the memory selection means 109 is repeated in a predetermined data range. The fourth state probability calculation means 106 repeatedly calculates backward probabilities for each window length in descending order from the end of the window length to the start end in the predetermined data range, and calculates the result of the second log likelihood calculation. It is output to the means 112.

  Between the third state probability calculation means 105 and the fourth state probability calculation means 106, the third state probability calculation means 105 first calculates the forward probability as described above, and then the fourth state probability The calculation means 106 calculates the backward probability as described above.

  The first log likelihood calculation means 111 includes a transition probability input from the transition probability calculation means 102, a forward probability input from the first state probability calculation means 103, a first state probability storage means 107, and a second state probability storage means 107. The log likelihood ratio is calculated based on the backward probability at the same position read from the state probability storage means selected by the memory selection means 109 in the state probability storage means 108.

  The second log likelihood calculation means 112 includes a transition probability input from the transition probability calculation means 102, a backward probability input from the fourth state probability calculation means 106, a first state probability storage means 107, and a first state probability storage means 107. The log likelihood ratio is calculated based on the forward probability at the same position read from the state probability storage means selected by the memory selection means 109 among the two state probability storage means 108.

  The external value calculation means 113 calculates external values from the log likelihood ratios obtained by the first log likelihood calculation means 111 and the second log likelihood calculation means 112, respectively, and stores them in the external value storage means 114. Remember. The above operation is repeated a predetermined number of times of decoding. The log likelihood ratio obtained by the first log likelihood calculation means 111 and the second log likelihood calculation means 112 when the predetermined number of decoding times has elapsed is stored in the output data storage means 115 as hard decision output data. .

  Here, the memory selection unit 109 alternately selects the first state probability storage unit 107 and the second state probability storage unit 108 for each window process, and executes writing to one state probability storage unit, The reading is executed to the other state probability storage means.

  As will be described later (FIG. 3), the address control unit 110 manages the write address and the read address in the first state probability storage unit 107 and the second state probability storage unit 108 in each window process. The write address and the read address in the state probability storage unit selected by the memory selection unit 109 are controlled so as not to conflict with the read address.

  Next, the overall operation will be described with reference to FIG. FIG. 2 is a time chart for explaining the access timing to the first and second state probability storage means shown in FIG. 2 (1) is a time chart for explaining a series of processing operations, FIG. 2 (2) is a time chart for explaining the access timing to the second state probability storage means 108, and FIG. 2 (3) is a first state. It is a time chart explaining the access timing to the probability memory | storage means 107. FIG.

  As shown in FIG. 2A, it is assumed that the data range is 48 and the sliding window range is 8. Therefore, at the start of decoding, the data range from the time point “0” to the time point “47” includes a data range starting at the time point “0” and ending at the time point “23”, and a data range starting from the time point “24” as the starting point. The data range is divided into two equal parts, with the data range terminating at “47”. In each data range, three window processes are sequentially executed, but two corresponding window processes are executed in parallel between the two divided data ranges.

  As can be understood from the comparison between FIG. 2 (1) and FIG. 10 (1), in the first embodiment, the data range starting at time “0” and ending at time “23” and the time “24” In the corresponding window processing, the calculation of the forward probability and the calculation of the backward probability proceed in an inverse relationship with each other in the data range starting with “” and ending with time “47”. Then, the memory selection unit 109 switches the writing and reading to the first state probability storage unit 107 and the second state probability storage unit 108 for each window process.

  In FIG. 2, the target data range of the first state probability calculation unit 103 and the second state probability calculation unit 104 is a data range starting from the time point “0” and ending at the time point “23”. It is assumed that the target data ranges of the state probability calculation means 105 and the fourth state probability calculation means 106 are data ranges starting from the time “24” and ending at the time “47”.

  In FIG. 2A, when the decoding process is started, the decoding process is executed from the beginning of each target data range in units of the sliding window range. It should be noted that the memory selection means 109 is the first state probability storage means 107, the second state probability calculation means 104, and the second logarithm as the initial state during the initial window processing period immediately after the start of the decoding process. The likelihood calculation means 112 is connected, and the second state probability storage means 108, the third state probability calculation means 105, and the first log likelihood calculation means 111 are connected. In each subsequent window process, the selection is switched alternately. At this time, the address control means 110 controls the addresses to be written to and read from the first state probability storage means 107 and the second state probability storage means 108.

  In the first window process in the data range starting at the time “0” and ending at the time “23”, the backward probability at the time “7” is calculated by the second state probability calculation means 104, and the first state It is written in the probability storage means 107. Next, the backward probability of the time “6” is calculated by the second state probability calculation means 104 and written to the first state probability storage means 107. This process is repeated until the backward probability at time “0”, and after the backward probability at time “0” is calculated, calculation of the forward probability by the first state probability calculation means 103 is started.

  The calculation of the forward probability is started in ascending order from the time “0”, and the calculation result is given to the first log likelihood calculation means 111. Simultaneously with the calculation of the forward probability, the backward probabilities at the same position are read out from the first state probability storage means 107 in ascending order and used for the log likelihood ratio calculation by the first log likelihood calculation means 111. That is, in the first state probability storage means 107, the backward probabilities are written in descending order from the time point “7” to the time point “0”, and when the calculation of the backward probability of the time point “0” is finished, the time point “0” The backward probabilities up to time “7” are read out in ascending order.

  On the other hand, in the first window processing in the data range starting at the time “24” and ending at the time “47”, the forward probability at the time “40” is calculated by the third state probability calculating means 105, and the second Is written in the state probability storage means 108. Next, the forward probability of the time “41” is calculated by the third state probability calculation means 105 and written to the second state probability storage means 108. This process is repeated until the forward probability at the time “47”, and the calculation of the backward probability by the fourth state probability calculation means 106 is started after the forward probability at the time “47” is calculated.

  The calculation of the backward probability is started in descending order from the time point “47”, and the calculation result is given to the second log likelihood calculation means 112. Simultaneously with the calculation of the backward probability, the forward probabilities at the same position are read from the second state probability storage means 108 in descending order and used for the calculation of the log likelihood ratio by the second log likelihood calculation means 112. That is, the second state probability storage means 108 writes the forward probabilities from the time point “40” to the time point “47” in ascending order, and when the calculation of the forward probability at the time point “47” is completed, the time point “47”. The forward probabilities from time to time “40” are read out in descending order.

  The second window process is started from the timing immediately after the reading is started in the first window process described above. At the same time, the memory selection unit 109 switches the connection to the first state probability storage unit 107 and the second state probability storage unit 108. That is, the memory selection unit 109 connects the first state probability storage unit 107 to the third state probability calculation unit 105 and the first log likelihood calculation unit 111, and the second state probability storage unit 108. And the second state probability calculation means 104 and the second log likelihood calculation means 112 are connected.

  In the second window process in the data range starting from the time point “0” and ending at the time point “23”, the forward probability of the time point “1” is calculated in the first window process at the time point “15”. ”Is calculated by the second state probability calculation means 104 and written to the second state probability storage means 108. Next, the backward probability of the time “14” is calculated by the second state probability calculating means 104 and written to the second state probability storing means 108. This process is repeated until the backward probability calculation at time “8”. After the backward probability calculation at time “8”, calculation of the forward probability by the first state probability calculation means 103 is started.

  The calculation of the forward probability starts from the time “8” in ascending order. Simultaneously with the calculation of the forward probability, the backward probabilities at the same position are read out in ascending order from the second state probability storage means 108 and used for calculating the log likelihood ratio. That is, in the second state probability storage means 108, the backward probabilities are written in descending order. When the backward probability calculation at the time point “8” is completed, the backward probabilities from the time point “8” to the time point “15” are increased in ascending order. It will be read out.

  Here, in the second state probability storage means 108, as shown in FIG. 2B, the backward probability of the time point “15” is written at the next timing after the forward probability of the time point “47” is read. Thus, immediately after the forward probabilities from time “47” to time “40” are read in descending order, the backward probabilities from time “15” to time “8” are written in descending order. Overwriting does not occur and data accuracy is ensured.

  In the second window process in the data range starting at the time point “24” and ending at the time point “47”, the forward probability of the time point “48” is calculated in the first window process at the time point “32”. ”Is calculated by the third state probability calculating means 105 and written in the first state probability storing means 107. Thereafter, the forward probabilities are written in the first state probability storage means 107 from the time point “32” calculated by the third state probability calculation means 105 to the time point “39”.

  In this case, in the first state probability storage means 107, as shown in FIG. 2 (3), the forward probability of the time point “32” is written at the next timing after the backward probability of the time point “0” is read. Thus, since the backward probabilities from the time “0” to the time “7” are read in ascending order, the forward probabilities from the time “32” to the time “39” are written in ascending order. Overwriting does not occur and data accuracy is ensured.

  The third window process is started from the timing immediately after the reading is started in the second window process described above. At the same time, the memory selection unit 109 switches the connection to the first state probability storage unit 107 and the second state probability storage unit 108. That is, the memory selection unit 109 connects the first state probability storage unit 107 to the second state probability calculation unit 104 and the second log likelihood calculation unit 112, and the second state probability storage unit 108. And the third state probability calculating means 105 and the first log likelihood calculating means 111 are connected. This is a connection relationship in the first window process.

  In the third window process in the data range starting from the time point “0” and ending at the time point “23”, the forward probability of the time point “9” is calculated in the second window process. ”Is calculated by the second state probability calculation means 104 and written in the first state probability storage means 107. Thereafter, backward probabilities are written in the first state probability storage means 107 from the time “23” to the time “16” calculated by the second state probability calculation means 104.

  In this case, in the first state probability storage means 107, as shown in FIG. 2 (3), the backward probability of the time point “23” is written at the next timing after the forward probability of the time point “39” is read. Thus, immediately after the forward probabilities from time “39” to time “32” are read in descending order, the backward probabilities from time “23” to time “16” are written in descending order. Overwriting does not occur and data accuracy is ensured.

  In the third window processing in the data range starting at time “24” and ending at time “47”, the forward probability of time “38” is calculated in the second window processing. The forward probability of “24” is calculated by the third state probability calculation means 105 and written to the second state probability storage means 108. Thereafter, forward probabilities are written in the second state probability storage means 108 from the time “24” to the time “31” calculated by the third state probability calculation means 105.

  In this case, in the second state probability storage means 108, as shown in FIG. 2 (2), the forward probability of the time point “24” is written at the next timing after the backward probability of the time point “8” is read. Thus, immediately after the backward probabilities from time “8” to time “15” are read in ascending order, the forward probabilities from time “24” to time “31” are written in ascending order. Overwriting does not occur and data accuracy is ensured.

  FIG. 3 is a diagram for explaining the configuration of the first and second state probability storage means 107 and 108 shown in FIG. 1 and the operation of the address control means shown in FIG. FIG. 3 (1) is a copy of the access contents of the first state probability storage means 107 shown in FIG. 2 (3). FIGS. 3 (2) and 3 (3) are diagrams showing access contents of two banks constituting a storage area included in each state probability storage means.

  When the decoding process is performed at the timing shown in FIG. 2, the write address and the read address that access the state probability storage unit compete with each other between the even address and the odd address. On the other hand, since addresses occur in ascending or descending permutation, even if read-address and write-address conflicts occur between even-numbered addresses and odd-numbered addresses, even-numbered or odd-numbered read-writes cannot compete. .

  Therefore, the storage area of the state probability storage means is configured with the same width 8 as the sliding window range. Then, the address control means 110 divides the storage area of width 8 into areas of width 4, one of which is an odd address bank (FIG. 3 (2)) and the other is an even address bank (FIG. 3 (3)). ).

  Specifically, the address control means 110 confirms the least significant bit of the address accessing each state probability storage means, and if it is an odd number such as a value “1”, a value “3”, etc., it is an odd address bank ( 3 (2)) is accessed, and when the value is an even number such as “0” or “2”, the access to the even address bank (FIG. 3 (3)) is controlled.

  When read and write conflicts, one of the addresses is an odd number and the other is an even number. Therefore, in the case where a read / write conflict actually occurs when a request is made to the state probability storage means, Access is made to a different bank to the bank for address and the bank for address for even number.

  A specific example of writing will be shown. For example, in the example of the first window processing in the data range starting at the time “0” and ending at the time “23”, the backward probability of the time “7” is calculated by the second state probability calculation unit 104. When the first state probability storage means 107 stores the address “7”, since the least significant bit of the address “7” is “1”, as shown in FIG. The backward probability of the time “7” is written in the bank address “3”.

  When the backward probability of the next time point “6” is calculated by the second state probability calculation means 104 and is to be stored in the address “6” by the first state probability storage means 107, Since the lower bit is “0”, as shown in FIG. 3 (3), the backward probability of the time “6” is written into the address “3” of the even-numbered address bank.

  As described above, according to the first embodiment, the data range in which the window process including the calculation of the forward probability and the calculation of the backward probability in units of the window range is repeated a predetermined number of times is equally divided into two. In the two data ranges, in the corresponding window processing, the calculation of the forward probability and the calculation of the backward probability proceed in an inverse relationship with each other, and the two state probability storage means perform the descending order writing ascending order reading request and the ascending order writing. The request for reading in descending order is alternately performed, but writing and reading between the two state probability storage units are switched for each window process. In fact, one state probability storage unit can perform sequential reading. Before completion, sequential writing in the same direction as this reading is performed, so data overwriting does not occur and data accuracy is ensured. Door can be.

  Therefore, writing can be performed before reading is completed while effectively using the storage area of the state probability storage means, that is, saving the memory capacity, so that the speed of MAP decoding can be increased. And since the order of the address to access can be reversed without changing an address itself using a special address conversion means like patent document 1, size reduction of a circuit can be achieved.

  Further, the two state probability storage means can be configured with a plurality of small-capacity storage areas having a window width or less so that read / write access contention does not occur between the even and odd numbers. A configuration using a port memory is possible, and the mounting area can be reduced.

  By the way, as the processing timing between the window processes, in FIG. 2, at the next timing when the backward probability of the time point “0” calculated by the second state probability calculating unit 104 is read from the first state probability storing unit 107, Although the case where the forward probability of the time point “32” calculated by the third state probability calculation unit 105 is written in the first state probability storage unit 107 has been shown, various other timings are actually conceivable. In this case, the configuration of the first state probability storage unit 107 and the second state probability storage unit 108 and the operation of the address control unit 110 are different. Hereinafter, some modifications will be described in the second and third embodiments.

(Embodiment 2)
FIG. 4 is a time chart for explaining the access timing to the first and second state probability storage means 107 and 108 in the turbo decoding device according to Embodiment 2 of the present invention. 4 (1) is a time chart for explaining a series of processing operations, FIG. 4 (2) is a time chart for explaining access timing to the second state probability storage means 108, and FIG. 4 (3) is a first state. It is a time chart explaining the access timing to the probability memory | storage means 107. FIG.

  FIG. 5 is a diagram for explaining the configuration of the first and second state probability storage means 107 and 108 and the operation of the address control means in the turbo decoding device according to Embodiment 2 of the present invention. FIG. 5 (1) is a copy of the access contents of the first state probability storage means 107 shown in FIG. 4 (3). FIGS. 5 (2) and 5 (3) are diagrams showing access contents of two banks constituting the storage area provided in the state probability storage means.

  In the second embodiment, as shown in FIG. 4 (1), as the processing timing between the window processes, the backward probability of the time point “0” calculated by the second state probability calculating unit 104 is the first state probability. A case will be described in which the forward probability at the time “32” calculated by the third state probability calculation unit 105 is written in the first state probability storage unit 107 at the same timing read from the storage unit 107.

  The width of the storage area to be prepared by the two state probability storage means may be the same as the window width in the window processing in the timing relationship shown in FIG. 2 (1), but the window in the timing relationship shown in FIG. 4 (1). Processing requires one more than the window width. Therefore, as shown in FIGS. 4 (2) and 4 (3), it is necessary to prepare a storage area having a width obtained by incrementing the access address by either of the two state probability storage means.

  Thereby, for example, the backward probability at the time point “7” calculated by the second state probability calculation means 104 is stored in the first state probability storage means 107 by the address control means 110 as shown in FIG. The backward probability at the time “0” can be handled as data to be written to the address “1” thereafter.

  Further, the backward probability of the time “15” calculated by the second state probability calculation means 104 is calculated by the address control means 110 by using the address “2” of the second state probability storage means 108 as shown in FIG. The backward probability at the time point “8” can be handled as data to be written at the address “1”.

  Further, as shown in FIG. 4B, the forward probability of the time “40” calculated by the third state probability calculation means 105 is set to the address “0” of the second state probability storage means 108 by the address control means 110. The forward probability at the time point “47” can be treated as data to be written at the address “7”.

  Further, as shown in FIG. 4 (3), the forward probability of the time point “32” calculated by the third state probability calculation means 105 is set to the address “0” of the first state probability storage means 107 by the address control means 110. The forward probability at time “39” can be handled as data to be written to address “7”.

  In such processing, the access addresses to the two state probability storage means are generated in ascending or descending permutation, so in the two state probability storage means, read and write access conflicts occur between even numbers and odd numbers. It will be. In this case, as shown in FIGS. 5 (2) and 5 (3), a storage area of width 9 is prepared in each of the two state probability storage means. Then, as described in the first embodiment, the address control means 110 that determines even / odd of the least significant bit of the address to be accessed divides the storage area with the width 9 into the area with the width 5 and the area with the width 4. Thus, the area of width 5 (FIG. 5 (2)) is used as an even address bank, and the area of width 4 (FIG. 5 (3)) is used as an odd address bank. However, at the start and end of the window width, when one is assigned to the even address bank, the other is assigned to the odd address bank.

  For example, the backward probability at the time point “7” calculated by the second state probability calculation unit 104 is sent to the first state probability storage unit 107 as data to be written at the address “8”. Since the least significant bit of this address number is “0”, that is, an even number, the address control means 110 assigns it to the address “4” of the even address bank as shown in FIG. In this case, the backward probability at the time “0” calculated by the second state probability calculation means 104 is assigned to the address “0” of the bank for odd addresses as shown in FIG.

  Further, the forward probability at the time point “32” calculated by the third state probability calculation unit 105 is sent to the first state probability storage unit 107 as data to be written at the address “0”. Since the least significant bit of this address is “0”, that is, an even number, the address control means 110 assigns it to the address “0” of the even address bank as shown in FIG. In this case, the forward probability at the time “39” calculated by the third state probability calculating means 105 is assigned to the address “3” of the odd address bank as shown in FIG.

  As shown in FIGS. 5 (2) and 5 (3), read and write contention that occurs between even numbers and odd numbers can be avoided by allocating the storage areas appropriately divided into banks according to the lower bits of the access address. it can.

  As described above, according to the second embodiment, even when the access addresses to the two state probability storage units are generated in the ascending permutation or the descending permutation, it is possible to avoid contention between reading and writing.・ Mounting using port memory becomes possible. Although the window width is increased as compared with the first embodiment, the decoding process is not affected.

(Embodiment 3)
FIG. 6 is a time chart for explaining the access timing to the first and second state probability storage means 107 and 108 in the turbo decoding device according to Embodiment 3 of the present invention. 6 (1) is a time chart for explaining a series of processing operations, FIG. 6 (2) is a time chart for explaining access timing to the second state probability storage means 108, and FIG. 6 (3) is a first state. It is a time chart explaining the access timing to the probability memory | storage means 107. FIG.

  FIG. 7 is a diagram for explaining the configuration of the first and second state probability storage means 107 and 108 and the operation of the address control means in the turbo decoding device according to Embodiment 3 of the present invention. FIG. 7 (1) is a copy of the access contents of the first state probability storage means 107 shown in FIG. 6 (3). FIGS. 7 (2) and 7 (3) are diagrams showing access contents of two banks constituting a storage area included in each state probability storage means.

  In the third embodiment, as a processing timing between window processes, a case will be described in which reading and writing to the state probability storage unit are not performed continuously but are performed at intervals. FIG. 6A shows a form in which writing is started at a point delayed by two points from the timing at which reading occurs. In this case, the contents of access to the two state probability storage means are as shown in FIGS.

  Also in the processing mode shown in the third embodiment, the read / write conflict in the state probability storage means occurs at even and odd addresses as in the second embodiment. However, unlike Embodiment 2, in Embodiment 3, the width of the storage area included in each state probability storage means can be configured to be the same width 8 as the window width, as in Embodiment 1. .

  That is, the address control unit 110 manages the storage area with the width of 8 by dividing it into the area with the width of 4, as in the first embodiment (FIG. 3). However, in the third embodiment, the address control unit 110 includes the odd number data calculated by the second state probability calculation unit 104 and the even number data calculated by the third state probability calculation unit 105. Are accessed by the same bank (FIG. 7 (2)) and are calculated by the even-numbered data calculated by the second state probability calculating means 104 and the third state probability calculating means 105. Control is performed so that the odd-numbered data is accessed in the same bank (FIG. 7 (3)). Also in this case, the address control means 110 can make a determination based on the least significant bit of the address.

  As described above, according to the third embodiment, even when reading and writing to the state probability storage means are performed with a time interval, the storage areas are appropriately banked according to the lower bits of the access address. As a result, contention between reading and writing that occurs between even numbers and odd numbers can be avoided, and mounting using a single-port memory becomes possible. Although a delay occurs between the window processes, the delay amount does not affect the decoding process.

  INDUSTRIAL APPLICABILITY The present invention is useful for constructing a turbo decoding device that decodes a data sequence error-corrected by a turbo code at a high speed by MAP decoding with a single port memory while suppressing an increase in memory capacity. This is suitable for a system that requires high-speed decoding with a small-scale circuit, for example, a mobile communication system.

FIG. 1 is a block diagram showing a configuration of a turbo decoding device according to Embodiment 1 of the present invention. Time chart for explaining the access timing to the first and second state probability storage means shown in FIG. The figure explaining the structure of the 1st and 2nd state probability memory | storage means shown in FIG. 1, and operation | movement of the address control means shown in FIG. Time chart for explaining the access timing to the first and second state probability storage means in the turbo decoding device according to the second embodiment of the present invention The figure explaining the structure of the 1st and 2nd state probability memory | storage means and operation | movement of an address control means in the turbo decoding apparatus which concerns on Embodiment 2 of this invention. Time chart for explaining the access timing to the first and second state probability storage means in the turbo decoding device according to Embodiment 3 of the present invention The figure explaining the structure of the 1st and 2nd state probability memory | storage means and operation | movement of an address control means in the turbo decoding apparatus which concerns on Embodiment 3 of this invention. A block diagram showing a configuration example of a conventional turbo decoding device that realizes a sliding window algorithm FIG. 2 is a block diagram showing a configuration example of a conventional turbo decoding device that equally divides a data range in which window processing is repeated a predetermined number of times into two and executes window processing in parallel in each data range Time chart explaining the access timing to the first and second state probability storage means shown in FIG. The figure which shows an example in the case of aiming at further speeding-up of the MAP decoding shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Turbo decoder 101 Input data storage means 102 Transition probability calculation means 103 1st state probability calculation means 104 2nd state probability calculation means 105 3rd state probability calculation means 106 4th state probability calculation means 107 1st State probability storage means 108 Second state probability storage means 109 Memory selection means 110 Address control means 111 First log likelihood calculation means 112 Second log likelihood calculation means 113 External value calculation means 114 External value storage means 115 Output Data storage means

Claims (6)

In a turbo decoding device to which a maximum a posteriori probability decoding method using a sliding window algorithm is applied to error correction decoding of a data sequence error-corrected by a turbo code,
A data range that repeats a predetermined number of times a window process consisting of forward probability calculation and backward probability calculation in units of window ranges is equally divided into an even number, and the data sequence in one data range of two data ranges First window processing means for calculating the backward probability first as window processing and then calculating the forward probability;
Second window processing means for calculating the forward probability first as the window processing for the data string in the other data range, and thereafter calculating the backward probability;
State probability storage means that has two storage areas and stores the calculation result of the backward probability in the first window processing means and the calculation result of the forward probability in the second window processing means,
Log likelihood ratio based on the calculation result of the forward probability in the first window processing means and the calculation result of the backward probability stored in the state probability storage means, and the calculation result of the backward probability in the second window processing means Log likelihood calculation means for calculating a log likelihood ratio based on the calculation result of the forward probability stored in the state probability storage means, and
Between the two storage areas of the state probability storage means, the first window processing means writes the calculation result of the backward probability, and the log likelihood calculation means reads the storage area, and the second window processing A turbo decoding device comprising: memory selecting means for alternately switching a storage area into which a logarithmic likelihood calculating means reads out a calculation result of a forward probability and which is read out by the log likelihood calculating means.   Each of the two storage areas of the state probability storage means is managed by dividing it into a plurality of small areas having a capacity equal to or less than the window width so that writing and reading do not compete in the storage area selected by the memory selection means. 2. The turbo decoding device according to claim 1, further comprising address control means for performing control for assigning addresses to be accessed to the plurality of small areas.   3. The turbo decoding apparatus according to claim 2, wherein the address control means controls the allocation to the plurality of small areas by a logical value of lower bits of an address to be accessed. In a turbo decoding method in which a maximum posterior probability decoding method using a sliding window algorithm is applied to error correction decoding for a data sequence error-corrected by a turbo code,
A data range that repeats a predetermined number of times the window processing consisting of forward probability calculation and backward probability calculation in units of window ranges is equally divided into two data ranges. A first window processing step of calculating the backward probability first as window processing and then calculating the forward probability;
A second window processing step of calculating the forward probability first as the window processing for the data string in the other data range, and then calculating the backward probability;
Storing the calculation result of the backward probability in the first window processing step and the calculation result of the forward probability in the second window processing step respectively in two storage areas of the state probability storage means;
Log likelihood ratio based on the calculation result of the forward probability in the first window processing step and the calculation result of the backward probability stored in the state probability storage means, and the calculation result of the backward probability in the second window processing step And a log likelihood calculation step for calculating a log likelihood ratio based on the calculation result of the forward probability stored in the state probability storage means,
Between the two storage areas of the state probability storage means, a storage area in which the calculation result of the backward probability is written in the first window processing step and read out in the log likelihood calculation step, and the second And a memory selection step of alternately switching a storage area in which a calculation result of a forward probability is written in the window processing step and read out in the log likelihood calculation step for each window processing. Method.   Each of the two storage areas of the state probability storage means is divided into a plurality of small areas having a capacity equal to or smaller than the window width, and writing and reading compete in the storage area selected in the memory selection step. 5. The turbo decoding method according to claim 4, further comprising an address control step of performing control for assigning addresses to be accessed to the plurality of small areas.   6. The turbo decoding method according to claim 5, wherein in the address control step, allocation to the plurality of small areas is controlled by a logical value of lower bits of an address to be accessed.

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