JP2006147977A - Defect review apparatus, defect review method and defect analysis method, and semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a defect review apparatus, a defect review method and a defect analysis method, and a semiconductor device manufacturing method, which can limit inspection purposes and easily specify a process in which a defect occurs.
A defect review apparatus 10 converts a review target area of a semiconductor wafer WF placed on a stage 11 into image data by a review data acquisition mechanism 12. The image memory system 124 sorts the image data of the review target area for each predetermined item and accumulates classification data. The stage control system 141 in the review operation control mechanism 14 selects, for example, only coordinate data that meets a predetermined condition from the mask image database 142 as the review target area from the coordinate data of the defect position obtained by the defect inspection. Thus, the movement and positioning of the stage 11 to the review target area are controlled according to the coordinate data selected by the stage control system 141 in this way.
[Selection] Figure 1

Description

  The present invention relates to semiconductor device manufacturing, and in particular, a defect review apparatus, a defect review method, and a defect for reviewing or analyzing a detected defect based on defect inspection information such as pattern anomaly and foreign matter (particle) adhesion on a semiconductor wafer. The present invention relates to an analysis method and a semiconductor device manufacturing method.

  A semiconductor wafer in an LSI manufacturing process is inspected for the presence of defects in order to improve quality and yield, and a review operation for identifying defects and investigating the cause is performed. The defect inspection in the LSI manufacturing process is generally achieved by comparative inspection. That is, the wafer defect inspection apparatus takes in image data of a non-defective product in the inspection target area and the same pattern area, and calculates a difference image based on pattern matching. As a method for obtaining data of the same pattern area as the inspection object, there are a method of taking data from adjacent chip areas as reference data, a method of using reference data stored in advance using a periodic pattern, and the like.

In the defect inspection, the coordinates of the portion determined to be a defect in the semiconductor wafer are obtained. In the defect review apparatus, defect determination by automatic review is performed based on the coordinates of the defect position obtained by defect inspection. A wafer defect inspection apparatus often detects a huge number of defects. In such a case, the review time increases. Conventionally, various devices have been devised in order to improve review efficiency, such as automatic review and speeding up of defect determination. For example, the review of the electron microscope and the automation of the category classification of the defect are realized. Based on the position information of the defect, the electron beam irradiation condition, the detection condition, and the like are designated according to the type of defect to be observed, from the specification of the wafer observation position to the image formation by electron beam irradiation. Thereby, the information regarding the foreign material and the defect based on the potential contrast is recognized and distinguished (for example, refer to Patent Document 1).
JP 2001-159616 A (FIG. 6)

  Conventionally, defect review devices mainly focus on speeding up the review and specify the defect size and observation chip. Most of the devices aim to improve review efficiency. Defects are caused by which process in the manufacturing process. It does not focus on the analysis.

  SUMMARY OF THE INVENTION The present invention has been made in consideration of the circumstances as described above, and can be used for limiting the purpose of inspection, making it easy to specify a process in which defects occur, a defect review apparatus, a defect review method, a defect analysis method, and a semiconductor device It is intended to provide a manufacturing method.

  A defect review apparatus according to the present invention acquires a stage on which a semiconductor wafer having a review target area is mounted and which can move at least in the X and Y axis directions, and image data of the review target area on the semiconductor wafer, A review data acquisition mechanism for accumulating the classification data, a display mechanism for satisfying recognition regarding the defect review obtained by the review data acquisition mechanism, and a defect position where the review target area is obtained by defect inspection. A review operation control mechanism that is selected according to coordinate data that matches a predetermined condition from the coordinate data and that controls the movement and position determination of the stage.

  According to the defect review apparatus according to the present invention, the review area is limited by the review operation control mechanism. Thereby, it is possible to eliminate reviews of unnecessary areas for a predetermined defect such as a lower layer pattern and pseudo defect handling. As a result, the review accuracy can be improved and the review time can be shortened.

The defect review apparatus according to the present invention preferably has any of the following features, and can improve the review accuracy.
The review operation control mechanism fetches data for setting the predetermined condition from a database storing image data of various mask patterns used in the manufacturing process of the semiconductor wafer.
The review operation control mechanism takes in image data corresponding to a pattern of an arbitrary review target layer in the manufacturing process of the semiconductor wafer as data for setting the predetermined condition.
A storage unit that stores, as a database, image data corresponding to a plurality of review target layer patterns in the manufacturing process of the semiconductor wafer; and the review operation control mechanism takes in data for setting the predetermined condition from the database It is characterized by that.
The display mechanism includes a display for recognizing a process caused by a defect in a manufacturing process of the semiconductor wafer.

  A defect review apparatus according to the present invention acquires a stage on which a semiconductor wafer having a review target area is mounted and which can move at least in the X and Y axis directions, and image data of the review target area on the semiconductor wafer, Review data acquisition mechanism for accumulating classification data, a display mechanism for satisfying recognition regarding defect review obtained by the review data acquisition mechanism, and patterns of a plurality of review target layers in the manufacturing process of the semiconductor wafer A storage unit that stores each image data according to the selection, and the review target area is selected according to coordinate data that matches predetermined image data from the storage unit among coordinate data of defect positions obtained by defect inspection, and A review operation control mechanism in which movement and position determination of the stage are controlled.

  According to the defect review apparatus of the present invention, each image data corresponding to the pattern of the review target layer is accumulated in the storage unit. The review operation control mechanism limits the review area according to the pattern of the review target layer from the storage unit. Thereby, it is possible to eliminate reviews of unnecessary areas for a predetermined defect such as a lower layer pattern and pseudo defect handling. As a result, the review accuracy can be improved and the review time can be shortened.

The defect review apparatus according to the present invention preferably has any of the following features, and can improve the review accuracy.
The storage unit constitutes a database storing image data of various mask patterns used in the manufacturing process of the semiconductor wafer.
The display mechanism includes a display for recognizing a process caused by a defect in a manufacturing process of the semiconductor wafer.

  The defect review method according to the present invention includes a defect inspection process for obtaining a defect position coordinate data of a semiconductor wafer in an arbitrary manufacturing process, and a pattern of an arbitrary review target layer in the manufacturing process of the semiconductor wafer. A step of constructing a plurality of review condition setting data as a database by acquiring corresponding image data, and selected according to the predetermined review condition setting data from the database among the coordinate data by the defect inspection step A review data acquisition step for setting a review target area of the semiconductor wafer according to the coordinate data and performing a review operation on the review target area to accumulate predetermined classification data relating to a defect review, and the review data acquisition step. Related defect review Comprising a display step for satisfying identify the.

  According to the defect review method of the present invention, a plurality of review condition setting data is constructed as a database. The review data acquisition step limits the review area according to the pattern of the review target layer from this database. Thereby, it is possible to eliminate reviews of unnecessary areas for a predetermined defect such as a lower layer pattern and pseudo defect handling. As a result, the review accuracy can be improved and the review time can be shortened.

In the defect review method according to the present invention, more preferably, the review accuracy is improved with any of the following features.
The review condition setting data includes image data corresponding to a mask pattern used in an arbitrary photolithography process during the manufacturing process of the semiconductor wafer.
The review condition setting data includes arbitrary mask pattern design data used in the manufacturing process of the semiconductor wafer.
In the review data acquisition step, coordinate data obtained by the defect inspection step within or outside the range of the review condition setting data is selected and used as the review target region.

  The defect analysis method according to the present invention includes a review data acquisition step of acquiring review data by inspecting a semiconductor wafer in an arbitrary manufacturing process and performing a defect review of key points based on coordinate data of defect positions, and the semiconductor A process of constructing a plurality of review condition setting data as a database by acquiring image data corresponding to a pattern of an arbitrary review target layer during a wafer manufacturing process, and a defect distribution based on analysis target data among the review data A data analysis step for determining whether or not an area selected according to the predetermined data for setting review conditions from the database is relevant on a predetermined condition; and a defect obtained by the data analysis step A display step for satisfying recognition regarding the review, and the data analysis Extent and by each time carried out with the different the review condition setting data, and wherein the associating the defects of interest as the analysis object data in the particular steps during the manufacturing process of the semiconductor wafer.

  According to the defect analysis method according to the present invention, a plurality of review condition setting data is prepared in the database, and the data analysis process can limit the review area according to the review condition setting data. With regard to the defect to be noticed in the defect review, the review state can be considered and examined by setting an area corresponding to appropriate review condition setting data. This review analysis process is performed a plurality of times using different review condition setting data. Thereby, it becomes easy to narrow down the process layer in which the target defect has occurred. This facilitates the identification of which process in the semiconductor wafer manufacturing process is caused by the defect of interest.

  The defect analysis method according to the present invention includes a defect inspection process for obtaining a defect position coordinate data of a semiconductor wafer in an arbitrary manufacturing process, and a pattern of an arbitrary review target layer in the manufacturing process of the semiconductor wafer. A step of constructing a plurality of review condition setting data as a database by acquiring corresponding image data, and selected according to the predetermined review condition setting data from the database among the coordinate data by the defect inspection step A review data acquisition step for setting a review target area of the semiconductor wafer according to the coordinate data and performing a review operation on the review target area to accumulate predetermined classification data relating to a defect review, and the review data acquisition step. Perceived defect review A display step for satisfying the manufacturing, and performing the review data acquisition step a plurality of times using different review condition setting data, thereby manufacturing a defect of interest in the defect review of the semiconductor wafer. It is characterized by being associated with a specific process in the process.

  According to the defect analysis method of the present invention, a plurality of review condition setting data are prepared in the database, and the review data acquisition step can limit the review area according to the review condition setting data. For the defect to be noticed in the defect review, review data is acquired according to appropriate review condition setting data. This review data acquisition step is performed a plurality of times using different review condition setting data. Thereby, it is possible to easily narrow down the process layers in which the target defect occurs. Thereby, it becomes easy to specify which process in the manufacturing process of the semiconductor wafer is caused by the defect of interest.

In the above-described defect analysis methods according to the present invention, more preferably, the defect analysis method has any one of the following features and contributes to appropriate review and high-reliability analysis.
The review condition setting data is image data corresponding to a mask pattern used in an arbitrary photolithography process in the manufacturing process of the semiconductor wafer, and the image data is generated from design data.
The review condition setting data is image data corresponding to a mask pattern used in an arbitrary photolithography process during the manufacturing process of the semiconductor wafer, and the image data is a bare wafer equivalent to the separately prepared semiconductor wafer. A film to be etched is attached and obtained by patterning through the photolithography process.
The display mechanism includes a display for recognizing at least one of the manufacturing steps of the semiconductor wafer caused by the defect of interest.

  A method for manufacturing a semiconductor device according to the present invention includes a defect inspection process for inspecting a semiconductor wafer in an arbitrary manufacturing process and obtaining coordinate data of a defect position, and an arbitrary review target layer in the manufacturing process of the semiconductor wafer. A step of constructing a plurality of review condition setting data as a database by acquiring image data corresponding to the pattern, and according to the predetermined review condition setting data from the database among the coordinate data by the defect inspection step A review data acquisition step of setting a review target region of the semiconductor wafer according to the selected coordinate data, and accumulating predetermined classification data relating to defect review by performing a review operation on the review target region, and the review data acquisition step The defect review obtained by A display process for satisfying the recognition of the semiconductor wafer, and elucidating a cause of the defect to be noticed in the defect review from the display process and eliminating the defect in the semiconductor wafer manufacturing process. Any one of the processes is adjusted or changed.

BEST MODE FOR CARRYING OUT THE INVENTION

  FIG. 1 is a block diagram showing a main part of the defect review apparatus according to the first embodiment of the present invention. The defect review apparatus 10 is an apparatus for reviewing defects in the semiconductor wafer WF that has undergone defect inspection. The stage 11 is movable at least in the X and Y axis directions, and a semiconductor wafer WF having a review target area is placed thereon. The review data acquisition mechanism 12 includes an optical microscope 121 having an objective lens group and a CCD camera 122. As a result, the review target area of the semiconductor wafer WF is converted into image data. The alignment unit 123 is used for coordinate alignment of the semiconductor wafer WF. Further, the review data acquisition mechanism 12 includes an image memory system 124, and sorts the image data in the review target area for each predetermined item and accumulates classification data. Regarding the storage of such review data, as the classification data, for example, sorting by defect size, assigned category No. Sort by defect, defect type, etc. Sort by. In accordance with these sorts, photo shooting and photo storage data are attached. The image display system 13 is a display mechanism related to the defect review obtained by the review data acquisition mechanism 12. The image display system 13 displays, for example, a defect map indicating the defect coordinates of the entire wafer, a display of a designated review area, a review image corresponding to the defect, detailed information on the defect, and the like, and satisfies recognition regarding the defect review. Display is made.

  The review operation control mechanism 14 includes a stage control system 141 that controls the operation of the stage 11. The stage control system 141 acquires the coordinate data of the defect position obtained by the defect inspection and contributes to the movement and positioning of the stage 11. Furthermore, the stage control system 141 acquires predetermined condition pattern data from the mask image database 142 and acts on the movement and positioning of the stage 11. For example, the stage control system 141 selects, as the review target area, only the coordinate data that matches the predetermined condition from the mask image database 142 out of the coordinate data of the defect position obtained by the defect inspection. As a result, defects that are not selected are excluded from the review candidates. The movement and positioning of the stage 11 to the review target area are controlled according to the coordinate data selected by the stage control system 141 in this way.

  The mask image database 142 is a database in which image data of various mask patterns used in the manufacturing process of the semiconductor wafer WF is accumulated. The mask image database 142 is also a database in which image data corresponding to a pattern of an arbitrary review target layer in the manufacturing process of the semiconductor wafer WF is accumulated. A configuration in which the mask image database 142 is all provided as a storage unit in the defect review apparatus 10 can be considered. Alternatively, the mask image database 142 may have a configuration in which the main body is outside the defect review apparatus 10 and only necessary data is taken into the storage unit in the defect review apparatus 10.

  The stage control system 141 designates the review area in the chip of the semiconductor wafer WF according to the pattern area from the mask image database 142. That is, for a predetermined layer of a semiconductor wafer having a certain defect distribution, a predetermined mask pattern layer extracted from the mask image database 142 is superimposed on the data, and the inside or outside of the overlapped area is selectively reviewed. As a result, it becomes easy to understand which process pattern the defect having the same appearance depends on, and an effective review can be performed for specifying the defect generation process. By such a review technique, the image display system 13 may include a display for recognizing a process caused by a defect in a manufacturing process of a semiconductor wafer.

  According to the configuration of the defect review apparatus of the above embodiment, the review area is limited by the review operation control mechanism 14. That is, in the mask image database 142, image data of each mask pattern used in the manufacturing process of the semiconductor wafer WF or each image data corresponding to the pattern of the review target layer is accumulated. The review operation control mechanism 14 limits the review area according to the image data. Thereby, it is possible to eliminate reviews of unnecessary areas for a predetermined defect such as a lower layer pattern and pseudo defect handling. As a result, the review accuracy can be improved and the review time can be shortened.

FIG. 2 is a flowchart showing a main part of the defect review method according to the second embodiment of the present invention.
The semiconductor wafer undergoes a defect inspection process (S101). That is, the semiconductor wafer has a defect inspected in an arbitrary layer in the manufacturing process, and has a review target region with coordinate data of the defect position.

  Further, a plurality of review condition setting data is constructed as a database (S102). That is, image data corresponding to a pattern of an arbitrary review target layer during the manufacturing process of the semiconductor wafer is acquired, and a region designation variation in the chip is created. Such review condition setting data is obtained, for example, as follows. A pattern of an arbitrary layer to be reviewed on a semiconductor wafer is revealed as a photoresist pattern by a photolithography process, and image data corresponding to the pattern is acquired. Alternatively, a film to be etched is attached to a bare wafer equivalent to a semiconductor wafer, and an arbitrary review target layer is patterned through a photolithography process and an etching process, and image data corresponding to the pattern is acquired. In addition, image data may be acquired from mask pattern design data and mask data. Image data of a required pattern during such a semiconductor wafer manufacturing process is stored in a database. That is, it is the same as the mask image database 142 shown in FIG.

  Next, a review target area is selected using the coordinate data of the defect position acquired by the defect inspection and the image data of the required pattern during the semiconductor wafer manufacturing process (S103). A review operation is performed according to the selected review target area (S104). Thereby, the review data is sequentially acquired (S105), and necessary review data is stored (S106). If the requested review data is not collected, the processing of S103 to S106 may be repeated (S107). Thereafter, review display according to necessary review data is made (S108). Further, if it is necessary to review the contents of the review display, the processing of S103 to S106 may be repeated (S107).

  When reaching the review operation S104, alignment (coordinate alignment) on the stage when loading the semiconductor wafer, alignment between the pattern of the selected review target layer and the defect map of the coordinate data of the defect position, and the review range Need to be fine-tuned. For example, a series of operations are controlled by the review operation control mechanism 14 of FIG. 1, the review data acquisition mechanism 12 acquires review data (S105), and necessary review data is stored (S106). The review display in S108 is, for example, a defect map indicating the defect coordinates of the entire wafer, display of a specified review area, review image corresponding to the defect, defect size, type, etc. in the image display system 13 of FIG. Detailed information such as the classification and the number of defects is displayed, and a display satisfying the recognition regarding the defect review is made. Further, the review display in S108 may include a display for recognizing a process caused by the defect in the manufacturing process of the semiconductor wafer in accordance with the recognition regarding the defect review.

  According to the defect review method of the above embodiment, a plurality of review condition setting data is constructed as a database. The review data acquisition step S105 limits the review area according to the pattern of the review target layer from this database. That is, of the coordinate data of the defect position, coordinate data within or outside the range of the review condition setting data is selected and set as the review target area. Thereby, it is possible to eliminate reviews of unnecessary areas for a predetermined defect such as a lower layer pattern and pseudo defect handling. As a result, the review accuracy can be improved and the review time can be shortened.

FIG. 3 is a flowchart showing the main part of the defect analysis method according to the third embodiment of the present invention. FIG. 4 is a block diagram illustrating an example of a defect inspection result analysis system.
The semiconductor wafer has undergone a defect inspection process and has been reviewed according to the defect. Thereby, necessary review data is acquired (S201). As shown in FIG. 4, the review data includes, for example, classification data after defect inspection review and review image data, and is stored as an inspection result database. Among them, the review data to be analyzed is read into the analysis computer 41.

  Also, a plurality of review condition setting data is constructed as a database (S202). That is, image data corresponding to a pattern of an arbitrary review target layer during the manufacturing process of the semiconductor wafer is acquired, and a region designation variation in the chip is created. Such review condition setting data is obtained, for example, as follows. A pattern of an arbitrary layer to be reviewed on a semiconductor wafer is revealed as a photoresist pattern by a photolithography process, and image data corresponding to the pattern is acquired. Alternatively, a film to be etched is attached to a bare wafer equivalent to a semiconductor wafer, and an arbitrary review target layer is patterned through a photolithography process and an etching process, and image data corresponding to the pattern is acquired. In addition, image data may be acquired from mask pattern design data and mask data. Image data of a required pattern during such a semiconductor wafer manufacturing process is stored in a database. That is, it is the same as the mask image database 142 shown in FIG. In FIG. 4, image data corresponding to a required pattern (mask pattern) in the manufacturing process of the semiconductor wafer is taken into the analysis computer 41 from the mask image database. Further, the image data from the mask image database may be related to the inspection result database as necessary (broken line in FIG. 4).

  Next, a review analysis region is selected using the review data to be analyzed and image data of a required pattern during the semiconductor wafer manufacturing process (S203). According to the selected review analysis area, review display according to necessary review data is made (S204). The review display requires data alignment between the pattern range of the selected review target layer and the defect map to be analyzed. This review display reveals detailed information such as the defect map, the display of the designated review area, the review image corresponding to the defect, the classification of the defect size and type, the number of defects, and the like.

  Regarding the distribution of the defect of interest based on the review data to be analyzed, the details of the review are examined each time using different review condition setting data (S205). As a result, it becomes easy to narrow down which pattern in the semiconductor wafer manufacturing process depends on the defect of interest. Through such a data analysis process, a defect to be noticed as analysis target data is associated with a specific process in the manufacturing process of the semiconductor wafer. In addition, in this data analysis process, as shown in FIG. 4, you may consider the electrical property test result by a probe test | inspection, and the information of other apparatuses.

  According to the defect analysis method of the above-described embodiment, a plurality of review condition setting data is prepared in the database (mask image database), and the data analysis process can specify a region in the chip according to the review condition setting data. It is. With regard to the defect to be noticed in the defect review, the review state can be considered and examined by setting an area corresponding to appropriate review condition setting data. This review analysis process is performed a plurality of times using different review condition setting data. Thereby, it becomes easy to narrow down the process layer in which the target defect has occurred. Thereby, it becomes easy to specify which process in the manufacturing process of the semiconductor wafer is caused by the defect of interest.

  If the operation of the defect review method shown in FIG. 2 is used, a defect analysis method similar to the defect analysis method of the second embodiment can be obtained. In particular, in step S107 in FIG. 2, if a review target region is selected in steps S102 and S103 in order to narrow down the process layer in which the target defect has occurred, defect analysis is performed. Thereby, it becomes easy to specify which process in the manufacturing process of the semiconductor wafer is caused by the defect of interest.

  As described above, according to the present invention, by constructing a mask image database, a review target region is defined using image data corresponding to various mask patterns and review target layer patterns used in the manufacturing process of the semiconductor wafer WF. specify. As a result, it is possible to eliminate the review of the unnecessary area for the predetermined defect such as the defect of the lower layer pattern and the handling of the pseudo defect in the defect of the predetermined layer related to the semiconductor wafer manufacturing process. As a result, the review accuracy can be improved and the review time can be shortened. In addition, by appropriately limiting the review target area, it is possible to narrow down the process layer in which the defect of interest has occurred, and to identify which process in the semiconductor wafer manufacturing process is caused by the defect. And contributes to shortening the time for defect analysis. In addition, it is possible to quickly adjust or change any one of the manufacturing processes of the semiconductor wafer in order to clarify the cause of the target defect from the display relating to the review and eliminate the target defect in the manufacturing process of the semiconductor wafer. As a result, the semiconductor device manufacturing method also has a positive effect such as reliability and yield. As a result, it is possible to provide a defect review apparatus, a defect review method and a defect analysis method, and a semiconductor device manufacturing method that can limit the inspection purpose and easily specify a process in which a defect occurs.

The block diagram which shows the principal part of the defect review apparatus which concerns on 1st Embodiment. The flowchart which shows the principal part of the defect review method which concerns on 2nd Embodiment. The flowchart which shows the principal part of the defect analysis method which concerns on 3rd Embodiment. The block diagram which shows an example of a defect inspection result analysis system.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Defect review apparatus, 11 ... Stage, 12 ... Review data acquisition mechanism, 121 ... Optical microscope, 122 ... CCD camera, 123 ... Alignment part, 124 ... Image memory system, 13 ... Image display system, 14 ... Review operation control Mechanism: 141 ... Stage control system, 142 ... Mask image database, 41 ... Computer for analysis, S101 to S108, S201 to S205 ... Processing steps.

Claims (18)

A stage on which a semiconductor wafer having a review target area is placed and movable in at least the X and Y axis directions;
A review data acquisition mechanism for acquiring image data of the review target area on the semiconductor wafer and storing predetermined classification data;
A display mechanism for satisfying recognition regarding the defect review obtained by the review data acquisition mechanism;
A review operation control mechanism in which the review target area is selected according to coordinate data that matches a predetermined condition among coordinate data of a defect position obtained by defect inspection, and movement and position determination of the stage are controlled;
Including defect review equipment. The defect review apparatus according to claim 1, wherein the review operation control mechanism takes in data for setting the predetermined condition from a database in which image data of various mask patterns used in the manufacturing process of the semiconductor wafer is accumulated. The defect review apparatus according to claim 1, wherein the review operation control mechanism takes in image data corresponding to a pattern of an arbitrary review target layer in the manufacturing process of the semiconductor wafer as data for setting the predetermined condition. A storage unit that stores, as a database, image data corresponding to a plurality of review target layer patterns in the manufacturing process of the semiconductor wafer; and the review operation control mechanism takes in data for setting the predetermined condition from the database The defect review apparatus according to claim 1. The defect review apparatus according to claim 1, wherein the display mechanism includes a display for recognizing a process caused by a defect in a manufacturing process of the semiconductor wafer. A stage on which a semiconductor wafer having a review target area is placed and movable in at least the X and Y axis directions;
A review data acquisition mechanism for acquiring image data of the review target area on the semiconductor wafer and storing predetermined classification data;
A display mechanism for satisfying recognition regarding the defect review obtained by the review data acquisition mechanism;
A storage unit storing each image data according to a plurality of review target layer patterns in the manufacturing process of the semiconductor wafer,
A review operation control mechanism in which the review target region is selected according to coordinate data that matches predetermined image data from the storage unit among coordinate data of defect positions obtained by defect inspection, and movement and position determination of the stage are controlled. When,
Including defect review equipment. The defect review apparatus according to claim 6, wherein the storage unit constitutes a database that stores image data of various mask patterns used in the manufacturing process of the semiconductor wafer. The defect review apparatus according to claim 6, wherein the display mechanism includes a display for recognizing a process caused by a defect in a manufacturing process of the semiconductor wafer. A defect inspection process for inspecting a semiconductor wafer in an arbitrary manufacturing process and obtaining coordinate data of a defect position;
Building a plurality of review condition setting data as a database by acquiring image data according to the pattern of any review target layer during the manufacturing process of the semiconductor wafer;
Selecting the review target area of the semiconductor wafer according to the coordinate data selected according to the predetermined review condition setting data from the database among the coordinate data obtained by the defect inspection step, and performing a review operation on the review target area A data acquisition process for review that accumulates predetermined classification data related to defect review by
A display step for satisfying the recognition about the defect review obtained by the review data acquisition step;
Including defect review methods. The defect review method according to claim 9, wherein the review condition setting data includes image data corresponding to a mask pattern used in an arbitrary photolithography process in the manufacturing process of the semiconductor wafer. The defect review method according to claim 9, wherein the review condition setting data includes arbitrary mask pattern design data used in a manufacturing process of the semiconductor wafer. 12. The review data acquisition process according to claim 9, wherein coordinate data obtained by the defect inspection process within or outside the range of the review condition setting data is selected as the review target area. Defect review method. A review data acquisition process for acquiring review data by inspecting a semiconductor wafer in an arbitrary manufacturing process and performing a defect review on key points based on the coordinate data of the defect position;
Building a plurality of review condition setting data as a database by acquiring image data according to the pattern of any review target layer during the manufacturing process of the semiconductor wafer;
Data analysis for determining whether or not a defect distribution based on analysis target data in the review data and an area selected in accordance with the predetermined review condition setting data from the database are related under a predetermined condition Process,
A display step for satisfying the recognition regarding the defect review obtained by the data analysis step,
A defect characterized by associating a defect of interest as the analysis target data with a specific process in the manufacturing process of the semiconductor wafer by performing the data analysis step each time using different review condition setting data analysis method. A defect inspection process for inspecting a semiconductor wafer in an arbitrary manufacturing process and obtaining coordinate data of a defect position;
Building a plurality of review condition setting data as a database by acquiring image data according to the pattern of any review target layer during the manufacturing process of the semiconductor wafer;
The review target area of the semiconductor wafer is set according to the coordinate data selected according to the predetermined review condition setting data from the database among the coordinate data obtained by the defect inspection process, and the review operation is performed on the review target area. A data acquisition process for review that accumulates predetermined classification data related to defect review by
A display step for satisfying the recognition regarding the defect review obtained by the review data acquisition step, and
The review data acquisition step is performed each time using different review condition setting data, thereby associating a defect of interest in the defect review with a specific step in the manufacturing process of the semiconductor wafer, Defect analysis method. 15. The review condition setting data is image data corresponding to a mask pattern used in an arbitrary photolithography process during the manufacturing process of the semiconductor wafer, and the image data is generated from design data. Defect analysis method. The review condition setting data is image data corresponding to a mask pattern used in an arbitrary photolithography process during the manufacturing process of the semiconductor wafer, and the image data is a bare wafer equivalent to the separately prepared semiconductor wafer. The defect analysis method according to claim 13, wherein the defect analysis method is obtained by attaching a film to be etched and patterning through the photolithography process. The defect analysis method according to any one of claims 13 to 16, wherein the display mechanism includes a display for recognizing at least one of the manufacturing steps of the semiconductor wafer caused by the defect of interest. A defect inspection process for inspecting a semiconductor wafer in an arbitrary manufacturing process and obtaining coordinate data of a defect position;
Building a plurality of review condition setting data as a database by acquiring image data according to the pattern of any review target layer during the manufacturing process of the semiconductor wafer;
The review target area of the semiconductor wafer is set according to the coordinate data selected according to the predetermined review condition setting data from the database among the coordinate data obtained by the defect inspection process, and the review operation is performed on the review target area. A data acquisition process for review that accumulates predetermined classification data related to defect review by
A display step for satisfying the recognition regarding the defect review obtained by the review data acquisition step, and
A manufacturing method of a semiconductor device in which the cause of a defect to be noticed in the defect review is clarified from the display step, and any one of the manufacturing steps of the semiconductor wafer is adjusted or changed to eliminate the defect in the manufacturing step of the semiconductor wafer .

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