JP2006126858A - Multipoint autofocus apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain optimum detection data with simple configuration even if a subject of low luminance in a multipoint autofocus apparatus. <P>SOLUTION: The multipoint autofocus apparatus is provided with a plurality of light receiving means which receive light of a subject image in a plurality of focus detection zones and integrates charge obtained by photoelectric conversion of the light, a measuring means for measuring integral time of each light receiving means, a monitoring means for monitoring integral value by the light receiving means and an integral controlling means which terminates integral by the light receiving means when the integral value by the monitoring means reaches a prescribed value, changes the prescribed value by stages at the time of elapse of maximum integral time set in advance, compares the integral value by the monitoring means with the changed prescribed value and finally compulsively terminates integral by all light receiving means where the prescribed value is not yet reached. Further the multipoint autofocus apparatus is provided with a gain setting means which sets gain of the integral value by the light receiving means where the prescribed value is not yet reached at the time of elapse of maximum integral time by comparing with the corrected prescribed value corrected by an integral value error correction value of the corresponding monitoring means. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a multi-point autofocus device for an optical apparatus such as a camera that can detect a focus state of subjects in a plurality of focus detection zones.

  A multipoint autofocus device that can detect the focus of a subject in a plurality of focus detection zones receives a subject image with a line sensor (light receiving means) having a large number of light receiving elements (for example, photodiodes) in each focus detection zone. Then, the charge is integrated by photoelectric conversion. When the integration value of each line sensor reaches a predetermined value, the integration of the line sensor ends, but the line sensor in which the subject in the focus detection zone does not reach the predetermined value with low brightness until the predetermined value is reached. Alternatively, the integration was continued until the predetermined maximum integration time passed, whichever comes first. For line sensors whose integrated value has not reached the predetermined value when the maximum integration time has elapsed, the predetermined value is reduced step by step, and the integrated value is compared with the predetermined value which has been lowered by one step and the integrated value. The process of increasing the value gain (amplification degree) stepwise was performed a plurality of times until the integrated value reached a predetermined value that was decreased stepwise, and line sensors that did not reach the predetermined value were forcibly terminated. .

  However, the detection of the end of integration does not directly use the integrated value of the line sensor, but uses the integrated value of the monitor sensor disposed adjacent to each line sensor. That is, the integration time of the line sensor is controlled by monitoring the integration value of the monitor sensor on the assumption that the integration value of the monitor sensor maintains a certain relationship with the integration value of the line sensor.

However, there are cases where the characteristics of the monitor sensor and the line sensor deviate from the design values, and the integration of the line sensor cannot be controlled accurately. In view of this, an invention has been proposed in which the error between the monitor sensor and the line sensor is corrected by correcting the integral value of the monitor sensor (Patent Document 1).
Japanese Patent Application No. 8-43716

  However, in the past, if the integration value of the monitor sensor did not reach the predetermined value when the predetermined integration time had elapsed, the integration end value was lowered stepwise and the gain was raised stepwise. Even if the value does not reach the integration end value slightly, the gain will increase by one step, so the range of the integrated value that has been gained will exceed the processable range, and the integrated value in the bright area will be cut off. was there.

  Further, the conventional invention for correcting the integral value for each monitor sensor has a problem that a correction means is provided for each monitor sensor, and the number of parts increases and the circuit becomes complicated.

  The present invention has been made in view of the above problems of the conventional multipoint autofocus device, and in particular, obtains a multipoint autofocus device that can obtain optimum detection data with a simple configuration even in the case of a low-luminance subject. For the purpose.

  The present invention that achieves this object is to receive a subject image in a plurality of focus detection zones, integrate a plurality of light receiving means for integrating photoelectrically converted charges, a measuring means for measuring the integration time of each light receiving means, and each light receiving The monitor means is arranged close to the means, receives the subject image in the focus detection zone, integrates and monitors the integrated value of the corresponding light receiving means, and responds when the integrated value by the monitor means reaches a predetermined value The integration of the light receiving means is terminated, the predetermined value is changed stepwise when a preset maximum integration time elapses, the changed predetermined value is compared with the integrated value by the monitoring means, and finally the predetermined value is obtained. An autofocus device having an integration control means for forcibly terminating the integration of all the light receiving means that have not reached, the gain of the integral value of the light receiving means not reaching the predetermined value when the maximum integration time has elapsed, The integration value error correction value of said monitor means for response characterized in that it comprises a gain setting means for setting as compared to the predetermined value after correction by correcting the predetermined value.

  According to the present invention, the gain of the integral value of the light receiving means that has not reached the predetermined value when the maximum integration time has elapsed is corrected by correcting the predetermined value with the correction value for correcting the integral value error of the corresponding monitor means. Since it is set in comparison with a later predetermined value, there is no possibility of excessive gain setting even if the predetermined value is not reached when the maximum integration time has elapsed.

  The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a main configuration of an automatic focus (AF) single-lens reflex camera to which the present invention is applied. This AF single-lens reflex camera includes a camera body 11 and an AF-compatible photographic lens 51 that can be attached to and detached from the camera body 11. The camera body 11 includes so-called multipoint autofocus means (multipoint focus detection means) and automatic focus adjustment means.

  Most of the subject luminous flux incident into the camera body 11 from the photographing lens 51 is reflected by the main mirror 13 toward the pentaprism 17 constituting the finder optical system, and is reflected by the pentaprism 17 and exits from the eyepiece. A part of the reflected light reflected by the main mirror 13 enters the light receiving element of the photometry IC 18. On the other hand, a part of the subject luminous flux incident on the half mirror portion 14 of the main mirror 13 is transmitted therethrough, reflected downward by the sub mirror 15 and incident on the multi-focus detection sensor unit 21.

  The photometric IC 18 logarithmically compresses the electrical signal photoelectrically converted in accordance with the amount of received light, and inputs it as a photometric signal to the main CPU 35 via the peripheral control circuit 23. The main CPU 35 executes a predetermined exposure calculation based on the photometry signal and the film sensitivity information, and calculates an appropriate shutter speed and aperture value for exposure. Then, based on these shutter speed and aperture value, photographing processing, that is, the exposure mechanism (shutter mechanism) 25 and the aperture mechanism 27 are driven to expose the film. Further, the peripheral control circuit 23 drives the mirror motor 31 via the motor drive circuit 29 to perform up / down processing of the main mirror 13 during the photographing process, and drives the film winding motor 33 after the exposure is completed. Roll up the film by one frame.

  The multi-focus detection sensor unit 21 is a so-called phase difference type distance measuring sensor. Although not shown, the multi-focus detection sensor unit 21 divides a subject light beam that forms a subject image included in a plurality of distance measuring zones in a photographing screen into two parts. The system includes sensors 212 </ b> A to 212 </ b> C that receive and integrate (photoelectric conversion and accumulation of charges thereof) each of the subject light beams divided into two.

  The main CPU 35 calculates the defocus amount by a predetermined calculation based on the integration data corresponding to each focus detection zone input from the multi-focus detection sensor unit 21. Then, based on these defocus amounts, the defocus amounts to be used and the priority order are set, and the rotation direction and the number of rotations of the AF motor 39 (number of pulses output by the encoder 41) are calculated. The main CPU 35 drives the AF motor 39 via the AF motor drive circuit 37 based on the rotation direction and the number of pulses. During this driving, the main CPU 35 detects and counts the pulses output from the encoder 41 in conjunction with the rotation of the AF motor 39, and stops the AF motor 39 when the count value reaches the number of pulses.

  The main CPU 35 can perform constant speed control by PWM control of the AF motor 39 based on the DC drive and the output pulse interval of the encoder 41 before stopping. The AF motor 39 transmits the rotation to the photographing lens 51 side through a connection between a joint 47 provided on the mount portion of the camera body 11 and a joint 57 provided on the mount portion of the photographing lens 51. Then, the focus adjustment lens 53 is moved forward and backward through the lens driving mechanism 55.

  The main CPU 35 includes a ROM 35a storing programs and the like, a RAM 35b temporarily storing predetermined data for calculation and control, a reference timer 35c for timing, a hard counter 35d, and an A / D converter 35e. An EEPROM 43 as an external memory means is connected. In addition to various constants specific to the camera body 11, the EEPROM 43 stores predetermined values necessary for integral control of the present invention.

  Further, the main CPU 35 includes a metering switch SWS that is turned on when a release button (not shown) is half-pressed, a release switch SWR that is turned on when the release button is fully pressed, an auto-focus switch SWAF that switches between automatic focus control and manual focus control, A main switch SWM for turning on / off the power to peripheral devices is connected. The main CPU 35 displays the set AF, exposure, shooting mode, shutter speed, aperture value, and the like on the display 45. The display unit 45 usually includes displays provided at two locations within the outer surface of the camera body 11 and the viewfinder field.

  The main CPU 35 functions as a control unit that comprehensively controls the camera body and the photographing lens, and constitutes an integration control unit with the multi-focus detection sensor unit 21, the peripheral control circuit 23, and the like, and an AF motor 39. Etc. constitute lens driving means.

  On the other hand, the photographic lens 51 is provided with a focus adjustment mechanism 55 for driving the focus adjustment lens 53 in the optical axis direction and a mount portion of the photographic lens 51, and is connected to the joint 47 of the camera body 11. A lens-side joint 57 that transmits the rotation to the focus adjustment mechanism 55 and a lens CPU 61 are provided.

  The lens CPU 61 is connected to the peripheral control circuit 23 of the camera body 11 through the connection of the electrical contact groups 59 and 49, and predetermined data is transmitted to the main CPU 35 through the peripheral control circuit 23. Execute communication. The data transmitted from the lens CPU 61 to the peripheral control circuit 23 includes a controllable open aperture value Av (open f converted value of apex), maximum aperture value Av (minimum aperture F value apex converted value), lens There are position, K value data, and the like. The K value data is the number of pulses (AF) output by the encoder 41 while the image plane formed by the photographing lens 51 is moved by a unit distance (for example, 1 mm) in the optical axis direction by driving the AF motor 39. The number of rotations of the motor 39).

  This single-lens reflex camera starts AF processing when the photometric switch SWS is turned on. In the AF process, first, the multi-focus detection sensor unit 21 starts integration. After the integration is completed, the main CPU 35 inputs the integration data, calculates the defocus amount and the drive pulse number based on the data, and drives the AF motor 39 based on the drive pulse number.

  Although not shown, the multi-focus detection sensor unit 21 is incident with subject light that is incident from the photographing lens 51, passes through the central half mirror portion 14 of the main mirror 13, and is reflected by the sub mirror 15. The subject light incident on the multi-focus detection sensor unit 21 forms an image on the secondary imaging plane conjugate with the film surface or on the front and back positions thereof, and is formed at a plurality of positions on the mask arranged on the secondary imaging plane. The light is transmitted through the three windows and formed on different light receiving means (see FIG. 2). Each of the three windows regulates the focus detection zone, and each light beam contained in each focus detection zone is divided into two by a splitting optical system (not shown) and is received by each light receiving means arranged on the re-imaging plane. Imaged.

  The configuration of the multi-focus detection sensor unit 21 will be described in more detail with reference to FIG. The multi-focus detection sensor unit 21 includes one CCD transfer unit 211 and three light receiving units that are adjacent to the CCD transfer unit 211 and spaced apart from each other in the longitudinal direction of the CCD transfer unit 211. A sensor 212A, B sensor 212B, and C sensor 212C. Each of the A, B, and C sensors 212A, 212B, and 212C includes a pair of light receiving portions A1 and A2, B1 and B2, and C1 and C2. A subject image divided into two by the dividing optical system is formed on each of the pair of light receiving portions A1 and A2, B1 and B2, and C1 and C2. Each of the light receiving portions A1 and A2, B1 and B2, and C1 and C2 is formed of, for example, a photodiode array (pixel array) provided in a line at regular intervals. In the illustrated embodiment, three pairs of light receiving portions A1 and A2, B1 and B2, and C1 and C2 are shown apart from each other, but a pair of light receiving portions A1 and A2, B1 and B2, and C1 and C2 are shown. Each may have a continuous configuration.

  Although not shown in detail, each sensor 212A, 212B, 212C is independent of the charge photoelectrically converted by each photodiode of each light receiving unit A1, A2, B1, B2, C1, C2 for each photodiode. A storage unit that integrates (accumulates) and a memory unit that temporarily stores charges accumulated in the storage unit when integration is completed. In other words, photodiodes photoelectrically convert after receiving subject light, and the charges photoelectrically converted by each photodiode are integrated in the storage unit, and the charges integrated in the storage unit are transferred to the memory unit and stored when integration is completed. Is done. When the integration of all the sensors 212A, 212B, and 212C is completed, the charges held in the memory units are transferred to the CCD transfer unit 211 all at once. A number of electrodes (not shown) are formed in the CCD transfer unit 211 at regular intervals, and charges are transferred stepwise in pixel units by two-phase transfer clocks φ1 and φ2 applied to these electrodes. The voltage is converted and output in units of pixels from the output conversion unit (reading unit) 213 of the transfer unit 211.

  The voltage signal output from the output conversion unit 213 is amplified by the amplifier 226, and is output by the clamp circuit 227 as a video signal VIDEO converted into a voltage signal that drops from the video reference level. The output video signal VIDEO is captured by the CPU 35, converted into a digital signal by the A / D converter 35e, stored in the RAM 35b in pixel units, read from the RAM 35b, and used for defocus calculation.

  Further, in order to control the integration time (end of integration) of each of the sensors 212A to 212C in accordance with the brightness of the subject, the integration value of each of the sensors 212A, 212B, 212C ( An A monitor sensor MA, a B monitor sensor MB, and a C monitor sensor MC are provided for monitoring the amount of received light. A monitor dark sensor MD is provided adjacent to the first light receiving part B1 of the B sensor 212B. The monitor sensors MA, MB, and MC are sensors that receive subject light and output integrated values in the same manner as the sensors 212A, 212B, and 212C. The integrated values are detected by the integration control circuits 225A, 225B, and 225C. The On the other hand, the monitor dark sensor MD is a sensor that obtains a signal for removing dark current components of the monitor sensors MA, MB, and MC, and is shielded from light.

  The monitor sensors MA, MB, and MC of the present embodiment are monitor sensors M1 to M5, M6 to M10, and M11 that receive light by dividing one of the light receiving portions A2, B2, and C2 of the sensors 212A, 212B, and 212C into 5 parts. ~ M15 included.

  Integration operation (charge accumulation) of the A, B, C sensors 212A, 212B, 212C, transfer of charges (integral value) from the A, B, C sensors 212A, 212B, 212C to the CCD transfer unit 211, CCD transfer unit The charge transfer in 211, the conversion from charge to voltage in the output conversion unit 213, the clamp processing by the clamp circuit 227, and the like are performed by a clock (pulse signal) output from the CCD control circuit 221, the timing generation circuit 222, and the driver circuit 223. Made.

  The integral control processing of this single-lens reflex camera is started on condition that the photometry switch SWS is turned on. When the photometric switch SWS is turned on, the CCD control circuit 221 raises the integration start signal φINT based on the communication data output from the CPU 35, and the sensors 212A, 212B, 212C and the monitor sensors MA, MB, MC start integration. FIG. 3 and FIG. 4 show examples of timing charts related to integration control.

  When the integration control circuits 225A to 225C detect that the integration values of the monitor sensors MA to MC exceed a preset integration end level VRM and output an integration end signal END-AEND-C, the sensors 212A to 212C end the integration (see FIG. 3). In this embodiment, when any one of the five monitor sensors M1 to M5, M6 to M10, and M11 to M15 of the monitor sensors MA, MB, and MC reaches the integration end level VRM, The integration control circuits 225A, 225B, and 225C end the integration of the corresponding sensors 212A, 212B, and 212C. The integration end level VRM is a signal determined by the reference signal VAGC output from the main CPU 35 via the peripheral control circuit 23 and the dark current MD output from the monitor dark sensor MD.

  When integration of all the sensors 212A, 212B, and 212C is completed, the driver circuit 223 outputs a transfer pulse φTG, and the signal charges integrated by the sensors 212A, 212B, and 212C are transferred to the CCD transfer unit 211. Each signal charge transferred to the CCD transfer unit 211 is transferred to the CCD transfer unit 211 in units of pixels by transfer / readout clocks φ1 and φ2 generated in synchronization with the reference clock φM. Each charge is converted into a voltage for each pixel by the output conversion unit 213 and output (read), amplified by the amplifier 226, clamped by the clamp circuit 227, and output as a video VIDEO signal for each pixel. The clamp circuit 227 samples and holds the output in synchronization with the sample hold pulse φSH and outputs it as a video signal VIDEO.

  Further, when the integration of all the sensors 212A to 212C is not completed within the preset maximum integration time, that is, the integration value of any of the monitor sensors MA, MB, MC within the preset maximum integration time. When the integration end level does not reach the integration end level VRM, the integration values of the monitor sensors MA, MB, and MC are compared with the integration end level VRM multiplied by 1/2, and the integration value reaches the 1/2 integration end level VRM. Then finish the integration. If the integrated value does not reach the 1 / 2-fold integration end level VRM by this processing, the gain of the amplifier 226 is doubled, and the integration end level VRM is further increased by 1/2 (total 1/4 times). If the integration end level VRM has been reached, integration is terminated. If the integration value does not reach the 1/4 integration end level VRM, the gain of the amplifier 226 is further doubled (4 times in total), and the integration end level VRM is further 1/2 times (1/8 time in total). Compared with the integrated value, the integration is terminated when the integration end level is reached 1/8 times. When the integral value does not reach the 1 / 8-fold integration end level VRM, the gain of the amplifier 226 is further doubled (8 times in total), and the integration of the sensor is forcibly terminated.

  The forced termination of integration is executed when the CCD control circuit 221 outputs a forced integration end signal FENDint to each of the integration control circuits 225A to 225B, and the integration control circuits 225A to 225B output an integration end signal. The CPU 35 starts measuring the integration time from the start of integration, inputs the integration end signal output from the integration control circuits 225A to 225C, and measures the integration time of each of the integration control circuits 225A to 225C.

  The above is the basic integration operation of the multi-focus detection sensor unit 21 using the CCD line sensor. Here, the integral characteristics between the monitor sensors MA, MB, and MC, or the integral characteristics of the monitor sensors MA, MB, and MC corresponding to the integral characteristics of the sensors 212A, 212B, and 212C may deviate from the design values.

  FIG. 3 shows a timing chart relating to integral control when the monitor sensors MA, MB, and MC receive a subject image having exactly the same luminance. In this embodiment, the monitor offset offset (integral initial value) in the reset state is different for each of the monitor sensors MA, MB, and MC. Therefore, the integration value reaches the integration end level VRM at different times in the order of the A monitor sensor MA, the B monitor sensor MB, and the C monitor sensor MC even though the luminance of the subject images is equal, and the integration is ended. In this case, the integrated values of the sensors 212A to 212C are the maximum value of the integrated value of the C sensor 212C having the longest integration time, the minimum value of the integrated value of the A sensor 212A, and the integrated value of the B sensor 212B. Becomes an intermediate value. In such a case, the integral value of the C sensor 212C may exceed the maximum range that can be processed by the main CPU 35, and the integral value of the A sensor 212A uses only a portion having a low effective range, so the accuracy is lowered. Sometimes.

  In the embodiment of the present invention, the integration end level VRM is corrected by the corresponding monitor offsets MAoffset, MBoffset, and MCoffset when setting the gain of the integral value that did not end the integration within the maximum integration time (setting the amplification factor of the amplifier 226). Thus, the gain of the amplifier 226 is set according to the corrected integration end level VRM.

  Conventionally, when the integration is not completed within the maximum integration time, the integration end level is lowered by a factor of 1/2 and compared with the integrated value, and the gain of the integrated value of the sensors 212A to 212C that did not end the integration ( Increase the amplification factor by 2 times. Therefore, if an error occurs between the integrated values monitored by the monitor sensors MA, MB, and MC and the integrated values of the corresponding sensors 212A to 212C, in particular, other than the monitor offset MBoffset of the reference B monitor sensor MB. When the monitor offsets MAoffset and MCoffset of the monitor sensors MA and MC are smaller, the integrated value (absolute value) of the reference B monitor sensor MB reaches the integration end level VRM, but the other monitor sensors MA and MC Is determined not to reach the integration end level VRM, and a gain of 2 n times is applied. In such a case, the integral value multiplied by the gain exceeds the maximum integral value range, and the integral value exceeding the maximum integral value is reduced. That is, among the subject images formed on the sensors 212 </ b> A to 212 </ b> C, the integral value is equalized in the bright part, and the contrast is lost.

  Therefore, in this embodiment, the integration error between the A, B, C sensors 212A, 212B, 212C and the monitor sensors MA, MB, MC is measured in advance, and the integration end level VRM is determined by the monitor offsets MAoffset, MBoffset, MCoffset stored in the EEPROM 43. Correct. More specifically, when there are sensors 212A, 212B, and 212C that do not end integration within the maximum integration time, the integration end level VRM is corrected by the monitor offsets MAoffset, MBoffset, and MCoffset of each monitor sensor MA, MB, and MC. Then, the gain control is performed by comparing the corrected integration end level VRM with the integrated values of the corresponding monitor sensors MA, MB, and MC.

  FIG. 4 shows a timing chart relating to the integration processing when the integration is not completed within the maximum integration time. The integration end level VRM of this embodiment is set as follows.

Initial integration end level (based on B sensor 212B)
VRM = MD- (AGC level)
(However, the AGC level is the difference between the reference voltages VS and VAGC, and is normally set in the B sensor 212B.)
1/2 ^n- times integration end level A Monitor sensor MA:
VRM = MD-[[(AGC level)-(monitor offset MBoffset)] / 2 ⁿ + (monitor offset MAoffset)]
1/2 ^n- times integration end level B monitor sensor MB:
VRM = MD-[[(AGC level)-(monitor offset MBoffset)] / 2 ⁿ + (monitor offset MBoffset)]
1/2 ^n- times integration end level C monitor sensor MC:
VRM = MD-[[(AGC level)-(monitor offset MBoffset)] / 2 ⁿ + (monitor offset MCoffset)]
However, n is 1, 2, and 3.

In this embodiment, the main CPU 35 calculates and sets the AGC level and [(AGC level) − (monitor offset MBoffset)] / 2 ⁿ + (each monitor offset), and as gain setting means for setting the gain of the integral value. It is functioning.

The integration process in the focus adjustment operation of the AF single-lens reflex camera provided with the multipoint autofocus device will be further described with reference to FIGS.
"Main processing"
FIG. 5 is a flowchart regarding the main processing of this single-lens reflex camera. In this main processing, the system waits for the photometry switch SWS to be turned on, and when the photometry switch SWS is turned on, the photometry and exposure calculation processing (AE processing) is performed to obtain the optimum aperture value and shutter speed, and the focus detection processing and lens A drive process (AF process) is executed to focus, and when the release switch SWR is turned on, an exposure process is executed with the aperture value and shutter speed obtained in the AE process.

  This main process is entered when a battery is loaded. When entering this process, the RAM 35b is first initialized (S101). Then, the power supply to the circuits and components other than the CPU 35 is cut off, and waiting for the photometric switch SWS to turn on (S103, S105). When the photometric switch SWS is turned on, the power supply to the peripheral device is started and the VDD loop process is executed.

  When the VDD loop process is started, the VDD loop time timer is started (S111), the state of each switch is checked (S113), and predetermined lens communication is executed with the lens CPU 61 to set the maximum aperture value and the minimum value. Lens data such as aperture value and focal length data is input (S115).

  Then, an AE calculation process is executed (S117), and a display relating to photographing such as a shutter speed obtained by the calculation is performed (S119). The AE calculation process is a process in which subject brightness is measured by the photometry IC 18 and an appropriate shutter speed and aperture value are obtained by computation in a predetermined exposure mode, for example, program exposure mode, based on subject brightness data and film sensitivity data. .

  When the shutter speed and the aperture value are obtained, AF processing for moving the focus adjustment lens 53 and focusing on the subject whose focus is detected is executed (S121). This AF process is repeated until the loop time elapses (S123).

  When the loop time elapses, the state of the photometry switch SWS is checked, and if it is on, the process returns to the VDD loop process (S125, S111). If the metering switch SWS is off, it checks whether the power hold flag is set. If it is not set, the power hold timer is started, and the power hold timer is set after the power hold flag is set. The VDD loop process is repeated until it is increased (S125, S127, S129, S131, S133, S111). When the power hold time has elapsed, the power hold flag is cleared and the process returns to the power down process (S133, S135, S103).

"AF processing"
The AF process in S121 will be described in more detail with reference to FIG. When the AF process is started, first, it is checked whether or not the photometric switch SWS is in an ON state (S201). If the photometric switch SWS is off, the AF lock flag is cleared and the process returns (S201, S203). The AF lock flag is a flag that is set when the subject is once focused, and is a flag that enables a so-called focus lock that maintains a focused state for the subject once the subject is focused.

  If the photometry switch SWS is on, it is checked whether the AF lock flag is set. If the AF lock flag is set, the process returns. However, if the AF lock flag is not in focus, it is not set, so the integration of all the sensors 212A, 212B, 212C is started (S205, S207). When the integration is completed, CCD video data is input, and a defocus calculation is executed for the selected focus detection zone to obtain a defocus amount (S209, S211). Then, it is checked whether or not the calculated defocus amount is in focus. If not in focus, the AF pulse number is calculated from the defocus amount and K value data, and the AF motor 39 is based on the calculated AF pulse number. Is driven (S213, S215, S217, S219). If it is in focus, the AF lock flag is set and the process returns (S215, S221).

"Integration start processing"
The integration start process in S207 will be described in more detail with reference to FIG. This integration start process is a process in which the multi-focus detection sensor unit 21 starts integration and ends integration with an appropriate integration value.

  When the integration start process is entered, first, the maximum integration time elapsed flag and the forced end flag are cleared (S301). The maximum integration time elapsed flag indicates that the integrated value did not reach the integration end level VRM even when the sensors 212A to 212C to be used (corresponding to the monitor sensors MA to MC) passed the predetermined maximum integration time. The flag for forcibly ending the integration) and the forcible end flag identify that the integration was forcibly ended even though the integration values of the monitor sensors MA to MC did not reach the integration end level VRM. It is a flag to do. In this embodiment, all the sensors 212A, 212B, and 212C are used.

  Next, the maximum integration time is set in the RAM, the integration permission sensors 212A to 212C are set, and the AGC level (VAGC) is set (S303, S305, S307). Then, integration is started and integration time counting is started (S309, S311).

  Then, it waits for the integration of all permitted sensors 212A to 212C to end or for the maximum integration time to elapse (S313 to S323). That is, an integration time check process for checking the integration end and integration time of the sensors 212A to 212C that have permitted the integration is executed (S313), and it is checked whether the forced integration end flag is set (S315). If not, it is checked whether or not the maximum integration time has passed (S317), and if it has not passed, it is checked whether or not all of the sensors 212A to 212C that have allowed integration have ended (S319). If the integration of 212A to 212C has not been completed, the process returns to S313.

  When all the sensors 212A to 212C that have permitted the integration have completed the integration, the process returns as it is (S319). When the forced termination flag is set or when the forced termination flag is not set but the maximum integration time has elapsed, the maximum integration termination process is executed (S315, S321 or S315, S317, S321), and the integration is performed. The integration of all the sensors 212A to 212C that have not ended is forcibly terminated and the process returns (S323).

"Maximum integration time end processing"
Details of the maximum integration termination processing in S321 will be described in more detail with reference to the flowchart shown in FIG. The maximum integration end process is a process of multiplying the gain (amplification factor) of the integral value by 2 to the nth power in accordance with the integral value of the monitor sensor when the integration is not completed within the maximum integration time. This gain is applied by amplifier 226. Here, if an error occurs between the integrated values monitored by the monitor sensors MA, MB, and MC and the integrated values of the corresponding sensors 212A to 212C, other monitors than the monitor offset of the reference monitor sensor MB are generated. If the offset is smaller, it is determined that the integrated value of the reference monitor sensor has reached the integration end level VRM, but the other monitor sensors have not reached the integration end level VRM, and 2 n to the power. Double the gain. In such a case, the integral value multiplied by the gain exceeds the maximum integrated value range, and the integrated value exceeding the maximum integrated value range is reduced.

  Therefore, when the integration is not completed within the maximum integration time, the monitor offsets MAoffset, MBoffset, and MCoffset of the monitor sensors MA, MB, and MC are corrected in order from the larger one to control the gain of the amplifier 226. . In the embodiment shown in FIG. 4, MAoffset> MBoffset> MCoffset. In this embodiment, since the initial value of the gain is 4, the double gain corresponds to 8 times, the 4 times gain corresponds to 16 times, and the 8 times gain corresponds to 32 times.

  When the maximum integration time end processing is entered, first, a maximum integration time elapsed flag for identifying that the maximum integration time has elapsed is set ("1" is set), and the number of sensors 212A to 212C being used (this embodiment) In the example, 3) is set in the RAM 35b (S511, S513).

  The AGC level is corrected by the largest monitor offset value and multiplied by 1/2, and the integration control circuits 225A to 225C of the monitor sensors MA, MB, MC corresponding to the offset value are operated (S515). That is, the integration control circuits 225A to 225C compare the corrected 1 / 2-fold integration end level VRM with the corresponding integrated value. When the integration of all the sensors 212A to 212C is completed, or even if the integration of any of the sensors 212A to 12C2 is not completed, the process returns when the gain (Gain) is set to the maximum value (8 times). (S517, S519).

  When the integration of the selected sensors 212A to 212C is not completed and the gain is not set to the maximum (8 times), the gain of the selected sensors 212A to 212C is set, and 1 is subtracted from the number of sensor units, Until the subtraction value becomes 0, the process returns to S515 and executes the processes of S515 to S525 (S521, S523, S525).

  When the processes from S515 to S525 are executed for all the sensors 212A to 212C, the gain is doubled, the process returns to S515, and the processes of S515 to S525 are re-executed (S527). Then, when the integration of all the sensors 212A to 212C is completed or the maximum value is set to the gain without completing the integration, the process returns. When the process returns, the integration of all the sensors 212A to 212C that have not finished integration is forcibly terminated.

  With the above maximum integration time end processing, even when the integral value of the monitor sensor does not reach the integration end level VRM within the maximum integration time, gain control is performed based on the integration end level VRM after error correction of each monitor sensor. The integral value can be amplified with an appropriate gain.

  In the embodiment shown in FIG. 4, in the first process, the C monitor sensor MC reaches the 1 / 2-fold integration end level after correction by the monitor offset MCoffset, the integration of the C sensor 212C is ended, and the integration is not ended. The gains of the A sensor 212A and the B sensor 212B are set to double, and the B monitor sensor MB does not end after the correction by the monitor offset MBoffset in the second processing, but the MC1 / 4 time integration after the correction by the monitor offset MBoffset ends. Since the integration has been completed by reaching the level, the gain is set to 4 times together with the A sensor 212A that has not been completed. Since the A monitor sensor MA did not reach the 1 / 8-fold integration end level after correction even in the third processing, it was forcibly terminated and the gain was set to 8 times.

  In the present embodiment, after the maximum integration time has elapsed, the integration end level VRM is corrected from the larger monitor offset value in order to prevent the gain from becoming too high.

"CCD data input processing"
Next, the CCD data input process of S209 will be described in detail with reference to the flowchart shown in FIG.

  In this embodiment, an analog video signal in units of pixels that is sequentially output from the clamp circuit 27 and input to the CPU 35 is converted into digital video data by the A / D converter 35e built in the CPU 35. If the data is converted into video data, if the forced integration has not been completed and integration has been completed before the maximum integration time has elapsed, the ratio of the reference output and the video data are multiplied, and the multiplied value is stored as video data in the RAM 35b. To memory. Since the video data for which the forced integration has been completed or the maximum integration time has passed has already been gain-controlled in the amplifier 226, the value is stored in the RAM 35b as video data. The above processing is executed for video signals for all pixels of all the sensors 212A to 212C. In this embodiment, the video signal is first converted into 10-bit digital data by the A / D converter 35e. Furthermore, it is converted into 9-bit or 8-bit digital data according to the accuracy used for the focus detection calculation.

  In the CCD data input process, first, the A / D converter 35e is set to the 10-bit mode, and the number of bits (number of pixels) for A / D conversion is set in the built-in counter (S601, S603). Waiting for the A / D conversion synchronization signal φAD to fall to the low level, when it falls to the low level, the A / D converter 35e starts A / D conversion (S605, S607, S609). When the A / D conversion is completed, the converted digital data is input and inverted (S609, S611). This inversion process is a process of converting the video signal so as to become larger as it becomes brighter because the signal falls as it becomes brighter from the video reference value, that is, the value becomes smaller as it becomes brighter.

  Next, it is checked whether “1” is set in the forced end flag or whether “1” is set in the maximum integration time elapsed flag (S613, S615). If any flag is “0”, the inverted data is multiplied by the ratio with the reference output. That is, B / A is multiplied by the data of the A sensor 212A, B / B = 1 is multiplied by the data of the B sensor 212B, and B / C is multiplied by the data of the C sensor 212C. By this multiplication processing, variations in the integral characteristics of the monitor sensors MA, MB, and MC are corrected, and the same level of video data can be obtained when the subject brightness is the same.

  When “1” is set in the forced end flag or the maximum integration time elapsed flag, the multiplication process is skipped and the process proceeds to S619 (S613, S619 or S613, S615, S619). The video data when the forced integration is completed and the video data for which the maximum integration time has passed are already corrected in the amplifier 226 by gain control corresponding to the variation in the integration characteristics of the monitor sensors MA, MB, and MC. Yes.

  In S619, it is checked whether or not the accuracy is 9 bits. Whether 9-bit accuracy or 8-bit accuracy is set according to the maximum output voltage of the multi-focus detection sensor unit 21, the performance of the camera, etc., is stored in the EEPROM 43 at the time of manufacture.

  In the case of 9-bit precision, the data is divided by 2 and converted to 9-bit data (S619, S621), and it is checked whether the 9-bit data exceeds FFh (hexadecimal number, 255 in decimal number). If it exceeds FFh, a limit process for FFh is executed, and the data is stored as video data in the RAM 35b (S623, S625, S633). For example, when the A / D converter 35e operates at 4 volts, the limit processing is processing for cutting the maximum video data (input voltage) by a value corresponding to 2V. If the 9-bit data is less than or equal to FFh, the data is stored in the RAM 35b.

  On the other hand, in the case of 8-bit precision, 10-bit data is divided by 4 and converted to 8-bit data (S619, S627), and it is checked whether the converted data exceeds the saturation output level. In step S627, S629, S631, and S633, the limit value is stored in the RAM 35b as video data. The saturation output level in this embodiment corresponds to, for example, 2.7 V (ACh). When the data converted into 8-bit data does not reach the saturation output level, the converted data is stored as video data in the RAM 35b (S627, S629, S633).

  When the video data memory is completed, 1 is subtracted from the bit number of the counter. If the bit number after the subtraction is not 0, the process returns to S605 and repeats the processes of S605 to S635. That is, the process returns to after executing the processes of S605 to S635 for all the video signals of all the sensors 212A to 212C to be used.

It is a figure which shows the main structure of one Embodiment which applied the multipoint autofocus apparatus of this invention to the single-lens reflex camera with a block. It is a figure which shows one Example of the multi-focus detection sensor of a single-lens reflex camera. It is a figure which shows the timing chart regarding the integration of the multifocus detection sensor. It is a figure which shows the other timing chart regarding the integration of the multifocus detection sensor. It is a figure which shows the flowchart regarding main operation | movement of a single-lens reflex camera. It is a figure which shows the flowchart regarding AF process of a single-lens reflex camera. It is a figure which shows the flowchart regarding the integration start process of a single-lens reflex camera. It is a figure which shows the flowchart regarding the maximum integration time completion | finish process of a single-lens reflex camera. It is a figure which shows the flowchart regarding the CCD data input process of a single-lens reflex camera.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Camera body 13 Main mirror 14 Half mirror part 15 Sub mirror 21 Multi focus detection sensor unit 211 CCD transfer part 212A A sensor 212B B sensor 212C C sensor 221 CCD control circuit 222 Timing generation circuit 223 Driver circuit 224 AGC control circuit 225A A integration control Circuit 225B B integration control circuit 225C C integration control circuit 226 Amplifier 35 Main CPU
MA A monitor sensor (monitoring means)
MB B monitor sensor (monitoring means)
MCC monitor sensor (monitoring means)

Claims (2)

A plurality of light receiving means for receiving a subject image in a plurality of focus detection zones and integrating the photoelectrically converted charges;
Measuring means for measuring the integration time of each light receiving means;
A monitor means arranged close to each light receiving means, receiving a subject image in the focus detection zone, integrating and monitoring the integrated value of the corresponding light receiving means;
When the integration value by the monitoring means reaches a predetermined value, the integration of the corresponding light receiving means is terminated, and when the predetermined maximum integration time elapses, the predetermined value is changed stepwise and the changed predetermined value and the monitoring means An autofocus device comprising an integration control means for comparing the integration value and forcibly terminating the integration of all the light receiving means that have not finally reached the predetermined value,
The gain of the integral value of the light receiving means that has not reached the predetermined value when the maximum integration time has elapsed is corrected by the corresponding integral value error correction value of the monitor means and compared with the corrected predetermined value. A multipoint autofocus device comprising gain setting means for setting. 2. The multipoint autofocus device according to claim 1, wherein the gain setting means corrects the predetermined value in order of an integral value error correction value that increases from an integral value error correction value that minimizes the absolute value of the predetermined value after correction. Then, the multipoint autofocus device is characterized in that the gain is set by comparing the predetermined value after correction and the integral value.

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