JP2006049851A - Manufacturing method of thin film integrated circuit and element substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the structure of an IC chip and a process of manufacturing the same, which enable the IC chips to be manufactured at a low cost so as to meet the anticipation of an increase in use form and demand for the IC chips manufactured from silicon wafers and a demand for a more cost reduction of them. <P>SOLUTION: In this invention, a metal film and a reactant provided with the same are used as a releasing layer. The metal film or the reactant provided with the same has a high etching rate and is preferable. Furthermore, a physical means can be used besides a chemical means used for etching the metal film or the reactant provided with the same, and the releasing layer is more easily removed in a short period of time. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a method for manufacturing a thin film integrated circuit capable of recording a large amount of information, and an element substrate for manufacturing the thin film integrated circuit.

In recent years, there is an increasing need for IC chip-mounted cards and IC chip-mounted tags that can exchange data in a contactless manner for all fields that require automatic recognition, such as management of securities and products. Since these IC cards and IC tags are often disposable from the viewpoint of usage, they are required to be manufactured at low cost. In particular, there is a demand for cost reduction of IC chips formed from silicon wafers.

As a form of use of such an IC chip, an IC chip is attached to a part of an animal for the safety management of livestock and used for infectious disease prevention and quality assurance. Similarly, for the safety management of vegetables, it is sold with an IC chip that records the producer, production area, and use of agricultural chemicals.

As another usage mode, a mode has been proposed in which it is mounted on valuable securities, preventing unauthorized use, and can be reused when it can be recovered to a regular management source (see Patent Document 1).
JP 2001-260580 A

An IC chip formed from such a silicon wafer has a limit in cost reduction. However, the use of IC chips is expected to increase in usage and demand, and further cost reduction is required.

In addition, the handling of very thin IC chips is complicated in the manufacturing process.

Accordingly, an object of the present invention is to provide a structure that can be produced at a lower cost and a simple process.

In view of the above problems, the present invention forms a thin film integrated circuit (also referred to as an IDF (ID Flexible) chip) on a substrate having an insulating surface (insulating substrate), and peels off the insulating substrate. (Also referred to as a circuit board). The present invention is characterized in that each IDF chip is prevented from separating in the separation step.

By peeling the insulating substrate, a very thin IDF chip can be manufactured. Note that after the insulating substrate is peeled off, it may be transferred to a transfer substrate. At this time, the substrate for transfer is preferably a flexible substrate (hereinafter also referred to as a flexible substrate). Transferring such an IDF chip element (including a partway through fabrication) to another substrate may be referred to as transfer. Many flexible substrates are inexpensive, and the cost of the IDF chip can be reduced. Further, since the insulating substrate can be reused, the cost of the IDF chip can be further reduced.

Specifically, the present invention relates to a metal film formed over an insulating substrate, and an oxide, nitride, or nitride oxide containing the metal over the metal film (including these oxides, nitrides, or nitride oxides). In addition, the insulating substrate is peeled by removing (also referred to as a reactant). The metal is an element selected from W, Ti, Ta, Mo, Nd, Ni, Co, Zr, Zn, Ru, Rh, Pd, Os, and Ir, or an alloy material or compound material containing the element as a main component. Can be used. As the oxide, nitride, or nitride oxide, when W, Mo, or a mixture of W and Mo is used for the metal film, W, Mo, or an oxide, nitride, or nitride oxide of the mixture is used. is there. As the metal film, a single layer structure or a laminated structure of films containing these metals and reactants can be used.

As a method of removing the metal film, there are a method of chemically removing using an etching agent (including gas or liquid) or a method of physically removing by applying stress. Moreover, you may combine the method of removing chemically, and the method of removing physically. Since the metal film having a single layer structure or a stacked structure is removed by the etchant, such a layer can be referred to as a peeling layer. At this time, it is preferable to chemically remove the peeling layer using an etching agent because generation of a reaction residue or the like can be reduced.

In the present invention, the release layer may be removed by a combination of a chemical method and a physical method.

In order to remove the release layer, a groove is provided for the layer formed on the release layer so as to reach the release layer, that is, to expose the release layer. Then, the peeling layer can be removed by introducing an etching agent into the groove.

As the etchant, a gas or a liquid containing a halide can be used. Typically, a gas or liquid containing halogen fluoride can be used. For example, ClF ₃ (chlorine trifluoride) can be used as the halogen fluoride.

In the case where an antenna is separately formed over and bonded to an IDF chip, a peeling layer may be removed after the substrate on which the antenna is formed (referred to as an antenna substrate) is bonded. In this case, an opening is formed in the antenna substrate, and the substrate is bonded to the insulating substrate in which the IDF chip and the groove are formed, and an etching agent is introduced into the opening and the groove to remove the peeling layer. Since the IDF chip is fixed by being held by the antenna substrate, the antennas can be bonded together in an integrated state without separating the IDF chips apart.

Further, as another means for preventing the IDF chips from being separated apart, when forming the groove, a part of the insulating film or the conductive film provided between the IDF chips is left (the remaining area is defined as the connection area). There is a method. In this case, the peeling layer is removed by the etching agent introduced from the groove, but the IDF chips are connected to each other in the connection region, so that they are not separated apart and are integrated. Thereafter, an antenna can be formed as necessary.

As described above, an element substrate for manufacturing an IDF chip includes an insulating substrate on which a plurality of thin film integrated circuits are formed and an antenna substrate provided so as to face the insulating substrate with a peeling layer interposed therebetween. The antenna substrate includes an antenna and an opening, and a groove is provided between the thin film integrated circuits so as to coincide with the opening.

An element substrate having another structure includes an insulating substrate on which a plurality of thin film integrated circuits are formed, and an antenna substrate provided opposite to the insulating substrate with a release layer interposed therebetween. The substrate includes an antenna and an opening, and a groove is provided between the thin film integrated circuits so as to coincide with the opening.

The release layer preferably has a stacked structure of a metal film and an oxide, nitride, or nitride oxide containing the metal over the metal film. Illustrative examples of such a release layer include W, Mo, or a mixture of W and Mo as the metal of the metal film, W, Mo, or a mixture of W and Mo and their oxides, nitrides or nitridings. It is a stacked structure with an oxide.

In the present invention, since a metal film or a reaction product containing a metal has a high etching rate, an IDF chip can be manufactured in a short time. Furthermore, in the present invention, a physical means can be used in addition to a chemical means for etching a metal film or a metal-containing reactant, and an IDF chip can be produced more easily and in a short time. In addition, since the insulating substrate can be removed and transferred to an inexpensive flexible substrate, or the insulating substrate can be reused, the manufacturing cost of the IDF chip can be reduced.

The present invention can be manufactured without separating the IDF chips. As a result, there is no concern that the IDF chip is clogged in the exhaust system of the apparatus during the production, and the complexity of handling a very small IDF chip can be reduced. In addition, a thin IDF chip formed on a large substrate may be warped by stress. However, since the IDF chip can be manufactured in an integrated state, warping can be prevented. Further, the method of providing the connection region between the IDF chips can enhance the warpage prevention effect. As described above, the present invention can provide a simple method for manufacturing an IDF chip.

Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and it is easy for those skilled in the art to make various changes in form and details without departing from the spirit and scope of the present invention. Understood. Therefore, the present invention is not construed as being limited to the description of this embodiment mode. Note that in all the drawings for describing the embodiments, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

(Embodiment 1)
In this embodiment mode, a mode in which a metal film that is a separation layer and a reactant containing the metal are removed after the antenna substrate is attached to each other will be described.

As shown in FIG. 1A, a metal film 102 and a thin film transistor (also referred to as TFT) layer 103 having a semiconductor film as an active region are sequentially formed over an insulating substrate 100. A reactant containing the metal is formed on the metal film 102. A plurality of IDF chips 104 can be formed from the thin film transistor. Although details of the structure of the TFT layer will be described later, the thickness of the semiconductor film is 0.2 μm or less, typically 40 nm to 170 nm, preferably 50 nm to 150 nm.

As described above, since an extremely thin semiconductor film is provided as an active region, the IDF chip can be made thinner than a chip formed from a silicon wafer. A specific IDF chip has a thickness of 0.3 μm to 3 μm, typically about 2 μm.

At this time, a groove 105 is formed in the TFT layer 103 at the boundary of the IDF chip. The groove 105 can be formed by dicing, scribing, etching using a mask, or the like. At this time, the groove 105 is formed to have a depth at which the release layer is exposed. In this embodiment mode, since the reactant is formed above the release layer, the groove 105 is formed so that the reactant is exposed. The groove 105 is not necessarily formed at the boundary between the IDF chips, but may be formed at the boundary between a plurality of IDF chips.

Further, as shown in FIG. 21A, an opening 108 may be formed in the IDF chip with respect to the TFT layer 103. At this time, the opening 108 needs to be formed in a region other than the region where the semiconductor film forming the thin film transistor is provided. By using the opening 108 and the groove 105 together, the time required for removing the peeling layer can be shortened. As a result, the size of the groove 105 can be reduced.

Examples of the insulating substrate 100 include glass substrates such as barium borosilicate glass and alumino borosilicate glass, and quartz substrates. Other substrates having an insulating surface include plastics typified by polyethylene-terephthalate (PET), polyethylene naphthalate (PEN), and polyethersulfone (PES), and substrates made of synthetic resin such as acrylic. In addition, a substrate in which an insulating film such as silicon oxide or silicon nitride is formed on the surface of a metal such as stainless steel or a semiconductor substrate can also be used. Such an insulating substrate has no limitation on the shape of the base substrate and can reduce the cost of the IDF chip as compared with the case where the chip is taken out from a circular silicon wafer.

As the metal film 102, an element selected from W, Ti, Ta, Mo, Nd, Ni, Co, Zr, Zn, Ru, Rh, Pd, Os, and Ir, or an alloy material or compound containing the element as a main component A single layer made of a material or a laminate of these can be used. In the present invention, when ClF ₃ is used as an etching gas, it is preferable to use W or Mo as the metal because the etching rate is high. In particular, tungsten oxide which is an oxide of W is preferable because it has a high reaction rate with ClF ₃ and can remove the release layer in a short time.

These metal films can be formed by a sputtering method, a plasma CVD method, or the like. As a specific manufacturing method, when a sputtering method is used, a metal can be used as a target and a metal film can be formed over the insulating substrate 100. The thickness of the metal film is 10 nm to 200 nm, preferably 50 nm to 75 nm. As the metal film, a nitrided metal film, that is, a metal nitride film may be formed. Furthermore, nitrogen or oxygen may be added to the metal film. For example, nitrogen or oxygen is ion-implanted into the metal film, the film formation chamber is formed into a nitrogen or oxygen atmosphere, a metal film is formed by sputtering, or metal nitride is used as a target to add nitrogen or oxygen to the metal film. can do. In the case of using a mixture of the above metals as the metal film, a plurality of targets such as a first metal and a second metal are arranged in the film formation chamber, or an alloy target of the first metal and the second metal is used. And can be formed by sputtering. For example, when a mixture of W and Mo (W _(x) Mo _(1-x) ) is formed, a W target and a Mo target may be used, or an alloy target of W and Mo may be used.

In addition, since the TFT layer is not etched, a base film is formed on the insulating substrate 100. The base film is made of silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y) (x, y = 1, 2,... ) And the like, or an insulating film containing nitrogen. The base film can have a single layer structure or a stacked structure thereof.

When the base film is formed, an oxide, nitride, or nitride oxide (corresponding to a reactant having a metal) is formed on the surface of the metal film. An oxide, a nitride, or a nitride oxide is preferably used for the separation layer. This is because oxides, nitrides, or nitride oxides have a high reaction rate with an etching gas, particularly CLF _3, and can be easily peeled off in a short time. Note that at this time, separation can be performed as long as the oxide, nitride, or nitride oxide is removed by at least the etching gas. In the present invention, it is preferable to use a laminated structure of a metal film and a reactant containing the metal for the release layer.

In addition, when an oxide, nitride, or nitride oxide is formed on the metal film surface, the chemical state may change. For example, when an oxide film having W is formed, the valence of tungsten oxide (WOx (x = 2 to 3)) changes. As a result, it can be easily peeled off by physical means. By adding physical means to chemical means, it can be removed easily and in a short time.

In addition, as a means for forming an oxide as a reactant, a thin film formed by treatment with an aqueous solution containing sulfuric acid, hydrochloric acid or nitric acid, an aqueous solution in which sulfuric acid, hydrochloric acid or nitric acid and hydrogen peroxide are mixed, or ozone water. An oxide film can be used. Further, as another method, plasma treatment in an oxygen atmosphere or oxidation treatment may be performed by generating ozone by irradiating ultraviolet rays in an oxygen-containing atmosphere, and heating to about 200 to 350 ° C. using a clean oven. A thin oxide film may be formed.

Thus, the etching rate can be controlled by selecting the metal film and the reactant constituting the release layer. In particular, tungsten oxide which is an oxide of W is preferable because it has a high reaction rate with ClF ₃ and can remove the release layer in a short time.

A plurality of antennas 112 having a predetermined shape are provided on the antenna substrate 111, and openings 113 are provided as appropriate. The shape of the opening is circular (corresponding to a so-called hole), rectangular (corresponding to a so-called slit), or the like. The opening is formed so as to overlap with the arrangement of the groove 105.

Such an insulating substrate 100 and the antenna substrate 111 are bonded together with an adhesive or the like. As the adhesive, an anisotropic conductor in which a conductor is dispersed, an ultrasonic adhesive, or an ultraviolet curable resin can be used.

After that, as shown in FIG. 1B, an etching agent 115 is introduced into the opening and the groove in a state where the antenna substrate is bonded to remove the peeling layer. As the etchant, a gas or a liquid containing halogen fluoride can be used.

After removing the peeling layer, the insulating substrate is peeled off. Thereafter, each IDF chip is cut by dicing, scribing, or laser cutting. Cutting can be done using a laser that is absorbed by the glass substrate, such as a CO ₂ laser. The area of the cut IDF chip as is, 5 mm square (25 mm ²⁾ or less, preferably to a 0.3mm square (0.09 mm ²⁾ to 4 mm square (16 mm ^2).

Further, after cutting the IDF chip, the periphery of the IDF chip may be covered with an organic resin such as an epoxy resin. As a result, the IDF chip is protected from the outside and is easy to carry.

Such an IDF chip of the present invention can be completed without having an insulating surface and can be mounted on many articles. Therefore, the IDF chip can be made thinner and lighter. Furthermore, the IDF chip of the present invention does not stand out with respect to the article to be mounted and does not impair the appearance.

Alternatively, it may be mounted in a state where it is separately transferred to a transfer substrate. The transposition substrate is preferably a flexible substrate. As the flexible substrate, a substrate made of a plastic represented by polyethylene-terephthalate (PET), polyethylene naphthalate (PEN), or polyethersulfone (PES), or a synthetic resin such as acrylic can be used.

As an adhesive for adhering the flexible substrate, an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, a resin additive, or a double-sided tape can be used. Further, in order to have conductivity with the IDF chip, a conductor may be dispersed in the resin material of the adhesive.

As a result of the transfer to the flexible substrate, the breaking strength of the IDF chip can be increased as compared with a state where there is nothing. Further, as compared with an IDF chip formed on an insulating substrate, weight reduction and thickness reduction can be achieved, and flexibility can be increased.

The peeled insulating substrate 100 can be reused. As a result, cost reduction of the IDF chip can be achieved. In the case of reuse, it is desirable to control so that the insulating substrate 100 is not damaged in dicing, scribing, or the like for forming the groove. However, even when scratches are generated, an organic resin or an inorganic film can be formed by a coating method, a droplet discharge method, or the like, and a planarization process can be performed. Note that the droplet discharge method is a method of selectively discharging (jetting) a droplet (also referred to as a dot) of a composition in which a material such as a conductive film or an insulating film is mixed. Also called the law.

Further, unlike a chip made of a silicon wafer, the IDF chip has a semiconductor film having a thickness of 0.2 μm or less as an active region and is very thin. In order to increase the strength of such a thin IDF chip, it is possible to adopt a method of transferring to a flexible substrate as described above. Such a thin, lightweight, or highly flexible IDF chip has a feature that it is less likely to be damaged than a chip formed from a silicon wafer.

In addition, the IDF chip can receive a highly sensitive signal without worrying about radio wave absorption as compared with a chip formed from a silicon wafer. Furthermore, since the IDF chip does not have a silicon wafer, it can have translucency.

Note that although the case where the IDF chip is attached to the antenna has been described in this embodiment mode, the antenna may be directly formed over the IDF chip. In that case, if an insulating substrate on which no antenna is formed is used instead of the antenna substrate, the IDF chip can be prevented from being separated separately, and the effects of the present invention can be achieved.

Further, the IDF chip is not limited to a form in which an antenna is mounted. Specifically, the IDF chip includes a contactless IDF chip (also referred to as a wireless tag) on which an antenna is mounted, a contact IDF chip on which a terminal for connecting to an external power supply is formed without mounting an antenna, and a contactless IDF chip. There is a hybrid type IDF chip in which a mold and a contact type are mixed.

In the present embodiment, the non-contact type IDF chip has been described. However, any of a contact type IDF chip and a hybrid type IDF chip may be used. Even if the contact IDF chip does not have an antenna, it is possible to prevent the IDF chip from being separated separately by using an insulating substrate on which an antenna is not formed instead of the antenna substrate. It is because it can play.

When an IDF chip is formed using such an insulating substrate, there is no restriction on the shape of the base substrate as compared with a chip manufactured using a silicon wafer in which the chip is taken out from a circular silicon wafer. Therefore, the production rate of IDF chips is increased and mass production can be performed. For example, the number of picks and the like are compared between a case where a silicon wafer having a diameter of 12 inches is used and a case where a glass substrate of 730 × 920 mm ² is used. The area of the former silicon substrate is about 73000 mm ² , while the area of the latter glass substrate is about 672000 mm ² , and the glass substrate corresponds to about 9.2 times the silicon substrate. When the area of the latter glass substrate is about 672000 mm ² , ignoring the area consumed by dividing the substrate, it is calculated that about 672,000 1 mm square ID tags can be formed, and the number is about 9.2 times that of the silicon substrate. It is equivalent to the number of The capital investment for performing mass production of ID tags, since the person in the case of using a glass substrate of 730 × 920 mm ² is only a small number of steps than with the silicon substrate 12 inch diameter, the amount It can be done in a third. Thus, the cost reduction of the IDF chip can be achieved. An IDF chip with a very low unit price can generate very large profits by reducing unit cost.

Furthermore, since the insulating substrate can be reused, the cost can be reduced. Therefore, cost reduction can be achieved as compared with a conventional IC chip that achieves thinning by polishing a silicon wafer.

(Embodiment 2)
In this embodiment, a mode in which a groove is selectively formed and an insulating film or a conductive film provided between IDF chips is partially left is described.

As shown in FIG. 8A, as in Embodiment Mode 1, a metal film 102 and a TFT layer 103 are sequentially formed as a peeling layer over an insulating substrate 100 to form a plurality of IDF chips 104. On the metal film 102, a reactant containing the metal is formed as a release layer. Details of the TFT layer will be described later.

At this time, in order to selectively form the groove 105 formed at the boundary of the IDF chip, an insulating film, a conductive film, or the like remains at the boundary of the IDF chip. Such an insulating film or conductive film at the boundary of the IDF chip is referred to as a connection region 106. Note that the connection region 106 only needs to have a function of connecting the IDF chips so as to be integrated, and may have a single-layer structure such as only an insulating film, only a conductive film, or a stacked structure.

Further, as shown in FIG. 21B, an opening 108 may be formed in the IDF chip for the TFT layer 103. At this time, the opening needs to be formed in a region other than the region where the semiconductor film constituting the thin film transistor is provided. By using the opening 108 and the groove 105 together, the time required for removing the peeling layer can be shortened. As a result, the size of the groove 105 can be reduced.

Next, as shown in FIG. 8B, an etching agent 115 is introduced into the groove 105 to remove the peeling layer. As the etching agent, a gas or a liquid containing halogen fluoride can be used as in the first embodiment.

At this time, the reaction time and the introduction amount are adjusted so that the peeling layer provided below the connection region 106 is removed. When the etching agent is introduced, the peeling layer below the connection region is removed so as to recede. As a result, although the insulating substrate 100 can be peeled off, the IDF chips are integrated by the connection region 106, so that they are not separated apart.

Further, the peeled insulating substrate 100 can be reused as in the first embodiment.

Thereafter, as shown in FIG. 8C, an antenna is provided as necessary. In this embodiment mode, the antenna 112 formed over the antenna substrate 111 is attached. At this time, the opening may not be formed in the antenna substrate. This is because the introduction of the etching agent has already been completed.

Thereafter, each IDF chip is cut by dicing, scribing, or laser cutting. Cutting can be done using a laser that is absorbed by the glass substrate, such as a CO ₂ laser. Thereafter, as in the first embodiment, an organic resin such as an epoxy resin may be covered around the side surface of the IDF chip.

In this embodiment mode, an IDF chip can be completed without being transferred to a transfer substrate. Therefore, the IDF chip and an article to be mounted can be reduced in thickness and weight. Further, as in the first embodiment, the transfer substrate may be transferred. As a result of the transfer to the transfer substrate, the fracture strength of the IDF chip can be increased.

(Embodiment 3)
In this embodiment mode, a method using a mode in which the antenna substrate having the opening portion described in Embodiment Mode 1 and the insulating substrate having a connection region at the boundary between IDF chips described in Embodiment Mode 2 are bonded to each other is used. explain.

As shown in FIG. 20A, similarly to Embodiment Mode 2, a metal film 102 and a TFT layer 103 are sequentially formed as a separation layer over an insulating substrate 100. On the metal film 102, a reactant containing the metal is formed as a release layer. Further, a groove 105 is selectively formed so as to have a connection region 106 between the IDF chips 104.

After that, as in Embodiment 1, the antenna substrate 111 on which the antenna 112 and the opening 113 are formed is attached. At this time, the groove 105 and the opening 113 are bonded together.

As shown in FIG. 20B, an etchant 115 is introduced into the opening and the groove. Then, the peeling layer (the metal film and the reactant containing the metal) is removed, and the insulating substrate 100 can be peeled off. At this time, since each IDF chip is fixed and integrated by the connection region and the antenna substrate, they are not separated apart.

In this embodiment mode, the case where the etching agent is introduced after the antenna substrates are attached to each other has been described. However, the etching agent may be introduced before the attachment. Even in that case, since the IDF chip is integrated by the connection region, the insulating substrate can be peeled off without being separated.

Thereafter, each IDF chip is cut by dicing, scribing, or laser cutting. Cutting can be done using a laser that is absorbed by the glass substrate, such as a CO ₂ laser.

Thereafter, similarly to Embodiment 1, an organic resin such as an epoxy resin may be coated around the side surface of the IDF chip.

In this embodiment, the IDF chip can be completed without being transferred to the transfer substrate, but may be transferred to the transfer substrate as in the first embodiment. As a result of the transfer to the transfer substrate, the fracture strength of the IDF chip can be increased.

Example 1
In this example, a specific method of the mode shown in Embodiment Mode 1 will be described.

2A is a top view when twelve IDF chips are formed on the insulating substrate 100, and FIG. 2B is a cross-sectional view taken along a solid line ab.

As shown in FIG. 2B, the TFT layer provided over the insulating substrate 100 with the metal film 102 and the reactant 50 containing the metal is an insulating film, a semiconductor film 124 patterned into a desired shape. Thin film transistors 128n and 128p each having an insulating film (hereinafter referred to as a gate insulating film) 125 that functions as a gate insulating film, and a conductive film (hereinafter referred to as a gate electrode) 126 that functions as a gate electrode provided through the gate insulating film. including. The semiconductor film includes a channel formation region and an impurity region (including a source region, a drain region, a GOLD region, and an LDD region), and an n-channel thin film transistor 128n or a p-channel thin film transistor depending on the conductivity type of the added impurity element. It can be distinguished from 128p. The wiring 130 is formed so as to be connected to each impurity region.

In this embodiment, W is used for the metal film, but other materials described above may be used.

The insulating film may have a stacked structure. In this embodiment, the insulating film includes a first insulating film 121, a second insulating film 122, and a third insulating film 123. For example, a silicon oxide film is used as the first insulating film, a silicon oxynitride film is used as the second insulating film, and a silicon oxide film is used as the third insulating film.

The semiconductor film 124 is an amorphous semiconductor, semi-amorphous silicon (SAS) in which an amorphous state and a crystalline state are mixed, or a microcrystal capable of observing crystal grains of 0.5 nm to 20 nm in the amorphous semiconductor. It may have any state selected from a semiconductor and a crystalline semiconductor.

If a substrate that can withstand the film formation temperature, for example, a quartz substrate is used, a crystalline semiconductor film can be formed on the substrate by a CVD method or the like.

In this embodiment, an amorphous semiconductor film is formed, and a crystalline semiconductor film crystallized by heat treatment is formed. For the heat treatment, a heating furnace, laser irradiation, irradiation of light emitted from a lamp instead of laser light (hereinafter referred to as lamp annealing), or a combination thereof can be used.

When laser irradiation is used, a continuous wave laser (CW laser) or a pulsed laser (pulse laser) can be used. Lasers include Ar laser, Kr laser, excimer laser, YAG laser, Y ₂ O ₃ laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor laser Alternatively, one or a plurality of gold vapor lasers can be used. By irradiating the fundamental wave of such a laser and the second to fourth harmonics of the fundamental wave, a crystal having a large grain size can be obtained. For example, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) can be used. Energy density of the laser is about 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

At this time, for example, an optical system as shown in FIG. 23A is used, and crystallization is performed using a CW laser. First, the CW laser beam emitted from the laser oscillator 290 is elongated by the optical system 291 and processed into a linear shape. Specifically, a cylindrical lens or a convex lens included in the optical system 291 can be processed into a linear shape when the laser beam passes. At this time, it is good to process so that the length of the long axis of a spot may become 200-350 micrometers.

Thereafter, the linearly processed laser beam is incident on the semiconductor film 124 via the galvanometer mirror 293 and the fθ lens 294. At this time, the linear laser is adjusted so as to form a laser spot 282 having a predetermined size on the semiconductor film. Further, the fθ lens 294 can make the shape of the laser spot 282 constant on the surface of the irradiated object regardless of the angle of the galvanometer mirror.

At this time, the device (control device) 296 for controlling the vibration of the galvanometer mirror vibrates the galvanometer mirror, that is, the angle of the mirror changes, and the laser spot 282 moves in one direction (for example, the X-axis direction in the figure). ) (Outward). For example, when a galvanometer mirror vibrates in a half cycle, the laser beam is adjusted so as to move a certain width in the X-axis direction on the semiconductor film.

Then, the semiconductor film is moved in the Y-axis direction by the XY stage 295. Similarly, the laser spot moves in the X-axis direction on the semiconductor film by the galvanometer mirror (return path). Using such a reciprocating motion of the laser beam, the laser spot moves along the path 283, and laser annealing is performed.

At this time, as shown in FIG. 23B, the thin film transistor performs laser annealing so that the carrier moving direction 281 is aligned with the moving direction (scanning direction) of the laser beam to the long axis. For example, in the case of the semiconductor film 230 having the shape shown in FIG. 23B, the source region 230 (s) formed in the semiconductor film so as to be parallel to the moving direction (scanning direction) of the laser beam to the long axis, A channel formation region 230 (c) and a drain region 230 (d) are disposed. As a result, since the grain boundaries crossed by carriers can be reduced or eliminated, the mobility of the thin film transistor can be increased.

Furthermore, the incident angle of the laser may be θ (0 <θ <90 degrees) with respect to the semiconductor film. As a result, laser interference can be prevented.

Note that continuous wave fundamental laser light and continuous wave harmonic laser light may be emitted, or continuous wave fundamental laser light and pulsed harmonic laser light are emitted. You may do it. Energy can be supplemented by irradiating a plurality of laser beams.

In addition, it is a pulse oscillation type laser that oscillates laser light at an oscillation frequency that can irradiate the laser light of the next pulse after the semiconductor film is melted by the laser light and solidifies in the scanning direction. Crystal grains grown continuously can be obtained. That is, a pulse beam in which the lower limit of the oscillation frequency is determined so that the period of pulse oscillation is shorter than the time from when the semiconductor film is melted until it is completely solidified.

The oscillation frequency of the pulse beam that can be actually used is 10 MHz or more, and a frequency band that is significantly higher than the frequency band of several tens to several hundreds Hz that is normally used is used.

Note that laser light may be irradiated in an inert gas atmosphere such as a rare gas or nitrogen. Thereby, roughness of the semiconductor surface due to laser light irradiation can be suppressed, and variation in threshold value caused by variation in interface state density can be suppressed.

Alternatively, a microcrystalline semiconductor film may be formed using SiH ₄ and F ₂ , or SiH ₄ and H ₂ , and then crystallized by performing laser irradiation as described above.

As another heat treatment, when a heating furnace is used, the amorphous semiconductor film is heated at 500 to 550 ° C. for 2 to 20 hours. At this time, the temperature may be set in multiple stages in the range of 500 to 550 ° C. so that the temperature gradually increases. This is because hydrogen or the like of the amorphous semiconductor film is generated by the first low-temperature heating step, so that so-called hydrogen extraction can be performed to reduce film roughness during crystallization. Furthermore, it is preferable to form a metal element that promotes crystallization, such as Ni, on the amorphous semiconductor film because the heating temperature can be reduced. Of course, even crystallization using such a metal element may be heated to 600 to 950 ° C.

However, when a metal element is formed, there is a concern that the electrical characteristics of the semiconductor element may be adversely affected. Therefore, it is necessary to perform a gettering step for reducing or removing the metal element. For example, a process of capturing a metal element using an amorphous semiconductor film as a gettering sink may be performed.

Alternatively, a crystalline semiconductor film may be formed directly. In this case, a crystalline semiconductor film is directly formed on the surface to be formed using heat or plasma using a fluorine-based gas such as GeF ₄ or F ₂ and a silane-based gas such as SiH ₄ or Si ₂ H _6. Can be formed. In the case where a crystalline semiconductor film is directly formed as described above and high temperature treatment is required, a quartz substrate with high heat resistance is preferably used.

A semiconductor film formed by any one of the means described above has more hydrogen than a chip formed from a silicon wafer. Specifically, hydrogen can be formed so as to have 1 × 10 ¹⁹ to 1 × 10 ²² / cm ³ , preferably 1 × 10 ^{19 to} 5 × 10 ²⁰ / cm ³ . This hydrogen can provide a so-called defect termination effect that alleviates defects in the semiconductor film. In addition, the flexibility of the IDF chip can be increased by hydrogen.

Furthermore, by setting the ratio of the area occupied by the patterned semiconductor film in the IDF chip to 1 to 30%, it is possible to prevent the thin film transistor from being broken or peeled off due to bending stress.

A sub-shred coefficient (S value) of a thin film transistor having such a semiconductor film is 0.35 V / dec or less, preferably 0.25 to 0.09 V / dec. The mobility of the thin film transistor is 10 cm ² V / second or more.

When a 19-stage ring oscillator is configured using such TFTs, the oscillation frequency is 1 MHz or higher, preferably 100 MHz or higher, at a power supply voltage of 3 to 5 V. At a power supply voltage of 3 to 5 V, the delay time per inverter stage is 26 ns, preferably 0.26 ns or less.

Although the TFT can function as a TFT with the above structure, the first interlayer insulating film 127 and the second interlayer insulating film 129 are preferably formed. Damage or defects of the semiconductor film can be repaired by hydrogen from the first interlayer insulating film. That is, a defect termination effect due to hydrogen can be achieved. As such a first interlayer insulating film, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y) (x, An insulating film containing oxygen or nitrogen such as y = 1, 2,.

Further, the flatness can be improved by the second interlayer insulating film. Such a second interlayer insulating film can be made of an organic material or an inorganic material. As the organic material, polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, siloxane, or polysilazane can be used. Note that siloxane corresponds to a resin including a Si—O—Si bond. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. Polysilazane is formed using a polymer material having a bond of silicon (Si) and nitrogen (N), that is, a liquid material containing so-called polysilazane as a starting material. As the inorganic material, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y) (x, y = 1, 2,... An insulating film containing oxygen or nitrogen such as ()) can be used. Further, a stacked structure of these insulating films may be used as the second interlayer insulating film. In particular, when the second interlayer insulating film is formed using an organic material, the flatness is improved, but moisture and oxygen are absorbed by the organic material. In order to prevent this, an insulating film including an inorganic material is preferably formed over the insulating film including an organic material. When an insulating film containing nitrogen is used as the inorganic material, entry of alkali ions such as Na can be prevented.

More preferably, a fourth insulating film 131 is provided so as to cover the wiring 130. Since an article on which an IDF chip is mounted is often touched by hand, there is a concern about the diffusion of alkali ions such as Na. Therefore, it is preferable to form a fourth insulating film on the top surface of the IDF chip. As the fourth insulating film, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y) (x, y = 1, An insulating film containing oxygen or nitrogen such as 2 ...) can be used, but silicon nitride oxide (SiNxOy) is typically used. This is because when an insulating film containing nitrogen such as silicon nitride oxide is used, intrusion of alkali ions such as Na can be prevented.

Thereafter, a groove 105 is formed between the IDF chips 104. The groove 105 can be formed by dicing, scribing, etching using a mask, or the like. In the case of dicing, a blade dicing method using a dicing apparatus (dicer) is generally used. The blade is a grindstone in which diamond abrasive grains are embedded. The width of the blade is about 30 to 50 μm, and the TFT layer is separated by rotating the blade at a high speed. In the case of scribing, there are a diamond scribing method and a laser scribing method. In the case of etching, a mask pattern can be formed by exposure and development processes, and the TFT layer can be separated by dry etching, wet etching, or the like. In dry etching, an atmospheric pressure plasma method may be used. In this way, a groove is formed between the IDF chips.

The groove is not necessarily formed between the IDF chips, and may be formed between a plurality of IDF chips.

Next, as shown in FIG. 3, the antenna substrate is bonded together. FIG. 3A shows a top view of the antenna substrate 111 attached thereto, and FIG. 3B shows a cross-sectional view taken along a solid line ab.

As a means for bonding, an anisotropic conductor 141 in which the conductor 140 is dispersed can be used. The anisotropic conductor can be electrically connected in the region where the connection terminal of the IDF chip and the connection terminal of the antenna are provided, because the conductor is pressed by the thickness of each connection terminal. In other regions, since the conductor is kept at a sufficient interval, it does not conduct. In addition to the anisotropic conductor, bonding may be performed using an ultrasonic adhesive in which a conductive band is dispersed, an ultraviolet curable resin, a double-sided tape, or the like.

The antenna substrate 111 is provided with an antenna 112 and an opening 113 at a position corresponding to the IDF chip. As shown in FIG. 3B, the opening 113 is provided at a position corresponding to the groove 105. Details of the manufacturing process of the antenna and the opening will be described later.

In this embodiment, the case where the opening is provided between the antennas has been described. However, the opening may be provided between a plurality of antennas. In the present embodiment, the case where the opening is circular has been described, but the present invention is not limited to this. For example, the opening may be formed in a slit shape. Thus, the shape and arrangement of the groove 105 and the opening 113 can be set as appropriate.

Next, as shown in FIG. 4, the release layer (metal film and reactant) is removed by introducing a gas or liquid containing halogen fluoride as an etchant. Here, using a low pressure CVD apparatus 89 as shown in FIG. 24, the release layer is removed under the conditions of gas: ClF ₃ (chlorine trifluoride), temperature: 350 ° C., flow rate: 300 sccm, atmospheric pressure: 6 Torr, and time: 3 h. However, it is not limited to this condition. The low-pressure CVD apparatus shown in FIG. 24 has a bell jar that can process a plurality of insulating substrates 100. Then, ClF ₃ 115 is introduced from the gas introduction pipe, and unnecessary gas is exhausted from the exhaust pipe 92. At this time, since the IDF chip is integrated by the antenna substrate, there is no possibility that the IDF chip is sucked into the exhaust pipe 92. Further, a heating means such as a heater 91 may be provided on the side surface of the low pressure CVD apparatus.

4A shows a top view of a state where a gas or liquid containing halogen fluoride is introduced and the peeling layer is removed, and FIG. 4B shows a cross-sectional view taken along a solid line ab.

FIG. 4B shows a state in which a gas or liquid containing halogen fluoride is introduced into the opening 113 and the groove 105. At this time, when the processing temperature is set to 100 ° C. to 300 ° C. by the heating means, the reaction rate is shown. Can be increased. As a result, the amount of ClF ₃ gas used can be reduced and the processing time can be shortened.

By introducing such an etchant, the peeling layer can be gradually retreated, and the insulating substrate can be peeled and removed as shown by the arrow.

At this time, an etching agent, a gas flow rate, a temperature, and the like are determined so that each layer of the TFT is not etched. Then, an insulating film containing oxygen or nitrogen is used for the base film. Since the difference between these reaction rates, that is, the selectivity is high, the release layer can be easily removed while protecting the IDF chip. In this embodiment, the base film provided above and below the TFT layer, a protective film, an interlayer insulating film exposed on a side surface, a gate insulating film, by wire or the like is provided on the side surfaces, TFT layer by ClF ₃ Difficult to etch.

Note that ClF ₃ can be produced through a process of Cl ₂ (g) + 3F ₂ (g) → 2ClF ₃ (g) by reacting chlorine with fluorine at 200 ° C. or higher. Further, ClF ₃ may be a liquid depending on the temperature of the reaction space (boiling point 11.75 ° C.), and in this case, wet etching can be adopted as a liquid containing halogen fluoride.

As another gas containing halogen fluoride, a gas in which nitrogen is mixed with ClF ₃ or the like may be used.

Further, an etchant that etches the release layer and does not etch the base film is not limited to ClF ₃ , and is not limited to halogen fluoride. For example, a gas containing fluorine such as CF ₄ , SF ₆ , NF ₃ , F _2, etc. can be used as plasma. As another etching agent, a strong alkali solution such as tetraethylammonium hydroxide (TMAH) may be used, or a solution such as HF may be used.

Further, in the case of chemical removal with a gas containing halogen fluoride such as ClF ₃ , if the condition that a material that is selectively etched is used as a peeling layer and a material that is not etched is used as a base film, the peeling layer and The combination of the base films is not limited to the above materials.

Thus, even if the insulating substrate is removed, the IDF chips are integrated by the antenna substrate. Thereafter, each IDF chip is cut by dicing, scribing, or laser cutting to complete the IDF chip. Then, the IDF chip may be mounted on the article. As the adhesive used at this time, an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, a resin additive, or a double-sided tape can be used.

Although the IDF chip can be completed by the above steps, a flexible substrate may be bonded as shown in FIG. FIG. 5A shows a top view of a state in which the flexible substrate 150 is bonded with an adhesive 151, and FIG. 5B shows a cross-sectional view taken along a solid line ab.

As the flexible substrate, a substrate made of plastic as described above or a synthetic resin such as acrylic can be used. In this embodiment, a substrate made of plastic is used.

By transferring the IDF chip to the flexible substrate, the breaking strength of the IDF chip can be increased.

Thereafter, as shown in FIG. 6, each IDF chip is cut by dicing, scribing, or laser cutting, and the IDF chip formed on the flexible substrate is completed. 6A shows a top view of the IDF chip in a cut state, and FIG. 6B shows a cross-sectional view taken along a solid line ab.

The IDF chip thus formed may be mounted on an article. As the adhesive used at this time, an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, a resin additive, or a double-sided tape can be used.

Thus, the IDF chip integrated until just before completion can reduce the troublesome separation. Moreover, you may integrate until the time of mounting to articles | goods. For example, the IDF chip is cut only in one direction, mounted in an IDF chip attachment device in a continuous state, and each IDF chip is cut when mounted on an article, thereby reducing the complexity of separating the IDF chips apart. In addition, simple mounting can be performed.

Although not shown, in order to protect the IDF chip, it may be covered with an insulating film containing resin or nitrogen, and in particular, the side surface of the IDF chip may be covered. By protecting, the IDF chip can be easily carried. The insulating film containing resin or nitrogen at this time may be a material of an article on which the IDF chip is mounted.

In the present embodiment, the case where the IDF chip connection terminal faces the antenna side, that is, the so-called face-down mounting by the anisotropic conductor has been described. May be. In the case of mounting face up, a wire bonding method can be used as means for connecting the connection terminal and the antenna.

As described above, the mode in which the insulating substrate 200 is peeled off after forming the thin film transistor over the substrate 200 and preferably transferred to the flexible substrate has been described. However, the timing or number of times of peeling is not limited to this embodiment. Further, the transfer destination is not limited to the flexible substrate. For example, you may transfer directly to the articles | goods to mount (mounting articles | goods). In addition, it is possible to determine whether the IDF chip is in a face-up state or a face-down state based on the number of times of transfer.

Next, an antenna manufacturing process will be described with reference to FIGS. Although FIG. 7 illustrates a case where an antenna wound in a rectangular shape on an antenna substrate is described, the shape of the antenna is not limited to this. For example, a circular or linear antenna may be used.

The substrate for the antenna is a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, polyethylene-terephthalate (PET), polyethylene naphthalate (PEN), plastic represented by polyethersulfone (PES), A substrate made of a synthetic resin such as acrylic can be used. Since the antenna substrate is preferably thin, a film-like substrate is preferable.

As shown in FIG. 7A, the antenna 112 is formed on the antenna substrate 111 by a droplet discharge method using a nozzle 160. In addition to the droplet discharge method, it can be formed by any one of a sputtering method, a printing method, a plating method, a photolithography method, a vapor deposition method using a metal mask, or a combination thereof. For example, the first antenna is formed by any one of a sputtering method, a droplet discharge method, a printing method, a photolithography method, and a vapor deposition method, and a second antenna is formed so as to cover the first antenna by a plating method. A stacked antenna can also be formed. In the case where the antenna is formed by a droplet discharge method or a printing method, it is not necessary to pattern the conductive film, which is preferable because the manufacturing process can be reduced.

A connection terminal 135 is formed on the antenna. The connection terminal can be easily connected to the thin film integrated circuit. The connection terminal can be formed by increasing the number of droplets ejected from the nozzle or by fastening the nozzle. Note that the connection terminals are not necessarily provided, and are not limited to the shape and arrangement of this embodiment.

As the antenna material, a conductive material such as Ag (silver), Al (aluminum), Au (gold), Cu (copper), or Pt (platinum) can be used. When using Al or Au having relatively high resistance, there is a concern about wiring resistance. However, when the antenna is thick or the antenna formation area is large, the wiring resistance can be reduced by increasing the width of the antenna. Alternatively, a stacked antenna may be used and covered with a low resistance material. Note that an insulating film is preferably formed so as to cover a formation surface of the antenna and / or the periphery of Cu for a conductive material that is likely to be diffused, such as Cu.

In this embodiment, Ag mixed in tetradecane as a solvent is dropped from the nozzle 260 to form an antenna. At this time, in order to improve the adhesion of Ag, a base film made of titanium oxide (TiOx) may be formed on the antenna substrate.

More preferably, pressure is applied to the formed antenna to improve flatness. As a result, the antenna can be thinned. In addition to the pressurizing means, a heating means may be provided, and the pressurization process and the heat treatment can be performed simultaneously. In particular, when the droplet discharge method is used and heat treatment is required to remove the solvent, the heat treatment may be combined with the heat treatment.

Alternatively, a groove (concave portion) may be formed in the antenna substrate, and the antenna may be formed in the groove. Since the antenna can be formed in the groove, the antenna substrate and the antenna can be thinned.

The antenna can also be formed on both sides of the antenna substrate. In that case, an antenna may be formed on the other surface of the antenna substrate by the same method as described above. As a result, since the antenna length can be extended, the communication distance can be increased.

Depending on the arrangement of the connection terminals, a part of the antenna may be formed on the other surface of the antenna substrate. For example, when the antenna is formed so as to be wound as shown in FIG. 1, it is necessary to overcome the antenna depending on the arrangement of the connection terminals. At this time, it is necessary to use an insulator so that the antennas do not short-circuit, but an antenna substrate can be used as the insulator.

Next, as shown in FIG. 7B, an opening 113 is formed in the antenna substrate. The opening can be formed physically or chemically. When physically formed, a laser can be used. Further, in order to easily form the opening, heat may be applied. For example, a hot needle-shaped object can be used to point to the antenna substrate to form the opening. In the case of chemical formation, an etching method such as dry etching or wet etching can be used.

Moreover, it is not limited to the shape of a hole and circular shape, A rectangular shape etc. may be sufficient.

In this embodiment, the case where the IDF chip and the antenna are attached to each other has been described. However, the antenna may be formed directly on the IDF chip. For example, an antenna can be formed in the same layer as the wiring 130.

In this embodiment, the non-contact type IDF chip has been described, but any of a contact type IDF chip and a hybrid type IDF chip may be used.

As described above, in this embodiment, the IDF chip and the antenna substrate are described as being thicker for the sake of clarity, but the actual shape is very thin.

(Example 2)
In this example, a specific method of the mode shown in Embodiment Mode 2 will be described.

9A is a top view when twelve IDF chips are formed on the insulating substrate 100, FIG. 9B is a cross-sectional view taken along line ef, and FIG. 9C is a connection region 106. Sectional drawing in the continuous line gh which crosses is shown. In this embodiment, W is used for the metal film as in the first embodiment.

As shown in FIG. 9B, in the same manner as in Example 1, a metal film 102 is provided over an insulating substrate 100 as a peeling layer, and a base film is provided on the base film through a reactant 50 containing the metal. Thin film transistors 128n and 128p each including a semiconductor film 124 patterned in the shape of FIG. 5A, a gate insulating film 125, and a gate electrode 126 provided through the gate insulating film 125 are provided. A wiring 130 is provided so as to be connected to the impurity region included in the semiconductor film.

The base film may have a stacked structure, and includes the first insulating film 121, the second insulating film 122, and the third insulating film 123, as in the first embodiment.

Similarly the semiconductor film as in Example 1 is different from the chip formed from a silicon wafer, hydrogen ^{1 × 10 19 ~1 × 10 22} / cm 3, preferably has ^{1 × 10 19 ~5 × 10 20} / cm 3 Can be formed. Hydrogen can provide a so-called defect termination effect that alleviates defects in the semiconductor film. In addition, the flexibility of the IDF chip can be increased by hydrogen in the semiconductor film.

Furthermore, by setting the ratio of the area occupied by the patterned semiconductor film in the IDF chip to 1 to 30%, it is possible to prevent the thin film transistor from being broken or peeled off due to bending stress.

Similarly to the first embodiment, the first interlayer insulating film 127 and the second interlayer insulating film 129 are preferably provided. More preferably, a fourth insulating film 131 is provided so as to cover the wiring 130.

Thereafter, in this embodiment, the groove 105 is selectively formed so as to leave the connection region 106. Similar to the first embodiment, the groove 105 can be formed by dicing, scribing, etching using a mask, or the like. When the groove 105 is selectively formed so as to leave the connection region 106 as shown in FIG. 9C, a mask pattern may be formed by exposure and development processes, and the groove may be formed by dry etching, wet etching, or the like. . In dry etching, an atmospheric pressure plasma method may be used.

When the groove is formed by dry etching, wet etching, or the like, conditions such as the groove etching time can be adjusted depending on the arrangement and shape of the connection region. By shortening the etching time, the influence on other films can be reduced.

The grooves formed between the IDF chips in this manner are not necessarily formed between the IDF chips, and may be formed between a plurality of IDF chips.

Next, as shown in FIG. 10, the metal film 102 and the reactant 50 as a release layer are removed by introducing an etching agent. 10A shows a top view of a state in which a gas or liquid containing halogen fluoride is introduced and the peeling layer is removed, FIG. 10B shows a cross-sectional view taken along the solid line ef, and FIG. FIG. 6C is a cross-sectional view taken along a solid line gh crossing the connection region 106.

As shown in FIG. 10B, a gas or liquid containing halogen fluoride is introduced into the groove 105. In this example, ClF ₃ (chlorine trifluoride) is used as the halogen fluoride as in Example 1.

At this time, the reaction rate can be increased by setting the treatment temperature to 100 ° C to 300 ° C. As a result, the amount of ClF ₃ gas used can be reduced, and the processing time can be shortened.

By introducing such an etchant, the release layer can be gradually retracted and the insulating substrate can be removed as shown by the arrow.

At this time, an etching agent, a gas flow rate, a temperature, and the like are set so that each layer of the TFT is not etched. Since ClF ₃ used in this example selectively removes the release layer, the end portions of the interlayer insulating film, the gate insulating film, the wiring, and the like provided on the side surfaces such as the base film and the protective film provided above and below are provided. Therefore, each layer of the TFT is difficult to be etched.

After that, even if the insulating substrate is removed, the IDF chips are integrated by the connection region, so that the IDF chips are not separated apart.

Thereafter, each IDF chip is cut by dicing, scribing, or laser cutting. Then, the IDF chip may be mounted on the article.

Although the IDF chip can be completed by the above steps, a flexible substrate may be bonded as shown in FIG. 11A shows a top view of the state in which the flexible substrate 150 is bonded with the adhesive 151, FIG. 11B shows a cross-sectional view taken along the solid line ef, and FIG. 11C shows the connection region 106. Sectional drawing in the continuous line gh which crosses is shown.

As the flexible substrate, a substrate made of plastic as described above or a synthetic resin such as acrylic can be used. In this embodiment, a substrate made of plastic is used. As an adhesive for adhering the flexible substrate, an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, a resin additive, or a double-sided tape can be used. By transferring to the flexible substrate in this way, the breaking strength of the IDF chip can be increased.

Next, as shown in FIG. 12, an antenna substrate is attached. 12A is a top view of the antenna substrate 111 attached thereto, FIG. 12B is a cross-sectional view taken along the solid line ef, and FIG. 12C is a solid line g crossing the connection region 106. Sectional drawing in -h is shown.

The antenna substrate 111 is provided with an antenna 112 at a position corresponding to the IDF chip as in the first embodiment. For details of the manufacturing process of the antenna, Embodiment 1 may be referred to. In this embodiment, since the insulating substrate 100 is peeled off, it is not necessary to form an opening in the antenna substrate.

At this time, the IDF chip 104 and the antenna 112 are bonded to each other by the anisotropic conductor 141. In addition to the anisotropic conductor, bonding may be performed using an ultrasonic adhesive, an ultraviolet curable resin, a double-sided tape, or the like.

In this embodiment, the case where the IDF chip connection terminal faces the antenna side by the anisotropic conductor, that is, the so-called face-down mounting is described. However, as in the first embodiment, it faces the opposite side of the antenna. The so-called face up may be implemented.

Thereafter, as shown in FIG. 13, each IDF chip is cut by dicing, scribing, or laser cutting, and the IDF chip formed on the flexible substrate is completed. 13A shows a top view of the IDF chip in a cut state, FIG. 13B shows a cross-sectional view taken along a solid line ab, and FIG. 13C shows a solid line gh crossing the connection region 106. FIG.

Such an IDF chip may be mounted on an article. As the adhesive used at this time, an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, a resin additive, or a double-sided tape can be used.

Although not shown, in order to protect the IDF chip, it may be covered with an insulating film containing resin or nitrogen, or the side surface of the IDF chip may be covered with resin. The insulating film containing resin or nitrogen at this time may be a material constituting an article on which the IDF chip is mounted.

As described above, the mode in which the insulating substrate is peeled off after forming the thin film transistor on the substrate and preferably transferred to the flexible substrate has been described. However, the timing or number of times of peeling is not limited to this embodiment. The destination to be transferred is not limited to the flexible substrate, and may be a mounted article. Further, it is possible to determine whether the IDF chip is in a face-up state or a face-down state based on the number of times of transfer.

In this embodiment, the case where the IDF chip and the antenna are attached to each other has been described. However, the antenna may be formed directly on the IDF chip. For example, the antenna can be formed in the same layer as the wiring 130.

In the present embodiment, the non-contact type IDF chip has been described. However, as in the first embodiment, either a contact type IDF chip or a hybrid IDF chip may be used.

As described above, in this embodiment, the IDF chip and the antenna substrate are described as being thicker for the sake of clarity, but the actual shape is very thin.
(Example 3)
In this embodiment, the case where a thin film transistor having a shape different from that of the above embodiment is used will be described.

As shown in FIG. 25A, the gate electrode is formed as in the above embodiment. In this embodiment, the gate electrode has a laminated structure of TaN (tantalum nitride) 126a and W (tungsten) 126b. Silicon can be used as the other gate electrode. Thereafter, an interlayer insulating film 127 is formed so as to cover the gate electrode. In this embodiment, a SiO ₂ film having a thickness of 100 nm is formed by a plasma CVD method.

Next, the entire surface is covered with a resist 44, and the resist 44, the interlayer insulating film 127, and the gate insulating film 125 are removed by etching by an etch back method. As a result, as shown in FIG. 25B, the sidewall (side wall) 76 can be formed in a self-aligned manner (self-alignment). As an etching gas, a mixed gas of CHF ₃ and He is used.

If an insulating film is also formed on the back surface of the substrate when the interlayer insulating film 127 is formed, the back surface insulating film may be removed by etching using the resist 44 as a mask (back surface processing).

The method for forming the sidewall 76 is not limited to the above. For example, the method shown in FIG. 26 can be used. FIG. 26A illustrates an example in which the insulating film 127 has a two-layer structure or more. The insulating film 127 has, for example, a two-layer structure of a 100 nm thick SiON (silicon oxynitride) film and a 200 nm thick LTO film (low temperature oxide film). In this embodiment, the SiON film is formed by a plasma CVD method, and the SiO ₂ film is formed by a low pressure CVD method as the LTO film. Thereafter, by performing etch back using the resist 44 as a mask, the sidewall 76 having an L shape and an arc shape can be formed.

FIG. 26B shows an example in which etching is performed so as to leave the gate insulating film 125 at the time of etch back. In this case, the insulating film 127 may have a single layer structure or a stacked structure.

The side wall functions as a mask when a high concentration n-type impurity is doped later and a low concentration impurity region or an offset region to which no impurity is added is formed below the side wall 76. In any of the wall formation methods, the etch-back conditions can be set according to the width of the low concentration impurity region or offset region to be formed.

Next, as shown in FIG. 25C, a resist 77 that covers the p-type TFT region is newly formed, and an n-type impurity element 78 (typically, using the gate electrode 126 and the sidewall 76 as a mask). Highly doped with P or As). The doping process is performed at a dose of 1 × 10 ^{13 to} 5 × 10 ¹⁵ / cm ² and an acceleration voltage of 60 to 100 keV. By this doping step, doping (so-called through doping) is performed through the gate insulating film 125, and a pair of n-type high concentration impurity regions 79 are formed. At this time, an offset region 65 is formed below the sidewall.

The impurity region may be thermally activated after removing the resist 77 by ashing or the like. For example, after a 50 nm SiON film is formed, heat treatment may be performed in a nitrogen atmosphere at 550 ° C. for 4 hours. In addition, after the SiNx film containing hydrogen is formed to a thickness of 100 nm, defects in the crystalline semiconductor film can be improved by performing heat treatment at 410 ° C. for 1 hour in a nitrogen atmosphere. This terminates dangling bonds existing in the crystalline semiconductor film, for example, and is called a hydrogenation process. Further, after that, a SiON film having a thickness of 600 nm may be formed as a cap insulating film for protecting the TFT. Note that the hydrogenation process may be performed after the formation of the SiON film. In this case, the SiNx film and the SiON film can be continuously formed. A three-layer insulating film of SiON, SiNx, and SiON is formed on the TFT, but its structure and material are not limited to these. These insulating films are preferably formed because they have a function of protecting the TFT, but are not necessarily formed.

Next, as illustrated in FIG. 25D, an interlayer insulating film 129 is formed over the TFT. For the material and manufacturing method of the interlayer insulating film, the above embodiments can be referred to.

Further, the interlayer insulating film 129 may have a stacked structure. That is, the insulating film 54 may be stacked on the interlayer insulating film. As the insulating film 54, a film containing carbon such as DLC (diamond-like carbon) or carbon nitride (CN) can be used. As the insulating film 54, a silicon oxide film, a silicon nitride film, a silicon nitride oxide film, or the like can be used. As a manufacturing method of the insulating film 54, a plasma CVD method or a sputtering method can be used.

In order to prevent the TFT layer from peeling off or cracking due to the stress caused by the difference in thermal expansion coefficient between the interlayer insulating film and the conductive material or the like constituting the wiring to be formed later, the interlayer insulating film A filler may be mixed therein. This is because the thermal expansion can be controlled by the filler.

Next, after forming a resist, a contact hole is formed by etching, and a wiring 130 for connecting TFTs and a connection wiring 21 for connecting to an external antenna are formed. As an etching gas for forming the contact hole opening is a mixed gas of CHF ₃ and He, but is not limited thereto. Moreover, the wiring 130 and the connection wiring 21 may be formed simultaneously using the same material, or may be formed separately. Here, the wiring 130 connected to the TFT has a five-layer structure in which Ti, TiN, Al—Si, Ti, and TiN are stacked in this order, and these are formed by sputtering, and then formed as wiring 130 by patterning. be able to.

In addition, by mixing Si in the Al layer, generation of hillocks in resist baking during wiring patterning can be prevented. Moreover, you may mix about 0.5% of Cu instead of Si. Further, the hillock resistance is further improved by sandwiching the Al—Si layer with Ti or TiN. In patterning, it is desirable to use a mask made of an inorganic material such as SiON. Note that the wiring material and the formation method are not limited to these, and the material used for the gate electrode described above may be employed. At this time, a protective film 80 may be provided over the wiring, and an opening is formed in the connection region.

Through the above steps, an IDF chip having TFTs is completed. In this embodiment, the TFT has a top gate structure, but may have a bottom gate structure (inverted stagger structure).

As shown in FIG. 25D, in the IDF chip, the distance (t _under ) from the semiconductor layer to the lower part of the base film is equal to the distance (t _over ) from the semiconductor layer to the upper part of the interlayer insulating film, or It is desirable to adjust the thickness of the base film and the interlayer insulating film so as to be approximately equal. This is because by placing the semiconductor layer in the center of the IDF chip in this manner, stress on the semiconductor layer can be relaxed and cracks can be prevented.

After that, as in the above embodiment, a groove can be formed and the insulating substrate can be peeled off, or an antenna can be formed.

The thin film transistor having a sidewall shown in this example can be freely combined with the above embodiment mode and the above example.

Example 4
In this embodiment, a method for manufacturing a thin film integrated circuit which is different from the modes shown in Embodiments 1 and 2 will be described.

As shown in FIG. 14A, an IDF chip formed based on Embodiment Mode 2 or Example 2 and integrated with a connection region 106 is prepared. The IDF chip is provided with bumps 201 made of the same material as the wiring 130.

In addition, a second substrate 202 on which the wiring 203 is formed is prepared. Examples of the second substrate include glass substrates such as barium borosilicate glass and alumino borosilicate glass, and quartz substrates. Other substrates include plastics typified by polyethylene-terephthalate (PET), polyethylene naphthalate (PEN), and polyethersulfone (PES), and substrates made of synthetic resin such as acrylic. Such a synthetic resin can have flexibility.

As shown in FIG. 14B, the integrated IDF chip is attached to the second substrate 202 over which the wiring 203 is formed using an adhesive 204. At this time, the wiring 203 and the bump 201 are bonded so as to be connected. An anisotropic conductor can be used as the adhesive 204. In addition to the anisotropic conductor, bonding may be performed using an ultrasonic adhesive, an ultraviolet curable resin, a double-sided tape, or the like.

As shown in FIG. 14C, each IDF chip is cut by dicing, scribing, or laser cutting.

After that, as shown in FIG. 14D, an antenna terminal 205 is formed. The antenna terminal can be formed by a droplet discharge method, a sputtering method, a CVD method, or the like.

Then, as shown in FIG. 14E, the antenna 112 is attached to the antenna substrate 111. For the material and the manufacturing method of the antenna or the antenna substrate, the above embodiment modes and examples can be referred to. The antenna substrate may be a material constituting an article on which the IDF chip is mounted.

Thus, the IDF chip can take various antenna mounting forms. The IDF chip of this embodiment is characterized by undergoing a manufacturing process in an integrated state, and the mounting form and mounting method of the antenna are not limited.

In the present embodiment, the non-contact type IDF chip has been described. However, as in the first and second embodiments, either a contact type IDF chip or a hybrid IDF chip may be used.

As described above, in this embodiment, the IDF chip and the antenna substrate are described as being thicker for the sake of clarity, but the actual shape is very thin.

(Example 5)
In this embodiment, various forms of IDF chips will be described.

As shown in FIG. 22A, the IDF chip 104 and the antenna 112 formed on the antenna substrate 111 are connected to each other by an anisotropic conductor 141 having a conductor 140 through a connection terminal, for example, a bump 109. . In addition to the anisotropic conductor, an ultrasonic adhesive, an ultraviolet curable resin, a double-sided tape, or the like may be used.

As shown in FIG. 22B, the IDF chip is attached to the flexible substrate 150 with an adhesive 151. As the adhesive, an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, a resin additive, or a double-sided tape can be used.

A plurality of antenna substrates may be provided. For example, as shown in FIG. 22C, the antenna substrate on which the antenna 112 is formed is provided on both sides of the IDF chip. As a result, since the total antenna length can be increased, the communication distance can be increased. At this time, the conductive film 250 is formed to connect the antenna on one side and the antenna on the other side. For example, the conductive film 250 is formed by selectively discharging a droplet including a conductor between the antenna substrates using a droplet discharge method. After that, in order to protect the conductive film 250, the insulating film 251 is preferably covered.

The connection structure between the antenna on one side and the antenna on the other side is not limited to this embodiment. For example, the antenna on one side and the antenna on the other side may be connected to the IDF chip via bumps 109, respectively.

As described above, an IDF chip on which an antenna is mounted can be completed. Note that the method of mounting the antenna of the IDF chip of the present invention is not limited to this embodiment. For example, the antenna may be formed in the same layer as the conductive film included in the thin film transistor, or the antenna may be formed over the IDF chip without using the antenna substrate.

Note that the IDF chip of the present invention is not limited to the form of the IDF chip shown in this embodiment. That is, in this embodiment, the non-contact type IDF chip has been described, but it may have any form of a contact type IDF chip and a hybrid type IDF chip.

(Example 6)
In this embodiment, the form of an article on which an IDF chip is mounted will be described. Note that the position, shape, and number of IDF chips are not limited to those in this embodiment.

FIG. 15 shows a case where an IDF chip is attached to a label for food and drink, and the IDF chip is mounted on a container for the food and drink, for example, a beer bottle 181.

As shown in FIG. 15A, the IDF chip 104 on which the antenna 112 is formed is attached to a label 180 with a double-sided tape or the like. Further, when the label itself has adhesiveness, the IDF chip may be bonded as it is.

As shown in FIG. 15B, such a product is put on a belt conveyor 183 or the like and passes through the vicinity of the reader / writer device 182 so that information can be input or read. Further, existing information can be rewritten depending on the type of memory formed in the IDF chip.

Furthermore, since the IDF chip on which the antenna is formed can input or read information without contact, information can be managed by the reader / writer device in a state where the product is packed in cardboard or the like.

In this way, with the article mounted with the IDF chip, labor costs during distribution can be greatly reduced. In addition, human error can be reduced.

As described above, information on IDF chips mounted on commodities ranges from basic matters such as place, person, and date related to production or manufacturing to allergy information, main components, and advertisements. Further, information storage means such as a bar code or a magnetic tape may be used to increase the amount of information or improve security. For example, when used in combination with a barcode, information that does not need to be rewritten, for example, basic information described above is input, and information that can be rewritten is input to the IDF chip.

If a ROM that cannot rewrite data is formed in the memory of the IDF chip, counterfeiting of securities such as banknotes, checks, etc., certified copy of family register, resident's card, business card, traveler's check, passport, etc. be able to.

As an example of theft prevention, a case where the IDF chip 602 is mounted on the bag 601 will be described. As shown in FIG. 27, for example, an IDF chip can be mounted on the bottom or part of the side surface of the bag. Since the IDF chip is very thin and small, it can be mounted without deteriorating the design of the bag. In addition, the IDF chip has translucency, and it is difficult for a thief to determine whether the IDF chip is mounted. Therefore, there is no possibility that the IDF chip is removed by the theft.

When such an IDF chip mounting bag is stolen, information on the current position of the bag can be obtained using, for example, GPS (Global Positioning System). GPS is a system that captures a signal sent from a GPS satellite, obtains a time difference thereof, and performs positioning based on the time difference.

Further, in addition to the stolen article, it is possible to obtain information on the current position of forgotten or lost items using GPS.

In addition to bags, IDF chips can be mounted on vehicles such as automobiles and bicycles, watches and accessories.

FIG. 16A shows a banknote 301 on which an IDF chip is mounted. In FIG. 16A, the IDF chip 302 is attached to the inside of the bill, but may be formed on the surface. This is because the IDF chip has translucency, so that it does not hinder printing or the like even if it is formed on the surface.

Also, it may be a securities other than banknotes, for example, an IDF chip may be mounted on a coin. Thus, by mounting an IDF chip on a bill or coin, it is possible to prevent counterfeiting and increase the recognition degree of the bill or coin in a vending machine or the like.

FIG. 16B shows a check 311 mounted with an IDF chip. In FIG. 16B, the IDF chip 312 is provided on the surface of the check. Since the IDF chip has translucency, it may be provided on the surface of the check. Of course, an IDF chip may be attached inside the check.

FIG. 16C shows a stock certificate 321 mounted with an IDF chip. In FIG. 16C, the IDF chip 322 is attached to the inside of the stock certificate, but may be formed on the surface. Further, the size and shape of the IDF chip (the shape together) and the mounting position are not limited, but the shape of the IDF chip increases when the amount of information is large. Even in such a case, since the IDF chip has translucency, printing is not hindered wherever it is mounted.

Moreover, you may print a banknote, a check, a stock certificate, etc. using the ink containing IDF chip | tip. Still further, when a material such as a banknote, a check, or a stock certificate is mixed with a chemical, the IDF chip may be dispersed to form a banknote, check, stock certificate, or the like on which a plurality of IDF chips are mounted. Since the IDF chip can be manufactured at low cost, even if a plurality of IDF chips are mounted, the manufacturing cost of banknotes, checks, stock certificates, etc. can be reduced.

As described above, since the IDF chip is formed using a very thin thin film integrated circuit, the IDF chip can be mounted on a very thin paper-like article. For this reason, the design of the article is not impaired. Further, since the IDF chip has translucency, it may be mounted on the surface of the article.

FIG. 17A shows a book 331 mounted with an IDF chip. The IDF chip 332 can be provided on the surface or inside of the book cover. An IDF chip may be mounted on other pages of the book.

FIG. 17B shows a DVD 341 mounted with an IDF chip. The IDF chip 342 can be provided on the surface of or inside the DVD package. Needless to say, an IDF chip may be mounted on a product such as a CD or a video instead of the DVD.

By mounting an IDF chip on an article on which such rental business is actively performed, lending and returning processing can be performed easily and in a short time. In addition, information such as product contents, advertisements, and performers can be written as data on the IDF chip.

Further, the shape of the IDF chip can be changed to some extent in accordance with the shape of the object to be attached. Therefore, the present invention is not limited to the application shown in this embodiment, and can be used for various other applications.

In addition, by mounting an IDF chip on a personal property, the location of the property at the time of loss or theft can be confirmed.

Moreover, you may attach an IDF chip | tip to the wrapping paper which wraps a property. Furthermore, a message can be written as audio data in the IDF chip. In this case, information can be read by a reader and a message can be heard by a playback device. Also, it can be read by a reader device and various information can be provided through a network.

A case will be described in which an IDF chip is mounted on a commodity such as food for safety management.

FIG. 28 shows a label 613 on which an IDF chip 612 is mounted, and a meat pack 611 on which the label is attached. The IDF chip may be mounted on the surface of the label or may be mounted inside the label. In the case of fresh food such as vegetables, an IDF chip may be mounted on a wrap covering the fresh food.

The IDF chip can record basic items related to the product such as the product production location, producer, date of processing, expiration date, and application items such as cooking examples using the product. Such basic matters do not need to be rewritten, and are preferably recorded using a non-rewritable memory such as MROM. Such application items may be recorded using a rewritable and erasable memory such as EEROM.

In addition, it is important to be able to know the state of animals and plants before processing in order to carry out food safety management. Therefore, it is preferable to embed an IDF chip in animals and plants and acquire information on animals and plants by a reader device. Information on animals and plants includes breeding grounds, feed, breeders, presence of infectious diseases, and the like.

If the price of the product is recorded on the IDF chip, the product can be settled more easily and in a shorter time than a method using a conventional barcode. That is, it is possible to settle a plurality of products on which the IDF chip is mounted at once. However, when reading a plurality of IDF chips in this way, it is necessary to mount an anti-collision function in the reader device.

Furthermore, depending on the communication distance of the IDF chip, the product can be settled even if the distance between the register and the product is long. IDF chips also help prevent shoplifting.

Further, the IDF chip can be used in combination with other information media such as a barcode and a magnetic tape. For example, basic matters that do not need to be rewritten are recorded on the IDF chip, and information to be updated, such as discount prices and special price information, may be recorded on the barcode. This is because, unlike the IDF chip, the barcode can be easily corrected.

By mounting the IDF chip in this manner, information that can be provided to the consumer can be increased, so that the consumer can purchase the product with peace of mind.

In addition, in order to perform manufacturing management, a manufactured product on which an IDF chip is mounted and a manufacturing apparatus (manufacturing robot) controlled based on information on the IDF chip will be described.

Currently, there are many scenes in which original products are produced. In such a case, production is performed on the production line based on the original information of the products. For example, in an automobile production line in which the paint color of a door can be freely selected, an IDF chip is mounted on a part of the automobile, and the coating apparatus is controlled based on information from the IDF chip. And you can produce an original car. As a result of mounting the IDF chip, it is not necessary to adjust the order of the cars to be put on the production line or the number having the same color in advance. For this reason, it is not necessary to set a program for controlling the painting apparatus to match the order and number of cars. That is, the manufacturing apparatus can operate individually based on the information of the IDF chip mounted on the automobile.

Thus, the IDF chip can be used in various places. And the specific information regarding manufacture can be obtained from the information recorded on the IDF chip, and the manufacturing apparatus can be controlled based on the information.

Next, a mode in which the card 621 mounted with the IDF chip 622 is used as electronic money will be described. FIG. 29 shows how payment is performed using the card 621. A register 623 and a reader / writer device 624 are provided. The IDF chip 622 holds information on the amount deposited in the card 621, and the reader / writer device 624 can read the amount information without contact and send it to the register 623. In the register 623, it is confirmed that the amount deposited in the card 621 is equal to or more than the amount to be settled, and settlement is performed. Then, information on the balance after settlement is transmitted to the reader / writer device 624. The reader / writer device 624 can write the remaining amount information into the IDF chip 622 of the card 621.

Note that a key 625 capable of inputting a personal identification number or the like may be added to the reader / writer device 624 so that a third party can be prevented from making a settlement using the card 621 without permission.

Note that the IDF chip is preferably arranged in the center with respect to the article to be mounted (mounting article), and the periphery of the IDF chip is covered with the base material of the article. As a result, the mechanical strength of the IDF chip can be increased. Specifically, the position where the IDF chip is sandwiched (the center of the IDF chip): X satisfies (1/2) · D−30 μm <X <(1/2) · D + 30 μm, where D is the thickness of the mounted article. It is good to arrange like this. That is, the thickness of the mounted article is D> 60 μm.

Even when the antenna is formed separately, the IDF chip preferably satisfies the above position.

Further, as described above, in the IDF chip, the distance (t _under ) from the semiconductor layer to the lower part of the base film and the distance (t _over ) from the semiconductor layer to the upper part of the interlayer insulating film are set to be equal or approximately equal. It is desirable to adjust the thickness of the base film and the interlayer insulating film. Thus, by providing the IDF chip at the center of the article and further providing the semiconductor film at the center of the IDF chip, the stress on the semiconductor layer can be relieved and the occurrence of cracks can be prevented.

Further, the IDF chip and the antenna may be separately mounted on the article. If the mounting surfaces of the IDF chip and the antenna are different, there is no restriction on the mounting area, and the degree of freedom in design increases. The antenna in this case can also be formed directly on the article. Thereafter, the connection terminal of the antenna and the connection terminal of the IDF chip are connected. At this time, it can connect using an anisotropic conductor.

(Example 7)
The IDF chip is assumed to have a certain area as compared with a chip formed of a silicon wafer, and further has high flexibility. Therefore, it is necessary to consider breakage in a bent state. Therefore, in the present embodiment, a state where a banknote on which an IDF chip is mounted is bent will be described.

FIG. 19A shows a state in which a banknote 301 which is an IDF chip mounting article is bent in the arrow direction 280. In general, since a thin film article is easily bent or bent in the long axis direction, a case of bending in the long axis direction will be described in this embodiment.

The state of the IDF chip 104 at this time is shown in FIG. The IDF chip includes a plurality of thin film transistors, and the thin film transistors are arranged so that a carrier moving direction 281 and an arrow direction (bending direction) 280 are perpendicular to each other. That is, the source region 230 (s), the channel formation region 230 (c), and the drain region 230 (d) of the thin film transistor are arranged so as to be perpendicular to the bending direction 280. As a result, destruction and peeling of the thin film transistor due to bending stress can be prevented.

Further, when a crystalline semiconductor film using laser irradiation is used as the semiconductor film, the laser scanning direction 283 is also set to be perpendicular to the bending direction 280. For example, as shown in FIG. 23, when a laser irradiation region (spot) 282 is scanned zigzag to crystallize the entire surface, the laser scanning direction (major axis side) 283 is a direction perpendicular to the bending direction 280. To do.

By bending the IDF chip in such a direction, the IDF chip, particularly the thin film transistor, is not destroyed, and crystal grain boundaries existing in the carrier moving direction can be reduced as much as possible. As a result, the electrical characteristics of the thin film transistor, in particular, mobility can be improved.

In addition, when the ratio of the area occupied by the patterned semiconductor film in the IDF chip is 1 to 30%, the thin film transistor can be prevented from being broken or peeled off due to bending stress.

The present embodiment can be applied to a semiconductor film constituting any of a non-contact type IDF chip, a contact type IDF chip, and a hybrid type IDF chip.

(Example 8)
In this embodiment, a usage form of an article on which a thin film integrated circuit is mounted will be described.

FIG. 18A shows an information flow including a medicine bottle 401 mounted with an IDF chip 402 attached to a label 403, a reader / writer device 410, a personal computer 420 having a display portion 421, and the like. Yes. First, information on the IDF chip, for example, information on usage dose, effects, side effects, allergies, etc., is input to the personal computer via the reader / rider device. These pieces of information can be confirmed on the display unit 421.

The information recorded on the IDF chip may have a company advertisement, for example, a homepage address. In this case, the Internet browser is activated, the address is input via the reader / rider device, and the homepage can be viewed. By reading the information recorded on the IDF chip, an input error can be prevented as compared with the case where information is manually input.

In addition, drug information can be read by a portable electronic device having the function of a reader / writer device, typically a mobile phone or a PDA. For example, the coil functioning as the antenna 431 of the cellular phone 430 is designed so as to also serve as the antenna of the reader / writer device. The information recorded on the IDF chip can be confirmed on the display unit 432 of the mobile phone.

FIG. 18B shows a circuit structure of the IDF chip and the reader / writer device.

First, the IDF chip 104 includes an antenna coil 501 and a capacitive element 502, and includes a demodulation circuit 503, a modulation circuit 504, a rectifier circuit 505, a microprocessor 506, a memory 507, and a switch 508 for supplying a load to the antenna coil 501. is doing. These circuits and the microprocessor can be formed by a thin film integrated circuit. Note that the memory 507 is not limited to one, and may be a plurality.

The reader / writer device 410 includes an antenna coil 511, a modulation circuit 512, and an oscillating means 513, which can generate a transmission signal. The reader / writer device 410 has a detection / demodulation circuit 514 that detects, amplifies, and demodulates the received signal. Since the received signal from the IDF chip is very weak, it may be separated and amplified by a filter or the like. These received signals are sent to the gate ASIC 515.

Data input to the gate ASIC is sent to the microprocessor 516 for processing. If necessary, signals are exchanged with the memory 517 to achieve predetermined arithmetic processing. The memory 517 stores programs and data used in the microprocessor 516, and can also be used as a work area during arithmetic processing. Thereafter, a signal can be exchanged with the signal interface 519. A power supply unit 518 is provided for mutual exchange of these signals.

The microprocessor 516, the memory 517, and the signal interface 519 can be provided in a personal computer or the telephone itself.

The reader / writer device may have an anti-collision function.

In addition, an electronic device such as a cellular phone that also functions as a reader / writer device includes an antenna coil 511, a modulation circuit 512, an oscillation unit 513, a detection demodulation circuit 514, a gate ASIC 515, a microprocessor 516, a memory 517, and a power supply unit. 518 and a signal interface 519 may be provided.

Of course, the above-described circuit or the like of a personal computer can be formed so as to also function as a reader / writer device.

In the IDF chip, a signal transmitted as a radio wave from the gate ASIC 515 via the modulation circuit 512 is converted into an AC electrical signal by electromagnetic induction in the antenna coil 501. The demodulating circuit 503 demodulates the alternating electrical signal and transmits it to the microprocessor 506 at the subsequent stage. The rectifier circuit 505 generates a power supply voltage using an AC electrical signal and supplies the power supply voltage to the subsequent microprocessor 506.

The microprocessor 506 performs various arithmetic processes according to the input signal. The memory 507 stores programs and data used in the microprocessor 506, and can also be used as a work area during arithmetic processing. The signal sent from the microprocessor 506 to the modulation circuit 504 is modulated into an alternating electrical signal. The switch 508 can apply a load to the antenna coil 501 in accordance with an AC electrical signal from the modulation circuit 504. The reader / writer device can read a signal from the microprocessor 506 as a result of receiving a load applied to the antenna coil 501 by radio waves.

Note that the circuit structure of the IDF chip and the circuit structure of the reader / writer device shown in FIG. 18B only show one embodiment of the present invention, and the present invention is not limited to the above structure. The signal transmission method is not limited to the electromagnetic coupling method shown in this embodiment mode, and an electromagnetic induction method, a microwave method, and other transmission methods may be used. Moreover, you may have functions, such as GPS, for example.

Example 9
In this embodiment, an experiment was conducted to compare the etching rates of tungsten and tungsten oxide with respect to ClF ₃ . FIG. 30 shows the etching rate (μm / h) of tungsten and tungsten oxide with respect to ClF ₃ when the temperature is 25 ° C., 50 ° C., 100 ° C., and 150 ° C.

As can be seen from FIG. 30, the etching rate of tungsten oxide is higher than that of tungsten. That is, it is preferable to use tungsten oxide for the release layer of the present invention because an etching rate is high, so that an IDF chip can be manufactured in a short time.

It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of an antenna It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the article | item which mounted the thin film integrated circuit. It is the figure which showed the article | item which mounted the thin film integrated circuit. It is the figure which showed the article | item which mounted the thin film integrated circuit. It is the figure which showed the usage form of the articles | goods which mounted the thin film integrated circuit. It is the figure which showed the state which bent the goods which mounted the thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the form of the thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing apparatus of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the manufacturing process of a thin film integrated circuit It is the figure which showed the article | item which mounted the thin film integrated circuit. It is the figure which showed the article | item which mounted the thin film integrated circuit. It is the figure which showed the article | item which mounted the thin film integrated circuit. Is a graph showing the tungsten against ClF _3, the comparison of the etching rate of the tungsten oxide

Claims (25)

Forming W, Mo, or a mixture of W and Mo on an insulating substrate;
Forming an oxide, nitride or nitride oxide of the W, Mo, or a mixture of W and Mo on the W, Mo, or a mixture of W and Mo;
Forming a plurality of thin film integrated circuits on the oxide, nitride or nitride oxide;
Forming a groove at a boundary between the plurality of thin film integrated circuits to expose the oxide, nitride, or nitride oxide;
Laminating an antenna substrate having an opening and an antenna formed on the plurality of thin film integrated circuits,
While the plurality of thin film integrated circuits are fixed to each other by the antenna substrate, a gas or a liquid containing halogen fluoride is introduced into the opening, the W, Mo, or a mixture of W and Mo, and the oxide, A method for manufacturing a thin film integrated circuit, wherein the insulating substrate is peeled off by removing nitride or nitride oxide. Forming W, Mo, or a mixture of W and Mo on an insulating substrate;
Forming an oxide, nitride or nitride oxide of the W, Mo, or a mixture of W and Mo on the W, Mo, or a mixture of W and Mo;
Forming a plurality of thin film integrated circuits on the oxide, nitride or nitride oxide;
Forming a groove at a boundary between the plurality of thin film integrated circuits to expose the oxide, nitride, or nitride oxide;
Laminating an antenna substrate having an opening and an antenna formed on the plurality of thin film integrated circuits,
While the plurality of thin film integrated circuits are fixed to each other by the antenna substrate, a gas or a liquid containing halogen fluoride is introduced into the opening, the W, Mo, or a mixture of W and Mo, and the oxide, Peeling the insulating substrate by removing nitride or nitride oxide;
A method for manufacturing a thin film integrated circuit, wherein the plurality of integrated thin film integrated circuits are bonded to a flexible substrate. Forming W, Mo, or a mixture of W and Mo on an insulating substrate;
Forming an oxide, nitride or nitride oxide of the W, Mo, or a mixture of W and Mo on the W, Mo, or a mixture of W and Mo;
Forming a plurality of thin film integrated circuits on the oxide, nitride or nitride oxide;
A groove is selectively formed at a boundary between the plurality of thin film integrated circuits to expose a part of the oxide, nitride, or nitride oxide, and to form a connection region including a part of the thin film integrated circuit. And
While the plurality of thin film integrated circuits are fixed to each other by the connection region, a gas or a liquid containing halogen fluoride is introduced into the groove, the W, Mo, or a mixture of W and Mo, and the oxide or nitride. Alternatively, a method for manufacturing a thin film integrated circuit, wherein the insulating substrate is removed by removing nitride oxide. Forming W, Mo, or a mixture of W and Mo on an insulating substrate;
Forming an oxide, nitride or nitride oxide of the W, Mo, or a mixture of W and Mo on the W, Mo, or a mixture of W and Mo;
Forming a plurality of thin film integrated circuits on the oxide, nitride or nitride oxide;
A groove is selectively formed at a boundary between the plurality of thin film integrated circuits to expose a part of the oxide, nitride, or nitride oxide, and to form a connection region including a part of the thin film integrated circuit. And
While the plurality of thin film integrated circuits are fixed to each other by the connection region, a gas or a liquid containing halogen fluoride is introduced into the groove, the W, Mo, or a mixture of W and Mo, and the oxide or nitride. Alternatively, the insulating substrate is removed by removing nitride oxide,
A method for manufacturing a thin film integrated circuit, wherein an antenna is attached to the integrated thin film integrated circuit. Forming W, Mo, or a mixture of W and Mo on an insulating substrate;
Forming an oxide, nitride or nitride oxide of the W, Mo, or a mixture of W and Mo on the W, Mo, or a mixture of W and Mo;
Forming a plurality of thin film integrated circuits on the oxide, nitride or nitride oxide;
A groove is selectively formed at a boundary between the plurality of thin film integrated circuits to expose a part of the oxide, nitride, or nitride oxide, and to form a connection region including a part of the thin film integrated circuit. And
While the plurality of thin film integrated circuits are fixed to each other by the connection region, a gas or a liquid containing halogen fluoride is introduced into the groove, the W, Mo, or a mixture of W and Mo, and the oxide or nitride. Alternatively, the insulating substrate is removed by removing nitride oxide,
Adhering the plurality of integrated thin film integrated circuits to a flexible substrate,
A method for manufacturing a thin film integrated circuit, wherein an antenna is attached to the integrated thin film integrated circuit. Forming W, Mo, or a mixture of W and Mo on an insulating substrate;
Forming an oxide, nitride or nitride oxide of the W, Mo, or a mixture of W and Mo on the W, Mo, or a mixture of W and Mo;
Forming a plurality of thin film integrated circuits on the oxide, nitride or nitride oxide;
A groove is selectively formed at a boundary between the plurality of thin film integrated circuits to expose a part of the oxide, nitride, or nitride oxide, and to form a connection region including a part of the thin film integrated circuit. And
Laminating an antenna substrate having an opening and an antenna formed on the plurality of thin film integrated circuits,
While the plurality of thin film integrated circuits are fixed to each other by the antenna substrate, a gas or liquid containing halogen fluoride is introduced into the groove and the opening, and W, Mo, or a mixture of W and Mo, and Peeling the insulating substrate by removing oxide, nitride or nitride oxide;
A method for manufacturing a thin film integrated circuit. In any one of Claims 1 thru | or 6,
The thin film integrated circuit includes a thin film transistor and a layer including an insulating film containing nitrogen provided above and below the thin film transistor. In any one of Claims 1 thru | or 7,
A method for manufacturing a thin film integrated circuit, wherein ClF ₃ is used as the halogen fluoride. In any one of Claims 1 thru | or 8,
The insulating substrate is
A method for manufacturing a thin film integrated circuit, which is a glass substrate, a quartz substrate, or a flexible synthetic resin substrate made of plastic or acrylic. In any one of Claims 1 thru | or 9,
The mounting position X of the thin film integrated circuit satisfies (1/2) · D−30 μm <X <(1/2) · D + 30 μm, where D is the thickness of the mounted article. Manufacturing method. In any one of Claims 1, 2, 4 to 10,
A method for manufacturing a thin film integrated circuit, wherein an antenna is attached to the thin film integrated circuit using an anisotropic conductor, an ultrasonic adhesive, or an ultraviolet curable resin. In any one of claims 1, 2, 4 to 11,
The antenna is formed by any one of a droplet discharge method, a sputtering method, a printing method, a plating method, a photolithography method, a vapor deposition method using a metal mask, or a combination thereof. Manufacturing method. The method for manufacturing a thin film integrated circuit according to claim 1, wherein the thin film integrated circuit has a thickness of 0.3 μm to 3 μm. 14. The method for manufacturing a thin film integrated circuit according to claim 1, wherein the area of the thin film integrated circuit is 25 mm ² or less. 15. The method for manufacturing a thin film integrated circuit according to claim 1, wherein the thin film integrated circuit includes a semiconductor film having a hydrogen concentration of 1 × 10 ^{19 to} 5 × 10 ²⁰ / cm ³ . The method for manufacturing a thin film integrated circuit according to claim 15, wherein the semiconductor film has a thickness of 0.2 μm or less. The semiconductor film according to claim 15 or 16, wherein the semiconductor film has a source, a drain, and a channel formation region.
The method for manufacturing a thin film integrated circuit, wherein the source, the drain, and the channel formation region are formed to be perpendicular to a direction in which a mounting article is bent. In any one of Claims 1 thru | or 17,
A method for manufacturing a thin film integrated circuit, wherein the thin film integrated circuits are formed by cutting the plurality of thin film integrated circuits by dicing, scribing, or laser cutting. Insulating substrate in which a plurality of thin film integrated circuits are formed through W, Mo, or a mixture of W and Mo and an oxide, nitride, or nitride oxide of W, Mo, or a mixture of W and Mo When,
An antenna substrate provided opposite to the insulating substrate;
The antenna substrate has an antenna and an opening,
A device substrate, wherein a groove is provided between the thin film integrated circuits so as to coincide with the opening. Insulating substrate in which a plurality of thin film integrated circuits are formed through W, Mo, or a mixture of W and Mo and an oxide, nitride, or nitride oxide of W, Mo, or a mixture of W and Mo When,
An antenna substrate provided opposite to the insulating substrate;
The antenna substrate has an antenna and an opening,
A device substrate, wherein a groove is provided between the thin film integrated circuits so as to coincide with the opening. Insulating substrate in which a plurality of thin film integrated circuits are formed through W, Mo, or a mixture of W and Mo and an oxide, nitride, or nitride oxide of W, Mo, or a mixture of W and Mo When,
The plurality of thin film integrated circuits are integrated by a connection region,
An antenna substrate provided opposite to the insulating substrate;
The antenna substrate has an antenna and an opening,
A device substrate, wherein a groove is provided between the thin film integrated circuits so as to coincide with the opening, and an opening is provided in the thin film integrated circuit. A device according to any one of claims 19 to 21.
The thin film integrated circuit includes a thin film transistor and a layer including an insulating film containing nitrogen provided above and below the thin film transistor. 23. The element substrate according to claim 19, wherein the thin film integrated circuit has a thickness of 0.3 [mu] m to 3 [mu] m. 24. The element substrate according to claim 19, wherein the thin film integrated circuit includes a semiconductor film having a hydrogen concentration of 1 × 10 ^{19 to} 5 × 10 ²⁰ / cm ³ . 25. The element substrate according to claim 24, wherein the semiconductor film has a thickness of 0.2 [mu] m or less.

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