JP2005338952A - Program branching method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve program switching through a simple process without requiring a large memory storage capacity. <P>SOLUTION: This program branching method includes allocating a memory that stores a plurality of programs 3, 4, 5 to a CPU 1 as a program area 2; determining branching by memory switching process parts 6, 7, 8 to selectively switch either of the plurality of programs 3, 4, 5; implementing a branching process to selectively switch either of the plurality of programs 3, 4, 5 in accordance with the determination of branching by the memory switching process parts 6, 7, 8; and causing the CPU 1 to implement a process that matches either of the programs 3, 4, 5 selectively switched to match the branching process. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a program branching method for switching a plurality of programs.

  Conventionally, when it is necessary to execute a plurality of programs in a small program area, it is necessary to start processing by the program after copying the program data from the memory to the execution area of the control means.

FIG. 6 is a flowchart showing a conventional program copy operation.
In FIG. 6, when the operation of the control means is started (step S41), first, a branch is determined for selectively switching one of a plurality of programs (step S42). Here, the determination of branching is made on condition of the state of the register and port of the control means.

  Next, the program code is copied from the external memory area to the program execution area by the control means (step S43). Thus, by determining the branch destination and proceeding to the processing, any one of the processing 71, processing 72, or processing 73 corresponding to the program copied to the execution area is executed by the control means.

In the method described in Patent Document 1, program switching is realized by using a boot-dedicated block and a block for switching to each partition.
In the method described in Patent Document 2, the program switching is realized by calculating the address of the function that the hardware calls next when switching the processing.
Japanese Patent Laid-Open No. 2003-280915 JP 2003-263329 A

  In the conventional program copy method described above, when a plurality of programs must be executed in a small program area, there is a disadvantage that the process must be started after the program data is copied from the memory to the execution area. .

  Further, in the method described in Patent Document 1, there are a boot-dedicated block and a block for switching to each partition. However, since the boot process is handled differently from other processes, program switching cannot be easily realized. Also, with this method, switching between partitions was not possible only by transferring processing to each partition.

  Further, in the method described in Patent Document 2, the address of the function to be called next by the hardware at the time of switching the process is calculated. However, since the process is complicated because the address is calculated, the addition of hardware becomes heavy. Moreover, since the switching part is implemented by hardware, versatility is lost.

  Therefore, an object of the present invention is to provide a program branching method that can realize program switching with a simple process without requiring a large memory storage capacity.

  In order to solve the above problems and achieve the object of the present invention, a program branching method of the present invention includes a step of allocating a memory area itself storing a plurality of programs to an execution area, and selecting one of the plurality of programs The step of making a branch decision for switching automatically, the step of making a branch process for selectively switching one of a plurality of programs according to the decision of the branch, and selectively switching to correspond to the branch process And a step of executing processing according to the program.

  According to this, by assigning the memory area itself in which the program to be executed is stored to the execution area of the control means, it is not necessary to copy the program code itself as in the prior art.

  Since a plurality of memories in which different programs are written are selectively allocated to the execution area of the control means, the process branches, so that another program code is placed in the address space to which the memory in which a certain program code is placed is allocated. By allocating the placed memory, processing can be switched without overhead.

  The program branching method of the present invention includes a step of assigning a memory area itself storing a plurality of programs to an execution area, a step of determining a branch for selectively switching one of the plurality of programs, A step of performing a branch process for selectively switching one of a plurality of programs according to the determination of the branch, a step of executing a process according to the program selectively switched to correspond to the branch process, and a selective process And a step of leaving an execution area for processing according to the program switched to (1).

  According to this, by assigning the memory area itself in which the program to be executed is stored to the execution area of the control means, it is not necessary to copy the program code itself as in the prior art. In addition, by leaving the execution area of the process corresponding to the selectively switched program, the execution area of the process corresponding to the program can be matched before and after the switching, so that the switching process can be performed efficiently. it can.

  Since a plurality of memories in which different programs are written are selectively allocated to the execution area of the control means, the process branches, so that another program code is placed in the address space to which the memory in which a certain program code is placed is allocated. Processing can be switched without overhead by allocating the placed memory and leaving a processing execution area corresponding to the selectively switched program.

  According to the present invention, since it is not necessary to copy the program code itself as in the prior art, program switching can be realized by simple processing without requiring a large memory storage capacity. In addition, processing can be switched without overhead.

Embodiments of the present invention will be described below with reference to the drawings as appropriate.
FIG. 1 is a diagram showing a configuration of a program branching apparatus according to an embodiment of the present invention.
In FIG. 1, a CPU (Central Processing Unit) 1 as a control means is allocated to a program area 2 in an execution area called a work area composed of ROM (Read Only Memory), RAM (Random access Memory), and the like. Configured to perform the operations of the program.

  Here, the memory in which the memory switching processing unit 6 and the boot processing unit 3, the memory switching processing unit 7 and the first processing unit 4, the memory switching processing unit 8 and the second processing unit 5 are stored as a plurality of programs. The area itself is configured to be assigned to the program area 2 which is an execution area. That is, the memory switching processing unit 6 and the boot processing unit 3, the memory switching processing unit 7 and the first processing unit 4, the memory switching processing unit 8 and the second processing unit 5 are connected to the CPU 1 as a control unit in the program area. Are assigned to two identical memory address areas. Specifically, the processing is switched by selecting a plurality of memories arranged at the same address.

  In addition, the memory switching processing unit 6, the memory switching processing unit 7, and the memory switching processing unit 8 are executed as a plurality of programs by the CPU 1 serving as a control unit, as a boot processing unit 3, a first processing unit 4, and a second processing unit. 5 is configured to determine a branch for selectively switching any one of 5. Here, the memory switching processing unit 6, the memory switching processing unit 7, and the memory switching processing unit 8 are all configured by the same program. The memory switching condition is configured to use information outside the memory such as a port and a register of the CPU 1 as a control means.

  The memory switching processing unit 6, the memory switching processing unit 7, and the memory switching processing unit 8 are performed by the CPU 1 serving as a control unit as a plurality of programs according to the determination of branching, as a boot processing unit 3, a first processing unit 4, and a second processing unit. 2 is configured to perform a branching process for selectively switching one of the two processing units 5.

  Further, the CPU 1 as the control means executes processing according to the boot processing unit 3, the first processing unit 4, and the second processing unit 5 as a program selectively switched so as to correspond to branch processing. Configured to do.

  As a result, as shown in 9, program data to be allocated to the program area 2 is selected by the switching process by the memory switching processing unit 6, the memory switching processing unit 7, and the memory switching processing unit 8. Then, the CPU 1 as the control means has a boot processing unit 3 as a program allocated to the program area 2 in the execution area by the switching process by the memory switching processing unit 6, the memory switching processing unit 7, and the memory switching processing unit 8. The operations of the first processing unit 4 and the second processing unit 5 are executed.

FIG. 2 is a flowchart showing the memory switching operation corresponding to the interrupt factor. FIG. 2 shows an operation when the above-described memory switching condition corresponds to an interrupt factor.
In FIG. 2, CPU1 as a control means judges whether there exists interruption (step S1). Specifically, the CPU 1 detects a timer interruption that occurs at regular intervals, an interruption due to a state transition of a controlled unit that is controlled by the CPU 1, and the like.

  When CPU 1 determines that there is an interrupt, CPU 1 determines what the interrupt factor is (step S2). Specifically, the CPU 1 detects an interrupt factor due to a reset operation when the power-on switch is turned on, an interrupt factor when the state of the controlled unit controlled by the CPU 1 transitions to another state, and the like. .

  The CPU 1 performs memory switching corresponding to the interrupt factor (step S3). Specifically, the CPU 1 assigns the boot processing unit 3 to the program area 2 by the switching process by the memory switching processing unit 6 shown in FIG. 1 when the interrupt factor is caused by the reset operation when the power-on switch is turned on. Selected to be. Further, when an interrupt factor is generated when the state of the controlled unit controlled by the CPU 1 is changed to another state, the first switching process is performed by the memory switching processing unit 7 and the memory switching processing unit 8 illustrated in FIG. The processing unit 4 and the second processing unit 5 are selected so as to be allocated to the program area 2.

FIG. 3 is a flowchart showing the operation of switching the whole program by branching.
In FIG. 3, the memory switching processing unit determines branching (step S11, step S21, step S31). Specifically, the memory switching processing unit shown in FIG. 1 selects any one of the first processing unit, the second processing unit, and the third processing unit as a plurality of programs by the CPU 1 as the control unit. Judgment of branch to switch automatically.

  If it is determined that branching is necessary, the memory switching processing unit next performs branching (switching) processing (step S12, step S22, step S32). Specifically, the memory switching processing unit (step S12, step S22, step S32) shown in FIG. 1 is performed by the CPU 1 serving as a control unit by the first processing (step S13), the second processing by the first processing unit. A branching process for selectively switching between the second process (step S23) by the processing unit and the third process (step S33) by the third processing unit is performed.

By branching (switching) processing of the memory switching processing unit (step S12, step S22, step S32), as shown in 31, all of them are programmed (step S11 to step S13, step S21 to step S23, step S31 to step S33). )
Switch.

  Here, when the process is switched to the first process (step S13) by the first processing unit, the CPU 1 as the control means shown in FIG. 1 is selectively switched to correspond to the branch process. As a program, a process corresponding to the first processing unit is executed (step S13).

  When the second processing unit switches to the second processing (step S23), the CPU 1 as the control unit shown in FIG. 1 selectively switches to correspond to the branch processing. As a result, processing corresponding to the second processing unit is executed (step S23).

  When switched to the third processing (step S33) by the third processing unit, the CPU 1 as the control means shown in FIG. 1 is selectively switched so as to correspond to the branch processing. Then, the process according to the third processing unit is executed (step S33).

  As described above, the memory switching processing unit (step S12, step S22, step S32) includes the first processing by the first processing unit (step S13), the second processing by the second processing unit (step S23), The third processing unit operates so as to call the third processing (step S33).

  Here, as a premise, first, memories storing programs for the number of switching processes are arranged at the same address. Next, a memory switching processing unit for managing memory switching is mounted at the head of the program recorded in all memories, and the processing unit for each program is mounted at the rear of the memory switching processing unit.

  Then, when the process is started, branch determination and switching processing are first performed by the memory switching processing unit mounted at the head portion of the program recorded in the memory. Here, as shown at 31, all of the programs are switched by branching (switching).

  Next, the program stored in the switched memory is executed by the CPU 1 as the control means shown in FIG. 1, and when the execution of the program is completed, the memory switching processing unit returns to branch determination and switching processing again. These determinations and processing are repeated.

FIG. 4 is a diagram illustrating a hardware configuration.
In FIG. 4, the CPU 41 as the control means is assigned with the first memory 43, the second memory 44, and the third memory 45 in the same address area. The CPU 41 supplies the same address signal AD such as a chip select signal to the first memory 43, the second memory 44, and the third memory 45.

  Here, a selection signal CH such as a chip enable signal is supplied from the switch 42 to the first memory 43, the second memory 44, and the third memory 45, for example. The selection signal CH may be any signal that enables the address areas of the first memory 43, the second memory 44, and the third memory 45 assigned to the same address area.

  For the first memory 43, the second memory 44, and the third memory 45 arranged in the same address area with respect to the CPU 41, the CPU 41 sends the same address signal AD such as a chip select signal to the first memory. 43, the second memory 44, and the third memory 45 to select one of the first memory 43, the second memory 44, and the third memory 45.

  Then, the CPU 41 outputs the program data stored in any of the first memory 43, the second memory 44, and the third memory selected by the selection signal CH from the switch 42.

  Here, the switch 42 that manages the selection signal CH is configured to be able to perform switching processing based on the selection signal CH from the CPU 41.

FIG. 5 is a diagram illustrating a configuration of a program branching apparatus according to the OS process.
In FIG. 5, a CPU 51 as a control means is configured to execute an operation of a program allocated to a program area 53 in an execution area called a work area composed of ROM, RAM, and the like.

  Here, as a plurality of programs, an operating system (OS (Operating System)) processing unit 57, a first task processing unit 54, a program counter unit 61 and a stack pointer unit 62, an operating system (OS) processing unit 58, a first 2 task processing unit 55, program counter unit 63 and stack pointer unit 64, operating system (OS) processing unit 59, third task processing unit 56, program counter unit 65 and stack pointer unit 66 serve as control means. The CPU 51 is assigned to the same memory address area of the program area 53. Specifically, the processing is switched by selecting a plurality of memories arranged at the same address.

  In addition, the operating system (OS) processing unit 57, the operating system (OS) processing unit 58, and the operating system (OS) processing unit 59 are converted into a plurality of programs by the first task processing unit 54, It is configured to determine a branch for selectively switching between the second task processing unit 55 and the third task processing unit 56. Here, the operating system (OS) processing unit 57, the operating system (OS) processing unit 58, and the operating system (OS) processing unit 59 are all configured by different programs. The memory switching condition is configured to use information outside the memory such as a port and a register of the CPU 51 as a control means.

  In addition, the operating system (OS) processing unit 57, the operating system (OS) processing unit 58, and the operating system (OS) processing unit 59 are processed by the CPU 51 as the control unit as a plurality of programs according to the branch determination as the first task. It is configured to perform a branch process for selectively switching any one of the processing unit 54, the second task processing unit 55, and the third task processing unit 56.

  Further, the CPU 51 serving as the control means sends the first task processing unit 54, the second task processing unit 55, and the third task processing unit 56 as programs that are selectively switched so as to correspond to the branch processing. It is comprised so that the process according to this may be performed.

  The program counter unit 61 and the stack pointer unit 62, the program counter unit 63 and the stack pointer unit 64, the program counter unit 65 and the stack pointer unit 66 are the first task processing unit as a selectively switched program. 54, the second task processing unit 55 and the third task processing unit 56 are configured to leave a processing execution area.

  Here, the program counter units 61, 63, 65 count the addresses of the programs by the first task processing unit 54, the second task processing unit 55, and the third task processing unit 56. Further, the stack pointer portions 62, 64, 66 indicate and leave the program addresses by the program counter portions 61, 63, 65.

  Further, the stack RAM 52 stores the address of the program left by the stack pointer unit 62, the stack pointer unit 64, and the stack pointer unit 66 in a readable manner.

  As a result, as shown in 67, the program data allocated to the program area 53 is selected by the switching process by the operating system (OS) processing unit 57, the operating system (OS) processing unit 58, and the operating system (OS) processing unit 59. The

  Then, the CPU 51 as the control means allocates to the program area 53 in the execution area by the switching process by the operating system (OS) processing unit 57, the operating system (OS) processing unit 58, and the operating system (OS) processing unit 59. The operations of the first task processing unit 54, the second task processing unit 55, and the third task processing unit 56 as the programmed programs are executed.

It is a figure which shows the structure of the program branching apparatus by embodiment of this invention. It is a flowchart which shows the operation | movement of memory switching corresponding to the interruption factor. It is a flowchart which shows the operation | movement of the switching of the whole program by a branch. It is a figure which shows a hardware configuration. It is a figure which shows the structure of the program branch apparatus according to OS process. It is a flowchart which shows the operation | movement of the conventional program copy.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... CPU, 2 ... Program area | region, 3 ... Boot process part, 4 ... 1st process part, 5 ... 2nd process part, 6 ... Memory switch process part, 7 ... Memory switch process part, 8 ... Memory switch process , 9... Program data assigned to the program area 2 is selected by the switching process. 31... All the programs are switched by branching (switching). 41... CPU, 42. 2nd memory, 45 ... 3rd memory, AD ... Same address signal, CH ... Selection signal, 51 ... CPU, 53 ... Program area, 54 ... 1st task processing part, 55 ... 2nd task processing part, 56 ... third task processing unit, 57 ... operating system (OS) processing unit, 58 ... operating system (OS) processing unit, 59 ... operating system (OS) Management unit 61... Program counter unit 62 62 Stack pointer unit 63 Program counter unit 64 Stack pointer unit 65 Program counter unit 66 Stack pointer unit 67 Switching process by operating system (OS) Program data allocated to the program area 53 is selected.

Claims (8)

In a program branching method for switching a plurality of programs stored in a memory area to an execution area of a control means and reading and executing processing according to the program,
Assigning the memory area itself storing the plurality of programs to the execution area;
Determining a branch for selectively switching one of the plurality of programs;
A step of performing a branch process for selectively switching one of the plurality of programs according to the determination of the branch;
And a step of executing a process according to a program selectively switched so as to correspond to the branch process. The program branching method according to claim 1, wherein
The plurality of programs includes a switching processing unit corresponding to the step of performing the branching process, and a program processing unit corresponding to the plurality of programs. The program branching method according to claim 1, wherein
A program branching method comprising: the step of determining the branch, the step of performing the branch process, and the step of executing the process are repeatedly executed. The program branching method according to claim 1, wherein
The program branching method characterized in that the step of determining the branch determines whether or not there is an interrupt process, and the step of performing the branch process performs a branch process corresponding to the interrupt factor of the interrupt process. In a program branching method for switching a plurality of programs stored in a memory area to an execution area of a control means and reading and executing processing according to the program,
Assigning the memory area itself storing the plurality of programs to the execution area;
Determining a branch for selectively switching one of the plurality of programs;
A step of performing a branch process for selectively switching one of the plurality of programs according to the determination of the branch;
Executing a process corresponding to the program selectively switched to correspond to the branch process;
Leaving an execution area for processing according to the selectively switched program;
A program branching method comprising: The program branching method according to claim 5, wherein
The plurality of programs include an operating system (OS) processing unit corresponding to the step of performing the branching process, a program processing unit corresponding to the plurality of programs, and a program counter that counts program addresses by the program processing unit. And a stack pointer section for leaving the address of the program by the program counter section. The program branching method according to claim 5, wherein
The program branch comprising: the step of determining the branch, the step of performing the branch process, the step of executing the process, and the step of leaving the execution area of the process are repeatedly executed. Method. The program branching method according to claim 5, wherein
The step of determining the branch determines whether or not there is an operating system (OS) process and an interrupt process, and the step of performing the branch process determines a processing request based on the operating system (OS) process and an interrupt factor of the interrupt process. A program branching method characterized by branching correspondingly.

Images