JP2005333737A - Power converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the strain of an output voltage by compensating the voltage drop by a reactor. <P>SOLUTION: An inverter circuit 10 includes a series circuit of the reactor 20 and a capacitor 30 connected between its AC output terminals, a control means 50A for generating a drive signal to the inverter circuit 10 based on an output voltage instruction, and a signal generating means 60 for generating the drive signal to the inverter circuit 10 based on the output voltage instruction. A power converter has a load 40 connected to both the ends of the capacitor 30. The inverter circuit also includes a current detecting means 70 for detecting the current flowing to the reactor 20. The control means 50A includes a means 51 for detecting the strain of the current of the reactor 20, a means 52 for calculating an odd number order harmonic voltage using its strain, and an adding means 53 for adding the odd number order harmonic voltage to the original output voltage instruction to generate a final output voltage instruction. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a power conversion device that converts DC power into AC power having a desired magnitude and frequency by an inverter circuit, and particularly reduces distortion of output voltage in a power conversion device having a capacitor input rectifier as a load. It is about technology.

FIG. 6 shows a schematic configuration of this type of power conversion device.
In FIG. 6, this power converter includes an inverter circuit 10 including semiconductor switching elements S1 to S4, a series circuit of a smoothing reactor 20 and a capacitor 30 connected between the AC output terminals, and an inverter circuit 10 A pulse width modulation signal generating means 60 for turning on and off the switching element and a control means 50 are provided. A load 40 is connected to both ends of the capacitor 30.

In the above configuration, the control unit 50 outputs the output voltage command V _out ^* of the inverter circuit 10, and switching is performed using the pulse width modulation signal generated by the pulse width modulation signal generation unit 60 based on the output voltage command V _out ^*. The elements S <b> 1 to S <b> 4 are turned on / off to convert DC power into AC power and supply it to the load 40. Moreover, the reactor 20 and the capacitor | condenser 30 are for absorbing the harmonic component of the alternating voltage and electric current which the inverter circuit 10 outputs.

Here, when the load 40 is a capacitor input type rectifier load having a diode rectifier and a DC capacitor at its input stage, and the impedance thereof changes intermittently, as shown in FIG. It is known that the output voltage V _out is suppressed in the vicinity of the peak and includes a lot of distortion.
As means for reducing such distortion of the output voltage, for example, a waveform comparison method of an inverter for an uninterruptible power supply described in Patent Document 1 is known.

This prior art is a triangular-wave comparison type PWM control inverter that has a peak obtained by superimposing a correction voltage ΔV ₀ in a phase range Δθ corresponding to the peak portion on a desired sine wave voltage command V ₀ sin ωt as shown in FIG. A modified sine wave signal with a raised portion is generated, and this signal is compared with a triangular wave as an output voltage command V _out ^*. By appropriately adjusting the peak value m and Δθ of ΔV ₀ , The AC voltage supplied to the rectifier load is controlled to a substantially sinusoidal waveform in which the peak portion is not suppressed.
In addition, the following numerical formula 1 shows the value of ΔV ₀ corresponding to the range of θ.

  Further, as another prior art, an inverter device that reduces distortion of an output voltage in an inverter device using a capacitor input rectifier as a load is described in Patent Document 2 below.

JP-A-3-293970 (lower right column on page 2 to upper right column on page 3 [E. Means for Solving Problems], [F. Action], FIG. 1, FIG. 3, etc.) Japanese Unexamined Patent Publication No. 7-337024 (paragraphs [0008], [0009], FIG. 1, FIG. 2, etc.)

In the prior art described in Patent Document 1, the correction voltage ΔV ₀ is superimposed over the range in which the output voltage decreases, that is, the range in which the load current flows. Since the correction voltage ΔV ₀ has a frequency and phase different from those of the voltage applied to the reactor 20, there is a problem that the voltage drop at the reactor 20, which is a factor that distorts the output voltage, cannot be corrected.
The prior art described in Patent Document 2 is a technique for reducing distortion of output voltage caused by load current detection delay, calculation delay of a control circuit, etc., and compensates for a voltage drop in a reactor as in Patent Document 1. This is not a direct issue.
Therefore, a problem to be solved by the present invention is to provide a power converter that can correct the voltage drop in the reactor reliably and reduce distortion of the output voltage more effectively.

In order to solve the above-described problems, an invention described in claim 1 is directed to an inverter circuit having a semiconductor switching element, a series circuit of a reactor and a capacitor connected between the AC output terminals, and an output voltage command of the inverter circuit. In a power conversion apparatus comprising: a control means for generating a signal generation means for generating a drive signal for the semiconductor switching element based on the output voltage command; and a load connected to both ends of the capacitor.
Comprising current detection means for detecting the current flowing through the reactor, and
The control means adds a means for detecting distortion of the detected current by the current detection means, a means for calculating an odd harmonic voltage using the distortion, and adding the odd harmonic voltage to the original output voltage command. And adding means for generating a final output voltage command.

The invention described in claim 2 is the power conversion device described in claim 1,
The means for detecting the distortion of the detected current is a crest factor calculating means for calculating a ratio between the maximum value and the effective value of the detected current.

  According to a third aspect of the present invention, in the power converter according to the first or second aspect, the odd-order harmonic voltage is a sum of the third-order harmonic voltage and the fifth-order harmonic voltage. .

  According to a fourth aspect of the present invention, there is provided the power converter according to the first, second, or third aspect, wherein the odd-order harmonic voltage amount added to the original output voltage command is changed in accordance with the fundamental phase. It is equipped with.

According to the first aspect of the present invention, it is possible to effectively reduce the output voltage distortion of the power converter by giving the inverter circuit an output voltage command that compensates for the voltage drop caused by the reactor.
According to the second aspect of the present invention, the current distortion for calculating the correction odd-order harmonic voltage can be obtained by a simple calculation.
Furthermore, according to the third aspect of the present invention, it is possible to appropriately compensate for a voltage drop due to a predetermined harmonic voltage that is often included in the case of a capacitor input type rectifier load.
According to the fourth aspect of the present invention, it is possible to suppress correction in a period in which no current flows through the capacitor input rectifier load, and to prevent overcompensation of output voltage distortion.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, FIG. 1 is a block diagram showing a first embodiment of the present invention. The same components as those in FIG. 6 are denoted by the same reference numerals, and the description thereof is omitted. Hereinafter, different parts will be mainly described. .
In Figure 1, 70 is a current detecting means provided on the output side of the inverter circuit 10, the reactor current detection value I _L is the output thereof is inputted to the control unit 50A. The output voltage command V _out ^** calculated by the control means 50A is input to the pulse width modulation signal generating means 60, and the pulse generated by comparing the output voltage command V _out ^** with the carrier or the like as in the prior art. The switching elements S1 to S4 are turned on and off by the width modulation signal.

FIG. 2 shows the configuration of the control means 50A.
2, 51 is a reactor current detection value I _L is input crest factor indicates the degree of waveform distortion Q _{F (ratio} between the maximum value and the effective value of the waveform (= maximum value / effective value), the sine crest factor calculating means for calculating the a Q _{F =} √2) is a wave, 52 high for calculating a high-order harmonic voltage (odd harmonics voltage) [Delta] V _h as the correction voltage using the crest factor Q _F The second harmonic generation means 53 is an addition means for adding the original output voltage command V _out ^* and the higher order harmonic voltage ΔV _h to generate an output voltage command V _out ^** . This output voltage command V _out ^** is input to the pulse width modulation signal generating means 60 of FIG. 1 as a final output voltage command.

Here, the crest factor calculation means 51 calculates the crest factor Q _{F according} to Equation 2. In Equation 2, K is a positive constant, _Tf is a filter time constant, and s is a Laplace operator.

Further, the high-order harmonic generation means 52 calculates the high-order harmonic voltage ΔV _h according to Equation 3. In Formula 3, V ₃ and V ₅ are predetermined third-order harmonic components and fifth-order harmonic component amplitudes.

Here, according to the above Equation 3, when the crest factor is larger than √2, the value obtained by adding the higher-order harmonic voltage ΔV _h to the original output voltage command V _out ^* is the final output voltage command V _out ^** . The reason why the output voltage distortion of the power converter can be reduced by doing this will be described below.

First, the output voltage V _out of the power converter shown in FIG. 1 is a value obtained by subtracting the voltage drop _VL in the reactor 20 from the output voltage V _inv of the inverter circuit 10. The waveform of the current I _L flowing through the reactor 20 when the load 40 is a capacitor input type rectifier loads are as in Figure 3, the fundamental wave component as the current shown in Equation 4, the third-order harmonic component, 5 It can be approximated by the sum of the subharmonic components.
Further, the voltage drop V _L in the reactor 20 at this time can be approximated by Equation 5 from the relationship of V _L = L (dI _L / dt). Note that L is an inductance value of the reactor 20.

On the other hand, the crest factor _{Q F} of the current _{I L} flowing through the reactor 20 can be approximated by Equation 6.

Further, it determined in advance as the amplitude V ₅ amplitude V ₃ and the fifth order harmonic component of the third-order harmonic components as shown in the expression 3, respectively Equation 7 and Equation 8.
_{Incidentally, I 1rate, I 3rate, I} 5rate formulas 7 and 8, a respective order harmonic component of the current when the supply voltage to the rated load without adding a high-order harmonic component on the output voltage command.

The higher-order harmonic generation unit 52 in FIG. 2 calculates the higher-order harmonic voltage ΔV _h in the case of Q _F > √2 in Equation 3 based on Equations 3 and 6, as in Equation 9.

The higher order harmonic voltage ΔV _h shown in Equation 9 is an odd order harmonic calculated according to the distortion of the current flowing through the reactor 20 in order to compensate for the higher order harmonic voltage drop in the reactor 20 shown in Equation 5. This is a correction voltage composed of wave components.
This higher harmonic voltage ΔV _h is added to the original output voltage command V _out ^* by the adding means 53 of FIG. 2 to obtain the final output voltage command V _out ^** , thereby causing the output voltage distortion. Thus, the higher-order harmonic voltage drop in the reactor 20 can be reduced, and the output voltage waveform can be controlled to be substantially sinusoidal.

Next, FIG. 4 shows the configuration of the control means 50B in the second embodiment of the present invention. The control means 50B, similarly to the control unit 50A of the first embodiment, as an input the reactor current detection value I _L, calculates a final output voltage command V _out ^** to be output to the pulse width modulation signal generating means 60 To do.

That is, the control unit 50B in the second embodiment, in the same manner as the first embodiment higher order harmonic voltage [Delta] V _h a reference sine wave of the absolute value output from the high-order harmonic generator 52 | sin .omega.t | and multiplication The addition means 53 adds the correction voltage ΔV output from the multiplication means 54 to the original output voltage command V _out ^* to obtain the final output voltage command V _out ^**. It is configured.

According to the first embodiment, as a result of correcting the output voltage command by adding the high-order harmonic voltage ΔV _h even in a period when the load current does not flow (period other than the vicinity of the peak of the output voltage waveform) There is a risk that the distortion becomes overcompensated and increases the distortion. On the other hand, by adopting the configuration as shown in FIG. 4, the amount of the odd-order harmonic voltage added to the original output voltage command V _out ^* can be changed according to the fundamental wave phase. It is possible to reduce the correction voltage ΔV during a period in which no current flows through the load, thereby suppressing excessive compensation of output voltage distortion.
Here, FIG. 5 shows a waveform example of the higher-order harmonic voltage ΔV _h , the absolute value | sinωt | of the reference sine wave, and the correction voltage ΔV in FIG. 4, and ΔV in a period other than the vicinity of the peak of | sinωt | Is suppressed to a relatively small value.

It is a block diagram which shows 1st Embodiment of this invention. It is a block diagram of the control means of FIG. It is a wave form diagram explaining a reactor current. It is a block diagram of the control means in 2nd Embodiment of this invention. It is a wave form diagram which shows the operation | movement of FIG. It is a general block diagram of a power converter device. It is a wave form diagram which shows distortion of an output voltage. It is a wave form diagram which shows operation | movement of a prior art.

Explanation of symbols

10: inverter circuit 20: reactor 30: capacitor 40: load 50A, 50B: control means 51: crest factor calculation means 52: high-order harmonic generation means 53: addition means 54: multiplication means 60: pulse width modulation signal generation means 70 : Current detection means S1 to S4: Semiconductor switching element

Claims (4)

An inverter circuit having a semiconductor switching element; a series circuit of a reactor and a capacitor connected between the AC output terminals; control means for generating an output voltage command of the inverter circuit; and the semiconductor switching based on the output voltage command In a power conversion device comprising a signal generation means for generating a drive signal for the element, and a load is connected to both ends of the capacitor,
Comprising current detection means for detecting the current flowing through the reactor, and
The control means includes
Means for detecting distortion of the detected current by the current detecting means;
Means for calculating an odd harmonic voltage using the distortion;
Adding means for adding the odd harmonic voltage to the original output voltage command to generate a final output voltage command;
The power converter characterized by having. In the power converter device according to claim 1,
A power conversion apparatus characterized in that the means for detecting the distortion of the detected current is a crest factor calculating means for calculating a ratio between the maximum value and the effective value of the detected current. In the power converter device according to claim 1 or 2,
An odd-order harmonic voltage is a sum of a third-order harmonic voltage and a fifth-order harmonic voltage. In the power converter device according to claim 1, 2, or 3,
A power conversion device comprising means for changing an amount of an odd-order harmonic voltage to be added to an original output voltage command in accordance with a fundamental wave phase.

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