JP2005311347A - Process for producing schottky junction semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a process for producing a Schottky junction semiconductor device, adapted to allow controlling the height of a Schottky barrier to a desired value to minimize electric power loss, without causing n factor to increase. <P>SOLUTION: A process for producing a Schottky junction semiconductor device includes a process of forming a Schottky electrode on the surface of a silicon carbide epitaxial layer, wherein a Schottky electrode is formed of molybdenum, tungsten or an alloy thereof on the surface of a silicon carbide epitaxial layer and then subjected to heat treatment, to cause alloying reaction at an interface, between the silicon carbide epitaxial layer and the Schottky electrode, thereby forming an alloy layer at the interface, whereby the height of Schottky barrier is controlled, while n factor is kept at a substantially constant low value. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a Schottky junction semiconductor device in which a Schottky electrode layer is formed on the surface of a silicon carbide epitaxial layer.

  Silicon carbide (SiC) is a semiconductor that has excellent physical properties such as a band gap of about 3 times, a saturation drift velocity of about 2 times, and a breakdown electric field strength of about 10 times that of Si. Development has progressed as a material for the device, and Schottky diodes using SiC are now on the market.

This Schottky diode includes a SiC single crystal substrate obtained by slicing a SiC bulk single crystal grown by a sublimation method into a wafer shape, and a chemical vapor deposition method (CVD) from the surface of the SiC single crystal substrate. : Epitaxial layer with SiC single crystal film grown by Chemical Vapor Deposition), Schottky electrode formed by sputtering or vacuum deposition on the surface of this epitaxial layer, and ohmic formed on the back side of SiC single crystal substrate And electrodes. As a material for the Schottky electrode, nickel, titanium, or the like is used (Patent Document 1).

  In a Schottky junction type power semiconductor device such as a Schottky diode, it is necessary to reduce power loss. The power loss of the Schottky diode based on the sum of the power loss at the time of energization in the forward direction and the power loss due to the leakage current at the time of the action of the reverse voltage is at the junction interface between the Schottky electrode and the SiC epitaxial layer. Depends on the Schottky Barrier Height (SBH).

For example, the power loss density of a Schottky diode at a 50% duty cycle can be described as ½ (V _f J _f + V _r J _r ) (Non-Patent Document 1). Here, V _r is a reverse voltage, J _f is a forward current, V _f is a forward voltage, and J _r is a reverse current. The evaluation of the Schottky diode is expressed by V _r and J _f . On the other hand, V _f and J _r depend on SBH. As an example, when calculating the power loss of a 4H-SiC Schottky diode with J _f being 100 Acm ⁻² and V _r being 4 kV, when SBH is 1.18 to 1.3 eV within a range of 25 ° C. to 200 ° C. To a minimum.

  A Schottky diode having a reverse withstand voltage of about 0.6 to 5.0 kV is often used. With such a reverse withstand voltage, when SBH is about 0.9 to 1.3 eV, Power loss is minimized. However, when the Schottky electrode is formed of nickel or titanium, the SBH is about 1.6 eV for nickel and about 0.8 eV for titanium, and the power loss of the Schottky diode cannot be minimized.

  It has been proposed to control SBH by forming a Schottky electrode with Ti on a SiC layer and then performing heat treatment at a predetermined temperature. However, when heat treatment is performed on such a Schottky electrode formed of titanium or the like, the ideal factor (n factor), which is a parameter representing the performance of the Schottky diode, increases as shown in FIG. Thus, it is far from the ideal value of 1.

In general, when the current passing through the Schottky barrier interface passes only on the peak of the barrier, that is, only the thermal diffusion current transport, the current increases exponentially with respect to the voltage, and the current value is expressed as exp. (EV / kT) -1 (where e is an elementary charge, V is a voltage, k is a Boltzmann constant, and T is a temperature). However, in the case of passing through the inside of the barrier by tunneling or the like as well as on the top of the barrier, current flows even if the voltage is low, and the current value deviates from the above equation. Thus, replacing with V / n, the current value is expressed as exp (eV / nkT) -1. This n is an ideal factor, and n = 1 in the ideal case of only the thermal diffusion transport current, but in the actual case where other current flows due to various factors, the value of the n factor is larger than 1. Become.

As described above, after forming a Schottky electrode with Ti or the like and performing a heat treatment at a predetermined temperature to control SBH, the value of the n factor increases significantly than 1 and the performance of the Schottky diode deteriorates. However, there is a problem that, for example, a leakage current increases when a reverse voltage is applied.
JP 2000-188406 A “IEEE Trans. Electron Devices”, March 1993, Vol. 40, No. 3, p. 645-655 “IEEE Trans. Electron Devices” April 2002, vol. 49, No. 4, p. 665-672

  The present invention has been made to solve the above-described problems in the prior art, and when obtaining a withstand voltage of about 0.6 to 5.0 kV, which is often used in Schottky diodes, An object of the present invention is to provide a method for manufacturing a Schottky junction semiconductor device capable of controlling the height of the Schottky barrier to a desired value that minimizes power loss without increasing the n factor.

  The present inventor forms a Schottky electrode using molybdenum or tungsten and performs heat treatment, so that the height of the Schottky barrier is 1.0 to 1 in a state where the n factor is kept at about 1.05 or less. The present invention has been completed by finding that it can be controlled to a desired optimum value in a region where the power loss is as small as .3 eV.

A method for manufacturing a Schottky junction semiconductor device according to the present invention is a method for manufacturing a Schottky junction semiconductor device in which a Schottky electrode is formed on the surface of a silicon carbide epitaxial layer,
A Schottky electrode made of molybdenum, tungsten, or an alloy thereof is formed on the surface of the silicon carbide epitaxial layer and then heat-treated to cause an alloying reaction at the interface between the silicon carbide epitaxial layer and the Schottky electrode. An alloy layer is formed on the surface, and thereby the height of the Schottky barrier is controlled in a state where the n factor is maintained at a substantially constant low value.

  This heat treatment is performed at 300 to 1200 ° C., preferably 400 to 700 ° C., so that the height of the Schottky barrier is 1.0 to 1.3 eV while maintaining the n factor at 1.05 or less. It can be arbitrarily controlled within the range of 1.1 to 1.3 eV for molybdenum and 1.0 to 1.1 eV for tungsten.

According to the present invention, the height of the Schottky barrier can be controlled to a desired value in a region where the power loss is minimized without significantly increasing the n factor.
In addition, since a high temperature heat treatment is applied to the Schottky electrode in advance at the time of manufacture, a Schottky junction type semiconductor device having good characteristics under a high temperature environment and having high heat resistance against heat generation due to a surge current or the like is obtained. Can do.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1A to 1D are cross-sectional views illustrating a manufacturing process of a Schottky diode in one embodiment of the present invention. In FIG. 1A, 1 is a SiC single crystal substrate, 2 is a SiC epitaxial layer, and 3 is an ion implantation layer. The SiC single crystal substrate 1 is an n-type 4H—SiC substrate doped with impurities at a high concentration (5 × 10 ¹⁸ cm ⁻³ ), and is a bulk crystal of SiC grown by a sublimation method (modified Rayleigh method). The slice is used.

  In the case of the modified Rayleigh method, for example, SiC powder is put into a crucible and heated at 2200 to 2400 ° C. to vaporize and deposited on the surface of the seed crystal typically at a rate of 0.8 to 1 mm / h for bulk growth. Let SiC single crystal substrate 1 is obtained by slicing the obtained ingot to a predetermined thickness so that a desired crystal plane is exposed.

  The surface of the SiC single crystal substrate 1 is smoothed by a polishing process or the like. If the surface of the cut wafer is processed into a mirror surface by hydrogen etching, chemical mechanical polishing (CMP), or the like, the propagation density of basal plane dislocations to the epitaxial film is reduced.

  Next, an SiC single crystal film is epitaxially grown from the smoothed surface of SiC single crystal substrate 1 by a CVD method. Propane or the like is used as the C source gas, and silane or the like is used as the Si source gas. A mixed gas of these source gases, a carrier gas such as hydrogen, and nitrogen as a dopant gas is supplied to the surface of the SiC single crystal substrate.

Under these gas atmospheres, for example, SiC is epitaxially grown at a growth rate of 2 to 20 μm / h under conditions of 1500 to 1600 ° C. and 40 to 80 Torr. As a result, a 4H—SiC single crystal having the same crystal type as that of the SiC single crystal substrate 1 is step-flow grown, and a 30 μm thick SiC epitaxial layer 2 doped with 2.2 × 10 ¹⁵ cm ⁻³ of nitrogen as an impurity. Is formed.

  As a specific apparatus for performing epitaxial growth, a vertical hot wall furnace can be used. In the vertical hot wall furnace, a water-cooled double cylindrical tube made of quartz is installed. Inside the water-cooled double cylindrical tube, a cylindrical heat insulating material, a hot wall made of graphite, and a SiC single crystal substrate Is provided with a wedge-shaped susceptor for holding the device vertically. A high-frequency heating coil is installed around the outside of the water-cooled double cylindrical tube, the hot wall is induction-heated by the high-frequency heating coil, and the SiC single crystal substrate held by the wedge-shaped susceptor is heated by radiant heat from the hot wall. . SiC is epitaxially grown on the surface of the SiC single crystal substrate by supplying a reaction gas from below the water-cooled double cylindrical tube while heating the SiC single crystal substrate.

  After the SiC epitaxial layer 2 is formed on the surface of the SiC single crystal substrate 1, this substrate is cleaned, and then the substrate is introduced into a thermal oxidation furnace and subjected to an oxidation treatment at 1125 ° C. for about 1 hour. Thereby, an oxide film acting as a protective film for preventing contamination at the time of ion implantation is formed on SiC epitaxial layer 2.

Next, a part of the oxide film is removed by photolithography to form an opening, and SiC epitaxial layer 2 is exposed from this opening. Thereafter, aluminum serving as a p-type impurity is ion-implanted from the opening to form an aluminum ion implantation layer 3 (JTE: Junction Termination Extension). The aluminum ion implanted layer 3 is formed at a position that becomes the peripheral portion of the Schottky electrode in order to relax electric field concentration at the peripheral portion of the Schottky electrode to be formed later and improve the voltage resistance. The aluminum ion concentration in the aluminum ion implanted layer 3 is controlled so that the concentration decreases from the center toward the outside. The aluminum ion concentration is 2.2 × 10 ¹⁸ cm ^{−3 at the} center and 3 × 10 ¹⁷ cm at the outside. ^-3 . After the aluminum ions are implanted, a heat treatment is performed at 1700 ° C. for 3 minutes in order to electrically activate the aluminum.

Next, after the obtained substrate is washed, an oxidation treatment is performed at 1200 ° C. for 5 hours to form SiO ₂ oxide films 4 and 5 on both surfaces of the substrate, as shown in FIG. SiC single crystal substrate 1
After removing the oxide film 5 on the back surface of the substrate with buffered hydrofluoric acid, as shown in FIG. 1C, a nickel film 6 having a thickness of 350 nm is deposited on the back surface by a vacuum evaporation method, and then 1050 ° C. Heat treatment for 90 seconds. By this heat treatment, as shown in FIG. 1D, the nickel film 6 and the SiC single crystal substrate 1 form an alloy (nickel silicide) layer and function as an ohmic electrode 7.

  After the ohmic electrode 7 is formed, the oxide film 4 in the region where the Schottky electrode is to be formed is removed by photolithography in the same manner as described above. Next, a molybdenum film 8 (Schottky electrode) is deposited to a thickness of 100 nm on the surface of the SiC epitaxial layer 2 by sputtering at room temperature to about 50 ° C. for several minutes using Ar as a sputtering gas.

After the molybdenum film 8 is deposited, heat treatment is performed at a predetermined temperature. The heat treatment is preferably performed in an atmosphere of an inert gas such as argon or nitrogen.
By this heat treatment, alloying proceeds at the interface between the silicon carbide epitaxial layer 2 and the Schottky electrode 8, and an alloy layer of several nm is formed at the interface. The presence of this alloy layer can be confirmed as a contrast image by a high-resolution transmission electron microscope. The composition of the alloy layer is considered to be an alloy composed of MoC and MoSi.

  By forming the alloy layer by heat treatment, the physical properties are stabilized against fluctuations in temperature conditions and the like when using the Schottky diode, and the SBH is set to a desired value in a region where the power loss is minimized. Can be controlled. That is, by performing heat treatment within a range of 300 to 1200 ° C., preferably 400 to 700 ° C., SBH can be arbitrarily set between 1.1 to 1.3 eV (1.1 to 1.25 eV at 400 to 700 ° C.). Can be controlled. At this time, the n-factor does not fluctuate substantially by heat treatment in this temperature range, and is kept at a low value close to 1.

  FIG. 2 shows the relationship between the heat treatment temperature and SBH, and the heat treatment temperature and n factor. Thus, when molybdenum is used, SBH increases from about 1.1 eV before heat treatment to about 1.2 eV at 600 ° C., and the n factor is maintained at a substantially constant value of 1.05 or less. Although not shown, at a heat treatment temperature of 900 ° C., SBH was 1.27 eV and the n factor was 1.05 or less. In this embodiment, SBH was adjusted to 1.2 eV, which is the optimum value for reducing power loss when the withstand voltage is 4 kV, by performing heat treatment at 600 ° C. for 10 minutes.

  On the other hand, titanium, which is one of the metals conventionally used for Schottky electrodes, can control SBH by performing heat treatment as shown in FIG. Since it fluctuates and increases significantly, this affects the device performance such as an increase in leakage current when a reverse voltage is applied.

FIG. 3 shows the result of measuring forward and reverse currents and voltages at a temperature of 20 ° C. for the Schottky diode obtained by this embodiment. 3A shows the forward characteristics, and FIG. 3B shows the backward characteristics. The characteristic on-resistance (Ron) was 12.2 mΩcm ² , the characteristic on-voltage (Vf: voltage at which the forward current density was 100 Acm ⁻² ) was 2.2 V, and the withstand voltage was 4.4 kV. Thus, a Schottky diode having a high withstand voltage and a very low characteristic on-resistance and characteristic on-voltage with low power loss was obtained.

The physical property values of two Schottky diodes manufactured according to the above embodiment are shown below.
[Schottky diode (1)]
SBH: 1.27V
n factor: 1.02
(Hereinafter measured values at 20 ° C.)
Characteristic on-resistance: 12.20 mΩcm ²
Characteristic ON voltage: 2.16V
Withstand voltage: 4.40V
Leakage current density: 0.66 mAcm ⁻² (reverse voltage 4.0 kV)
[Schottky diode (2)]
SBH: 1.28V
n factor: 1.02
(Hereinafter measured values at 20 ° C.)
Characteristic on-resistance: 9.07 mΩcm ²
Characteristic ON voltage: 1.89V
Withstand voltage: 4.15V
Leakage current density: 0.14 mAcm ⁻² (reverse voltage 3.5 kV)
0.96 mAcm ^-2 (reverse voltage 4.0 kV)
(Hereafter, measured value at 150 ° C.)
Characteristic on-resistance: 29.46 mΩcm ²
Characteristic ON voltage: 3.64V
Leakage current density: 0.30 mAcm ^-2 (reverse voltage 3.0 kV)
Note that the leakage current density of 0.14 mAcm ^{−2 at} a reverse voltage of 3.5 kV of the Schottky diode (2) is 1/5 of the 5-kV Ni-4H—SiC Schottky diode reported in Non-Patent Document 2 above. Despite the value of 100 or less, the characteristic on-voltage (at 25 Acm ^-2 ) was about half that value.

Furthermore, the forward current 100MAcm ^-2 Schottky diode (2) at 0.99 ° C., was operated at a reverse voltage 3 kV, respectively power loss in the ON state and the OFF state 364Wcm ^-2, was 0.9Wcm ^-2 . Thus, even in a high temperature environment, the power loss in the off state is very small compared to the on state.

  In the present invention, since a high-temperature heat treatment is applied to the Schottky electrode in advance in the manufacturing process, the Schottky diode obtained according to the present invention can operate stably even at high temperatures and has good characteristics in a high-temperature environment. . For example, the leakage current is very small even at a high temperature as in the above example, and the operation is possible even at 250 ° C., for example. Even if heat is generated by a surge current that suddenly flows in a diode or the like, the Schottky electrode is preliminarily subjected to high-temperature heat treatment as described above, so that it is not easily damaged and has high heat resistance.

  In this embodiment, molybdenum is used as a material for forming the Schottky electrode. However, as shown in FIG. 2, even when tungsten is used, the n-factor is kept low and the performance of the element is not deteriorated. The height of the barrier can be controlled to a desired value in a region where the power loss is minimized. In the figure, SBH, which was about 1.2 eV before the heat treatment, decreases to about 1.1 eV at 600 ° C., and the n factor is maintained at a substantially constant value of 1.05 or less. Although not shown, at a heat treatment temperature of 700 ° C., SBH was 1.06 eV and n factor was 1.05 or less.

  When tungsten is used as the electrode forming material, a tungsten film is deposited on the SiC epitaxial layer to form a Schottky electrode, and then heat treatment is performed at a predetermined temperature. The heat treatment is preferably performed in an atmosphere of an inert gas such as argon or nitrogen. By this heat treatment, alloying proceeds at the interface between the silicon carbide epitaxial layer and the Schottky electrode, and an alloy layer of several nm is formed at the interface. The composition of the alloy layer is considered to be an alloy composed of WC and WSi.

  A state in which the n factor is kept at 1.05 or less by performing heat treatment within a range of 300 to 1200 ° C., preferably 400 to 700 ° C., thereby forming an alloy layer by reacting tungsten and SiC at the interface. Thus, the SBH can be arbitrarily controlled within the range of 1.0 to 1.1 eV (1.05 to 1.1 eV at 400 to 700 ° C.) so that the power loss becomes the optimum value. Even when a Schottky electrode is formed using an alloy of molybdenum and tungsten, the same control can be performed by heat treatment in the above temperature range.

  As mentioned above, although preferable embodiment of this invention was described, this invention is not limited to this embodiment, In the range which does not deviate from the summary, various deformation | transformation and change are possible. An example is shown below.

As the SiC single crystal substrate, a substrate grown in bulk by the CVD method as well as a substrate grown in bulk by the modified Rayleigh method may be used.
The single crystal substrate on which the epitaxial film is grown may be silicon, for example. When an SiC single crystal substrate is used as a substrate on which an epitaxial film is grown as in the above embodiment, the crystal type is not particularly limited, and various crystal types of SiC single crystal substrates can be used. For example, in addition to 4H—SiC (hexagonal quadruple periodic type) used in the above embodiment, 6H—SiC (hexagonal hexaperiodic type), 3C (cubic triple periodic type) and the like are preferable. .

  In the present invention, the crystal plane and crystal orientation for epitaxial growth of the SiC single crystal substrate are not particularly limited. Examples of crystal planes for epitaxial growth of the SiC single crystal substrate include (0001) Si plane, (000-1) C plane, (11-20) plane, (01-10) plane, (03-38) plane, and the like. Can be mentioned.

When epitaxial growth is performed on the (0001) Si face and the (000-1) C face, [01−
10] direction, [11-20] direction, or a substrate cut out by inclining at an off angle of, for example, 1 to 12 ° in the off direction in the intermediate direction between the [01-10] direction and the [11-20] direction. Then, SiC is epitaxially grown from this crystal plane by a step flow growth technique.

  In the above, regarding the lattice orientation and lattice plane, the individual orientation is indicated by [], the individual plane is indicated by (), and the negative index is crystallographically indicated by “−” (bar) on the number. However, for the convenience of the description, a negative sign is added before the number to replace it.

  In order to alleviate the electric field concentration at the peripheral edge of the Schottky electrode, when forming the ion implantation layer as in this embodiment, for example, ions of other impurities having a conductivity type opposite to the conductivity type of the SiC epitaxial layer are implanted. May be.

As a method for depositing molybdenum or tungsten on the SiC epitaxial layer, a vacuum deposition method, an electron beam method, or the like may be used in addition to the sputtering method.
In the above embodiment, heat treatment is performed using molybdenum for the Schottky electrode of the Schottky diode. However, the present invention is also used for manufacturing a Schottky junction semiconductor device such as a MESFET using a Schottky electrode as a gate electrode. Applied.

FIG. 1 is a cross-sectional view illustrating a manufacturing process of a Schottky diode in one embodiment of the present invention. FIG. 2 is a graph showing the relationship between the heat treatment temperature, SBH and n factor. FIG. 3 is a graph showing the results of current and voltage measurements in the forward and reverse directions for the Schottky diode obtained by the manufacturing method of the present invention. FIG. b) shows reverse characteristics.

Explanation of symbols

1 SiC single crystal substrate 2 SiC epitaxial layer 3 ion implanted layer 4 SiO ₂ oxide film 5 SiO ₂ oxide film 6 the nickel film 7 ohmic electrode 8 molybdenum film

Claims (3)

A method for manufacturing a Schottky junction type semiconductor device in which a Schottky electrode is formed on a surface of a silicon carbide epitaxial layer,
A Schottky electrode made of molybdenum, tungsten, or an alloy thereof is formed on the surface of the silicon carbide epitaxial layer and then heat-treated to cause an alloying reaction at the interface between the silicon carbide epitaxial layer and the Schottky electrode. A method for manufacturing a Schottky junction semiconductor device is characterized in that the height of the Schottky barrier is controlled in a state in which an alloy layer is formed on the substrate and the n factor is maintained at a substantially constant low value.   The method of manufacturing a Schottky junction semiconductor device according to claim 1, wherein the heat treatment temperature is 300 to 1200 ° C.   The Schottky junction type according to claim 2, wherein the height of the Schottky barrier is arbitrarily controlled within a range of 1.0 to 1.3 eV while the n factor is maintained at 1.05 or less. A method for manufacturing a semiconductor device.

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