JP2005268690A - Manufacturing method of multi-layered circuit substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a multi-layered circuit substrate for suppressing the deviation of each layer at the time of lamination pressing in the multi-layered circuit substrate. <P>SOLUTION: The manufacturing method of the multi-layered circuit substrate having a process for forming a laminated body where a plurality of circuit substrates and an inter-layer adhesive are laminated, a process for temporarily bonding the laminate body, and a process for heating and pressurizing the laminated body, wherein the adhesive at a reference mark section for temporarily bonding the circuit substrate and adhesive provided at the peripheral section of the circuit substrate in the process of the temporary bonding is almost completely hardened. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a multilayer circuit board.

  With the recent increase in the density of electronic devices, printed wiring boards used in these devices are also becoming smaller and thinner, and demand is increasing due to their flexibility. In particular, in the case of an electronic device that is required to form a small and high-density circuit such as a mobile phone, a multilayer flexible circuit board is often used as the multilayer circuit board.

In order to make a circuit board multi-layered, multiple boards are stacked together, but in the lay-up process of the multilayer flexible wiring board manufacturing method, the board is bonded to the previously provided board hole with reference to the guide pin In general, temporary pressing is performed by applying heat and pressure to the entire surface of the substrate by a hot press. (For example, Patent Document 1)
Thereafter, in the lay-up process, the adhesive layer between the substrates is semi-cured by thermocompression bonding, the substrates are temporarily fixed, and then the main bonding is performed. However, slipping occurs when pressure is applied in the vicinity of the adhesive between the substrates reaching the melting temperature in order to achieve close contact during the hot pressing in the main pressing step.
JP 2002-217539 A

The objective of this invention is providing the manufacturing method of a multilayer circuit board for suppressing the gap | deviation of each layer at the time of lamination | stacking press of a multilayer circuit board.

Such an object is achieved by the present invention described in the following (1) to (4).
(1) Manufacture of a multilayer circuit board having a step of forming a laminate in which a plurality of circuit boards and an interlayer adhesive are laminated, a step of temporarily adhering the laminate, and a step of heating and pressing the laminate A method comprising: substantially completely curing the adhesive at a reference mark portion for temporarily adhering the circuit board and the adhesive provided in a peripheral portion of the circuit board in the temporary bonding step. A method for manufacturing a multilayer circuit board.
(2) The method for producing a multilayer circuit board according to (1), wherein the temporary adhesion is performed at a temperature of 340 to 360 ° C. and a curing time of 60 to 120 seconds.
(3) The method for manufacturing a multilayer circuit board according to (1) or (2), wherein the reference mark is provided in an area outside the product effective area.
(4) The method for manufacturing a multilayer circuit board according to any one of (1) to (3), wherein the reference mark is created simultaneously with the formation of the conductor circuit by etching.

  According to the present invention, it is possible to prevent slippage between substrates in a multilayer circuit board lamination process, and it is possible to suppress misalignment during the lamination process.

  Hereafter, the manufacturing method of the multilayer circuit board of this invention is demonstrated in detail.

  FIG. 1 is a diagram showing an example of a reference mark according to the present invention. FIG. 2 is a diagram showing an example in which fiducial marks are arranged in the product non-product effective area of the multilayer circuit board. FIG. 3 is a cross-sectional view in which a plurality of circuit boards and an interlayer adhesive are laminated, and shows a region where the adhesive at the reference mark portion of the present invention is cured.

  As shown in FIG. 1, the reference mark of the present invention is preferably formed by etching simultaneously with the formation of the conductor circuit. The size of the reference mark is not particularly limited, but is preferably 15 × 5 mm or more and not included in the product effective area. If it is less than 15 × 5 mm, when temporarily bonded, the curing range is small, and peeling is likely to occur.

  The shape of the reference mark is not particularly limited, but is preferably a circle, an ellipse, a square, a diamond, or the like, and particularly preferably a square.

  In addition, as shown in FIG. 2, when the fiducial marks of the present invention are arranged on a multilayer circuit board, there is no particular limitation, but it is preferable to arrange them arbitrarily in four corners for each sheet or product pattern.

  As shown in FIG. 3, the reference mark is provided so as to face the opposite position of the circuit board laminated between the respective layers. The portion other than the reference mark may be crimped with a soldering iron or the like and cured by heating, but it is preferable that the surface is heated and cured using a metal foil. The temperature for heat curing is preferably 320 to 360 ° C. A heating temperature of less than 320 ° C. is not preferable because heat transfer is weak to the laminated internal adhesive and the adhesive is not sufficiently cured, resulting in insufficient adhesive strength. On the other hand, if it exceeds 360 ° C., the copper foil, base film, etc. around the spot welded portion will be burned and discolored, which is not preferable. The heating time is preferably 60 to 120 seconds. If it is less than 60 seconds, curing is insufficient, and if it exceeds 120 seconds, scoring or discoloration tends to occur, such being undesirable.

It is a reference figure showing the shape of the reference mark for temporary adhesion of the present invention. It is a reference figure which shows the state which has arrange | positioned the reference | standard mark for temporary adhesion of this invention on the circuit board. It is sectional drawing which laminated | stacked the some circuit board and the interlayer adhesive material.

Explanation of symbols

1: Reference mark copper foil portion 2: Reference mark copper etched portion 3: Reference mark 4: Interlayer adhesive 5: Circuit board 6: Area for curing adhesive

Claims (4)

  A method for producing a multilayer circuit board, comprising: a step of forming a laminated body in which a plurality of circuit boards and an interlayer adhesive are laminated; a step of temporarily adhering the laminated body; and a step of heating and pressing the laminated body. A multilayer circuit characterized in that the adhesive of the reference mark portion for temporarily bonding the circuit board and the adhesive, which is provided in the temporary bonding step in the peripheral portion of the circuit board, is almost completely cured. A method for manufacturing a substrate.   The method for producing a multilayer circuit board according to claim 1, wherein the temporary bonding is performed at a temperature of 340 to 360 ° C. and a curing time of 60 to 120 seconds.   The method for manufacturing a multilayer circuit board according to claim 1, wherein the reference mark is provided in an area outside the product effective area.   4. The method of manufacturing a multilayer circuit board according to claim 1, wherein the reference mark is created simultaneously with forming a conductor circuit by etching.

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