JP2005236061A - Evaluating method of resist pattern or finished wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an evaluating method of a resist pattern or a finished wafer which can measure a lithography margin rapidly with a high resolution. <P>SOLUTION: The method of evaluating the exposed resist pattern includes a step of preparing the wafer 11 by changing a dose and focusing conditions in a two-dimensional matrix manner to a plurality of dies arranged on the wafer 11 in a matrix state, a step of measuring line widths of the plurality of dies 12, 13 and 14 at a predetermined place, a step of inspecting a defect only for the die having a normal line width, a step of determining whether a defect in the die is caused by lithography or not for the die having the defect, and a step of evaluating the lithography margin from the generating distribution of the defect caused by the lithography. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

The present invention provides a resist pattern that can accurately and quickly evaluate a lithography margin of a resist pattern drawn by an electron beam drawing apparatus or a resist pattern exposed by an ArF or F ₂ excimer laser stepper. The present invention relates to a method for evaluating a pattern or a finished wafer thereafter.

Conventionally, evaluation of lithography margin and evaluation of whether optical proximity effect correction is appropriately performed have been performed by a defect inspection apparatus using light. However, when the lithography apparatus becomes an electron beam direct-drawing type drawing apparatus or ArF, F ₂ excimer laser stepper, the defect size to be detected is 100 nm or less, so that defect inspection using light is performed. There was a problem that the resolution of the device was insufficient.

  In view of this, a defect inspection apparatus having an increased resolution using an electron beam instead of light has been proposed (see, for example, Patent Document 1 and Patent Document 2).

JP-A 63-17523 JP 7-249393 A

  The present invention has been proposed in order to solve the above-described problem, and a resist film capable of measuring a lithography margin in a short time with high resolution using a defect inspection apparatus having a defect detection minimum dimension of 100 nm or less. An object is to provide a method for evaluating a pattern or a finished wafer thereafter.

In order to achieve the above object, the invention of claim 1
An evaluation method for evaluating a resist pattern formed by an exposure apparatus such as an electron beam direct writing apparatus or an excimer laser stepper or a subsequent finished wafer,
For a plurality of dies arranged in a matrix on a wafer, the dose and focus conditions are changed stepwise in the row direction, and the focus conditions are changed stepwise in the column direction so that the dose and focus conditions are two-dimensionally matrixed. Preparing a wafer that has been subjected to exposure by varying the pattern,
Measuring the line width at a predetermined location for the plurality of dies by a predetermined number for each die; and
Determining, by the measurement, dies whose line width is within a predetermined range and dies that are not.
Performing a defect inspection on the die whose line width is within the range; and
Evaluating the lithography margin from the defect distribution obtained in the step;
An evaluation method characterized by comprising:
I will provide a.

The invention of claim 2 is characterized in that the step of performing the defect inspection comprises:
Irradiating a region of a plurality of pixels on the wafer with an electron beam;
Enlarging secondary electrons or reflected electrons emitted from the region on the wafer with an optical system to obtain a two-dimensional image;
It is characterized by providing.

  The invention of claim 3 is characterized in that it is determined whether or not the detected defect is a defect caused by lithography.

  The invention according to claim 4 is characterized in that the defect caused by lithography is a defect due to excessive or insufficient correction of the proximity effect.

  According to a fifth aspect of the present invention, the step of performing the defect inspection includes a step of performing defect detection of the die by scanning the electron beam in a direction perpendicular to the uniaxial direction while continuously moving the wafer in the uniaxial direction. It is characterized by.

  A sixth aspect of the invention is characterized in that any one of the first to fifth aspects of the invention is used in a semiconductor device manufacturing method.

  Hereinafter, an embodiment of a method for evaluating a resist pattern or a subsequent finished wafer according to the present invention will be described with reference to FIGS.

  In the present invention, in order to evaluate a pattern formed on a wafer with an exposure apparatus such as an electron beam direct writing apparatus or an excimer laser stepper, first, in the row direction, the dies arranged in the matrix direction on the wafer. The dose is changed stepwise, the focus condition is changed stepwise in the column direction, the dose and focus condition are changed in a two-dimensional matrix on the wafer, and the die is exposed and developed. Prepare.

That is, FIG. 1 shows an example of a 12-inch wafer produced by an electron beam drawing apparatus (not shown) by changing the dose and focus conditions in a two-dimensional matrix as described above. For example, a dose of 0.9, 0.95, 1.00, 1.05, 1.10, 1.15 (× 10 ⁻⁶ clones / cm ²⁾ is applied to the wafer 1 in the row direction by an electron beam drawing apparatus. ), And a large number of dies having a size of 20 mm × 40 mm are formed by changing from the overfocused state by 0.7 μm in the column direction to the 0.6 μm underfocused state in increments of 0.1 μm. .

For example, the dies 12 arranged in the uppermost row of the wafer 11 in FIG. 1 have a dose of 0.90 (× 10 ⁻⁶ clones / cm ² ), and the focal condition is from the left die to the right die. The objective lens current is changed by 0.1 μm from −0.4 μm to +0.3 μm in order to the die. Similarly, the dies arranged in the second row from the top of the wafer 11 have a dose of 0.95 (× 10 ⁻⁶ clones / cm ² ), and the focal condition is from the left die to the right die in the figure. In order, it is changed by 0.1 μm from −0.6 μm to +0.5 μm.

  In the wafer 11 created in this way, for each die, the line width at a predetermined location is measured by a CD measuring device by a predetermined number per line. That is, after the wafer 11 is exposed and developed, the line widths of predetermined patterns of all the dies are measured at five locations on each die by, for example, CDSEM. As a result, it is assumed that the die 12 indicated by the diagonally downward slanting line has a line width (exposure portion width) having a design dimension of 100 nm of less than 90 nm and does not satisfy the design specifications. Further, it is assumed that the die 13 indicated by the oblique line rising to the right has a wrinkle line width (exposure portion width) of 110 nm or more having a design dimension of 100 nm, and it has been found that the design specification is not satisfied. As a result, for a die that is not hatched, such a line width defect is not measured, and it is determined that the die is worth performing a defect inspection. Therefore, the following defect inspection is performed on such a die to detect the defect.

  In evaluating the lithography margin, the proximity effect is most problematic near the boundary between the memory cell 22 and the peripheral pattern portion 23. It is efficient to inspect these areas with an electron beam. In the present invention, each die 21 has a central memory cell 22 and a peripheral pattern portion 23 adjacent thereto as shown in FIG. It is efficient to preferentially inspect these by a defect inspection apparatus. Long and narrow scanning regions 24 and 25 including the boundary region are set on both sides of the memory cell 23. Each of the scanning regions 24 and 25 is set so that half of one stripe is the memory cell portion 22 and the other half is the peripheral pattern portion 23.

  Actually, for defect inspection, each die 21 is divided into a plurality of stripes including scanning regions 24 and 25 and having a width corresponding to these scanning regions, and scanning is performed for each stripe. As shown in FIG. 2, when the length direction of each scanning region 24, 25 is the y direction and the direction perpendicular to the y direction is the x direction, the defect inspection apparatus performs the defect inspection of the wafer 11. The scanning of one stripe is completed by continuously moving the wafer 11 in the y direction while irradiating the electron beam having a rectangular cross section with a length corresponding to the width of one stripe in the x direction. The same scanning is performed on the stripe. By repeating this, the scanning of each scanning region 24, 25 is completed and the presence or absence of defects is inspected.

FIG. 3 shows an example of the structure of a defect inspection apparatus that can be used in the resist pattern or finished wafer evaluation method of the present invention to perform the above evaluation. The L _a B ₆ primary beam 32 emitted from the electron gun 31 having a cathode converged by the condenser lens 33, to form a crossover on the NA aperture 35. At this time, the electron beam outside the field of view is removed by the rectangular beam shaping opening 34 provided immediately below the condenser lens 33. The primary beam 32 having passed through the condenser lens 33 forms a rectangular beam on the conjugate surface 41 of the wafer W by the doublet type objective lenses 39 and 40 by the irradiation lens 36.

  The rectangular beam is bent in the normal direction of the wafer W by the E × B separator 38 and focused on the surface of the wafer W by the objective lenses 39 and 40. At this time, the trajectory 42 of the primary beam passes away from the trajectory of the secondary beam 43, so that the blur of the secondary beam 43 does not increase due to the space charge of the primary beam 32.

  The primary beam 32 shaped by the primary electron optical system in this manner irradiates a region on the surface of the wafer W that is about 10 μm wider than a region of 51.2 μm × 25.6 μm, for example. The primary beam 32 is scanned by a octupole electrostatic deflector 37 in a direction perpendicular to the paper surface in the rectangular short side direction with a width of, for example, 205 μm, and at the same time, a table (not shown) on which the wafer W is placed is placed. It is continuously moved in the direction of right angle.

  A −4 kV voltage is applied to the wafer W. Therefore, the secondary beam 43 emitted from the scanned surface of the wafer W is accelerated in the normal direction of the wafer W, converged, passes through the objective lenses 40 and 39, and becomes a deflection fulcrum of the E × B separator 38. Make a magnified image. Since the objective lenses 39 and 40 are designed in a shape close to a symmetrical doublet, distortion and lateral chromatic aberration are reduced and small. The secondary beam 43 that has passed without being bent by the E × B separator 38 is expanded by magnifying lenses 45, 46, and 48, and an enlarged image of the wafer W is formed on the front surface of an MCP (multichannel plate) 49.

  In this secondary electron optical system, in synchronization with the scanning of the primary beam 32, the path of the secondary beam 43 is corrected by the deflector 44 so that the secondary beam 43 passes near the center of the magnifying lens 45. Further, deflection correction is performed by the deflector 47 so as to reduce the aberration. For this reason, most of the aberration generated in the secondary beam 43 is limited to the aberration caused by the first two-stage lenses 39 and 40, so that the secondary electron optical system is made low.

Secondary beam 43, the MCP49, after the number of electrons at each pixel of the image is multiplied to about ¹⁰⁴ times, is changed to the image of the light by the scintillator plate 50. At this time, an acceleration voltage is applied between the rear surface of the MCP 49 and the scintillator plate 50, but a gap of about 500 μm is provided between the rear surface of the MCP 49 and the front surface of the scintillator plate 50. Even when a secondary beam having an electron number distribution is incident on the front surface of the MCP 49, the beam spreads to about 30 μm on the front surface of the scintillator 50. Therefore, it is preferable to select the magnification of the secondary electron optical system such that a 100 nm pixel on the surface of the wafer W is enlarged to 60 μm or more on the front surface of the scintillator plate 50, that is, 600 times or more.

  The light image formed by the scintillator plate 50 is focused on the light receiving surface of the TDI camera 52 by the light relay lens 51. Note that the difference in size between the pixels of the TDI camera 52 and the pixels of the scintillator plate 50 can be matched by appropriately selecting the magnification of the relay lens 51.

  Next, with reference to FIG. 4, steps for performing a wafer defect inspection according to the method for evaluating a resist pattern or a finished wafer according to the present invention will be described. As described with reference to FIG. 2, the scanning of one die 61 is performed on each of the plurality of stripes 62 having a width in the x direction of 100 to 200 μm. The cross-sectional shape 63 of the electron beam formed by the defect inspection apparatus shown in FIG. 3 is substantially rectangular on the surface of the wafer 11. In the rectangular irradiation region 66 surrounded by the side 64 in the y direction and the side 65 in the x direction, the primary electron beam has a sufficiently uniform intensity. FIG. 4 shows that a plurality of pixels 67, 68, 69, 70,...

  The defect inspection apparatus moves the electron beam in the + x direction from one end of one stripe 62 by one pixel width while moving the wafer 11 continuously in the + y direction, and reaches the other end. Fly back to the original edge. Specifically, when the right side 71 of the irradiation area 66 reaches the left end of one stripe 62, the defect inspection apparatus starts detecting secondary electrons. When the electron beam moves to the right by one pixel on the stripe from the start time, and thus the irradiation area 66 moves, the first pixel column of the TDI camera 52 (FIG. 3) moves to the leftmost side of the stripe 62 in the y direction. A secondary electron signal representing a secondary electron detected from a pixel that falls within the irradiation area 66 among the aligned pixels is input.

  When the electron beam further advances to the right on the stripe 62 by one pixel, the secondary electron signal held in the first pixel column of the TDI camera 52 is transferred to the left, and the first pixel column has a stripe. A secondary electron signal representing a secondary electron detected from a pixel entering the irradiation area 66 among the pixels arranged in the y direction on the leftmost side of 62 is input, and the second pixel column is input from the left of the stripe 62. Secondary electron signals from the pixels that fall within the irradiation area 66 among the pixels arranged in the second y direction are input.

  Thus, every time the electron beam is moved to the right on the stripe 62 by a width corresponding to one pixel, the secondary from the pixels entering the irradiation area 66 among the pixels arranged in the y direction on the leftmost side of the stripe 62. The electronic signal is transferred to the left in the TDI camera 52 and added. Then, when the left end side 64 of the rectangle 66 passes a pixel arranged in the y direction on the leftmost side of the stripe 62, it corresponds to a secondary electron signal from a pixel of the TDI camera 52 and a pixel arranged on the leftmost side of the stripe 62. Signal is output.

  Thereafter, the same operation is repeated, and when the left side 64 of the irradiation area 66 passes the right end 72 of the stripe 62, the pixels from the pixels that enter the irradiation area 66 among the pixels arranged in the y direction on the rightmost side of the stripe 62. A secondary electron signal is output and one scan in the + x direction is completed. When one scan is completed, the defect inspection apparatus flies back the electron beam to the left end of the stripe 62. Since the stage continuously moves in the y direction, the die 61 moves by a distance corresponding to the length of the side 64 in the + y direction. After this, a scan similar to that described above begins.

  Actually, since the wafer 11 and hence the die 61 are continuously moved in the + y direction during each scanning period, the electron beam is also moved in the −y direction so as to correct the moving speed of the die 61 in the + y direction. Will be scanned. However, the cross-sectional shape 63 of the electron beam has an irradiation area 66 of a size sufficient to cover a predetermined number of pixels arranged vertically and horizontally, so that it is not necessary to perform scanning with high accuracy. When the vibration of the wafer 11 or the speed variation in the moving speed in the y direction is detected, position correction is performed in the secondary electron optical system so that the measured position on the stripe forms an image on the MCP 49 correctly.

  In FIG. 4, when the scanning for one die 61 is completed, the scanning is subsequently performed on the die 73 adjacent to the die 61 in the y direction, and thus one stripe 62 is formed at the end of the wafer 11 in the + y direction. When scanning to the die is completed, the defect inspection apparatus scans the stripe 74 adjacent to the stripe 62 while mechanically moving the wafer 11 in the −y direction.

  It is judged whether the defect detected in this way is a defect caused by lithography or other defects such as dust, and as a result, defects such as dust that are not related to lithography conditions are removed, and pattern anomalies or shortages due to excessive proximity effect correction are removed. Only defects related to lithography, such as pattern anomalies due to proximity effect correction, are selected, and the occurrence distribution of defects caused by lithography is examined to evaluate the lithography margin. As a result, the die 14 marked with a circle is a die having no defect caused by lithography.

In such a case, from the above evaluation, it can be said that the lithography margin is between 0.1 μm overfocus and 0.2 μm underfocus, and the dose is in the range of 1.0 to 1.10 μc / m ² .

  The method for evaluating a resist pattern or a finished wafer according to the present invention is effective when implemented, for example, in the semiconductor device manufacturing method shown in FIGS. The manufacturing method shown in FIG. 5 includes the following main steps. Each main process consists of several sub-processes.

(1) Process P11 for manufacturing wafer P12 (or preparing a wafer),
(2) A mask manufacturing process for manufacturing a mask (reticle) P22 used for exposure (or a mask preparing process for preparing a mask) P21,
(3) Wafer processing step P13 for performing necessary processing on wafer P12;
(4) Chip assembling process P14 that enables the chip P15 formed on the wafer P12 to be cut and operated one by one,
(5) A chip inspection process P16 in which the chip P15 made in the chip assembly process P14 is inspected and a chip that has passed the inspection is a product P17.

  Among these main processes, the main process that has a decisive influence on the performance of the semiconductor device is the wafer processing process P13. In this step, designed circuit patterns are sequentially stacked on a wafer to form a large number of chips that operate as memories and MPUs. The wafer processing process P13 includes the following processes.

(A) A thin film forming step (using CVD, sputtering, or the like) for forming a dielectric thin film to be an insulating layer or a metal thin film for forming a wiring portion or an electrode portion,
(B) oxidation process for oxidizing thin film layers and wafer substrates,
(C) a lithography process P23 for forming a resist pattern using a mask (reticle) P22 for selectively processing a thin film layer, a wafer substrate, and the like;
(D) Ion / impurity implantation / diffusion process,
(E) resist stripping step,
(F) An inspection process for inspecting a further processed wafer.
The wafer processing step P13 is repeatedly performed for the required number of layers, and a product (semiconductor device) P17 that operates as designed is manufactured.

The core of the wafer processing step P13 in FIG. 5 is the lithography step P23, and FIG. 6 shows the steps performed in the lithography step P23. That is, the lithography process P23
(A) a resist coating step P31 for coating a resist on the wafer on which the circuit pattern is formed in the previous step;
(B) an exposure step P32 for exposing the resist;
(C) Development step P33 for developing the exposed resist to obtain a resist pattern;
(D) An annealing step P34 for stabilizing the developed resist pattern;
including.

  The semiconductor device manufacturing process, the wafer processing process P13, and the lithography process P23 described above are well known, and detailed descriptions thereof are omitted.

  When the defect inspection is performed by using the resist pattern evaluation method according to the present invention for the chip inspection step P16, even a semiconductor device having a fine pattern can be inspected with a high throughput, and only 100% inspection is possible. In addition, it is possible to improve the yield of products and prevent shipment of defective products.

  As can be understood from the above description, the resolution of 0.1 μm or more can be obtained with light, whereas the resolution of 0.1 μm or less can be realized with an electron beam. Compared to inspection, the present invention has a special effect that the lithography margin can be measured with high resolution. Further, according to the present invention, the defect inspection is not performed for all the dies but only for the dies having a normal line width, so that the time for the defect inspection can be shortened.

It is a figure for demonstrating one embodiment of the evaluation method of the resist pattern or finished wafer concerning this invention. It is a figure for demonstrating the area | region which carries out a test | inspection preferentially and the structure of one die | dye in FIG. It is a figure which shows roughly the structure of an example of the defect inspection apparatus which can be used with the evaluation method of the resist pattern or finished wafer concerning this invention. It is a figure for demonstrating the scanning which the defect inspection apparatus shown in FIG. 3 performs. It is a flowchart which shows the process of the semiconductor manufacturing method which can apply the evaluation method of the resist pattern or finished wafer concerning this invention. It is a flowchart which shows the process which comprises the chip | tip test | inspection process of FIG.

Explanation of symbols

  11: Wafer, 12: Die with a narrow line width, 13: Die with a too wide line width, 14: Die without defects caused by lithography, 21: Die, 22: Peripheral circuit section, 23: Memory cell Part, 24, 25: scanning region, 31: electron gun, 32: primary electron beam 33: condenser lens, 34: beam shaping aperture, 35: NA aperture, 36: irradiation lens, 37: scanning deflector, 38: E × B separator, 39, 40: Doublet type objective lens, 42, 43: Orbit, 44, 47: Deflector, 45, 46, 48: Magnifying lens, 49: MCP, 50: Scintillator plate, 51: Relay lens, 52: TDI camera, W: Wafer, 61: Die, 62: Stripe, 63: Cross section of electron beam, 66: Irradiation area, 67-70: Pic Le, 71: end of the electron beam used for image formation, 72: end of the stripe, 73: next to the die, 74: next stripe

Claims (6)

An evaluation method for evaluating a resist pattern formed by an exposure apparatus such as an electron beam direct writing apparatus or an excimer laser stepper or a subsequent finished wafer,
For a plurality of dies arranged in a matrix on a wafer, the dose and focus condition are two-dimensionally changed by stepwise changing the dose in one axis direction and stepping the focus condition in the other axis direction. Preparing a wafer subjected to exposure by changing in a matrix; and
Measuring the line width at a predetermined location for the plurality of dies by a predetermined number for each die; and
Determining the die whose line width falls within a predetermined range and the die that does not enter by the measurement;
Performing a defect inspection on the die whose line width is within the range; and
Evaluating the lithography margin from the occurrence of defects obtained in the step;
An evaluation method comprising: The evaluation method according to claim 1, wherein the step of performing a defect inspection includes:
Irradiating a region of a plurality of pixels on the wafer with an electron beam;
Enlarging secondary electrons or reflected electrons emitted from the region on the wafer with an optical system to obtain a two-dimensional image;
An evaluation method comprising:   The evaluation method according to claim 1, wherein it is determined whether or not the detected defect is a defect caused by lithography.   The evaluation method according to claim 1, wherein the defect caused by the lithography is a defect due to excessive or insufficient correction of a proximity effect.   5. The evaluation method according to claim 1, wherein the step of performing the defect inspection scans an electron beam in a direction perpendicular to the uniaxial direction while continuously moving the wafer in the uniaxial direction. And a step of detecting a defect of the die.   A semiconductor device manufacturing method using the evaluation method according to claim 1.

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