JP2005235045A - Fft operation method and fft arithmetic unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an FFT operation method and an FFT arithmetic unit capable of reducing the processing quantity of the real time processing of an FFT operation. <P>SOLUTION: This FFT arithmetic unit executes writing of data with n-points of data as one unit to a ring buffer, rearrangement of N-units of data written in the ring buffer to a series according to the time order, and FFT operation to the rearranged data in a predetermined period. In this device, the FFT arithmetic processing is divided to a plurality of tasks, and each task is classified to a task with high priority and a task with low priority to shorten the processing time occupied by the task with high priority. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an FFT operation method and an FFT operation device, and more particularly, to write data in a ring buffer with n points of data as one unit, to a sequence according to the time order of N units of data written in the ring buffer. The present invention relates to an FFT calculation method and an FFT calculation apparatus that periodically execute FFT calculation on the sorted data and the sorted data.

  In recent years, DSP (Digital Signal Processor) has mixed tasks like a RISC chip, with the introduction of a real-time OS that gives priority to interrupts, multiple multipliers, and ALU (arithmetic and logical operation units). It became possible to control. As a result, for example, it has become easy to mount modules having different functions such as a spectrum analyzer function and an audio ripping (audio high-speed recording) function in the same DSP in the speech intelligibility improvement system. The speech intelligibility improvement system is a system (see Patent Document 1) that improves the speech intelligibility by adjusting the volume of speech according to the noise level input to the microphone using loudness technology. A detailed control technique is disclosed.

  In a DSP that mixes and controls multiple tasks, if the amount of processing involved in real-time processing of each module (function) can be reduced as much as possible, it not only reduces the waiting time for other modules, but also improves performance, such as ripping speed. It leads to improvement. DSPs used in speech intelligibility improvement systems and speech recognition systems (using high-speed LMS algorithms) perform FFT processing at regular intervals. For this reason, it would be advantageous if the amount of processing involved in real-time processing in the FFT processing could be reduced.

  As shown in FIG. 5, the conventional FFT operation includes a buffer 1 for storing new data with n points (for example, 128 points) of data as one unit, and a ring buffer for writing the latest N (for example, 8) units of data. Processing unit 2, FFT calculation target data storage unit 3 that rearranges and stores the data stored in the ring buffer unit 2 in time series order, writing new data to the ring buffer unit, rearrangement in the time series order, and FFT processing, etc. This is performed in cooperation with the arithmetic processing unit 4 that executes. In the ring buffer 2, new data of one unit is overwritten in order of 1 → 2 →... → 8 → 1 → 2 →... And the latest N sets of data are always stored.

If it demonstrates according to the time chart shown in FIG. 6, every predetermined period,
(A) One unit of 128 points of new data (shaded area) is stored in the ring buffer 2 of 8 units (= 128 × 8 = 1024 points),
(B) The 1024-point data is rearranged in order of time series and copied to the FFT calculation target data storage unit 3, that is, rearranged so that the newer data is arranged in the lower order and the older data is arranged in the upper order.
(C) Finally, the FFT processing is performed and the FFT result is overwritten in the calculation target data storage unit 3.
Perform the FFT operation in the sequential flow, and output the operation result.

As described above, it would be advantageous if the amount of processing involved in real-time processing in FFT processing could be reduced, but the amount of processing involved in current FFT real-time processing is large. That is, the amount of processing involved in the real-time processing of the FFT is the total amount of each processing of A, B, and C in FIG. 5, and the FFT calculation processing time T is the continuous processing of A, B, and C shown in FIG. Time required for the operation. For this reason, when the FFT operation is set as a high priority task, the DSP has a problem that the FFT operation occupies a relatively long time of time T.
Although there is a technique for speech recognition by applying a fast Fourier transform FFT to a DSP (see, for example, Patent Document 2), there is no conventional method for reducing the amount of processing involved in real-time processing of the FFT.
Japanese Patent Laid-Open No. 11-166835 JP-A-4-264598

From the above, DSPs with a real-time OS that gives priority to interrupts, or devices with the same functions as those DSPs, are required to reduce the amount of FFT processing in real time. No effective method has been proposed.
Accordingly, an object of the present invention is to reduce the processing amount of real-time processing of FFT operation.

According to the present invention, according to the present invention, the writing of data with n points of data as one unit to the ring buffer, the rearrangement of the N units of data written in the ring buffer into a series according to the time order, This is achieved by an FFT operation method and an FFT operation device that execute an FFT operation on the replaced data at a predetermined cycle.
In the FFT calculation method of the present invention, (1) the first and second FFT calculation target data in which the latest N units of data are written and the stored data in the ring buffer are rearranged in order of time series. A storage unit, an arithmetic processing unit that performs processing such as writing, rearranging, and FFT operation of new data to the ring buffer unit, and a management unit that manages the entire processing order, and (2) the ring buffer in the previous cycle The latest (N−1) unit data stored in the section is rearranged as the 2nd to Nth data in time and stored in the first FFT operation target data storage section. (3) 1 generated in the current cycle New unit data is written in time as the first data in the corresponding position of the first FFT calculation target data storage unit, and (4) N units stored in the first FFT calculation target data storage unit are then written. FFT processing on data (5) After that, the new data of one unit generated in the current cycle is written to the ring buffer, and (6) the latest (N−1) unit of data stored in the ring buffer is temporally stored. The second FFT calculation target data storage unit is rearranged as the second to Nth, and the above processing is executed while switching the FFT calculation target data storage unit for each cycle.

The FFT arithmetic unit of the present invention includes a ring buffer area into which the latest N units of data are written, and first and second FFT arithmetic target data storage areas for rearranging and storing the data stored in the ring buffer area in time series order. A storage unit equipped with, an arithmetic processing unit that performs processing such as writing new data to the ring buffer area, rearrangement, FFT operation, etc., a management unit that manages the processing order so that tasks are executed in priority order, The FFT calculation process is divided into a plurality of tasks, and each task is divided into a task with a high priority and a task with a low priority, and the time occupied by the task with a high priority is shortened.
In this case, the FFT operation processing is performed by (1) a first task for writing 1 unit of new data to the ring buffer area, and (2) the latest (N−1) units of data stored in the ring buffer area. A second task that rearranges them as the second to Nth in terms of time and saves them in the FFT calculation target data storage area, (3) the FFT as one unit of new data generated as the first data in time A third task for writing to a corresponding position in the computation target data storage unit, (4) divided into a fourth task for performing FFT processing on N units of data stored in the FFT computation target data storage unit, , Lower the priority of the second task and increase the priority of the third and fourth tasks.

  In the FFT arithmetic unit of the present invention, the arithmetic processing unit writes (1) one unit of new data generated in the previous cycle by the first task to the ring buffer area when the low priority task of the previous cycle is executed. (2) The latest (N−1) units of data stored in the ring buffer area by the second task are rearranged as the second to Nth data in time and stored in the first FFT operation target data storage area. To do. In addition, when the high-priority task in the current cycle is executed, the arithmetic processing unit (1) performs the first FFT operation as a first data in terms of one unit of new data generated in the current cycle by the third task. Write to the corresponding position in the target data storage area, and perform FFT processing on the N units of data stored in the first FFT calculation target data storage area by the fourth task. (2) After that, it occurred in the current cycle The one unit of new data is written into the ring buffer area, and the latest (N−1) units of data stored in the ring buffer area are rearranged as the second to Nth data in time and the second Are stored in the FFT calculation target data storage area, and thereafter, the above processing is executed while switching the FFT calculation target data storage area for each cycle.

  According to the present invention, the FFT calculation process is divided into a plurality of tasks, and each task is divided into a task with a high priority and a task with a low priority. Therefore, the time occupied by a task with a high priority can be reduced.

Considering the FFT calculation processing in the prior art (FIG. 5), the processing of copying the data of 8 units (= 1024 points) written in the ring buffer 2 to the FFT calculation target data storage unit 3 in time alignment B need not be a high-priority real-time process. If such processing is separated as a low-priority task and executed later, the real-time processing amount is reduced.
An object of the present invention is to reduce the amount of real-time processing of an FFT operation to which a high priority is given in a DSP or the like capable of controlling multiple tasks using interrupt priorities. In terms of time processing, only high priority processing that cannot be rotated later is processed first, and other processing is postponed as low priority interrupt processing. In addition, a plurality of memory configurations are used to prevent data alteration.
In the schematic configuration of FIG. 1, the FFT arithmetic unit stores the ring buffer area 11 in which the latest N units (8 units = 1024 points in the figure) data is written, and the storage data in the ring buffer area is rearranged in order of time series. The first and second FFT calculation target data storage areas 12, 13 and the calculation processing unit 14 for executing processing such as writing of new data to the ring buffer area 11, the rearrangement, and the FFT calculation, the tasks are executed in priority order. As shown, a management unit 15 that manages the processing order is provided. In FFT calculation processing, the FFT calculation processing is divided into a plurality of tasks, and each task is divided into a high priority task and a low priority task, and the time occupied by the high priority task is shortened.

  FIG. 1 and FIG. 2 are diagrams for explaining the operation of the FFT arithmetic unit of the present invention. The ring buffer unit 11 into which the latest N (= 8) units of data are written with n points (= 128 points) of data as one unit. The first and second FFT operation target data storage units 12 and 13 that store the stored data in the ring buffer unit 11 in the order of time series, and the writing of new data to the ring buffer unit 11 / the order of the time series order An arithmetic processing unit 14 that executes processing such as replacement / FFT arithmetic, and a management unit 15 that manages the priority of tasks and manages the processing order so that tasks are executed in order of priority are provided. One unit (= 128 points) of new data is overwritten in the order of 1 → 2 →… → 8 → 1 → 2 →… from the top in the ring buffer 11, and the latest N (= 8) sets of data are always stored. It is supposed to be saved.

In the present invention, the FFT calculation processing is divided into the following four tasks A to D. That is,
First task A that writes 1 unit of new data to the ring buffer unit 11,
One of the FFT calculation target data storage areas 12 and 13 by rearranging the latest (N−1) (= 7) unit data stored in the ring buffer unit 11 as the second to eighth data in terms of time. Second task B to be saved in
A third task C for writing the generated new data of one unit to the FFT calculation target data storage areas 12 and 13 as the first data in time,
A fourth task D that performs FFT processing on N (= 8) units of data stored in one of the FFT calculation target data storage units 12 and 13 and overwrites the processing result in the calculation target data storage unit,
The priority of the first and second tasks A and B is lowered, and the priority of the third and fourth tasks C and D is raised.

The arithmetic processing unit 14 executes processing from a task with a high priority in each cycle based on the task management of the management unit 15 (see the time chart in FIG. 3).
That is, when the low-priority task in the previous cycle is executed, the arithmetic processing unit 14 writes one unit of new data 100 (see FIG. 1) generated in the previous cycle by the first task A to the ring buffer unit 11. The first FFT operation target data storage unit by rearranging the latest (N−1) (= 7) unit data stored in the ring buffer unit 11 by the second task B as the second to eighth data in time. 12 is copied. That is, in the second task B, the arithmetic processing unit 14 rearranges the latest seven units of data in order as the second to eighth data in time, and stores the storage areas 2 to 8 in the first FFT calculation target data storage unit 12. Copy to. Newer data is copied in the lower part of the first FFT calculation target data storage unit 12.

Then, the next unit of new data 101 is input in the current cycle. As a result, when the high-priority task of the current cycle is executed, the arithmetic processing unit 14 sets the new data 101 as the first data in time by the third task C, so that the first FFT calculation target data storage unit 12 can To the location (storage area 1), the fourth task performs FFT processing on the N units of data stored in the first FFT calculation target data storage unit 12 from D, and the processing result is the first FFT calculation target data. The storage unit 12 is overwritten.
Thereafter, when the low-priority task in the current cycle is executed, the arithmetic processing unit 14 writes one unit of new data 101 generated in the current cycle by the first task A into the ring buffer unit 11 (see FIG. 2), The second FFT operation target data storage unit by rearranging the latest (N−1) (= 7) unit data stored in the ring buffer unit 11 by the second task B as the second to eighth data in time. Copy to 13. That is, in the second task B, the arithmetic processing unit 14 rearranges the latest seven units of data in order as the second to eighth data in time, and stores the storage areas 2 to 8 of the second FFT calculation target data storage unit 13. Copy to.

Then, in the next cycle, the next unit of new data 102 is input. As a result, when the high-priority task is executed in the next cycle, the arithmetic processing unit 14 sets the new data 102 as the first data in time by the third task C, and the second FFT calculation target data storage unit 13 responds. To the position (storage area 1), the fourth task performs FFT processing on the N units of data stored in the second FFT calculation target data storage unit 13 from D in the fourth task, and the processing result is the second FFT calculation target data. The storage unit 13 is overwritten.
Thereafter, the FFT calculation is repeatedly executed at predetermined intervals while alternately using the FFT calculation target data storage units 12 and 13.
As described above, the FFT calculation process is divided into a plurality of tasks, and each task is divided into a high priority task and a low priority task, so that the time occupied by the high priority task can be shortened.

FIG. 4 is a block diagram of the FFT arithmetic unit of the present invention, and the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals. The input buffer 10 stores 1 unit of new input data at n points (128 points). The arithmetic processing unit 14 holds a program corresponding to the task name in the internal memory 14a, and executes the task processing using the program corresponding to the task name instructed from the management unit 15. The management unit (OS unit) 15 holds a priority / task table 15a indicating the correspondence between the priority and the task name, so that the task processing is performed in order from the task with the highest priority. 14 is controlled. The storage unit 21 stores the ring buffer area 11 into which the latest N units (eight units) of data is written, and the first and second FFT calculation target data that are stored in the time-series sorted and stored. Storage areas 12 and 13 are prepared. The operation of each part is as described in FIGS. 1 to 3. According to the present invention, the real-time processing in the FFT operation can be shortened, and the power is increased as the data length (current N = 1024) is increased to improve the processing accuracy. Demonstrate.

It is 1st operation | movement explanatory drawing of the FFT arithmetic unit of this invention. It is 2nd operation | movement explanatory drawing of the FFT arithmetic unit of this invention. It is a time chart of the present invention. It is a block diagram of the FFT arithmetic unit of this invention. It is conventional FFT calculation explanatory drawing. It is a conventional time chart.

Explanation of symbols

11 Ring buffer units 12, 13 First and second FFT operation target data storage unit 14 Operation processing unit 15 Management units A to D: First to fourth tasks

Claims (4)

Write data to the ring buffer with n points of data as one unit, rearrange the N units of data written in the ring buffer into a series according to the time order, and perform FFT operation on the rearranged data in a predetermined cycle In the FFT calculation method executed in
A ring buffer unit in which the latest N units of data are written, first and second FFT computation target data storage units that rearrange and store data stored in the ring buffer unit in time series order, and new data to the ring buffer unit An operation processing unit that executes processing such as writing, rearrangement, and FFT operation, and a management unit that manages the entire processing order are provided.
In the previous cycle, the latest (N−1) unit data stored in the ring buffer unit is rearranged as the second to Nth data in time and stored in the first FFT operation target data storage unit,
Write one unit of new data generated in the current cycle as the first data in time to the corresponding position in the first FFT operation target data storage unit,
Next, FFT processing is performed on the N units of data stored in the first FFT calculation target data storage unit,
Thereafter, the 1 unit of new data generated in the current cycle is written to the ring buffer unit,
The latest (N−1) units of data stored in the ring buffer unit are rearranged as the second to Nth data in time and stored in the second FFT operation target data storage unit,
Thereafter, the above processing is executed while switching the FFT calculation target data storage unit for each cycle.
FFT calculation method characterized by this. Write data to the ring buffer with n points of data as one unit, rearrange the N units of data written in the ring buffer into a series according to the time order, and perform FFT operation on the rearranged data in a predetermined cycle In the FFT arithmetic unit executed in
A ring buffer area in which the latest N units of data are written, a storage unit having first and second FFT operation target data storage areas for rearranging and storing the storage data in the ring buffer area in time series;
An arithmetic processing unit for executing processing such as writing, rearrangement, and FFT operation of new data in the ring buffer area,
A management unit that manages the processing order so that tasks are executed in priority order,
Divide FFT processing into multiple tasks and divide each task into high priority tasks and low priority tasks to reduce the time that high priority tasks occupy the arithmetic processing unit.
An FFT arithmetic unit characterized by that. (1) The first task to write 1 unit of new data to the ring buffer area, (2) The latest (N−1) units of data stored in the ring buffer area A second task that rearranges the data as the second to Nth data and stores them in the FFT calculation target data storage area, and (3) the FFT calculation target data with the generated new data of one unit as the first data in time The third task to be written in the corresponding position of the storage unit is divided into (4) the fourth task for performing FFT processing on N units of data stored in the FFT calculation target data storage unit,
Lowering the priority of the first and second tasks and increasing the priority of the third and fourth tasks;
The FFT arithmetic unit according to claim 2, wherein: When the low-priority task in the previous cycle is executed, the arithmetic processing unit writes one unit of new data generated in the previous cycle by the first task to the ring buffer area, and then in the ring buffer area by the second task. The latest (N−1) unit data stored is rearranged as the 2nd to Nth data in time and stored in the first FFT calculation target data storage area.
In addition, when the high-priority task in the current cycle is executed, the arithmetic processing unit uses the third task as a first data for the first FFT operation target data as one unit of new data generated in the current cycle. Write to the corresponding location in the storage area, and perform FFT processing on the N units of data stored in the first FFT computation target data storage area by the fourth task,
Thereafter, the one unit of new data generated in the current cycle is written to the ring buffer area, and the latest (N−1) units of data stored in the ring buffer area are temporally stored in the second to Nth time points. Are rearranged as the second and saved in the second FFT computation target data storage area, and thereafter the above processing is executed while switching the FFT computation target data storage area for each cycle.
The FFT arithmetic unit according to claim 3.

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