JP2005223287A - Method of manufacturing semiconductor laser device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor laser device with which quantum well active layers can be disordered efficiently with high reproducibility and a dopant concentration in each of semiconductor layers can be adjusted to a desired value with high reproducibility. <P>SOLUTION: When manufacturing a semiconductor laser device comprising a p-type first clad layer 14 containing a p-type impurity of a concentration C1 on multiple quantum well active layers 13, after a low impurity concentration semiconductor layer 25 is formed, whose concentration C2 of a p-type impurity contained on the multiple quantum well active layers 13 is lower than the concentration C1, the multiple quantum well active layers 13 are disordered and an n-type current block layer 19 and a p-type flattened layer 20 are formed by gas phasing or liquid phasing. The low impurity concentration semiconductor layer 25 is then charged with the p-type impurity from the p-type second clad layer 16, thereby forming a p-type first clad layer 14 so that the concentration of the contained p-type impurity becomes said concentration C1. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor laser device, and more particularly to a method for manufacturing a semiconductor laser device having a window structure in the vicinity of an emission end face.

In recent years, various semiconductor laser elements have been widely used as information processing light sources in optical disk devices such as compact disks (abbreviated as CDs) and digital versatile disks (abbreviated as DVDs). In particular, a high-power semiconductor laser device having a maximum optical output of 30 mW or more is a CD-R (a recording medium that can be written).
Used as a light source for writing to optical disk devices based on various standards such as Recordable / RW (ReWriteable), Mini Disk (abbreviation MD), magneto-optical (abbreviation MO) disk, DVD ± R / RW, etc. It has been. In order to improve the writing speed to these recording media, semiconductor laser devices are strongly required to have higher output.

  One of the factors that determine the maximum optical output of a semiconductor laser element is the destruction phenomenon called “catastrophic optical damage” (abbreviated as “COD”) that occurs as the optical output density in the active layer near the end face of the laser resonator increases. It is easy to happen. In the active layer near the end face of the laser resonator, carriers are generated by absorption of the laser beam, and the generated carriers recombine with heat generation. Therefore, when the optical output density increases, heat generation at the time of carrier recombination occurs. The semiconductor crystal constituting the active layer melts and COD is generated. Therefore, a semiconductor laser device having a higher COD level that is less likely to cause COD, that is, a limit value of light output that does not cause COD, can obtain higher light output.

  One technique for improving the COD level and increasing the output of the semiconductor laser device is to make the active layer near the laser cavity end face less likely to absorb laser light, that is, transparent to the laser light. A technique for providing a window structure is known, and research and development are currently being conducted widely. The window structure is a structure in which a portion having a larger band gap than the remaining portion of the active layer is provided in the active layer near the end face of the laser resonator.

  As an active layer of a semiconductor laser element, a quantum well active layer having a quantum well structure is frequently used. In the quantum well active layer, the window structure can be formed by disordering the quantum well structure in the vicinity of the laser cavity end face. There are various methods for disordering the quantum well structure, but at present, a method of diffusing or injecting vacancies or impurities is mainly used.

  As one of the prior arts, a method of manufacturing a semiconductor laser device using vacancy diffusion for disordering a quantum well structure has been proposed (see Patent Document 1). Hereinafter, a manufacturing method of the semiconductor laser device disclosed in Patent Document 1 will be described. FIG. 8 is a perspective view schematically showing the state of each step in the production of a semiconductor laser device by a conventional method for producing a semiconductor laser device.

  First, as shown in FIG. 8A, an n-type AlGaAs cladding layer 52, a multiple quantum well active layer 53, and a p-type AlGaAs first cladding layer 54 are epitaxially grown on an n-type GaAs substrate 51 in this order. The multiple quantum well active layer 53 is formed by alternately growing two types of AlGaAs mixed crystal layers having different proportions of aluminum and gallium.

Next, after the SiO ₂ film 55 is formed on the surface of the p-type AlGaAs first cladding layer 54, the active region 53a that contributes to the laser oscillation of the multiple quantum well active layer 53 is determined in advance as shown in FIG. 8B. The SiO ₂ film 55 in the region where the projected portion is projected is removed, and an opening 55a is formed that extends in a direction substantially perpendicular to the surfaces 56a and 56b that are predetermined as laser cavity end faces and does not reach the surfaces 56a and 56b. To do. In an As atmosphere, the n-type GaAs substrate 51 including the SiO ₂ film 55 in which the opening 55a is formed is annealed at a temperature of 800 ° C. or higher. This annealing, a p-type AlGaAs first cladding layer 54 surface in contact with the SiO ₂ film 55, Ga atoms are sucked up into the SiO ₂ film 55, holes are generated in the p-type AlGaAs first cladding layer 54. The holes generated in the p-type AlGaAs first cladding layer 54 are diffused into the multiple quantum well active layer 53 by annealing, thereby disordering the multiple quantum well structure. That is, the multiple quantum well structure of the multiple quantum well active layer 53 in the region where the portion excluding the opening 55a of the SiO ₂ film 55 is projected is disordered, and the surfaces near the surfaces 56a and 56b that are predetermined as laser cavity end faces are formed. An end face window portion 53 b is formed in the multiple quantum well active layer 53. In the region where the multiple quantum well structure of the multiple quantum well generation layer 53 is disordered, the effective forbidden band width, that is, the band gap is widened. Therefore, the end face window portion 53b of the multiple quantum well generation layer 53 has a multiple quantum well generation layer. 53 functions as a transparent window with respect to the oscillation laser light generated in the active region 53a inside 53.

After the annealing, although not shown, the SiO ₂ film 55 is removed, and the p-type AlGaAs second cladding layer and the p-type GaAs contact layer are successively regrown on the exposed p-type AlGaAs first cladding layer 54. Next, the p-type AlGaAs second cladding layer and the p-type GaAs contact layer in the region excluding the region where the active region 53a of the multiple quantum well active layer 53 is projected, that is, the SiO ₂ film 55 in the step shown in FIG. Protons are implanted into the p-type AlGaAs second cladding layer and the p-type GaAs contact layer formed on the p-type AlGaAs first cladding layer 54 in contact with each other by a proton implantation method to form a current blocking layer. Next, by forming electrodes on the upper layer of the p-type GaAs contact layer and the lower layer of the n-type GaAs substrate 51, a semiconductor laser device is obtained.

  In another prior art, a method of manufacturing a semiconductor laser element using Zn diffusion for disordering a quantum well structure has been proposed (see Patent Documents 2 and 3).

  In the technique disclosed in Patent Document 2, a semiconductor layer containing Zn at a high concentration is used as a Zn diffusion source. Hereinafter, a method for manufacturing the semiconductor laser device disclosed in Patent Document 2 will be described. In the technique disclosed in Patent Document 2, first, similarly to the process shown in FIG. 8A, an n-type GaAs buffer layer, an n-type InGaAlP cladding layer, an InGaP well layer, and an InGaAlP are formed on an n-type GaAs substrate. A multi-quantum well active layer comprising a barrier layer, a p-type InGaAlP cladding layer, a p-type InGaP conduction layer and an n-type GaAs cap layer are sequentially grown. Next, the p-type InGaP conduction facilitating layer and the n-type GaAs cap layer in a region where a predetermined region is projected as the end face window portion of the multiple quantum well active layer is removed, and the exposed p-type InGaAlP cladding layer is formed on the exposed p-type InGaAlP cladding layer. A p-type GaAs layer containing a high concentration of is selectively grown. Thereafter, annealing is performed to diffuse Zn from the p-type GaAs layer through the multi-quantum well active layer and the p-type InGaAlP clad layer to the middle of the n-type InGaAlP clad layer. To selectively disorder. Thus, an end face window portion is formed, and an AlGaInP-based semiconductor laser element is obtained.

  In the method of manufacturing a semiconductor laser device disclosed in Patent Document 3, a ZnO thin film is used as a Zn diffusion source, and the semiconductor laser device is manufactured in the same manner as the method disclosed in Patent Document 2.

JP-A-9-23037 (page 7, Fig. 1-2) Japanese Patent Laid-Open No. 11-284280 (page 6, FIG. 1) JP-A-11-145553 (page 3-4, FIG. 1-2)

  Impurities as dopants are introduced into each semiconductor crystal layer constituting the semiconductor laser element in order to have a desired conductivity type. In the method of manufacturing a semiconductor laser device disclosed in Patent Document 1, 2, or 3, the diffusion of impurities or vacancies for disordering the quantum well active layer is performed on a layer containing a dopant on the quantum well active layer. Since the process is performed through the p-type AlGaAs first cladding layer 54 shown in FIG. 8B, the diffusion of impurities or vacancies is hindered by the presence of the dopant, and the diffusion mechanism becomes complicated. For this reason, disordering of the quantum well active layer cannot be performed efficiently, and the reproducibility of disordering may be reduced. Such instability of disordering of the quantum well active layer leads to a decrease in the COD level and the reliability of the semiconductor laser device.

  Further, the concentration of the impurity serving as the dopant in each of the semiconductor crystal layers is strictly designed to obtain desired characteristics. As described above, in the technique disclosed in Patent Document 1, 2, or 3, after forming a semiconductor crystal layer containing impurities as a dopant at a designed concentration on the quantum well active layer, the quantum well active layer is disordered. Therefore, the diffusion of impurities or vacancies induces the diffusion of dopants present in each semiconductor crystal layer, and the dopant concentration of each layer often deviates from the design value. In particular, when high-temperature annealing is performed to diffuse vacancies or impurities, the dopant inside the semiconductor crystal layer diffuses in large quantities beyond the boundary of each layer due to this high-temperature annealing. Therefore, it is difficult to stably manufacture a homogeneous semiconductor laser device.

  Deviation from the design value of the dopant concentration causes an increase in operating current and driving voltage at high output, and a deterioration in long-term reliability associated therewith. In particular, in the p-type epitaxial crystal growth layer, Zn atoms, Mg atoms, Be atoms, or the like having a particularly large diffusion coefficient are generally used as p-type dopants for imparting p-type conductivity. Deviation from the design value of the dopant concentration generated during disordering tends to be large, and its influence on device characteristics is serious.

  It is an object of the present invention to perform disordering of a quantum well active layer for forming a window structure in the vicinity of an emission end face efficiently and with good reproducibility, and to achieve a desired dopant concentration in each semiconductor layer with good reproducibility. It is to provide a method of manufacturing a semiconductor laser device that can be set to a value.

The present invention includes a first conductive type semiconductor substrate, an active layer provided on the first conductive type semiconductor substrate and having a smaller band gap than the first conductive type semiconductor substrate, provided on the active layer, A method of manufacturing a semiconductor laser device comprising: a second conductivity type semiconductor layer containing a second conductivity type impurity at a concentration C1 and having a larger band gap than the active layer,
Forming an active layer on the first conductive type semiconductor substrate;
Forming a low impurity concentration semiconductor layer having a concentration C2 of the second conductivity type impurity contained on the active layer lower than the concentration C1 (C2 <C1);
Forming a second conductivity type semiconductor layer so that the concentration of the second conductivity type impurity contained in the low impurity concentration semiconductor layer is supplemented with the second conductivity type impurity to be the concentration C1. A method of manufacturing a semiconductor laser device characterized by the following.

In addition, the present invention provides the step of forming the low impurity concentration semiconductor layer,
The method further includes the step of forming an end face window portion having a larger band gap than the remaining portion of the active layer in the active layer in the vicinity of the predetermined face as much as possible as the end face from which the laser beam is emitted,
Filling the low impurity concentration semiconductor layer with a second conductivity type impurity to form a second conductivity type semiconductor layer;
It is performed after the step of forming the end face window portion or accompanying the step.

According to the present invention, in the step of filling the low impurity concentration semiconductor layer with a second conductivity type impurity and forming the second conductivity type semiconductor layer,
The second conductivity type impurity is supplemented in a region excluding a region where the end face window portion of the low impurity concentration semiconductor layer is projected.

In addition, the present invention provides the step of forming the low impurity concentration semiconductor layer,
Forming a high impurity concentration semiconductor layer having a second conductivity type impurity concentration C3 higher than the concentration C2 (C3> C2) on the low impurity concentration semiconductor layer;
Forming a semiconductor layer by a vapor phase method or a liquid phase method on a first conductivity type semiconductor substrate including the high impurity concentration semiconductor layer and the low impurity concentration semiconductor layer;
The step of forming the semiconductor layer by the vapor phase method or the liquid phase method includes:
It also serves as a step of supplementing the second impurity impurity from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer.

In the step of forming the semiconductor layer by the vapor phase method or the liquid phase method,
The temperature of the first conductive type semiconductor substrate is maintained at 550 ° C. or higher and 1000 ° C. or lower.

In addition, the present invention provides the step of forming the low impurity concentration semiconductor layer,
Forming a high impurity concentration semiconductor layer having a second conductivity type impurity concentration C3 higher than the concentration C2 (C3> C2) on the low impurity concentration semiconductor layer;
Annealing a first conductivity type semiconductor substrate comprising the high impurity concentration semiconductor layer and the low impurity concentration semiconductor layer,
The step of annealing the first conductive type semiconductor substrate includes:
It also serves as a step of supplementing the second impurity impurity from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer.

Further, the present invention is after the step of forming the low impurity concentration semiconductor layer and before the step of forming the end face window portion,
Forming a high impurity concentration semiconductor layer on the low impurity concentration semiconductor layer, wherein the concentration C3 of the second conductivity type impurity contained is higher than the concentration C2 (C3>C2);
The step of forming the end face window portion includes:
Forming a diffusion supply layer that diffuses and supplies vacancies or impurities to the active layer on an active layer in the vicinity of a predetermined surface as much as an end face from which the laser beam is emitted in the active layer;
Annealing a first conductivity type semiconductor substrate comprising the diffusion supply layer, the high impurity concentration semiconductor layer, and the low impurity concentration semiconductor layer,
The step of annealing the first conductive type semiconductor substrate includes:
It also serves as a step of supplementing the second impurity impurity from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer.

According to the present invention, in the step of annealing the first conductivity type semiconductor substrate,
The first conductivity type semiconductor substrate is annealed at a temperature of 550 ° C. or higher and 1000 ° C. or lower.

According to the present invention, the step of filling the low impurity concentration semiconductor layer with a second conductivity type impurity and forming the second conductivity type semiconductor layer includes:
Forming a dielectric layer containing atoms that are diffused into the low impurity concentration semiconductor layer and become second conductivity type impurities on the low impurity concentration semiconductor layer;
And annealing a first conductivity type semiconductor substrate including the dielectric layer and the low impurity concentration semiconductor layer.

Further, the present invention is after the step of forming the low impurity concentration semiconductor layer and before the step of forming the end face window portion,
Forming a dielectric layer including atoms that are diffused into the low impurity concentration semiconductor layer and become second conductivity type impurities on the low impurity concentration semiconductor layer;
The step of forming the end face window portion includes:
Forming a diffusion supply layer that diffuses and supplies vacancies or impurities to the active layer on an active layer in the vicinity of a predetermined surface as much as an end face from which the laser beam is emitted in the active layer;
Annealing a first conductivity type semiconductor substrate comprising the diffusion supply layer, the dielectric layer, and the low impurity concentration semiconductor layer,
The step of annealing the first conductive type semiconductor substrate includes:
It also serves as a step of supplementing the low impurity concentration semiconductor layer with the second conductivity type impurity from the dielectric layer.

In the present invention, in the step of forming the dielectric layer,
The dielectric layer may be formed on a region excluding a region where a predetermined portion of the low impurity concentration semiconductor layer is projected as much as possible.

In addition, the present invention provides a method of annealing the first conductive semiconductor substrate before the step of annealing.
A dielectric layer including atoms that are diffused into the low impurity concentration semiconductor layer and become first conductivity type impurities is formed on a region where a predetermined portion of the low impurity concentration semiconductor layer is projected as much as possible as the end face window portion. The method further includes the step of:

  According to the present invention, when forming the second conductivity type semiconductor layer provided on the active layer of the semiconductor laser element and designed to contain the second conductivity type impurity at the concentration C1, the second conductivity type impurity is formed. After forming a low impurity concentration semiconductor layer on the active layer with a concentration C2 of C2 lower than the concentration C1 (C2 <C1), the second conductivity type impurity contained in the low impurity concentration semiconductor layer is filled with a second conductivity type impurity. The second conductivity type semiconductor layer is formed so that the concentration of the type impurity becomes the concentration C1. The concentration C2 of the second conductivity type impurity in the low impurity concentration semiconductor layer is lower than the concentration C1 (C2 <C1). Therefore, in the process after the formation of the low impurity concentration semiconductor layer, the low impurity concentration semiconductor layer has another concentration C2. By diffusing and flowing the second conductivity type impurity from the layer, the concentration of the second conductivity type impurity in the second conductivity type semiconductor layer can be adjusted to be the design value C1. That is, in the method for manufacturing a semiconductor laser device of the present invention, it is possible to avoid a deviation from the design value of the concentration of the second conductivity type impurity contained in the second conductivity type semiconductor layer. Further, as described above, since the second conductivity type impurity concentration C2 in the low impurity concentration semiconductor layer is lower than the concentration C1 (C2 <C1), the second conductivity type semiconductor containing the second conductivity type impurity at the concentration C1. There are the following advantages compared with the case where the layer is exposed to a high temperature where the second conductivity type impurity is diffused. When the low impurity concentration semiconductor layer is exposed to a high temperature where the second conductivity type impurity is diffused, the amount of the second conductivity type impurity flowing out from the low impurity concentration semiconductor layer to the other layer is small. The deviation of the impurity concentration from the design value can be suppressed. Therefore, a semiconductor laser element having desired characteristics can be obtained stably.

  Further, according to the present invention, when manufacturing a semiconductor laser device having an end face window in an active layer near the end face from which laser light is emitted, the low impurity concentration semiconductor layer is supplemented with the second conductivity type impurities. This is performed after or in conjunction with the step of forming the end face window portion where the diffusion of the second conductivity type impurity from the layer to the low impurity concentration semiconductor layer is likely to occur. Accordingly, it is possible to reliably avoid a deviation from the design value of the concentration of the second conductivity type impurity contained in the second conductivity type semiconductor layer. Further, the low impurity concentration semiconductor layer provided on the active layer when the end face window portion is formed in the active layer has the second conductivity type impurity concentration C2 lower than the concentration C1 (C2 <C1). Compared with the case where the end face window is formed in the active layer in a state where the second conductivity type semiconductor layer containing the second conductivity type impurity at the concentration C1 is provided on the layer, the vacancy or impurity in the active layer is not formed. Diffusion can be easily performed, and the end face window can be formed efficiently and with good reproducibility. Therefore, it is possible to obtain a semiconductor laser element having a high COD level, high output and high reliability.

  Further, according to the present invention, since the second conductivity type impurity is not filled in the region where the end face window portion of the low impurity concentration semiconductor layer is projected, the region where the end face window portion of the second conductivity type semiconductor layer is projected is Compared with the remaining region of the second conductivity type semiconductor layer, the conductivity is low. Therefore, compared with the case where the second conductivity type impurity is filled in the entire region of the low impurity concentration semiconductor layer, the amount of reactive current flowing into the end face window portion of the active layer can be reduced and the threshold current can be reduced. The current can be reduced and the power consumption can be reduced.

  According to the invention, the second conductivity type impurity is contained on the low impurity concentration semiconductor layer at a concentration C3 (C3> C2) higher than the concentration C2 of the second conductivity type impurity contained in the low impurity concentration semiconductor layer. With the high impurity concentration semiconductor layer provided, a semiconductor layer is formed by a vapor phase method or a liquid phase method. Accordingly, diffusion of the second conductivity type impurity from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer can be promoted, and the second conductivity type impurity can be supplemented from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer. Therefore, the second conductivity type semiconductor layer can be formed. Therefore, it is not necessary to provide the step of forming the second conductivity type semiconductor layer by supplementing the low impurity concentration semiconductor layer with the second conductivity type impurity separately from the step of forming the semiconductor layer by the vapor phase method or the liquid phase method. The manufacturing process can be simplified and the productivity can be improved.

  According to the present invention, the temperature of the first conductivity type semiconductor substrate when the semiconductor layer is formed by the vapor phase method or the liquid phase method is maintained at 550 ° C. or more and 1000 ° C. or less. Diffusion of the second conductivity type impurity into the low impurity concentration semiconductor layer occurs quickly. Therefore, it is possible to efficiently fill the second conductivity type impurities into the low impurity concentration semiconductor layer.

  According to the invention, the second conductivity type impurity is contained on the low impurity concentration semiconductor layer at a concentration C3 (C3> C2) higher than the concentration C2 of the second conductivity type impurity contained in the low impurity concentration semiconductor layer. The first conductivity type semiconductor substrate is annealed with the high impurity concentration semiconductor layer provided. Accordingly, diffusion of the second conductivity type impurity from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer can be promoted, and the second conductivity type impurity can be supplemented from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer. Therefore, the second conductivity type semiconductor layer can be formed.

  According to the invention, the second conductivity type impurity is contained on the low impurity concentration semiconductor layer at a concentration C3 (C3> C2) higher than the concentration C2 of the second conductivity type impurity contained in the low impurity concentration semiconductor layer. A diffusion supply layer provided with a high impurity concentration semiconductor layer and supplying vacancies or impurities by diffusing into the active layer on an active layer in the vicinity of a predetermined surface as an end face from which the laser beam is emitted in the active layer The first conductivity type semiconductor substrate is annealed in the provided state. By this annealing, vacancies or impurities can be diffused from the diffusion supply layer into the active layer in the vicinity of a predetermined surface as much as possible as the end surface from which the laser beam is emitted, and an end surface window can be formed, and a high impurity concentration semiconductor layer The diffusion of the second conductivity type impurity from the low impurity concentration semiconductor layer to the low impurity concentration semiconductor layer is promoted, and the second conductivity type impurity is supplemented from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer to form the second conductivity type semiconductor layer. it can. Accordingly, it is not necessary to provide a step of forming the second conductivity type semiconductor layer by supplementing the low impurity concentration semiconductor layer with the second conductivity type impurity, thereby simplifying the manufacturing process. Productivity can be improved.

  According to the present invention, since the first conductivity type semiconductor substrate is annealed at a temperature of 550 ° C. or more and 1000 ° C. or less, the diffusion of the second conductivity type impurities from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer is prevented. It happens promptly. Therefore, it is possible to efficiently fill the second conductivity type impurities into the low impurity concentration semiconductor layer.

  According to the present invention, the first conductivity type semiconductor substrate is formed on the low impurity concentration semiconductor layer in a state in which the dielectric layer containing atoms that are diffused into the low impurity concentration semiconductor layer and become the second conductivity type impurity is provided. Anneal. As a result, the second conductivity type impurity can be compensated from the dielectric layer to the low impurity concentration semiconductor layer, so that the second conductivity type semiconductor layer can be formed.

  According to the invention, the dielectric layer containing atoms that are diffused into the low impurity concentration semiconductor layer and become the second conductivity type impurity is provided on the low impurity concentration semiconductor layer, and laser light is emitted from the active layer. The first conductivity type semiconductor substrate is annealed in a state in which a diffusion supply layer for diffusing vacancies or impurities into the active layer is provided on the active layer in the vicinity of a predetermined surface as much as possible. By this annealing, vacancies or impurities can be diffused from the diffusion supply layer into the active layer in the vicinity of the predetermined surface as much as possible as the end surface from which the laser beam is emitted, and the end surface window can be formed. The second conductivity type semiconductor layer can be formed by filling the impurity concentration semiconductor layer with the second conductivity type impurity. Accordingly, it is not necessary to provide a step of forming the second conductivity type semiconductor layer by supplementing the low impurity concentration semiconductor layer with the second conductivity type impurity, thereby simplifying the manufacturing process. Productivity can be improved.

  Further, according to the present invention, since the dielectric layer containing the atom serving as the second conductivity type impurity is not formed on the region where the predetermined portion as the end face window portion of the low impurity concentration semiconductor layer is projected, the low impurity concentration The region where a predetermined portion is projected as much as possible as the end face window portion of the concentration semiconductor layer is not filled with the second conductivity type impurity. As a result, the conductivity of the region where the end face window portion of the second conductivity type semiconductor layer is projected is lower than the remaining region of the second conductivity type semiconductor layer. Therefore, as compared with the case where the dielectric layer including the atoms serving as the second conductivity type impurity is formed on the entire region of the low impurity concentration semiconductor layer and the second conductivity type impurity is filled in the entire region of the low impurity concentration semiconductor layer, Since the amount of reactive current flowing into the end face window portion of the active layer can be reduced and the threshold current can be reduced, the operating current can be reduced and the power consumption can be reduced.

  Further, according to the present invention, the first conductivity type semiconductor substrate is diffused into the low impurity concentration semiconductor layer on the region where a predetermined portion is projected as the end face window portion of the low impurity concentration semiconductor layer, and the first conductivity type semiconductor substrate is diffused. Annealing is performed in a state in which a dielectric layer containing atoms that become type impurities is provided. As a result, the region where the end face window portion of the low impurity concentration semiconductor layer is projected is filled with the first conductivity type impurity of the opposite conductivity type to the second conductivity type impurity which is filled in the remaining region of the low impurity concentration semiconductor layer. Therefore, the conductivity of the region where the end face window portion of the second conductivity type semiconductor layer is projected can be made lower than that of the remaining region of the second conductivity type semiconductor layer. Therefore, the amount of reactive current flowing into the end face window portion of the active layer can be further reduced and the threshold current can be further reduced, so that the operating current can be further reduced and the power consumption can be further reduced.

  FIG. 1 is a perspective view schematically showing a configuration of a semiconductor laser device 1 obtained by a method for manufacturing a semiconductor laser device according to an embodiment of the present invention. The semiconductor laser element 1 exemplified in the present embodiment is a refractive index waveguide type semiconductor laser element having a ridge stripe structure as a current confinement and optical confinement structure.

  The semiconductor laser device 1 includes an n-type semiconductor substrate 11 which is a first conductivity type semiconductor substrate, an n-type cladding layer 12 sequentially stacked on the n-type semiconductor substrate 11, a multi-quantum well (abbreviated as MQW). ) Active layer 13, p-type first cladding layer 14 and p-type etching stop layer 15, which are second conductive type semiconductor layers, ridge 18 provided on p-type etching stop layer 15, and longitudinal side surfaces of ridge 18 N-type current blocking layer 19 provided on the p-type, p-type planarization layer 20 and p-type contact layer 21 provided above the ridge 18 and n-type current blocking layer 19, and p provided on the p-type contact layer 21. Front electrode (not shown) provided on the side electrode 22, the n-side electrode 23 provided in the lower layer of the n-type semiconductor substrate 11, and the end face 24a from which the laser light of the laser resonator is emitted. When configured to include a surface reflection film after the laser beam of the laser resonator (not shown) provided on the end face 24b opposite to the end surface 24a to be emitted. The ridge 18 includes a p-type second cladding layer 16 and a p-type cap layer 17.

  Although not shown, the MQW active layer 13 has a multiple quantum well structure in which barrier layers and well layers having a smaller band gap than the barrier layers are alternately stacked, and includes an n-type semiconductor substrate 11 and an n-type cladding layer 12. And a smaller band gap than the p-type first cladding layer 14. The barrier layer and well layer constituting the MQW active layer 13 may or may not contain n-type impurities or p-type impurities. The MQW active layer 13 in the vicinity of the laser resonator end faces 24a and 24b is provided with an end face window portion 13b having a larger band gap than the active region 13a contributing to laser oscillation of the MQW active layer 13. A p-type impurity is contained at a concentration C1 in a region excluding the region where the end face window portion 13b of the p-type first cladding layer 14 is projected.

n-type semiconductor substrate 11, n-type cladding layer 12, MQW active layer 13, p-type first cladding layer 14, p-type etching stop layer 15, p-type second cladding layer 16, p-type cap layer 17, n-type current block As semiconductor materials constituting the layer 19, the p-type planarization layer 20, and the p-type contact layer 21, for example, Ga _y In _1-y P (0 ≦ y ≦ 1) and Al _z Ga _1-z As (0 ≦ z) Group III-V compound semiconductors such as ternary materials such as ≦ 1) and quaternary materials such as (Al _z Ga _1-z ) _y In _1-y P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1) Materials. Other compound semiconductor materials can also be used. In the following, Ga _y In _1-y P (0 ≦ y ≦ 1) is GaInP, Al _z Ga _1-z As (0 ≦ z ≦ 1) is AlGaAs, and (Al _z Ga _1-z ) _y In _{1 -YP} (0 ≦ y ≦ 1, 0 ≦ z ≦ 1) may be referred to as AlGaInP.

  When the III-V group compound semiconductor material is used, the n-type semiconductor substrate 11, the n-type cladding layer 12 and the n-type current blocking layer 19 impart n-type conductivity to the semiconductor material constituting each layer. As an n-type impurity, for example, a group IV element such as Si or Sn and a group VI element such as S, Se, or Te are contained. The p-type first cladding layer 14, the p-type etching stop layer 15, the p-type second cladding layer 16, the p-type cap layer 17, the p-type planarization layer 20, and the p-type contact layer 21 are semiconductor materials constituting the respective layers. As a p-type impurity imparting p-type conductivity, a group II element such as Zn, Mg, Be, Cd, or Hg is contained.

  FIG. 2 is a perspective view schematically showing the state of each step in manufacturing the semiconductor laser device 1 by the method for manufacturing a semiconductor laser device according to one embodiment of the present invention. Hereinafter, a case where a plurality of semiconductor laser elements 1 are simultaneously manufactured from a wafer-like n-type semiconductor substrate 11 will be described. FIG. 2 shows only a region where one semiconductor laser element 1 is formed.

  FIG. 2A (a) shows an n-type cladding layer 12, an MQW active layer 13, a low impurity concentration semiconductor layer 25, a p-type etching stop layer 15, a p-type second cladding layer 16 and a p-type on an n-type semiconductor substrate 11. It is a figure which shows the state which formed the cap layer. An n-type cladding layer 12, an MQW active layer 13, a low impurity concentration semiconductor layer 25, a p-type etching stop layer 15, a p-type second cladding layer 16 and a p-type cap layer 17 are formed on a wafer-like n-type semiconductor substrate 11. Epitaxial crystal growth is performed sequentially. As the growth method of each semiconductor layer, metalorganic chemical vapor deposition (abbreviated as MOCVD) method, molecular beam epitaxy (abbreviated as MBE) method, gas source MBE method and atomic beam epitaxy (Atomic layer Epitaxy). A gas phase method such as an abbreviated ALE method, and a liquid phase method such as a liquid phase epitaxy (abbreviation: LPE) method.

  The low impurity concentration semiconductor layer 25 is a layer that becomes the p-type first cladding layer 14 shown in FIG. 1, and the concentration C2 of the contained p-type impurity is lower than the concentration C1 (C2 <C1). Are formed with or without p-type impurities. The p-type second cladding layer 16 is formed so that the concentration C3 of the p-type impurity contained is higher than the concentration C2 of the p-type impurity contained in the low impurity concentration semiconductor layer 25 (C3> C2).

FIG. 2A (b) is a view showing a state in which the end face window portion 13b is formed in the MQW active layer 13. FIG. A diffusion supply layer 26 is formed on the surface of the p-type cap layer 17 by plasma CVD or the like. The diffusion supply layer 26 is formed of a dielectric material or the like that can absorb atoms from the semiconductor material constituting the p-type cap layer 17 and generate holes in the p-type cap layer 17. For example, when the p-type cap layer 17 is made of GaAs, a SiO _x (x is a real number in the vicinity of 2) film is formed as the diffusion supply layer 26. Ga atoms can be sucked up from the p-type cap layer 17 by the SiO _x film to generate vacancies.

  Next, of the formed diffusion supply layer 26, the diffusion supply layer 26 in a region excluding a region where a predetermined portion to be the end face window portion 13b of the MQW active layer 13 is projected is removed by photolithography. As a result, on the p-type cap layer 17 in a region where a predetermined portion to be the end face window portion 13b of the MQW active layer 13 is projected, the laser resonator end faces 24a and 24b are in a direction parallel to the predetermined surface as much as possible. The extending stripe-shaped diffusion supply layer 26 pattern 26a is formed. The width d1 of each diffusion supply layer 26 and the sum of the width d1 and the distance d2 between adjacent diffusion supply layers 26 (d2 + d1), that is, the formation pitch S of the diffusion supply layers 26 are the width of the end face window 13b to be formed and laser resonance. It is determined according to the length in the longitudinal direction of the vessel.

  Next, the n-type semiconductor substrate 11 on which the pattern 26a of the diffusion supply layer 26 is formed is annealed by a rapid thermal annealing (abbreviated as RTA) method or the like. By this annealing, vacancies are generated in the p-type cap layer 17 in contact with the diffusion supply layer 26, diffused to the inside of the MQW active layer 13, and the MQW active layer 13 in the region where the diffusion supply layer 26 is projected, that is, the diffusion supply The multiple quantum well structure of the MQW active layer 13 existing below the layer 26 is disordered. As a result of this disordering, the band gap of the MQW active layer 13 in the vicinity of the predetermined surface of the laser resonator end faces 24a and 24b becomes larger than the band gap of the remaining part of the MQW active layer 13, and the diffusion supply layer 26 Striped end face windows 13b extending in parallel directions are formed.

  The annealing for forming the end face window portion 13b in the MQW active layer 13 has a p-type impurity higher than the concentration C2 of the p-type impurity contained in the low impurity concentration semiconductor layer 25 on the low impurity concentration semiconductor layer 25. This is performed with the p-type second cladding layer 16 which is a high impurity concentration semiconductor layer contained at a concentration C3 (C3> C2) provided. Therefore, by this annealing, the end face window portion 13b is formed in the MQW active layer 13, and the diffusion of the p-type impurity from the p-type second cladding layer 16 to the low impurity concentration semiconductor layer 25 is promoted, and the p-type second cladding layer The p-type impurity can be supplemented from 16 to the low impurity concentration semiconductor layer 25. This annealing is preferably performed at a temperature of 550 ° C. or higher and 1000 ° C. or lower. By performing the annealing in the above temperature range, diffusion of the p-type impurity from the p-type second cladding layer 16 to the low impurity concentration semiconductor layer 25 occurs quickly, and the low impurity concentration semiconductor layer 25 is filled with the p type impurity. It can be performed efficiently.

  In the present embodiment, the diffusion supply layer 26 is a layer made of a material that can generate holes in the p-type cap layer 17 and can be diffused and supplied to the MQW active layer 13. Without being limited thereto, p-type impurities or n-type impurities are supplied to the p-type cap layer 17, and the p-type cap layer 17, the p-type second cladding layer 16, the p-type etching stop layer 15, and the low impurity concentration semiconductor layer. A layer made of a material that can be diffused and supplied to the MQW active layer 13 via 25 may be used. For example, the diffusion supply layer 26 may be formed of a semiconductor layer containing a p-type impurity such as Zn, a dielectric layer such as a ZnO film containing atoms that become p-type impurities, or a dielectric layer such as a Si film containing atoms that become n-type impurities. Can be used as When a layer serving as a supply source of p-type impurities or n-type impurities is used as the diffusion supply layer 26, the MQW in the region where the diffusion supply layer 26 is projected from the diffusion supply layer 26 by annealing. It is diffused to the active layer 13. As a result, the multiple quantum well structure of the MQW active layer 13 in the region where the diffusion supply layer 26 is projected is disordered, and the end face window portion 13b is formed.

  FIG. 2B (c) is a diagram showing a state in which the ridge 18 is formed. After the diffusion supply layer 26 shown in FIG. 2A (b) is removed, a stripe-shaped ridge 18 extending in a direction perpendicular to a predetermined plane as the laser resonator end faces 24a and 24b by using a photolithography technique and an etching technique. Then, the p-type cap layer 17 and the p-type second cladding layer 16 are etched and removed until the p-type etching stop layer 15 is exposed.

  FIG. 2B (d) is a diagram showing a state in which the n-type current blocking layer 19 and the p-type planarizing layer 20 are formed. A semiconductor crystal is grown on the side surface in the longitudinal direction of the ridge 18 and the surface of the p-type etching stop layer 15 by a vapor phase method such as MOCVD method, MBE method, gas source MBE method, ALE method, or liquid phase method such as LPE method. The n-type current blocking layer 19 is formed. At this time, the n-type current blocking layer 19 also grows on the surface of the p-type cap layer 17 constituting the top of the ridge 18. Next, a semiconductor crystal is similarly grown on the surface of the n-type current blocking layer 19 to form a p-type planarizing layer 20.

  Crystal growth by this vapor phase method or liquid phase method is performed with heating of the n-type semiconductor substrate 11 on which the ridge 18 is formed. At this time, the ridge 18 is provided above the low impurity concentration semiconductor layer 25, and the p-type second cladding layer 16 constituting the bottom of the ridge 18 has a p-type impurity concentration C3 contained in the low impurity concentration semiconductor. The concentration C2 of the p-type impurity contained in the layer 25 is higher (C3> C2). Therefore, when the n-type current blocking layer 19 and the p-type planarization layer 20 are formed by the vapor phase method or the liquid phase method, p is the same as when annealing is performed in the process shown in FIG. 2A (b) described above. The diffusion of the p-type impurity from the type second cladding layer 16 to the low impurity concentration semiconductor layer 25 is promoted, and the p-type impurity is supplemented from the p-type second cladding layer 16 to the low impurity concentration semiconductor layer 25. Thus, the p-type first cladding layer 14 containing the p-type impurity at the concentration C1 is formed in a region excluding the region where the end face window portion 13b is projected.

  When the semiconductor crystal is grown by the vapor phase method or the liquid phase method, the temperature of the n-type semiconductor substrate 11 on which the ridge 18 is formed is preferably maintained at 550 ° C. or higher and 1000 ° C. or lower. By maintaining the temperature of the n-type semiconductor substrate 11 on which the ridge 18 is formed within the above temperature range and performing crystal growth by a vapor phase method or a liquid phase method, the low impurity concentration semiconductor layer 25 is formed from the p-type second cladding layer 16. Thus, the diffusion of the p-type impurity into the substrate occurs quickly, and the low-impurity concentration semiconductor layer 25 can be efficiently filled with the p-type impurity.

  FIG. 2C (e) shows a state in which the n-type current blocking layer 19 and the p-type planarization layer 20 are removed from the region corresponding to the upper layer of the p-type cap layer 17 except the region where the end face window portion 13b is projected. FIG. Using the photolithography technique, the n-type current blocking layer 19 and the p-type layer formed in the region excluding the region where the end face window portion 13b is projected out of the region corresponding to the upper layer of the p-type cap layer 17 constituting the top of the ridge 18 The mold planarization layer 20 is selectively removed. As a result, the region excluding the region where the end face window portion 13b of the p-type cap layer 17 is projected is exposed. The MQW active layer 13 in the region where the exposed region of the p-type cap layer 17 is projected becomes the active region 13a.

  FIG. 2C (f) is a diagram illustrating a state in which the p-type contact layer 21, the p-side electrode 22, and the n-side electrode 23 are formed. Semiconductor crystal is formed on the exposed surface of the p-type cap layer 17 and the surface of the p-type planarization layer 20 by a vapor phase method such as MOCVD method, MBE method, gas source MBE method, ALE method or liquid phase method such as LPE method. And the p-type contact layer 21 is formed. When the p-type contact layer 21 is formed, the n-type semiconductor substrate 11 is normally kept at a low temperature of about 500 ° C. and crystal growth is performed by a vapor phase method or a liquid phase method. The diffusion of the p-type impurity from the cladding layer 16 to the low impurity concentration semiconductor layer 25 hardly occurs. Next, the p-side electrode 22 is formed on the surface of the formed p-type contact layer 21, and the n-side electrode 23 is formed on the surface of the n-type semiconductor substrate 11.

  The n-type semiconductor substrate 11 on which the p-side electrode 22 and the n-side electrode 23 are formed in this way is formed on the ridge 18 so that the end face window portion 13b of the MQW active layer 13 is in the vicinity of the laser resonator end faces 24a and 24b. Cut along a plane perpendicular to the longitudinal direction. The pitch W1 when cutting the substrate, that is, the width W1 in the direction parallel to the longitudinal direction of the ridge 18 of the cut substrate is the length in the longitudinal direction of the laser resonator of the semiconductor laser device 1, that is, the laser resonator end face 24a, Substantially equal to the distance between 24b. Next, although not shown, a front reflecting film having a low reflectance of about 8%, for example, is provided on a predetermined surface as the end face 24a from which the laser light from the laser resonator is emitted, and the laser light from the laser resonator is emitted. A rear surface reflection film having a high reflectance of, for example, about 90% is provided on a predetermined surface as much as possible as the end surface 24b facing the end surface 24a. Next, cutting is performed on a plane parallel to the longitudinal direction of the ridge 18 so that one ridge 18 is included. Thus, the semiconductor laser element 1 shown in FIG. 1 is obtained by dividing each region to be the semiconductor laser element 1.

  As described above, in the method of manufacturing the semiconductor laser device of this embodiment, the p-type first cladding layer designed to contain the p-type impurity at the concentration C1 in the region other than the region where the end face window portion 13b is projected. 14, after forming the low impurity concentration semiconductor layer 25 on the MQW active layer 13, the concentration C2 of the p-type impurity contained in the step shown in FIG. 2A (a) is lower than the concentration C1 (C2 <C1). In the step of forming the end face window portion 13b shown in FIG. 2A (b) and the step of forming the n-type current blocking layer 19 and the p-type planarizing layer 20 shown in FIG. 2B (d), the low impurity concentration semiconductor layer 25 is formed. It is formed by supplementing with p-type impurities. Since the concentration C2 of the p-type impurity in the low impurity concentration semiconductor layer 25 is lower than the concentration C1 (C2 <C1), in the process after the low impurity concentration semiconductor layer 25 is formed in this way, the low impurity concentration semiconductor layer is formed. 25 is diffused and allowed to flow from the other layer, that is, the p-type second cladding layer 16, so that the p-type impurity in the region excluding the region where the end face window portion 13 b of the p-type first cladding layer 14 is projected. The density can be adjusted to the design value C1. That is, it can be avoided that the concentration of the p-type impurity in the p-type first cladding layer 14 becomes excessive from the design value due to the diffusion of the p-type impurity from other layers. Therefore, deviation of the concentration of the p-type impurity contained in the p-type first cladding layer 14 from the design value C1 can be avoided.

  In particular, in the present embodiment, the p-type impurity is compensated for in the low impurity concentration semiconductor layer 25, and the diffusion of the p-type impurity from another layer such as the p-type second cladding layer 16 to the low impurity concentration semiconductor layer 25 is performed. The n-type current blocking layer 19 and p shown in FIG. 2B (d) after the step of forming the end face window portion 13b and the step of forming the end face window portion 13b shown in FIG. Since it is performed in the step of forming the mold planarization layer 20, it is possible to reliably avoid the deviation of the concentration of the p-type impurity contained in the p-type first cladding layer 14 from the design value C1.

  Further, as described above, since the concentration C2 of the p-type impurity in the low impurity concentration semiconductor layer 25 is lower than the concentration C1 (C2 <C1), the p-type first cladding layer 14 containing the p-type impurity at the concentration C1 is provided. There are the following advantages compared to the case of being exposed to a high temperature where p-type impurities are diffused as in the step shown in FIG. 2A (b) or the step shown in FIG. 2B (d). When the low impurity concentration semiconductor layer 25 is exposed to a high temperature in which the p-type impurity is diffused in the step shown in FIG. 2A (b) or the step shown in FIG. 2B (d) as in this embodiment, the low Since the amount of the p-type impurity flowing out from the impurity concentration semiconductor layer 25 to another layer such as the MQW active layer 13 is reduced, it is possible to suppress a deviation from the design value of the impurity concentration in the other layer.

  As described above, in the method of manufacturing the semiconductor laser device according to the present embodiment, the deviation of the concentration of the p-type impurity contained in the p-type first cladding layer 14 from the design value C1 can be avoided. Since the deviation of the impurity concentration in the layer from the design value can be suppressed, the semiconductor laser device 1 having desired characteristics can be stably obtained.

  Further, in the present embodiment, as described above, the step of forming the end face window portion 13b shown in FIG. 2A (b) and the n-type current blocking layer 19 and the p-type planarizing layer 20 shown in FIG. 2B (d) are formed. In this process, the p-type first cladding layer 14 is formed by filling the low impurity concentration semiconductor layer 25 with the p-type impurity from the p-type second cladding layer 16. Therefore, it is not necessary to separately provide a process of filling the low impurity concentration semiconductor layer 25 with p-type impurities and forming the p-type first cladding layer 14, thereby simplifying the manufacturing process and improving productivity. .

  Further, the step of forming the end face window portion 13b in the MQW active layer 13 shown in FIG. 2A (b) has the following advantages. As described above, the low impurity concentration semiconductor layer 25 provided on the MQW active layer 13 has a p-type impurity concentration C2 lower than the concentration C1 (C2 <C1). Compared with the case where the end face window portion 13b is formed in the MQW active layer 13 with the p-type first cladding layer 14 containing the impurity at the concentration C1, diffusion of vacancies or impurities into the MQW active layer 13 is achieved. Thus, the end window portion 13b can be formed efficiently and with good reproducibility. Therefore, the semiconductor laser device 1 obtained by the method for manufacturing the semiconductor laser device of this embodiment has a high COD level, high output, and high reliability.

  In the step shown in FIG. 2A (b), in the region where the diffusion supply layer 26 is projected, the holes generated in the p-type cap layer 17 flow into the p-type second cladding layer 16 and are diffused. Capture impurities. Therefore, in the region where the diffusion supply layer 26 of the low impurity concentration semiconductor layer 25 is projected, that is, in the region where a predetermined portion to be the end face window portion 13b of the low impurity concentration semiconductor layer 25 is projected, the p-type second Since the diffusion of the p-type impurity from the cladding layer 16 hardly occurs and the p-type impurity is not compensated, the region where the end face window portion 13b of the p-type first cladding layer 14 is projected is the region of the p-type first cladding layer 14. Compared with the remaining region, the conductivity is low.

  Thus, if the conductivity of the region where the end face window portion 13b of the p-type first cladding layer 14 is projected is lower than the conductivity of the remaining region of the p-type first cladding layer 14, the end face window of the MQW active layer 13 The amount of current flowing into the portion 13b is reduced. However, the end face window portion 13b of the MQW active layer 13 is a region that does not contribute to laser oscillation, and the current flowing into the end face window portion 13b of the MQW active layer 13 is an invalid current that does not contribute to laser oscillation. It is preferable that the amount of current flowing into the end face window portion 13b of the layer 13 is small. By reducing the amount of current flowing into the end face window portion 13b of the MQW active layer 13, the threshold current can be reduced.

  Therefore, the semiconductor laser device 1 obtained by the method of manufacturing a semiconductor laser device of this embodiment is a semiconductor laser device manufactured by filling the entire region of the low impurity concentration semiconductor layer 25 with p-type impurities, that is, a p-type contained therein. Compared to the semiconductor laser device having the p-type first cladding layer 14 having the same impurity concentration in all regions, the amount of reactive current flowing into the end face window 13b of the MQW active layer 13 is low and the threshold current is small. Is small and power consumption is low.

  Although different from the present embodiment, when the layer serving as the n-type impurity supply source is used as the diffusion supply layer 26, the region where the diffusion supply layer 26 of the low impurity concentration semiconductor layer 25 is projected is In the step of forming the end face window portion 13b shown in FIG. 2A (b), not only p-type impurities are not supplemented from the p-type second cladding layer 16, but also the remaining region of the low impurity concentration semiconductor layer 25 is compensated. An n-type impurity of a reverse conductivity type is supplemented with a type impurity. As a result, the conductivity of the region where the end face window portion 13b of the p-type first cladding layer 14 is projected can be made lower than that of the remaining region of the p-type first cladding layer 14, so that the MQW active layer The amount of reactive current flowing into the end face window portion 13b of the thirteen end face windows 13b can be further reduced, and the threshold current can be further reduced. Therefore, the operating current of the semiconductor laser element 1 can be further reduced and the power consumption can be further reduced.

  In the present embodiment, the low impurity concentration semiconductor layer 25 to be the p-type first cladding layer 14 is supplemented with p-type impurities by annealing in the step of forming the end face window portion 13b shown in FIG. 2A (b). Although it is performed using two of the annealing effect by raising the substrate temperature in the step of forming the n-type current blocking layer 19 and the p-type planarization layer 20 shown in FIG. 2B (d), it is limited to this. Alternatively, it may be performed using only one of them, or may be performed by providing an annealing step as a separate step. For example, the annealing temperature in the step of forming the end face window portion 13b shown in FIG. 2A (b) is set to 950 ° C. or higher, and the n-type current blocking layer 19 and the p-type planarizing layer 20 shown in FIG. 2B (d) are formed. The substrate temperature in the process may be less than 550 ° C., and only the annealing effect in the process of forming the end face window portion 13b may be used. Further, the substrate temperature in the step of forming the n-type current blocking layer 19 and the p-type planarization layer 20 shown in FIG. 2B (d) is set to less than 550 ° C., and the n-type current blocking layer 19 and the p-type shown in FIG. An annealing step may be provided after the step of forming the planarization layer 20. Thus, by setting the substrate temperature in the step of forming the n-type current blocking layer 19 and the p-type planarization layer 20 shown in FIG. 2B (d) to be lower than 550 ° C., the n-type semiconductor substrate 11 and the n-type semiconductor substrate 11 Thermal damage to each semiconductor layer provided thereon can be suppressed.

  In the present embodiment, the p-type impurity supply source is the p-type second cladding layer 16, and the diffusion of the p-type impurity is promoted in the process involving heating after the formation of the p-type second cladding layer 16. Although the p-type impurity is supplemented from the second cladding layer 16 to the low impurity concentration semiconductor layer 25, another method may be used without being limited thereto. For example, when crystal growth is performed in the step shown in FIG. 2A (a), a semiconductor layer not containing p-type impurities (hereinafter referred to as a non-doped semiconductor) is used instead of the p-type second cladding layer 16 containing p-type impurities at a concentration C3. After forming the end face window portion 13b shown in FIG. 2A (b), a dielectric film such as a ZnO film containing an atom that becomes a p-type impurity is formed on the non-doped semiconductor layer. Then, a dopant such as Zn may be diffused by annealing to fill the non-doped semiconductor layer and the low impurity concentration semiconductor layer 25 with p-type impurities.

  FIG. 3 is a perspective view schematically showing a configuration of a semiconductor laser device 2 obtained by a method for manufacturing a semiconductor laser device according to another embodiment of the present invention. The semiconductor laser element 2 is similar to the semiconductor laser element 1 obtained by the semiconductor laser element manufacturing method of the first embodiment, and corresponding portions are denoted by the same reference numerals and description thereof is omitted.

  It should be noted in the semiconductor laser element 2 that the concentration C4 of the p-type impurity contained in the region 170b on which the end face window portion 13b of the p-type cap layer 170 is projected is projected on the active region 13a of the p-type cap layer 170. The concentration is lower than the concentration C5 of the p-type impurity contained in the region 170a (C4 <C5).

  FIG. 4 is a perspective view schematically showing the state of each step in the production of the semiconductor laser device 2 by the method of producing a semiconductor laser device according to another embodiment of the present invention. Since the manufacturing method of the semiconductor laser device of this embodiment is similar to the manufacturing method of the semiconductor laser device of the first embodiment, the description of the same steps is omitted, and the different steps are described below.

  4A shows an n-type cladding layer 12, an MQW active layer 13, a low impurity concentration semiconductor layer 25, a p-type etching stop layer 15, a p-type second cladding layer 16 and a second layer on an n-type semiconductor substrate 11. FIG. It is a figure which shows the state in which the low impurity concentration semiconductor layer 27 was formed. In the step shown in FIG. 4A, an n-type semiconductor is formed in the same manner as the step shown in FIG. 2A, except that the second low impurity concentration semiconductor layer 27 is formed instead of the p-type cap layer 17. An n-type cladding layer 12, an MQW active layer 13, a low impurity concentration semiconductor layer 25, a p-type etching stop layer 15, a p-type second cladding layer 16 and a second low-impurity concentration semiconductor layer 27 are sequentially epitaxially grown on the substrate 11. Let The second low impurity concentration semiconductor layer 27 is a layer that becomes the p-type cap layer 170 shown in FIG. 3, and the concentration C6 of the p-type impurity contained is lower than the concentration C5 (C6 <C5). It is formed with or without p-type impurities.

  FIG. 4B is a diagram showing a state in which the end window portion 13 b is formed in the MQW active layer 13. Similar to the process shown in FIG. 2A (b), a stripe-shaped diffusion supply layer 26 pattern 26 a is formed on the surface of the second low impurity concentration semiconductor layer 27. Next, the p-type impurity supply layer 28 is formed on the opening 26 b of the pattern 26 a of the diffusion supply layer 26, that is, on the surface of the second low impurity concentration semiconductor layer 27 where the diffusion supply layer 26 is not formed. The p-type impurity supply layer 28 is formed of a dielectric material containing atoms that become p-type impurities, such as ZnO.

  Next, the n-type semiconductor substrate 11 on which the p-type impurity supply layer 28 is formed is annealed by an RTA method or the like. By this annealing, as in the first embodiment, the multiple quantum well structure of the MQW active layer 13 in the region where the diffusion supply layer 26 is projected can be disordered, and the end face window portion 13b can be formed. The p-type impurity can be supplemented from the second cladding layer 16 to the low impurity concentration semiconductor layer 25. In the present embodiment, since the p-type impurity supply layer 28 is formed on the surface of the second low impurity concentration semiconductor layer 27 where the diffusion supply layer 26 is not formed, in the process shown in FIG. The annealing promotes diffusion of p-type impurities from the p-type impurity supply layer 28 to the second low-impurity concentration semiconductor layer 27 adjacent to the p-type impurity supply layer 28, and the second low-impurity concentration semiconductor layer from the p-type impurity supply layer 28. The p-type impurity can be supplemented in a region excluding a region where a predetermined portion of the end face window portion 13b is projected as much as possible. As a result, the p-type cap layer 170 containing the p-type impurity at the concentration C5 is formed in a region excluding the region where the end face window portion 13b is projected.

  The semiconductor laser device 2 shown in FIG. 3 is obtained in the same manner as in the first embodiment except for the steps described above.

  As described above, in the method of manufacturing the semiconductor laser device of this embodiment, the second low impurity concentration semiconductor in which the concentration C6 of the p-type impurity is lower than the concentration C5 (C6 <C5) in the step shown in FIG. After forming the layer 27, annealing is performed in a state where the p-type impurity supply layer 28 is formed on the low impurity concentration semiconductor layer 27 in the step shown in FIG. (2) A p-type impurity can be filled in a region excluding a region where the end face window portion 13b of the low impurity concentration semiconductor layer 27 is projected. Therefore, the concentration of the p-type impurity in the second low impurity concentration semiconductor layer 27 excluding the region where a predetermined portion of the second low impurity concentration semiconductor layer 27 is projected as much as possible to the end face window portion 13b, that is, p shown in FIG. The concentration of the p-type impurity in the region 170a where the active region 13a of the type cap layer 170 is projected can be adjusted to be the design value C5.

  In the present embodiment, as described above, in the step of forming the end face window portion 13b shown in FIG. 4B, the p-type impurity is filled from the p-type impurity supply layer 28 into the second low impurity concentration semiconductor layer 27. It is not necessary to separately provide a step of filling the second low impurity concentration semiconductor layer 27 with p-type impurities and forming the p-type cap layer 170. Therefore, a manufacturing process can be simplified and productivity can be improved.

  In the step shown in FIG. 4B, the diffusion supply layer 26 is formed on the region where a predetermined portion to be the end face window portion 13b of the second low impurity concentration semiconductor layer 27 is projected, and p Since the p-type impurity supply layer 28 is not formed, the p-type impurity is not filled in a region where a predetermined portion of the second low impurity concentration semiconductor layer 27 is projected as much as possible. That is, the concentration C4 of the p-type impurity contained in the region 170b where the end face window portion 13b of the p-type cap layer 170 is projected is the concentration C6 of the p-type impurity contained in the second low impurity concentration semiconductor layer 27 at the time of formation. Is approximately equal to Therefore, the concentration C4 of the p-type impurity contained in the region 170b where the end face window portion 13b of the p-type cap layer 170 is projected is changed to p contained in the region 170a where the active region 13a of the p-type cap layer 170 is projected. The concentration can be lower than the concentration C5 of the type impurity (C4 <C5).

  As described above, the concentration C4 of the p-type impurity contained in the region 170b where the end face window portion 13b of the p-type cap layer 170 is projected is contained in the region 170a where the active region 13a of the p-type cap layer 170 is projected. By making the concentration of the p-type impurity lower than C5 (C4 <C5), the conductivity of the region where the end face window portion 13b of the p-type cap layer 170 is projected is projected by the active region 13a of the p-type cap layer 170. It can be made lower than the conductivity of the region 170a. Therefore, in the semiconductor laser device manufacturing method of the present embodiment, the p-type impurity supply layer 28 is formed on the entire region of the second low impurity concentration semiconductor layer 27 and the p region is formed on the entire region of the second low impurity concentration semiconductor layer 27. Compared to the case where the p-type cap layer 17 is formed in the region where the concentration of the p-type impurity contained in the region shown in FIG. Since the reactive current amount flowing into the end face window portion 13b of the MQW active layer 13 can be reduced and the threshold current can be reduced, the operating current can be reduced and the power consumption can be reduced.

  4B, in the diffusion supply layer 26, the concentration C6 of the p-type impurity contained is the concentration of the p-type impurity contained in the region where the active region 13a of the p-type cap layer 170 is projected. Since it is formed on the second low impurity concentration semiconductor layer 27 lower than the concentration C5 (C6 <C5), the diffusion supply layer 26 has the p-type impurity at the design value C5 as in the first embodiment. Compared with the case where it is formed on the p-type cap layer 17 contained in FIG. Therefore, in the manufacturing method of the semiconductor laser device of the present embodiment, the diffusion of holes into the MQW active layer 13 is further easier than in the manufacturing method of the semiconductor laser device of the first embodiment, and the end face window portion 13b. Can be formed efficiently and with high reproducibility, the COD in the vicinity of the end face 24a from which the laser light of the laser resonator is emitted is suppressed at a higher level, and the semiconductor laser element 2 having higher output and higher reliability. Can be obtained.

  In the manufacturing method of the semiconductor laser device of the first embodiment and the second embodiment described above, the n-type semiconductor substrate 11 is used as the first conductivity type semiconductor substrate. Although the two conductivity type is p-type, a p-type semiconductor substrate may be used as the first conductivity type semiconductor substrate, the first conductivity type may be p-type, and the second conductivity type may be n-type. In the second embodiment, when the second conductivity type is n-type, in the step shown in FIG. 4B, in place of the p-type impurity supply layer 28, a dielectric containing atoms that become n-type impurities is used. An n-type impurity supply layer made of a body material such as Si is formed.

  In the method for manufacturing the semiconductor laser device according to the first and second embodiments, the semiconductor laser device including the multiple quantum well active layer 13 having the multiple quantum well structure as the active layer is manufactured. The method for manufacturing a semiconductor laser device of the present invention can also be used when manufacturing a semiconductor laser device including an active layer having another quantum well structure such as one having a single quantum well structure.

  In the first embodiment or the second embodiment, the thickness of each layer provided on the n-type semiconductor substrate 11, the composition of the material constituting each layer, and the concentration of impurities contained are not particularly limited. It is arbitrarily selected so that the effect of the present invention is exhibited. For example, the thickness of the p-type etching stop layer 15 is larger than the thickness of the p-type second cladding layer 16 so that the diffusion of impurities from the p-type second cladding layer 16 to the low impurity concentration semiconductor layer 25 occurs sufficiently. For example, the thickness is selected to be 1/100 (1/100) or less of the thickness of the p-type second cladding layer 16 so as to be extremely small.

  The semiconductor laser device manufacturing method of the present invention can be used for manufacturing a semiconductor laser device having a ridge stripe structure as in the first embodiment or the second embodiment described above, but is limited to this. However, after the semiconductor layer is formed, it is manufactured through a process in which the formed semiconductor layer is exposed to a high temperature such that impurities flow from other layers. As long as it has other different structures. For example, when manufacturing semiconductor laser elements having various current confinement and optical confinement structures such as a SAS (Self Aligned Structure) structure or a BH (Buried Heterostructure) structure, the method for manufacturing a semiconductor laser element of the present invention is used. Can do.

(Example 1)
In this example, a GaAlAs semiconductor laser element was fabricated according to each step shown in FIG. Specifically, a semiconductor laser device was produced as follows. Note that Zn atoms are used as the p-type impurity, and the concentration of Zn atoms contained in the region excluding the region where the end face window portion 13b of the p-type first cladding layer 14 is projected (hereinafter also referred to as dopant concentration) is 1. × 10 ¹⁸ cm ^-3 .

First, on the wafer-like n-type GaAs substrate 11 (thickness: 300 μm), the following layers are formed by MOCVD:
n-type AlGaAs cladding layer 12 (thickness: 2 μm, dopant concentration: 5 × 10 ¹⁷ cm ⁻³ , dopant: Si),
Non-doped GaAlAs / GaAs multiple quantum well active layer 13 (thickness: 0.1 μm),
As the low impurity concentration semiconductor layer 25, a non-doped AlGaAs layer 25 (thickness: 0.2 μm),
p-type GaAs etching stop layer 15 (thickness: 3 nm, dopant concentration: 2 × 10 ¹⁸ cm ⁻³ , dopant: Zn),
p-type AlGaAs second cladding layer 16 (thickness 1.2 μm, dopant concentration: 2.5 × 10 ¹⁸ cm ⁻³ , dopant: Zn),
A p-type GaAs cap layer 17 (thickness 0.8 μm, dopant concentration: 3 × 10 ¹⁸ cm ⁻³ , dopant: Zn) was sequentially grown epitaxially.

Next, an SiO _x film 26 (x is a real number in the vicinity of 2 and thickness: 0.5 μm) is formed as a diffusion supply layer 26 on the surface of the p-type GaAs cap layer 17 by plasma CVD, and then by photolithography. A stripe-shaped SiO _x film pattern 26a (width d1: 40 μm, pitch S: 800 μm) extending in a direction parallel to a predetermined plane as much as possible as the laser resonator end faces 24a, 24b was formed. Next, annealing was performed by the RTA method, the MQW active layer 13 below the SiO _x film 26 was disordered, and the end face window portion 13b was formed. The annealing conditions at this time were a temperature of 950 ° C., a temperature increase rate of 100 ° C./sec, and a holding time of 60 sec.

Next, after the SiO _x film 26 formed on the surface of the p-type GaAs cap layer 17 is removed, the p-type GaAs cap layer 17, the p-type AlGaAs second cladding layer 16, and the like are used by using a photolithography technique and an etching technique. Was processed into a stripe-shaped ridge 18 having a width of 2.5 μm extending in the [011] direction.

Next, the second crystal growth is performed by MOCVD, and the side and top surfaces of the striped ridge 18 are formed on the n-type AlGaAs current blocking layer 19 (thickness t1: 1.0 μm, dopant concentration: 1 × 10 ¹⁸ cm ⁻³ , It was buried with a dopant: Si) and a p-type GaAs planarization layer 20 (thickness t2: 1.0 μm, dopant concentration: 1 × 10 ¹⁸ cm ⁻³ , dopant: Zn). During the second MOCVD, the substrate temperature was kept at 750 ° C. and the growth time was about 30 minutes.

Next, the n-type AlGaAs current blocking layer 19 and the p-type GaAs planarization layer 20 formed on a region excluding the region where the end face window portion 13b of the ridge 18 is projected are selectively removed by using a photolithography technique. did. Next, the third crystal growth was performed by the MOCVD method to form a p-type GaAs contact layer 21 (thickness t3: 3 μm, dopant concentration: 3 × 10 ¹⁹ cm ⁻³ , dopant Zn). This third MOCVD was performed while maintaining the substrate temperature at about 500 ° C. Next, an AuZn / MoAu film (thickness: 0.2 μm) is formed as the p-side electrode 22 on the surface of the p-type GaAs contact layer 21, and an AuGe / MoAu film (thickness) as the n-side electrode 23 on the surface of the n-type GaAs substrate 11. : 0.2 μm).

Finally, the wafer is divided into laser bars at a pitch of 800 μm so that the MQW active layer 13 of the chip end face, that is, the laser resonator end faces 24a and 24b to 20 μm becomes the end face window portion 13b, and the front surface made of Al ₂ O ₃ A reflective film (reflectance: 8%) and a rear reflective film (reflectance: 90%) made of Al ₂ O ₃ / Si were provided, and the surface parallel to the longitudinal direction of the ridge 18 was cut at a pitch of 200 μm. As described above, a semiconductor laser device in which the length of the laser resonator in the longitudinal direction was 800 μm was manufactured.

<Evaluation>
[PL measurement]
When the photoluminescence (abbreviation: PL) measurement of the MQW active layer 13 was performed before RTA of the wafer, the PL peak wavelength λi was 775 nm. In addition, when the PL measurement of the MQW active layer 13 was performed after RTA, the PL peak wavelength λw in the end face window portion 13b was 740 nm, and the portion excluding the end face window portion 13b, that is, the portion including the portion that becomes the active region 13a (hereinafter referred to as the internal active region). The PL peak wavelength λa of the end face window portion 13b is shifted to a shorter wavelength side by 30 nm than the PL peak wavelength λa of the internal active region. This indicates that the end face window portion 13b has a larger band gap than the internal active region. Therefore, in the semiconductor laser device obtained in Example 1, the MQW active layer 13 in the vicinity of the end face of the laser resonator has a larger band gap than the MQW active layer 13 in the laser resonator, and a window structure is formed on the exit end face. It was confirmed to have

[Dopant concentration]
Using a secondary ion mass spectrometer (abbreviated SIMS), the Zn concentration in the semiconductor crystal layer in the depth direction immediately after the first MOCVD growth, immediately after annealing by the RTA method, and immediately after the second MOCVD growth. The distribution of was measured. In the measurement immediately after annealing by the RTA method and immediately after the second MOCVD growth, the region where the internal active region of the MQW active layer 13 is projected (hereinafter referred to as region A) and the end face window portion 13b of the MQW active layer 13 are projected. Each region (hereinafter referred to as region B). FIG. 5 is a diagram showing the depth direction distribution of Zn concentration in Example 1. FIG. FIG. 5A shows the measurement result of region A, and FIG. 5B shows the measurement result of region B. In FIG. 5, the graph shown by the solid line shows the concentration distribution immediately after the first MOCVD growth, the graph shown by the broken line shows the concentration distribution immediately after RTA, and the graph shown by the dotted line shows the concentration immediately after the second MOCVD growth. Show the distribution. In FIG. 5, the vertical axis represents the Zn atom concentration (atoms / cm ³ ), and the lower horizontal axis represents the depth (μm) from the surface of the p-type GaAs cap layer 17. The numbers shown on the upper horizontal axis of FIG. 5 correspond to the numbers of the respective semiconductor layers formed on the n-type GaAs substrate 11, and by considering the upper horizontal axis and a graph indicated by a solid line, a broken line, or a dotted line. The Zn concentration in each semiconductor layer can be known.

From FIG. 5A, in the region A where the internal active region of the MQW active layer 13 is projected, Zn diffuses from the p-type AlGaAs second cladding layer 16 to the non-doped AlGaAs layer 25 that becomes the AlGaAs second cladding layer 14 by RTA. As a result, it can be seen that the Zn concentration in the non-doped AlGaAs layer 25 is compensated to 8 × 10 ¹⁷ cm ⁻³ . Further, the second MOCVD growth causes further diffusion of Zn from the p-type AlGaAs second clad layer 16 to the non-doped AlGaAs layer 25, and finally the Zn concentration in the non-doped AlGaAs layer 25 becomes the p-type first clad layer 14. It can be seen that the design value is compensated to 1 × 10 ¹⁸ cm ⁻³ and the designed dopant concentration can be realized. This is because the substrate temperature is maintained at a high temperature of 750 ° C. during the second MOCVD growth, and an effect equivalent to annealing is brought about, and further diffusion of Zn from the p-type AlGaAs second cladding layer 16 is promoted. It is considered a thing. Further, no unnecessary Zn pileup in the MQW active layer 13 was observed.

  In contrast, in the region B where the end face window portion 13b of the MQW active layer 13 shown in FIG. 5B is projected, almost no diffusion of Zn from the p-type AlGaAs second cladding layer 16 to the non-doped AlGaAs layer 25 is observed. Almost no increase in Zn concentration in the non-doped AlGaAs layer 25 is observed. This is presumably because Zn is trapped by the vacancies diffusing from above the non-doped AlGaAs layer 25.

(Element characteristics)
Was determined the threshold current value of the obtained semiconductor laser device, the threshold current value _{I Th25} at ambient temperature 25 ° C. is 30mA, and the threshold current value _{I Th70} at ambient temperature 70 ° C. became 44 mA. Moreover, when the index T ₀ represented by the following formula (1) was obtained, it was about 120.
T ₀ = (70−25) / (lnI _th70 −lnI _th25 ) (1)

Here, T ₀ is a parameter representing the temperature dependence of the threshold current. The larger the value, the smaller the temperature dependence of the semiconductor laser element. _{Incidentally, lnI th70} represents a natural logarithm of _{I th70, lnI th25} represents a natural logarithm of _{I th25.}

  As an evaluation of reliability, when a plurality of semiconductor laser elements manufactured under the same conditions were continuously operated at an optical output of 120 mW at an atmospheric temperature of 70 ° C., all the semiconductor laser elements operated stably for 5000 hours or more, No deterioration phenomenon was observed in which the operating current increased during operation.

(Comparative Example 1)
In the first MOCVD growth, in place of the non-doped AlGaAs layer 25, the p-type AlGaAs first cladding layer 104 (thickness: 0.2 μm) having a dopant (Zn) concentration of 1.0 × 10 ¹⁸ cm ⁻³ which is a set value. A semiconductor laser device was fabricated in the same manner as in Example 1 except that the above was formed. Hereinafter, the n-type GaAs substrate 11 is referred to as an n-type GaAs substrate 101, the n-type cladding layer 12 is referred to as an n-type cladding layer 102, the MQW active layer 13 is referred to as an MQW active layer 103, and a p-type. The etching stop layer 15 is described as a p-type etching stop layer 105, the p-type second cladding layer 16 is described as a p-type second cladding layer 106, and the p-type cap layer 17 is described as a p-type cap layer 107.

<Evaluation>
[PL measurement]
When the PL measurement of the MQW active layer 103 after the RTA of the wafer was performed, the PL peak wavelength λw of the end face window 103b was 755 nm, the PL peak wavelength λa of the internal active region was 775 nm, and the difference between the peak wavelengths (λa−λw) ) Was 20 nm. This value is 10 nm smaller than the peak wavelength difference (λa−λw) of 30 nm in Example 1. From this, it was found that in Comparative Example 1, a sufficient band gap energy difference was not obtained between the internal active region and the end face window 103b. This is presumably because the presence of Zn hindered the diffusion of vacancies, and the MQW active layer 103 was not sufficiently disordered.

[Dopant concentration]
Using SIMS, the distribution in the depth direction of the Zn concentration in the semiconductor crystal layer was measured in the same manner as in the evaluation in Example 1. FIG. 6 is a diagram showing a depth direction distribution of Zn concentration in Comparative Example 1. FIG. 6A shows the measurement result of the region A where the internal active region of the MQW active layer 103 is projected, and FIG. 6B shows the measurement result of the region B where the end face window 103b of the MQW active layer 103 is projected. In FIG. 6, the graph indicated by the solid line indicates the concentration distribution immediately after the first MOCVD growth, the graph indicated by the broken line indicates the concentration distribution immediately after RTA, and the graph indicated by the dotted line indicates the concentration immediately after the second MOCVD growth. Show the distribution. In FIG. 6, the vertical axis represents the Zn atom concentration (atoms / cm ³ ), and the lower horizontal axis represents the depth (μm) from the surface of the p-type GaAs cap layer 107. 6 corresponds to the numbers of the respective semiconductor layers formed on the n-type GaAs substrate 101, as in FIG.

  From FIG. 6A, in the region A where the internal active region of the MQW active layer 103 is projected, significant diffusion of Zn is observed after RTA, and the Zn concentration in the p-type AlGaAs first cladding layer 104 deviates greatly from the design value. I know that. Further, it can be seen that this diffusion causes a pile-up of Zn in the MQW active layer 103 and further that Zn diffuses to the n-type AlGaAs cladding layer 102.

(Element characteristics)
When obtained was determined threshold current value of semiconductor laser devices, resulting threshold current value _{I Th25} at ambient temperature 25 ° C. is 45mA, and the threshold current value _{I Th70} at ambient temperature 70 ° C. is 77mA, and the both in Example 1 The value was larger than that of the obtained semiconductor laser device. The index T ₀ described above was about 84, which was smaller than that of the semiconductor laser device obtained in Example 1.

  Further, when a plurality of semiconductor laser elements manufactured under the same conditions were continuously operated at an optical output of 120 mW at an ambient temperature of 70 ° C., all the semiconductor laser elements deteriorated within 50 hours from the start of the operation, leading to death.

  This is presumably because, in Comparative Example 1, a large amount of Zn diffused into the MQW active layer 103 as shown in FIG. 6A. That is, it is considered that the Zn concentration of the MQW active layer 103 becomes higher than the design value, leading to an increase in threshold current value and deterioration of thermal characteristics, and thus the reliability of the semiconductor laser element is deteriorated.

(Example 2)
In this example, a GaAlAs semiconductor laser element was fabricated according to the steps shown in FIG. That is, in Example 1, during the first MOCVD growth, a non-doped GaAs layer 27 (thickness: 0.8 μm) is formed as the second low impurity concentration semiconductor layer 27 in place of the p-type GaAs cap layer 17, and the RTA method is used. A semiconductor laser device is fabricated in the same manner as in Example 1 except that the ZnO film 28 (thickness: 0.5 μm) is formed as the p-type impurity supply layer 28 in the opening 26a of the SiO _x film 26 before the annealing by the above. did. However, the annealing conditions by the RTA method were a temperature of 900 ° C., a temperature rising rate of 100 ° C./sec, and a holding time of 60 sec.

<Evaluation>
[PL measurement]
When the PL measurement of the MQW active layer 13 after the RTA of the wafer was performed, the PL peak wavelength λw of the end face window portion 13b was 730 nm, which was obtained in Example 1 although the annealing temperature was lower than that in Example 1. The wavelength was shorter than that of the obtained semiconductor laser device by 10 nm. This is presumably because the GaAs layer 27 under the SiO _x film 26 was non-doped, and thus diffusion of holes was performed without being hindered. The PL peak wavelength λa of the internal active region was 770 nm as in Example 1.

[Dopant concentration]
Using SIMS, the distribution in the depth direction of the Zn concentration in the semiconductor crystal layer was measured in the same manner as in the evaluation in Example 1. FIG. 7 is a diagram showing the depth direction distribution of Zn concentration in Example 2. FIG. FIG. 7A shows the measurement result of the region A where the internal active region of the MQW active layer 13 is projected, and FIG. 7B shows the measurement result of the region B where the end face window portion 13b of the MQW active layer 13 is projected. In FIG. 7, the graph indicated by the solid line indicates the concentration distribution immediately after the first MOCVD growth, the graph indicated by the broken line indicates the concentration distribution immediately after RTA, and the graph indicated by the dotted line indicates the concentration immediately after the second MOCVD growth. Show the distribution. In FIG. 7, the vertical axis represents the Zn atom concentration (atoms / cm ³ ), and the lower horizontal axis represents the depth (μm) from the surface of the non-doped GaAs layer 27. 7 corresponds to the number of each semiconductor layer formed on the n-type GaAs substrate 11 as in FIG.

7A, in the region A where the internal active region of the MQW active layer 13 is projected, Zn is supplied to the non-doped GaAs layer 27 to be the p-type cap layer 170 due to the diffusion of Zn from the ZnO film 28 by RTA. Results It can be seen that the Zn concentration is compensated up to 3 × 10 ¹⁸ cm ^−3, which is the dopant concentration in the p-type cap layer 17 of Example 1. Similarly to Example 1, the second MOCVD growth compensates the Zn concentration in the non-doped AlGaAs layer 25 to 1 × 10 ¹⁸ cm ^−3, which is the design value of the p-type first cladding layer 14, and the dopant as designed. It can be seen that the concentration is realized.

  On the other hand, in the region B where the end face window portion 13b of the MQW active layer 13 shown in FIG. 7B is projected, there is no increase in the Zn concentration in the non-doped GaAs layer 27, and the p-type AlGaAs second cladding layer 16 is the same as in the first embodiment. Diffusion of Zn into the non-doped AlGaAs layer 25 is hardly observed.

(Element characteristics)
When the threshold current value of the obtained semiconductor laser element was determined, the threshold current value I _th25 at an ambient temperature of 25 ° C. was 27 mA, and the threshold current I _{th70 at} an ambient temperature of 70 ° C. was 38 mA, both of which were obtained in Example 1. The value was smaller than that of the semiconductor laser device. The aforementioned index T ₀ of about 130 mm was a value larger than the semiconductor laser device obtained in Example 1.

  In addition, when a plurality of semiconductor laser elements manufactured under the same conditions were continuously operated at an optical temperature of 120 mW at an atmospheric temperature of 70 ° C., all the semiconductor laser elements were stably operated for 5000 hours or more, and an operating current was generated during the operation. No increasing deterioration phenomenon was observed.

  As described above, after forming a semiconductor layer containing impurities at a concentration lower than the design value, the impurity concentration in the semiconductor layer is adjusted to adjust the concentration of the contained impurities to the design value. The deviation of the concentration of impurities contained from the design value could be avoided.

1 is a perspective view schematically showing a configuration of a semiconductor laser device 1 obtained by a method for manufacturing a semiconductor laser device according to an embodiment of the present invention. It is a perspective view which shows typically the state of each process in manufacture of the semiconductor laser element 1 by the manufacturing method of the semiconductor laser element which is one Embodiment of this invention. It is a perspective view which shows typically the state of each process in manufacture of the semiconductor laser element 1 by the manufacturing method of the semiconductor laser element which is one Embodiment of this invention. It is a perspective view which shows typically the state of each process in manufacture of the semiconductor laser element 1 by the manufacturing method of the semiconductor laser element which is one Embodiment of this invention. It is a perspective view which shows typically the structure of the semiconductor laser element 2 obtained by the manufacturing method of the semiconductor laser element which is the other form of implementation of this invention. It is a perspective view which shows typically the state of each process in manufacture of the semiconductor laser element 2 by the manufacturing method of the semiconductor laser element which is the other form of implementation of this invention. It is a figure which shows the depth direction distribution of Zn density | concentration in Example 1. FIG. It is a figure which shows the depth direction distribution of Zn density | concentration in Example 1. FIG. It is a figure which shows the depth direction distribution of Zn density | concentration in the comparative example 1. FIG. It is a figure which shows the depth direction distribution of Zn density | concentration in the comparative example 1. FIG. It is a figure which shows the depth direction distribution of Zn density | concentration in Example 2. FIG. It is a figure which shows the depth direction distribution of Zn density | concentration in Example 2. FIG. It is a perspective view which shows typically the state of each process in manufacture of the semiconductor laser element by the manufacturing method of the conventional semiconductor laser element.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 2 Semiconductor laser element 11 N-type semiconductor substrate 12 N-type clad layer 13 Multiple quantum well (MQW) active layer 14 P-type first clad layer 15 P-type etching stop layer 16 P-type second clad layer 17, 170 p-type Cap layer 18 Ridge 19 n-type current blocking layer 20 p-type planarization layer 21 p-type contact layer 22 p-side electrode 23 n-side electrode 24a, 24b laser resonator end face 25 low impurity concentration semiconductor layer 26 diffusion supply layer 27 second low Impurity concentration semiconductor layer 28 p-type impurity supply layer

Claims (12)

A first conductivity type semiconductor substrate; an active layer provided on the first conductivity type semiconductor substrate and having a smaller band gap than the first conductivity type semiconductor substrate; and a second conductivity type impurity provided on the active layer. And a second conductivity type semiconductor layer having a band gap larger than that of the active layer.
Forming an active layer on the first conductive type semiconductor substrate;
Forming a low impurity concentration semiconductor layer having a concentration C2 of the second conductivity type impurity contained on the active layer lower than the concentration C1 (C2 <C1);
Forming a second conductivity type semiconductor layer so that the concentration of the second conductivity type impurity contained in the low impurity concentration semiconductor layer is supplemented with the second conductivity type impurity to be the concentration C1. A method for manufacturing a semiconductor laser device, comprising: After the step of forming the low impurity concentration semiconductor layer,
The method further includes the step of forming an end face window portion having a larger band gap than the remaining portion of the active layer in the active layer in the vicinity of the predetermined face as much as possible as the end face from which the laser beam is emitted,
Filling the low impurity concentration semiconductor layer with a second conductivity type impurity to form a second conductivity type semiconductor layer;
2. The method of manufacturing a semiconductor laser device according to claim 1, wherein the method is performed after or in conjunction with the step of forming the end face window portion. In the step of filling the low impurity concentration semiconductor layer with the second conductivity type impurity and forming the second conductivity type semiconductor layer,
3. The method of manufacturing a semiconductor laser device according to claim 2, wherein the second conductivity type impurity is filled in a region excluding a region where the end face window portion of the low impurity concentration semiconductor layer is projected. After the step of forming the low impurity concentration semiconductor layer,
Forming a high impurity concentration semiconductor layer having a second conductivity type impurity concentration C3 higher than the concentration C2 (C3> C2) on the low impurity concentration semiconductor layer;
Forming a semiconductor layer by a vapor phase method or a liquid phase method on a first conductivity type semiconductor substrate including the high impurity concentration semiconductor layer and the low impurity concentration semiconductor layer;
The step of forming the semiconductor layer by the vapor phase method or the liquid phase method includes:
4. The method of manufacturing a semiconductor laser device according to claim 1, further comprising a step of supplementing a second impurity impurity from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer. 5. Method. In the step of forming the semiconductor layer by the vapor phase method or the liquid phase method,
5. The method of manufacturing a semiconductor laser device according to claim 4, wherein the temperature of the first conductive type semiconductor substrate is maintained at 550 ° C. or higher and 1000 ° C. or lower. After the step of forming the low impurity concentration semiconductor layer,
Forming a high impurity concentration semiconductor layer having a second conductivity type impurity concentration C3 higher than the concentration C2 (C3> C2) on the low impurity concentration semiconductor layer;
Annealing a first conductivity type semiconductor substrate comprising the high impurity concentration semiconductor layer and the low impurity concentration semiconductor layer,
The step of annealing the first conductive type semiconductor substrate includes:
2. The method of manufacturing a semiconductor laser device according to claim 1, further comprising a step of supplementing the second impurity impurity from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer. After the step of forming the low impurity concentration semiconductor layer and before the step of forming the end face window,
Forming a high impurity concentration semiconductor layer on the low impurity concentration semiconductor layer, wherein the concentration C3 of the second conductivity type impurity contained is higher than the concentration C2 (C3>C2);
The step of forming the end face window portion includes:
Forming a diffusion supply layer that diffuses and supplies vacancies or impurities to the active layer on an active layer in the vicinity of a predetermined surface as much as an end face from which the laser beam is emitted in the active layer;
Annealing a first conductivity type semiconductor substrate comprising the diffusion supply layer, the high impurity concentration semiconductor layer, and the low impurity concentration semiconductor layer,
The step of annealing the first conductive type semiconductor substrate includes:
4. The method of manufacturing a semiconductor laser device according to claim 2, further comprising a step of supplementing the second impurity impurity from the high impurity concentration semiconductor layer to the low impurity concentration semiconductor layer. In the step of annealing the first conductivity type semiconductor substrate,
8. The method of manufacturing a semiconductor laser device according to claim 6, wherein the first conductive type semiconductor substrate is annealed at a temperature of 550 ° C. or higher and 1000 ° C. or lower. The step of filling the low impurity concentration semiconductor layer with a second conductivity type impurity to form a second conductivity type semiconductor layer,
Forming a dielectric layer containing atoms that are diffused into the low impurity concentration semiconductor layer and become second conductivity type impurities on the low impurity concentration semiconductor layer;
2. The method of manufacturing a semiconductor laser device according to claim 1, further comprising a step of annealing a first conductivity type semiconductor substrate including the dielectric layer and the low impurity concentration semiconductor layer. After the step of forming the low impurity concentration semiconductor layer and before the step of forming the end face window,
Forming a dielectric layer including atoms that are diffused into the low impurity concentration semiconductor layer and become second conductivity type impurities on the low impurity concentration semiconductor layer;
The step of forming the end face window portion includes:
Forming a diffusion supply layer that diffuses and supplies vacancies or impurities to the active layer on an active layer in the vicinity of a predetermined surface as much as an end face from which the laser beam is emitted in the active layer;
Annealing a first conductivity type semiconductor substrate comprising the diffusion supply layer, the dielectric layer, and the low impurity concentration semiconductor layer,
The step of annealing the first conductive type semiconductor substrate includes:
4. The method of manufacturing a semiconductor laser device according to claim 2, further comprising a step of supplementing the low impurity concentration semiconductor layer with the second conductivity type impurity from the dielectric layer. In the step of forming the dielectric layer,
11. The semiconductor laser device according to claim 10, wherein the dielectric layer is formed on a region excluding a region where a predetermined portion of the low impurity concentration semiconductor layer is projected as much as possible as the end face window portion. Method. Before the step of annealing the first conductivity type semiconductor substrate,
A dielectric layer including atoms that are diffused into the low impurity concentration semiconductor layer and become first conductivity type impurities is formed on a region where a predetermined portion of the low impurity concentration semiconductor layer is projected as much as possible as the end face window portion. 12. The method of manufacturing a semiconductor laser device according to claim 10, further comprising a step of:

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