JP2005197651A - Method of forming polysilicon layer and method of manufacturing thin film transistor using same - Google Patents

Method of forming polysilicon layer and method of manufacturing thin film transistor using same Download PDF

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JP2005197651A
JP2005197651A JP2004226675A JP2004226675A JP2005197651A JP 2005197651 A JP2005197651 A JP 2005197651A JP 2004226675 A JP2004226675 A JP 2004226675A JP 2004226675 A JP2004226675 A JP 2004226675A JP 2005197651 A JP2005197651 A JP 2005197651A
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forming
method
layer
polysilicon layer
buffer layer
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JP4091025B2 (en
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Jun Uku Imu
Yong Hae Kim
Jin Ho Lee
Choong Yong Sohn
Son Jin Yun
イ、ジン、ホ
イム、ジョン、ウク
キム、ヨン、ヘ
ソン、チュン、ヨン
ユン、ソン、ジン
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Korea Electronics Telecommun
韓國電子通信研究院Electronics and Telecommunications Research Institute
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02669Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using crystallisation inhibiting elements
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1262Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1281Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor by using structural features to control crystal growth, e.g. placement of grain filters
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • H01L29/78672Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of forming a polysilicon layer using a buffer layer which has a characteristic of small heat conductivity although it has large heat capacity, and also to provide a method of manufacturing a thin film transistor using the same. <P>SOLUTION: The method of forming the polysilicon layer, specially, using the Wurtzite zinc oxide (ZnO) buffer layer, and the method of manufacturing the thin film transistor using the same, are disclosed. The method of forming the polysilicon layer includes steps of: forming the buffer layer which is a Wurtzite zinc oxide (ZnO) film on a substrate; forming a silicon layer on the buffer layer; and recrystallizing the silicon layer into a polysilicon layer. Preferably, the method of forming the polysilicon layer further includes a step of forming a barrier layer which is a nonconductor after the buffer layer is formed. Further, provided is the method of manufacturing the thin film transistor using the same. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for forming a polysilicon layer and a method for manufacturing a thin film transistor using the same. In particular, the present invention relates to a method for forming a polysilicon layer using a buffer layer and a method for manufacturing a thin film transistor using the same.

  Information displays vary in display size, resolution, structure, etc. depending on their purpose and application. The drive system can be broadly divided into the active-matrix (AM) system and the passive-matrix (PM) system. In general, the more active the display is, the lower the power consumption, the higher the resolution, and the higher the speed. Drive system will be adopted.

  In the case of the active driving method, an independent transistor must be manufactured for each pixel so that each pixel can be driven independently. At this time, the performance of the transistor must satisfy required values such as a mobility above a certain level, a ratio of currents in an on-off state, and a turn-on voltage. In order to satisfy the required characteristics of the semiconductor layer of such a transistor, a polysilicon (polycrystalline silicon) layer is often formed and used. However, the most typical method for forming a polysilicon layer is a non-crystalline method. In this method, an amorphous silicon layer is first formed at a low temperature, and then recrystallized by heat treatment using a laser or the like.

  On the other hand, the technical development of the information display has led to the use of glass, which is a transparent substrate, for light emission from the rear surface, and eventually the use of a lighter and more flexible plastic substrate. However, in the case of soda glass, which is inexpensive, it can be used up to about 450 ° C., and in particular, in the case of plastic, it is modified at a temperature much lower than 200 ° C. Therefore, the amorphous semiconductor layer is made into a polycrystalline semiconductor layer. The conditions for crystallizing at are very limited.

  Accordingly, a buffer layer is formed between the substrate and the amorphous film so that the substrate is not thermally denatured even if the recrystallization process proceeds at a higher temperature. As a condition to be provided for the buffer layer, the heat transfer must be more effectively cut off. On the other hand, the heat capacity must be large so that recrystallization can occur even at lower energy. However, in general, a denser film has a large heat capacity, but heat transfer is actively occurring, and a low-density film has a somewhat low heat transfer efficiency but is easily reduced by stress. The film tends to be destroyed. In some cases, porous silicon is used for the buffer layer with the intention of not increasing the efficiency of heat transfer, but in this case, the heat capacity is small, high power is required during laser heat treatment, and substrate damage is effective. Could not be prevented. Therefore, it is very important to use a material having a characteristic of low thermal conductivity while having a large heat capacity.

  III-V nitride semiconductor heterogeneous structure on a lattice-matched conducting platform composed of monocrystalline silicon carbide (SiC) and monocrystalline zinc oxide (ZnO) The technique to manufacture is known (patent document 1).

A method of growing a zinc oxide (ZnO) film on a silicon (Si) (001) substrate at room temperature by a high frequency magnetron sputtering (RF-magnetron sputtering) method is known (Non-patent Document 1).
US Patent No. 5,670,798 H. W. Kim, "Structural studies of room temperature radio frequency magnetron sputtered zinc oxide films under different radio frequency power conditions", Materials Science and Engineering, B103, pp. 297-302, 2003 (HW Kim, "Structural studies of room temperature RF magnetron sputtered ZnO films under different RF powered conditions ", Materials science and Engineering, B103, pp297-302, 2003)

  Accordingly, the present invention is for solving the above-described problems, and an object of the present invention is to provide a polysilicon layer forming method using a buffer layer having a characteristic of low thermal conductivity while having a large heat capacity, and An object of the present invention is to provide a method of manufacturing a thin film transistor using the same.

  As technical means for achieving the above object, according to a first aspect of the present invention, there is provided a step of forming a buffer layer which is a wurtzite zinc oxide (ZnO) film on a substrate, and silicon on the buffer layer. There is provided a method for forming a polysilicon layer, comprising: forming a layer; and recrystallizing the silicon layer into a polysilicon layer. Here, the silicon layer is a concept including an amorphous silicon layer and a polysilicon layer. Preferably, the method for forming a polysilicon layer further includes a step of forming a non-conductor barrier layer after forming the buffer layer.

  According to a second aspect of the present invention, there is provided a step of forming a buffer layer that is a wurtzite zinc oxide (ZnO) film on a substrate, a step of forming a silicon layer on the buffer layer, and converting the silicon layer into a polysilicon layer. A thin film transistor comprising: a step of recrystallizing; a step of patterning and doping the polysilicon layer to form a source, a channel and a drain; a step of forming a gate insulating film; and a step of forming a gate. A manufacturing method is provided. Preferably, the method of manufacturing a thin film transistor further includes a step of forming a non-conductor barrier layer after forming the buffer layer.

  A method for forming a polysilicon layer and a method for manufacturing a thin film transistor using the same according to the present invention include forming a buffer layer on a somewhat heat-sensitive substrate such as plastic, metal wheel, glass, etc., and then performing recrystallization that requires high temperature. There is an advantage that the process can be carried out successfully.

  In addition, the method for forming a polysilicon layer and the method for manufacturing a thin film transistor using the same according to the present invention can prevent diffusion of ions from the buffer layer to the polysilicon layer by forming a barrier layer on the buffer layer. When a buffer layer is formed using a powder, there is an advantage that an expected surface roughness can be reduced.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention can be modified into various forms, and the scope of the present invention should not be construed as being limited to the embodiments described in detail below. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art.

  1 to 4 are views showing a method for forming a polysilicon layer according to an embodiment of the present invention.

  Referring to FIG. 1, a buffer layer 2 is deposited on a substrate 1. The substrate 1 may be a plastic, a metal wheel, glass or the like. The buffer layer 2 must have a large heat capacity and a small thermal conductivity so that the applied heat can be absorbed as much as possible. In the present invention, a zinc oxide (Wurtzite) zinc oxide (ZnO) film having a wurtzite crystal structure having a very low thermal conductivity, a high melting point, and a large heat capacity, that is, a wurtzite zinc oxide (ZnO) film. Is used for the buffer layer 2.

  Zinc oxide (ZnO) can be grown in a zinc blende type structure or a wurtzite structure depending on the production method, but has a very low thermal conductivity as shown in Table 1. In order to do so, it should selectively grow in a wurtzite structure. The wurtzite structure (002) with good crystallinity shows only the peak in the diffraction characteristic analysis, and the peak in the case of the zinc blende structure (001). (HW Kim et al., “Structural study of room temperature high frequency magnetron sputtered zinc oxide films under different high frequency power conditions”, Materials Science and Engineering, B103, pp. 297-302, 2003 (HW Kim et al., “Structural studies of room temperature RF magnetron sputtered ZnO films under different RF powered conditions”, Materials science and Engineering, B103, pp297-302, 2003)).

  A method for selectively depositing only a wurtzite structure is a deposition method using plasma, but a sputtering deposition method using oxygen plasma, a plasma atomic layer deposition method, a plasma chemical vapor deposition method, or the like. It is advantageous to selectively obtain a wurtzite structure to induce complete oxidation of zinc (Zn) using an oxygen plasma. When a thick film of 2 μm or more is used for the buffer layer 2, the film can be formed by a screen printing method, a spray method, an ink jet printing method, or the like using nano powders having a size of several hundred nm or less. it can.

Referring to FIG. 2, a barrier layer 3 is deposited on the buffer layer 2. Using plasma atomic layer deposition, sputter deposition, plasma chemical vapor deposition, etc., about 30-300 nm aluminum oxide (Al 2 O 3 ), aluminum oxynitride (AlON), silicon nitride (Si 3 N 4 ), etc. A dense barrier layer is formed on the buffer layer 2. In particular, for the purpose of preventing ion diffusion, aluminum oxide (Al 2 O 3 ) thin films formed by atomic layer deposition are superior, but if plasma atomic layer deposition is used, which can be processed at much lower process temperatures, A denser film can be obtained at a lower temperature (SJ Yun et al., Electrochem. Solid-State Lett. 7, 2004). The barrier layer 3 is a layer formed to prevent intrusion of zinc (Zn) ions that can be partly diffused by the buffer layer 2 and exit. In the case of a plasma deposition method that uses oxygen plasma to completely oxidize zinc (Zn) or nanoparticles already manufactured with a perfect composition, the diffusion of zinc (Zn) is not serious, but the buffer layer The barrier layer 3 formed on the upper part of 2 is necessary in the case of a sensitive element in which zinc (Zn) ions or the like may be diffused into the silicon layer even in a very small amount during the recrystallization process. In addition, the barrier layer 3 may be deteriorated in surface roughness when a film is formed using wurtzite zinc oxide (ZnO) nanoparticles, but may also have a function of flattening the surface. . In addition, the barrier layer 3 can also have a function of improving the degree of crystallization of the silicon layer formed on the barrier layer 3, and if necessary, a seed layer having crystallinity can be used as a wurtzite zinc oxide ( ZnO) can be formed on the buffer layer 2 or the barrier layer 3 formed thereon. The step of depositing the barrier layer 3 can be omitted.

  Referring to FIG. 3, a silicon layer 4 is deposited on the barrier layer 3. The silicon to be deposited is typically amorphous silicon, but polysilicon can also be deposited.

  Referring to FIG. 4, the silicon layer is recrystallized into a polysilicon layer 5. As an example, a silicon layer is recrystallized using a laser to form a polysilicon layer. Further, the recrystallization step can be performed after an additional insulating film or the like that hardly absorbs laser light is formed on the silicon layer as necessary.

  FIG. 5 is a view for explaining a method of manufacturing a thin film transistor using a method for forming a polysilicon layer according to an embodiment of the present invention.

  In FIG. 5, the device includes thin film transistors 5, 6, 7 including a substrate 1, a buffer layer 2, a barrier layer 3 and a polysilicon layer 5. Since the substrate 1, the buffer layer 2, the barrier layer 3, and the polysilicon layer 5 are the same as described above, the description thereof is omitted for convenience. The thin film transistors 5 to 10 are composed of a source 8, a channel 9 and a drain 10 formed by the polysilicon layer 5, a gate insulating film 6 and a gate 7. As a matter for determining the mobility of the element in this element structure, when a crystal grain is formed larger by receiving higher energy as the film quality of the recrystallized polysilicon layer 5, the movement of electrons is easier (faster). ) Better characteristics can be obtained when patterned crystals are formed. Therefore, the step that has the most important effect on the characteristics of the thin film transistors 5 to 10 is the recrystallization step, and sufficient energy must be injected within the limit without substrate modification. Is the heat insulation between the substrate 1 and the polysilicon layer 5.

  After performing the above-described steps shown in FIGS. 1 to 4, the device is formed by patterning the polysilicon layer 5 and doping with portions to form the source 8, the channel 9 and the drain 10, and then forming the gate insulating film 6. It is formed by a method of forming and forming a gate 7 thereon.

  When the wurtzite zinc oxide (ZnO) buffer layer 2 is applied to a flexible substrate such as a plastic metal wheel, the thickness of the wurtzite zinc oxide (ZnO) buffer layer 2 may be insufficient due to the characteristics of the film, resulting in cracks. Such a tendency becomes more severe as the thickness increases. Accordingly, it may be necessary to etch and remove the remaining region while leaving the region including the active region where the source and drain are formed in an island shape.

  The device manufactured in this way uses a highly flexible substrate such as plastic to produce a transparent electronic device, light emitting device, etc., thereby reducing its weight and improving impact resistance. It can be used in a wide range of application fields that are made large and can be mounted. In this case, by introducing the buffer layer, the previous high temperature process can be completely replaced with the low temperature process. The present invention can be utilized up to such application fields.

  Although the technical idea of the present invention has been specifically described by the above-described preferred embodiments, it should be noted that the above-described embodiments are for explanation and not for limitation. There must be. In addition, it is understood that various modifications can be made within the scope of the technical idea of the present invention by a general expert in the technical field of the present invention.

1 is a drawing showing a method for forming a polysilicon layer according to an embodiment of the present invention. 1 is a drawing showing a method for forming a polysilicon layer according to an embodiment of the present invention. 1 is a drawing showing a method for forming a polysilicon layer according to an embodiment of the present invention. 1 is a drawing showing a method for forming a polysilicon layer according to an embodiment of the present invention. 1 is a diagram for explaining a method of manufacturing a thin film transistor using a method for forming a polysilicon layer according to an embodiment of the present invention.

Claims (9)

  1. Forming a buffer layer that is a Wurtzite zinc oxide (ZnO) film on a substrate;
    Forming a silicon layer on the buffer layer;
    Recrystallizing the silicon layer into a polysilicon layer;
    A method for forming a polysilicon layer, comprising:
  2. Forming the buffer layer comprises:
    Depositing the buffer layer;
    A patterning step of leaving only the buffer layer in a predetermined region including the position where the polysilicon is formed in the buffer layer, and removing the remaining buffer layer;
    The method for forming a polysilicon layer according to claim 1, comprising:
  3.   The method for forming a polysilicon layer according to claim 1, further comprising a step of forming a non-conductor barrier layer after forming the buffer layer.
  4. 4. The poly according to claim 3, wherein the barrier layer is one of aluminum oxide (Al 2 O 3 ), aluminum oxynitride (AlON), and silicon nitride (Si 3 N 4 ). Silicon layer forming method.
  5.   The method for forming a polysilicon layer according to claim 1, wherein the substrate is one of a plastic substrate, a metal wheel substrate, and a glass substrate.
  6.   The wurtzite zinc oxide (ZnO) film may be formed by any one of a plasma deposition method, a sputter deposition method, a plasma atomic layer deposition method, a plasma chemical vapor deposition method, and a method using a nanopowder. The method for forming a polysilicon layer according to claim 1, wherein the polysilicon layer is formed by using.
  7.   The method of forming a polysilicon layer according to claim 6, wherein the plasma deposition method uses plasma containing oxygen gas.
  8.   The method for forming a polysilicon layer according to claim 1, wherein the recrystallization is performed using a laser.
  9. Forming a polysilicon layer according to any one of claims 1 to 7;
    Patterning and doping the polysilicon layer to form a source, channel and drain;
    Forming a gate insulating film;
    Forming a gate;
    A method for producing a thin film transistor, comprising:
JP2004226675A 2003-12-26 2004-08-03 Polysilicon layer forming method and thin film transistor manufacturing method using the same Expired - Fee Related JP4091025B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010001783A1 (en) * 2008-07-03 2010-01-07 ソニー株式会社 Thin film transistor and display device
JP2012074675A (en) * 2010-08-31 2012-04-12 Hitachi Computer Peripherals Co Ltd Method of manufacturing semiconductor device and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010001783A1 (en) * 2008-07-03 2010-01-07 ソニー株式会社 Thin film transistor and display device
JP2010016163A (en) * 2008-07-03 2010-01-21 Sony Corp Thin-film transistor and display device
JP2012074675A (en) * 2010-08-31 2012-04-12 Hitachi Computer Peripherals Co Ltd Method of manufacturing semiconductor device and semiconductor device

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JP4091025B2 (en) 2008-05-28
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