JP2005114442A - Resolver/digital converter with failure detection function - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the function of detecting failures in a resolver and in a resolver digital converter, and informing a microcomputer thereof. <P>SOLUTION: A means is added for fetching signal from the resolver into the microcomputer, in synchronization with an excitation signal inputted into the resolver. Data, fetched into the microcomputer by the means, are processed to detect failures. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a resolver / digital converter, and more particularly to a resolver / digital converter having a failure detection function or a failure detection function of a resolver / digital converter.

  In the servo control system, a rotation angle sensor is necessary to detect the rotation angle and perform feedback control. Further, in brushless motor control, since it is necessary to energize the motor coil in accordance with the rotation angle of the motor, a rotation angle sensor is required in addition to the servo control system. Conventionally, resolvers have been widely used as rotation angle sensors because of their robustness and environmental resistance resulting from their simple structure.

  In addition, a servo control system applied to electric power steering, x-by-wire, particularly steer-by-wire, fly-by-wire, etc. requires safety and reliability, and therefore requires a failure detection function.

  Further, a resolver / digital converter has been developed for converting into a rotation angle based on a signal from a resolver and inputting it into a microcomputer or the like as digital data.

  According to Patent Document 1, a failure is detected by using the property of a trigonometric function which is an output of a resolver of sin (θ) ^ 2 + cos (θ) ^ 2 = 1.

JP-A-9-280890

According to the above prior art, if the signal from the resolver or to the resolver is disconnected, the signal from the resolver becomes abnormal and the relationship between sin (θ) and cos (θ) is not established.
Since the value of sin (θ) ^ 2 + cos (θ) ^ 2 deviates from 1, it can be detected as a failure and notified to the microcomputer. However, the failure that can be detected by this method is only a failure related to the abnormal signal waveform that the signal from the resolver to or to the resolver is disconnected. is there.

  The faults that can be notified to the microcomputer are as follows.

(1) Failure related to signal waveform abnormality that the signal from or to the resolver is disconnected (2) Failure of the function that detects the failure (1) and notifies it to the microcomputer (3) The signal from the resolver Failure of resolver digital conversion function itself, which is a process for obtaining θ based on
(4) The failure of the function for detecting the failure (3) and notifying the microcomputer is not detected, and further consideration is required.

  An object of the present invention is to provide a function of detecting failures (1) to (4) and notifying a microcomputer.

  In order to achieve the above object, in the present invention, means for adding a signal from the resolver to the microcomputer is added in synchronization with the excitation signal input to the resolver, and the data acquired by the microcomputer is processed by the means to cause a failure. Is detected.

According to the present invention, a simple circuit compared to a resolver digital converter (1) Fault related to abnormal signal waveform, such as signal disconnection from or to resolver (2) Fault (1) is detected and detected Failure of the function to notify the computer (3) In addition to the failure of the resolver digital conversion function itself, which is a process for obtaining θ based on the signal from the resolver, (4) Function of detecting the failure (3) and notifying the microcomputer A failure can be detected.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 shows a basic embodiment of the present invention.

The excitation signal f (t) generated by the excitation signal generator 3 is input to the resolver 5. In general, a trigonometric function such as A · sin (ωt) is often used for the excitation signal f (t). However, A is an amplitude, ω is an angular velocity, and when a frequency is f, it is expressed by ω = 2πf. Resolver signals Ysin and Ycos are output from the resolver 5. The resolver signals Ysin and Ycos are Ysin = k · sin (θ) · f (t), where θ is the rotation angle of the resolver.
Ycos = k · cos (θ) · f (t)
However, k is represented by gain. The resolver digital converter 2 outputs an estimated angle φ based on the resolver signals Ysin and Ycos. An error detection signal is also input from the resolver digital converter 2 to the microcomputer 1 together with the estimated angle φ. Various examples of the resolver digital conversion unit 2 are conceivable, but the method according to Document 1 is conceivable as a typical example. In the reference 1, the resolver digital converter 2 and the excitation signal generator 3 are built in the same chip.

  The above is the same as the conventional resolver digital conversion unit. However, in the embodiment according to the present invention, the conversion trigger generation unit further generates a conversion trigger based on the excitation signal f (t), and the conversion trigger generates an A / D signal. The resolver signals Ysin and Ycos are converted into digital signals by the converter 11, and an error due to a failure is detected by the error detection function 12.

Various embodiments of the conversion trigger generation unit 4 can be considered. For example, FIG. 2 shows an embodiment of the conversion trigger generator 4 that compares the excitation signal f (t) with the reference voltage (Vref) 42 by the voltage comparator 41. According to the present embodiment, the resolver signals Ysin and Ycos are A / D converted into the excitation signal f (t). Therefore, when f (t) = Vref, the resolver signals Ysin and Ycos at the time of conversion are respectively Ysin = k.・ Time when sin (θ) ・ VrefVref Ycos = k ・ cos (θ) ・ Vref
It becomes. Accordingly, sin (θ) and cos (θ) are obtained by the following equations.

sin (θ) = Ysin / [SQRT (Ysin ^ 2 + Ycos ^ 2) · Vref]
cos (θ) = Ycos / [SQRT (Ysin ^ 2 + Ycos ^ 2) · Vref]
Sin (φ) based on sin (θ), cos (θ) and estimated angle φ
If the difference from cos (φ) is within the allowable range, it is considered normal, and if it is out of the allowable range, it can be determined as a failure.

  Further, the following equation tan (θ) is obtained, and if the difference from tan (φ) based on the estimated angle φ is within the allowable range, it is regarded as normal, and if it is out of the allowable range, it can be determined as a failure.

tan (θ) = sin (θ) / cos (θ)
FIG. 3 shows an embodiment in which the voltage comparator 41 compares the excitation signal f (t) with 0 V, detects the zero cross point, and delays it by the delay circuit 43 that delays tdelay. When the excitation signal is f (t) = A · sin (ωtdelay), the resolver signals Ysin and Ycos at the time of conversion are Ysin = k · sin (θ) · A · sin (ωtdelay), respectively.
Ycos = k ・ cos (θ) ・ A ・ sin （ωtdelay）
As in the embodiment of FIG. 2, sin (θ), cos (θ), tan (θ) are obtained, and sin (φ), cos (φ), tan (φ) based on the estimated angle φ If the difference is within the allowable range, it is regarded as normal, and if it is outside the allowable range, it can be determined as a failure. Note that it is preferable to set ωtdelay = π / 2, that is, tdelay = π / 2ω from the viewpoint of increasing the resolver signals Ysin and Ycos to maximize the S / N ratio. In this embodiment, the delay circuit 43 for delaying tdelay can be realized by a timer in the microprocessor, and the number of external components can be greatly reduced.

  FIG. 4 shows an embodiment in which the conversion trigger generation unit 4 is a peak detection circuit 44. As means for realizing the peak detection circuit 44, the excitation signal f (t) is differentiated to obtain the time when it becomes zero, the time when the current value becomes less than or equal to the peak hold value is held while sequentially updating the peak. Can be used to set the peak time.

According to this embodiment, the resolver signals Ysin and Ycos at the time of conversion are respectively Ysin = k · sin (θ) · A
Ycos = k ・ cos (θ) ・ A
2, sin (θ), cos (θ), tan (θ) are obtained in the same manner as in the embodiments of FIGS. 2 and 3, and sin (φ), cos (φ), tan ( If the difference from φ) is within the allowable range, it is considered normal, and if it is outside the allowable range, it can be determined as a failure.

FIG. 5 is a diagram showing the conversion timing of the resolver signals Ysin and Ycos according to the respective embodiments of FIGS. The horizontal axis represents time, and the vertical axis represents the resolver signals Ysin and Ycos and the amplitude of the excitation signal f (t). According to the embodiment of FIG. 2, the resolver signals Ysin and Ycos are converted at the time when the excitation signal f (t) becomes Vref, that is, at the point A. In the embodiment of FIG. 3, from the zero cross point of the excitation signal f (t).
Conversion is performed at the time tdelay, that is, at point B. When tdelay = π / (4ω), the signal is converted at the peak of the signal, which is optimal from the viewpoint of improving the S / N ratio. According to the embodiment of FIG. 4, Ysin and Ycos are converted at the time when the excitation signal f (t) reaches its peak.

According to the embodiment described above, as shown in FIG.
(1) A fault related to a signal waveform abnormality that a signal from or to the resolver is disconnected is detected by an error detection function 12 provided by the present invention in addition to the fault detection function provided in the resolver digital converter 2. It can be detected. In addition, since the function of detecting the failure (1) and notifying the microcomputer is redundantly provided in the resolver digital conversion unit 2 and the detection function 12,
(2) The failure of the function for detecting the failure (1) and notifying the microcomputer can be detected by the other function even if one fails.

(3) A failure in the resolver digital conversion function itself, which is a process for obtaining θ based on a signal from the resolver, can be detected by the error detection function 12 provided by the present invention in addition to the failure detection function provided in the resolver digital conversion unit 2. . In addition, since the function of detecting the failure (3) and notifying the microcomputer is redundantly provided in the resolver digital conversion unit 2 and the detection function 12,
(4) The failure of the function for detecting the failure (3) and notifying the microcomputer can be detected by the other function even if one of them fails.

  According to the above embodiments, the failure of the resolver and the resolver digital converter can be detected, and for applications such as electric power steering, when the failure is detected, the operation is stopped by stopping the electric assist. Can be secured. Also, x-by-wire, especially steer-by-wire and fly-by-wire, does not allow the system to stop operating, so fault tolerance is required to continue operation even if a failure occurs. Therefore, as shown in FIG. 7, the resolvers 5-1 and 5-2 and the resolver digital conversion units 2-1 and 2-2 are duplicated and combined with the error detection function 12, so that a substantially triple system is obtained and fault tolerance is reduced. realizable. If one of the duplicated resolvers 5-1 and 5-2 and the resolver digital converters 2-1 and 2-2 fails, the resolver digital converters 2-1 and 2-2 are provided. In addition to the fault detection function, the error detection function 12 can detect the fault and identify the faulty part. Subsequently, it is possible to continue the operation using the side of the duplex resolvers 5-1 and 5-2 and the resolver digital conversion units 2-1 and 2-2 where no failure has occurred. It is further desirable that the microcomputer 1 is also multiplexed.

  FIG. 8 shows an embodiment of a motor control system provided by the present invention. The microcomputer 1 outputs a drive command to the motor to a timer 6 that generates a PWM signal based on the estimated angle φ of the angle from the resolver digital converter 2. The timer 6 generates a PWM signal having a predetermined duty cycle based on a command from the microcomputer 1 and drives the motor 8 by the motor driver 7 according to the waveform. The output shaft of the motor 8 is connected to the control object 9 to move the control object 9 and is connected to the resolver 5 to measure the rotation angle and input to the microcomputer 1.

  In the electric power steering control device, the control target 9 is the entire steering system. In the steer-by-wire control device, the control target 9 is a steering column and a steering mechanism (steering mechanism).

Basic example. An embodiment in which the conversion trigger generator is a voltage comparator. An embodiment in which the conversion trigger generator is a zero-cross detector and a delay circuit. An embodiment in which the conversion trigger generation unit is a peak detection circuit. An example of operation of a conversion trigger generation part. Faults detectable by the present invention. An embodiment of a fault-tolerant solver and resolver digital converter in which a resolver and a resolver digital converter are duplicated. 1 shows an embodiment of a motor control system using the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Microcomputer, 2 ... Resolver digital conversion part, 3 ... Excitation signal production | generation part, 4 ... Conversion trigger production | generation part, 5 ... Resolver, 11 ... A / D converter, 12 ... Error detection function

Claims (9)

A resolver, a resolver digital converter, and an excitation signal generator;
The excitation signal generated by the excitation signal generator is input to the resolver,
A resolver digital converter for inputting a resolver signal output from the resolver to the resolver digital conversion unit, comprising a conversion trigger generation unit, an A / D converter, and an arithmetic means.
The conversion trigger generation unit generates a conversion trigger from the excitation signal, and the A / D converter converts the resolver signal into a digital value by the conversion trigger, and a failure is detected by the A / D conversion value in the arithmetic means. Resolver digital converter characterized by The resolver digital converter according to claim 1,
The conversion trigger generator generates a conversion trigger by comparing an input resolver signal with a reference voltage. The resolver digital converter according to claim 1,
The resolver digital converter, wherein the conversion trigger generation unit detects a zero cross of an input resolver signal and uses a conversion delay after a predetermined delay time from the zero cross. The resolver digital converter according to claim 1,
The resolver digital converter characterized in that the conversion trigger generation unit detects a peak of an input resolver signal and uses it as a conversion trigger. The resolver digital converter according to claim 1,
The calculation means calculates sine and cosine or tangent values based on the A / D conversion values, and the difference between the estimated sine and cosine or tangent values obtained by the resolver digital converter is a predetermined value. A resolver digital converter characterized by determining a failure when exceeding a value. The resolver digital converter according to claim 1,
A resolver digital converter comprising the resolver and a bona fide resolver digital conversion unit in a duplex manner.   The calculation means calculates a current value that flows through the motor based on the estimated angle value obtained by the resolver digital converter according to claim 1, and supplies a current to the motor based on the current value. A motor control device connected to the resolver.   8. The motor control apparatus according to claim 7, wherein the controlled object is a system. The motor control device according to claim 7, wherein the control target is a steering column and a steering mechanism (steering mechanism).

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