JP2005109200A - Magnetroresistive effect element, magnetic memory cell and magnetic random access memory device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To eliminate the problem of the increase in a switching magnetic field, involved in miniaturization of an element regarding a magnetroresistance effect element, and to provide a magnetic memory cell and a magnetic random access memory device. <P>SOLUTION: The element has a structure of a magnetic substance/a nonmagnetic substance/a magnetic substance/a nonmagnetic substance and a magnetic substance, where a first magnetic substance 1, a first nonmagnetic substance 2, a second magnetic substance 3, a second nonmagnetic substance 4 and a third magnetic substance 5 are successively laminated. Pieces of wiring 6 to 8 are connected to the first magnetic substance 1, the second magnetic substance 3 and the third magnetic substance 5, respectively. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a magnetoresistive effect element, a magnetic memory cell, and a magnetic random access memory (MRAM), and more particularly, a magnetic characteristic of a configuration for writing magnetic information in the magnetoresistive effect element. The present invention relates to a resistance effect element, a magnetic memory cell, and a magnetic random access memory device.

  An MRAM is a memory device that utilizes the fact that a resistance value changes depending on the direction of spin of electrons in a magnetic material by passing an electric current through a multilayer magnetic structure. It has the same degree of integration and high speed as a DRAM, and is non-volatile and unlimited. It is a rewritable memory.

  In this case, a GMR (Giant Magneto Resistive) element or an MTJ (Magnetic Tunnel Junction) element has been studied as a multilayer magnetic structure constituting the memory cell (see, for example, Patent Document 1 or Patent Document 2). Since a large resistance change is required, the MTJ element structure is mainly used for research and development. Here, an example of a conventional MRAM will be described with reference to FIGS.

See FIG.
FIG. 12 is a schematic cross-sectional view of a memory cell constituting a conventional MRAM. First, a p-type well region 12 is formed in a predetermined region of an n-type silicon substrate 11 and the n-type silicon substrate 11 is selectively oxidized. After the element isolation oxide film 13 is formed by the above, a gate electrode 15 made of WSi as a read word line is formed in the element formation region via the gate insulating film 14, and ions such as As are implanted using the gate electrode 15 as a mask. As a result, an n ⁻ -type LDD (Lightly Doped Drain) region 16 is formed.

Next, a SiO ₂ film or the like is deposited on the entire surface, and anisotropic etching is performed to form the sidewalls 17. Then, As and the like are ion-implanted again to form the n ⁺ -type drain region 18 and the n ⁺ -type source region. 19 is formed, and then a first interlayer insulating film 20 made of a thick SiO ₂ film such as a TEOS (Tetra-Ethyl-Ortho-Silicate) -NSG film is formed, and then the n ⁺ -type drain region 18 and the n ⁺ -type drain region 18 are formed. A contact hole reaching the source region 19 is formed, and this contact hole is filled with W to form W plugs 21 and 22.

Next, Ti / TiN / Al / Ti / TiN is deposited on the entire surface and then patterned to form the connection conductor 23 and the source wiring layer 24, and then again from a thick SiO ₂ film such as a TEOS-NSG film. A second interlayer insulating film 25 is formed, a contact hole reaching the connection conductor 23 is formed, and the contact hole is filled with W to form a W plug 26.

Next, Ti / TiN / Al / Ti / TiN is again deposited on the entire surface and then patterned to form the connection conductor 51 and the write word line 52, and then again a thin SiO ₂ film such as a TEOS-NSG film. A third interlayer insulating film 53 made of a film or the like is formed, then a contact hole reaching the connection conductor 51 is formed, and this contact hole is filled with W through Ti / TiN to form a W plug 54.

Next, Al is deposited again on the entire surface and then patterned to form the lower electrode 55, and then a fourth interlayer insulating film 56 made of a thin SiO ₂ film such as a TEOS-NSG film is deposited again, Next, planarization is performed by CMP (chemical mechanical polishing) until the lower electrode 55 is exposed.

Next, a Ta underlayer 57, a NiFe free layer 58, a tunnel insulating layer 59 made of Al ₂ O ₃ , a CoFe pinned layer 60, an IrMn pinned layer 61, and a Ta cap layer 62 are sequentially deposited on the entire surface, and then ion milling is performed. Thus, for example, the MTJ element 63 having a size of 0.15 μm × 0.1 μm is formed.
In this case, since the MTJ element 63 has a rectangular shape that is long in the bit line direction, the spin direction of the NiFe free layer 58 is easily directed to the extending direction of the bit line.

Next, a fifth interlayer insulating film 64 made of a thin SiO ₂ film such as a TEOS-NSG film is deposited again, and then planarized by CMP until the Ta cap layer 62 is exposed.

  Next, a multilayer conductive layer having a Ti / TiN / Al / Ti / TiN structure is deposited on the entire surface, and then patterned to extend in a direction orthogonal to the write word line 52 to form the bit line 65. Thus, the basic structure of the MRAM is completed.

See FIG.
FIG. 13 is an equivalent circuit diagram of a memory cell constituting such an MRAM. An MTJ element 63 is disposed at the intersection of the write word line 52 and the bit line 65, and the source wiring layer 24 is grounded to the plate line 66. Connected to.

See FIG.
FIG. 14 is an explanatory diagram of the writing principle of the MRAM. In writing to the MTJ element 63, a current is passed through the bit line 65 and the writing word line 52, and the generated magnetic field changes the spin direction of the NiFe free layer 58. The determination is made, and data “1” or “0” is written in the same direction as the CoFe pinned layer 60 or in the opposite direction.

That is, a current is simultaneously supplied to the bit line 65 and the write word line 52, and selection and writing are performed by the generated combined magnetic field.
In this case, since the NiFe free layer 58 has a rectangular shape so that magnetic anisotropy (anisotropic magnetic field: Hk) occurs, the magnetization direction of the NiFe free layer 58 has a rectangular shape due to anisotropy. The direction is a stable direction (easy direction).

  For this reason, the magnetization directed in the easy direction is stable as long as a magnetic field (switching magnetic field) necessary for reversing the magnetization direction is not applied, and even if a current is passed through only one of the bit line 65 or the write word line 51. Writing to the MTJ element 63 is not performed.

As a method of selecting and reversing the magnetization direction of such a memory element, there is a method of applying a recording magnetic field in the easy direction while applying a magnetic field in the Hard direction (short direction).
By applying a magnetic field H _y in Hard direction by the write current I _y to be supplied to the write word line 51, the energy barrier is lowered necessary rotation of the magnetization direction.
The application of a magnetic field by the write current I _x in easy direction H _x flowing in the bit line 65 at the same time when the write is performed magnetization direction of only the selected element is oriented in the easy direction (H _x).

See FIG.
FIG. 15 shows an asteroid curve indicating a writing threshold, which is represented by the following formula (1).
Hx ^2/3 + Hy ^2/3 = Hk ^2/3 (1)
The program is performed with a combination exceeding the threshold value, and the program is not performed with the combination of magnetic fields inside the threshold value, and the program is performed with the combination of the outer magnetizations.

  On the other hand, in reading from the MTJ element 63, a voltage is applied between the NiFe free layer 58 and the CoFe pinned layer 60 of the selected MTJ element 63, and a voltage is applied to the gate electrode 15 serving as a read word line, thereby causing the access transistor to operate. This is done by turning on and reading the flowing current.

In this case, it is known that the tunnel probability (tunnel resistance) in the MTJ depends on the magnetization states of the magnetic layers on both sides, and the tunnel resistance can be controlled by a magnetic field.
That is, when the relative angle of magnetization of the NiFe free layer 58 and the CoFe pinned layer 60 is θ, the tunnel resistance R is
R = R _s + 0.5ΔR (1−cos θ) (2)
It is represented by

Therefore, when the magnetization angles of both magnetic layers are aligned (θ = 0 °), the tunnel resistance is small (R = R _s ), and when the magnetizations of both magnetic layers are in opposite directions (θ = 180 °). The tunnel resistance increases (R = R _s + ΔR).

This is because the electrons inside the ferromagnetic material are polarized.
That is, there are usually electrons in the upward spin state (up electrons) and those in the downward spin state (down electrons), but there are the same number of both electrons inside a normal nonmagnetic metal. It has no magnetism as a whole.

On the other hand, the electrons inside the ferromagnet have up or down magnetism as a whole because the number of up electrons (N _up ) and the number of down electrons (N _down ) are different.
When electrons tunnel, these electrons are known to tunnel while maintaining their respective spin states. If there is a vacancy in the electron state of the tunnel destination, tunneling is possible. If there is no space in the state, electrons cannot tunnel.

Therefore, the change rate of the tunnel resistance is represented by the product of the polarization rate of the electron source and the polarization rate of the tunnel destination, and the change rate ΔR / R _s of the tunnel resistance is
ΔR / R _s = 2 × P ₁ × P ₂ / (1−P ₁ × P ₂ ) (3)
It is represented by
P ₁ and P ₂ are polarizabilities of both magnetic layers,
P = 2 (N _up −N _down ) / (N _up + N _down ) (4)
It is represented by

The polarizability P depends on the type of the ferromagnetic metal. For example, the NiFe, Co, and CoFe polarizabilities are 0.3, 0.34, and 0.46, respectively. 20%, 26%. A magnetoresistance change rate (MR ratio) of 54% can be expected.
The value of MR ratio in this MTJ is larger than the anisotropic magnetoresistance effect (AMR) and the giant magnetoresistance effect (GMR) as described above.

Further, the tunnel resistance R depends on the insulation barrier height φ and thickness of the insulating layer, that is, the barrier width W from the following equation:
R∝exp (W × φ ^1/2 ) (5)
It is represented by
Therefore, the tunnel resistance R becomes small when the insulating barrier height φ is low and when the barrier width W is narrow.

FIG. 16 is a magnetoresistive effect curve (MR curve) of a ferromagnetic tunnel junction having this spin valve structure, and the tunnel resistance changes depending on the magnetic field as shown in the above equation (2). To do. That is, when the spin direction of the NiFe free layer 58 is the same as the spin direction of the CoFe pinned layer 60, the resistance is low, and when the spin direction is the reverse direction, the resistance is high, for example, 30-50 at low resistance. Therefore, it is possible to read a 1-bit record by determining the magnitude of the current.
JP 2003-031776 A JP 2002-299484 A

  However, with the miniaturization of the MRAM, when the MTJ element is reduced, the coercive force of the magnetic material constituting the MTJ element increases due to the shape effect, thereby increasing the switching magnetic field and increasing the current required for writing and consumption. There is a problem that electric power increases.

  In addition, in the MRAM, the write word line and the bit line are arranged apart from the MTJ element, so that interference between adjacent MTJ elements may occur if the distance between the elements becomes narrow due to miniaturization.

  Accordingly, an object of the present invention is to eliminate the problem of an increase in switching magnetic field associated with the miniaturization of elements and to reduce power consumption.

FIG. 1 is a diagram illustrating the basic configuration of the present invention. Means for solving the problems in the present invention will be described with reference to FIG.
In order to solve the above-described problem, the present invention provides a magnetoresistive element in which a first magnetic body 1, a first non-magnetic body 2, a second magnetic body 3, and a second non-magnetic body 4 are provided. And a magnetic body / non-magnetic body / magnetic body / non-magnetic body / magnetic body structure in which the third magnetic bodies 5 are sequentially stacked, and the first magnetic body 1, the second magnetic body 3, and The wirings 6 to 8 are connected to the third magnetic body 5, respectively.

Thus, the structure of magnetic body / non-magnetic body / magnetic body / non-magnetic body / magnetic body is used, one magnetic body / non-magnetic body / magnetic body structure is used for writing, and the other magnetic body / non-magnetic body / By using the magnetic material for reading, information can be written electrically, so that the problem of increase in switching magnetic field and the problem of interference associated with writing by a magnetic field can be solved.
For example, the magnetization direction of the second magnetic body 3 can be controlled by passing a current between the first magnetic body 1 and the second magnetic body 3.

  In this case, it is desirable that at least one of the first non-magnetic body 2 or the second non-magnetic body 4 is an insulator, so that a magnetic layer through a non-magnetic layer made of an insulator forms a tunnel junction. A large resistance change can be obtained.

  In addition, at least one of the first non-magnetic body 2 and the second non-magnetic body 4, particularly the non-magnetic body on the writing side, is preferably either Cu or Au for which excellent characteristics have been confirmed.

Further, it is desirable that at least one of the first magnetic body 1 and the third magnetic body 5 has a laminated structure of a ferromagnetic body and an antiferromagnetic body that fixes the magnetization direction of the ferromagnetic body. Stable operation is possible.
If no antiferromagnetic material is used, the difference in coercive force of the ferromagnetic materials constituting the pinned layer is used.

In addition, a magnetic memory cell can be configured by using the magnetoresistive effect element described above and retaining information according to the magnetization direction of the second magnetic body 3.
The magnetization direction of the second magnetic body 3 can be detected by measuring the resistance value between the second magnetic body 3 and the third magnetic body 5.

Further, a magnetic random access memory device can be configured by arranging a plurality of the magnetic memory cells described above.
In this case, a write circuit for selectively passing a current between the first magnetic body 1 and the second magnetic body 3, and a resistance value between the second magnetic body 3 and the third magnetic body 5 It is sufficient to provide a reading circuit that selectively takes out.

  According to the present invention, since the magnetoresistive effect element has a laminated structure composed of a magnetic body / non-magnetic body / magnetic body / non-magnetic body / magnetic body, information is electrically written. However, there is no problem of an increase in switching magnetic field or power consumption even if it is made finer, which greatly contributes to miniaturization and higher performance of MRAM.

  In the present invention, a ferromagnetic / nonmagnetic / ferromagnetic laminated structure is adjacent to the magnetic tunnel element portion, and a current is passed through the laminated structure to control the magnetization state of the information holding portion. Thus, a novel magnetic memory cell structure can be provided, and power consumption when miniaturized can be suppressed, and influence on adjacent elements can be reduced.

Here, with reference to FIG. 2 thru | or FIG. 9, the manufacturing process of Example 1 of this invention is demonstrated.
See Figure 2
First, a p-type well region 12 is formed in a predetermined region of the n-type silicon substrate 11, and an element isolation oxide film 13 is formed by selectively oxidizing the n-type silicon substrate 11. Then, a gate insulating film 14 is formed in the element formation region. Then, a gate electrode 15 made of WSi serving as a read word line is formed, and As ions are implanted using the gate electrode 15 as a mask, thereby forming an n ⁻ type LDD region 16.

Next, a SiO ₂ film is deposited on the entire surface, and anisotropic etching is performed to form the sidewalls 17. Then, As ions are implanted again to form the n ⁺ -type drain region 18 and the n ⁺ -type source region 19. Then, after forming a thick first interlayer insulating film 20 made of an O ₃ -TEOS-SiO ₂ film, contact holes reaching the n ⁺ type drain region 18 and the n ⁺ type source region 19 are formed. Are plugged with W to form W plugs 21 and 22.
The O ₃ -TEOS-SiO ₂ film is deposited at 400 ° C. by the CVD method using TEOS + O ₃ as a source gas, and the same applies to the following steps.

See Figure 3
Next, after depositing TiN / Al / TiN on the entire surface using a sputtering method and patterning, the connection conductor 23 and the source wiring layer 24 are formed, and then the O ₃ -TEOS-SiO ₂ film is formed again. A two-layer insulating film 25 is formed, then a contact hole reaching the connection conductor 23 is formed, and this contact hole is filled with W to form a W plug 26.
The source wiring layer 24 is finally connected to a grounded plate line.

See Figure 4
Next, TiN / Al / TiN is again deposited on the entire surface by sputtering, followed by patterning to form the lower electrode 27, and then again, a thin third interlayer made of an O ₃ -TEOS-SiO ₂ film. An insulating film 28 is deposited, and then planarized by CMP until the lower electrode 27 is exposed.

See Figure 5
Next, by using a sputtering method, the entire surface has a thickness of, for example, a 2 nm NiFe underlayer 29, a 15 nm PtMn pinned layer 30, a 3 nm CoFe pinned layer 31, a tunnel insulating layer 32 made of 1.5 nm Al—O, 2 nm CoFe free layer 33, 2 nm NiFe free layer 34, 3 nm Cu intermediate layer 35, 3 nm CoFe pinned layer 36, 10 nm IrMn pinned layer 37, and upper electrode having a thickness of, for example, 20 nm Au Cap layer 38 is sequentially deposited in a vacuum.

See FIG.
Next, by performing ion milling using the resist pattern 39 as a mask, for example, the MTJ element 40 having a size of 0.2 μm × 0.13 μm is formed.
In this case, since the MTJ element 40 has a long rectangle in the bit line direction, which will be described later, the easy direction of the CoFe free layer 33 and the NiFe free layer 34 is the extending direction of the bit line.

See FIG.
Next, with the resist pattern 39 provided, a fourth interlayer insulating film 41 made of an O ₃ —TEOS—SiO ₂ film is again deposited on the entire surface up to the height of the tunnel insulating film 32, and then the thickness is, for example, 3 nm. The Al layer 42 is deposited.

See FIG.
Next, after removing the resist pattern 39 together with the deposits thereon, the Al layer 42 is patterned in the direction of the gate electrode 15 to be a read word line, thereby forming a write word line 43.

See FIG.
Next, a fifth interlayer insulating film 44 made of an O ₃ -TEOS-SiO ₂ film is again deposited on the entire surface, and then polished by CMP until the surface of the Au cap layer 38 is exposed. To flatten.

  Next, after depositing a p-SiN film 45 having a thickness of, for example, 100 nm using a plasma CVD method, a contact hole for the MTJ element 40 is provided, and then the entire surface is formed using a sputtering method. For example, after depositing a TiN layer having a TiN / Al / TiN structure by sequentially depositing a TiN layer having a thickness of 100 nm, an Al layer having a thickness of, for example, 800 nm, and a TiN layer having a thickness of, for example, 100 nm. The basic structure of the MRAM is completed by patterning so as to extend in a direction orthogonal to the write word line 43 to form the bit line 46.

Next, the principle of writing by current in the MTJ element 40 will be described.
In general, it is known that the current flowing inside the magnetic material is spin-polarized as described above, the number of up-spin electrons is different from the number of down-spins. It is known to interact with spin.

  Therefore, in a junction with the structure of “magnetic body / non-magnetic body / magnetic body”, when an electric current is passed between the magnetic bodies on both sides, the polarized electrons that have passed through the magnetic body on one side will When passing through the body, the magnetic body will receive torque from the polarized electrons, and when this torque is sufficiently large, the magnetization of the magnetic body will be reversed.

This current value I _c is calculated by theoretical calculation, where e is an elementary charge, M is the magnetization of the pinned layer, A is the current flow area, H is the external magnetic field, H _c is the coercive force of the free layer, and α is the overall material constant. , T is the thickness of the free layer, and P is the polarizability of the pinned layer,
I _c = ± e MA (2πM ± H) αt / H _c P (6)
(See, for example, Applied Physics Letters, vol. 78, pp. 3663-3665, and Applied Physics Letters, vol. 77, pp. 3809-3811).

See FIGS. 10 and 11
Figure 10 is a schematic sectional view of the vicinity MTJ elements, and FIG. 11 is an explanatory view of a current-dependent flow to the writing portion of the tunnel resistance of the read portion of the MTJ element, the inversion current I _c to the write unit Is reversed to reverse the magnetization direction of the magnetic material constituting the free layer, thereby changing the tunneling resistance of the reading section.

For example, when electrons flow from the Au cap layer 38 toward the CoFe free layer 33, the magnetization directions of the CoFe free layer 33 and the NiFe free layer 34 are aligned with the magnetization direction of the CoFe pinned layer 36.
On the other hand, when electrons flow from the CoFe free layer 33 in the direction of the Au cap layer 38, the magnetization directions of the CoFe free layer 33 and the NiFe free layer 34 are aligned in the opposite direction to the magnetization direction of the CoFe pinned layer 36.

Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations and conditions described in the embodiments, and various modifications can be made.
For example, the above numerical values such as film thickness are merely examples, and may be changed as appropriate according to the times and needs.

  In the above embodiment, CoFe is used as the pinned layer, but it is not limited to CoFe. Like CoFe, the tunneling resistivity is large, and the polarizability P that can reduce the current for inversion is also provided. A large material may be used.

  In the above embodiment, a CoFe / NiFe laminated film is used as the free layer. However, the invention is not limited to the laminated film, and a single layer film may be used.

  Furthermore, an antiferromagnetically coupled ferri-spin structure film such as CoFe / Ru / CoFe may be used for the pinned layer or the free layer. In this case, the Ru is optimized to about 1 nm or less. Then, the magnetic layers on both sides are strongly antiferromagnetically coupled and behave like a single magnetic film as a whole.

  In the above embodiment, the nonmagnetic layer of the spin valve film on the write side is made of Cu, but is not limited to Cu, and other nonmagnetic conductors such as Au may be used. It is.

In the above embodiment, the non-magnetic layer of the spin valve film on the reading side is composed of an Al-O film formed by oxidizing Al, but is not limited to the Al-O film. Alternatively, Al ₂ O ₃ itself may be formed, and another nonmagnetic insulator such as a SiN film may be used.

  In the above embodiment, the nonmagnetic layer of the write side spin valve film is made of a conductor, and the nonmagnetic layer of the read side spin valve film is made of an insulator to form a GMR / MTJ structure. However, both of them may have the same configuration to have a GMR / GMR structure or an MTJ / MTJ structure.

  In the above embodiment, the pinned layer is pinned by using an antiferromagnetic layer, but the antiferromagnetic layer is not necessarily required, and the pinned layer has a stronger coercive force than the free layer. A pinned state may be maintained using a magnetic material and utilizing a difference from the coercive force of the free layer.

  In the above embodiment, MOSFETs are used as switching elements and memory cells are configured as 1Tr + 1MTJ. However, memory cells may be configured in a simple matrix type without using switching elements for each memory cell. It is.

  Further, when the memory cell is configured in a simple matrix type, the drive circuit device is not necessarily configured by a semiconductor device, and may be configured by a superconducting circuit device using a Josephson junction element or the like.

The detailed features of the present invention will be described again with reference to FIG. 1 again.
Again see Figure 1
(Supplementary Note 1) Magnetic body / non-magnetic body in which the first magnetic body 1, the first non-magnetic body 2, the second magnetic body 3, the second non-magnetic body 4, and the third magnetic body 5 are sequentially laminated. It has a structure of magnetic body / magnetic body / non-magnetic body / magnetic body, and wirings 6 to 8 are connected to the first magnetic body 1, the second magnetic body 3, and the third magnetic body 5, respectively. A magnetoresistive effect element.
(Additional remark 2) At least one of the said 1st nonmagnetic body 2 or the 2nd nonmagnetic body 4 is an insulator, The magnetoresistive effect element of Additional remark 1 characterized by the above-mentioned.
(Additional remark 3) The magnetoresistive effect element of Additional remark 3 characterized by the magnetic layer through the nonmagnetic layer which consists of said insulator being a tunnel junction.
(Additional remark 4) At least one of the said 1st nonmagnetic body 2 or the 2nd nonmagnetic body 4 consists of either Cu or Au, The magnetoresistive effect element of Additional remark 1 characterized by the above-mentioned.
(Supplementary Note 5) At least one of the first magnetic body 1 and the third magnetic body 5 has a laminated structure of a ferromagnetic body and an antiferromagnetic body that fixes the magnetization direction of the ferromagnetic body. 5. The magnetoresistive effect element according to any one of appendices 1 to 4, which is characterized by
(Supplementary Note 6) The supplementary notes 1 to 5 are characterized in that the magnetization direction of the second magnetic body 3 is controlled by passing a current between the first magnetic body 1 and the second magnetic body 3. The magnetoresistive effect element of any one of these.
(Additional remark 7) The magnetic memory cell characterized by including the magnetoresistive effect element of any one of Additional remark 1 thru | or 6, and holding information with the magnetization direction of the said 2nd magnetic body 3.
(Additional remark 8) The magnetization direction of the said 2nd magnetic body 3 is detected by measuring the resistance value between the said 2nd magnetic body 3 and the 3rd magnetic body 5, Additional remark 7 characterized by the above-mentioned. The magnetic memory cell described.
(Supplementary note 9) A magnetic random access memory device, wherein a plurality of magnetic memory cells according to supplementary note 4 are arranged.
(Additional remark 10) Between the said 2nd magnetic body 3 and the 3rd magnetic body 5, the writing circuit which sends an electric current selectively between the said 1st magnetic body 1 and the 2nd magnetic body 3 10. The magnetic random access memory device according to appendix 9, further comprising a read circuit that selectively extracts the resistance value of the magnetic random access memory.

  As an application example of the present invention, MRAM is typical, and can be applied as a nonvolatile storage device of information equipment, and can also be applied as a magnetic sensor having information holding capability instead of MRAM. Is.

It is explanatory drawing of the fundamental structure of this invention. It is explanatory drawing of the manufacturing process to the middle of MRAM of Example 1 of this invention. It is explanatory drawing of the manufacturing process to the middle after FIG. 2 of MRAM of Example 1 of this invention. It is explanatory drawing of the manufacturing process to the middle after FIG. 3 of MRAM of Example 1 of this invention. It is explanatory drawing of the manufacturing process to the middle after FIG. 4 of MRAM of Example 1 of this invention. It is explanatory drawing of the manufacturing process to the middle after FIG. 5 of MRAM of Example 1 of this invention. It is explanatory drawing of the manufacturing process to the middle after FIG. 6 of MRAM of Example 1 of this invention. It is explanatory drawing of the manufacturing process to the middle after FIG. 7 of MRAM of Example 1 of this invention. It is explanatory drawing of the manufacturing process after FIG. 8 of MRAM of Example 1 of this invention. It is a conceptual sectional view near the MTJ element of the MRAM according to the first embodiment of the present invention. It is explanatory drawing of the electric current value sent through the writing part of the tunnel resistance of the reading part of the MTJ element of MRAM of Example 1 of this invention. It is a schematic sectional drawing of the memory cell which comprises the conventional MRAM. It is an equivalent circuit diagram of the memory cell which comprises MRAM. It is explanatory drawing of the write principle of MRAM. It is an asteroid curve which shows the threshold value of writing. 2 is a magnetoresistance effect curve of a ferromagnetic tunnel junction having a spin valve structure.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st magnetic body 2 1st nonmagnetic body 3 2nd magnetic body 4 2nd nonmagnetic body 5 3rd magnetic body 6 Wiring 7 Wiring 8 Wiring 11 n-type silicon substrate 12 p-type well region 13 Element Isolation oxide film 14 Gate insulating film 15 Gate electrode 16 n ⁻ type LDD region 17 Side wall 18 n ⁺ type drain region 19 n ⁺ type source region 20 First interlayer insulating film 21 W plug 22 W plug 23 Connection conductor 24 Source wiring layer 25 Second interlayer insulating film 26 W plug 27 Lower electrode 28 Third interlayer insulating film 29 NiFe underlayer 30 PtMn pinned layer 31 CoFe pinned layer 32 Tunnel insulating layer 33 CoFe free layer 34 NiFe free layer 35 Cu intermediate layer 36 CoFe pinned layer 37 IrMn pinned layer 38 Au cap layer 39 Resist pattern 40 MTJ element 41 Fourth interlayer insulating film 42 Al layer 43 Read word line 44 Fifth interlayer insulating film 45 p-SiN film 46 Bit line 51 Connecting conductor 52 Write word line 53 Third interlayer insulating film 54 W plug 55 Lower electrode 56 Fourth interlayer insulating film 57 Ta underlayer 58 NiFe Free layer 59 Tunnel insulating layer 60 CoFe pinned layer 61 IrMn pinned layer 62 Ta cap layer 63 MTJ element 64 Fifth interlayer insulating film 65 Bit line 66 Plate line

Claims (5)

Magnetic body / non-magnetic body / magnetic body / non-magnetic body in which a first magnetic body, a first non-magnetic body, a second magnetic body, a second non-magnetic body, and a third magnetic body are sequentially laminated A magnetoresistive element having a structure of a magnetic body, wherein wiring is connected to each of the first magnetic body, the second magnetic body, and the third magnetic body. 2. The magnetoresistive element according to claim 1, wherein at least one of the first nonmagnetic material and the second nonmagnetic material is an insulator. 3. The magnetoresistive effect according to claim 1, wherein the magnetization direction of the second magnetic body is controlled by passing a current between the first magnetic body and the second magnetic body. 4. element. A magnetic memory cell comprising the magnetoresistive effect element according to claim 1, wherein information is held by a magnetization direction of the second magnetic body. A magnetic random access memory device comprising a plurality of magnetic memory cells according to claim 4 arranged.

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