JP2004349097A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an active matrix type display device by which a layer structure for forming a circuit connected to a TFT can be reduced. <P>SOLUTION: The TFT (thin film transistor)5 is provided to each pixel 3 constituting a display range 1a. A driving substrate, in which a lower electrode 27 connected to TFT5 is formed as a pixel electrode pattern on each pixel 3 on an insulating film between layers 25 covering the TFT5 is provided. A connecting wiring 27b formed by the same layer as the lower electrode 27 is provided in a peripheral range 1b surrounding the display range 1a in the driving substrate. The connecting wiring 27b is connecting wiring connecting power source wires v1 and v2 connected to the TFT5. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a display device, and more particularly, to a display device provided with a thin film transistor for driving a pixel electrode in each pixel forming a display region.
[0002]
[Prior art]
2. Description of the Related Art An organic EL element using electroluminescence (hereinafter referred to as EL) of an organic material is provided with an organic layer formed by stacking an organic hole transport layer and an organic light emitting layer between a lower electrode and an upper electrode. In other words, attention has been paid to a light emitting element capable of emitting high luminance light by low voltage DC driving.
[0003]
In an active matrix display device using such an organic EL element, a thin film transistor (TFT) is provided for each pixel on a substrate. The lower electrode of the organic EL element is patterned as a pixel electrode in a state where the pixel is connected to the TFT on each pixel on the interlayer insulating film provided so as to cover the TFT. The electrode is driven on and off by the TFT.
[0004]
The pixel circuit of such a display device has a circuit configuration as shown in FIG. 1, for example. That is, a plurality of scanning lines s1, s2,... Extend horizontally in the display area 1a of the display device, and a plurality of data lines d1, d2,. , V2,... Are alternately extended. Each part surrounded by these scanning lines S1, S2,..., Data lines d1, d2,... And power supply lines v1, v2,. Each pixel 3 has, for example, an n-channel TFT 5 having a gate connected to the scanning line s1 and a source connected to the data line d1, as shown in the pixel 3-11, between the drain of the TFT 5 and the power supply line v1. A p-channel TFT 9 whose gate is connected to the drain of the TFT 5 and whose source is connected to the power supply line v1, and an organic EL element 11 whose anode is connected to the drain of the TFT 9 and whose cathode is grounded. Have been.
[0005]
In a display device in which the display area 1a has such a circuit configuration, scanning lines s1, s2,..., Data lines d1, d2,. Some drive integrated circuits for providing signals to v2,... are provided. Such a drive integrated circuit is formed on a substrate in the same process as the formation of a pixel circuit formed using the TFTs 5 and 9 and the capacitor 7 and the like. Then, an organic EL element is formed on the interlayer insulating film covering the driving integrated circuit and the pixel circuit. (See Patent Document 1 below)
[0006]
[Patent Document 1]
JP-A-11-54268 (pages 3 to 4 and FIGS. 1 and 2)
[0007]
[Problems to be solved by the invention]
However, in the display device having the above-described drive integrated circuit, all circuits except the organic EL element are provided below the interlayer insulating film. Therefore, in the display device having such a configuration, a layer structure for forming a circuit below the interlayer insulating film has a multilayer structure and is complicated. Therefore, there is a problem that the number of manufacturing steps of the display device increases.
[0008]
Therefore, the present invention provides an active matrix type display device in which a layer structure for forming a circuit connected to a TFT can be reduced, whereby the layer structure can be simplified and the number of manufacturing steps can be reduced. The purpose is to provide.
[0009]
[Means for Solving the Problems]
In order to achieve such an object, a first display device according to the present invention includes a thin film transistor provided in each pixel forming a display region on a substrate, an interlayer insulating film provided so as to cover the thin film transistor, In a display device having an organic EL element provided for each pixel on an interlayer insulating film in a state where an organic layer and an upper electrode are stacked in this order on a lower electrode connected to a thin film transistor, A wiring is formed around the display region in the same layer as at least one of the lower electrode and the upper electrode.
[0010]
Further, the second display device has an organic EL element provided in the same manner as the first display device, and further has an organic EL element which is insulated from a lower electrode constituting the organic EL element and is connected to the upper electrode. In a display device having an auxiliary electrode provided between pixels on an insulating film, in particular, a wiring formed in the same layer as the auxiliary electrode is provided around a display region on the interlayer insulating film. I have.
[0011]
In the first and second display devices having such a configuration, the wiring formed in the same layer as the upper electrode, the lower electrode, or the auxiliary electrode that constitutes the organic EL element is provided around the display region. Similarly to the first display device described above, this wiring can be used for a part of a wiring circuit connected to a thin film transistor provided below the interlayer insulating film. Therefore, some of the layers forming the wiring circuit are shared with the layers forming the pixel electrodes, and the number of wiring layers is reduced.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The display device of each embodiment described here is an active matrix type display device provided with an organic EL element for each pixel and a thin film transistor (TFT) connected to the organic EL element. It is assumed that the technique is the same as that described with reference to FIG. Therefore, the same components as those described with reference to FIG. 1 in the related art are denoted by the same reference numerals, and in each embodiment, the description will be made with reference to the drawings of each embodiment with reference to FIG. Shall be performed.
[0013]
<First embodiment>
2A and 2B are diagrams illustrating a configuration of the display device according to the first embodiment, in which FIG. 2A is a cross-sectional view of a main part of a display area, FIG. 2B is a cross-sectional view of a main part of a peripheral area, and FIG. FIG. 3 is a plan view of a main part of a peripheral region. (B) corresponds to the AA ′ section of (c).
[0014]
In the display devices shown in these drawings, each pixel 3 in the display area 1a on the substrate 1 is provided with a TFT 5 for driving a pixel electrode and a capacitor. In FIG. 2B, only the TFT 5 is representatively shown as a bottom gate type. The gate electrode of the TFT 5 is extended as a scanning line s1 (s2,...) To the peripheral area 1b on the outer periphery of the display area 1a and wired. Further, the TFT formed on the substrate 1 is not limited to the bottom gate type shown in the figure, but may be a top gate type.
[0015]
Then, on the substrate 1 on which the TFTs 5 are formed, wirings 23 connected to the TFTs 5, capacitors and the like via an insulating film 21 are formed. These wirings 23 are data lines d1, d2,... And power supply lines v1, v2,. Also, these data lines d1, d2, ... and power supply lines v1, v2, ... extend in a direction perpendicular to the scanning line s1 (s2, ...) and extend to the outer peripheral area 1b of the outer periphery of the display area 1a. It shall be drawn out and wired.
[0016]
An interlayer insulating film 25 having a flat surface is provided on the substrate 1 so as to cover the wiring 23. Each pixel 3 on the interlayer insulating film 25 is connected to the TFT 5 via the wiring 23. An organic EL element 11 is provided.
[0017]
Each organic EL element 11 includes a lower electrode 27 patterned while being connected to the TFT 5 via the wiring 23, and an opening (that is, an opening) of the insulating film 29 formed so as to cover the periphery of the lower electrode 27. An organic layer 31 is provided in the pixel opening A) so as to cover the lower electrode 27, and an upper electrode 33 is laminated while being insulated from the lower electrode 27 by the insulating film 29 and the organic layer 31.
[0018]
Of these, the lower electrode 27 is used as an anode, and is further patterned for each pixel 3 as a pixel electrode. The organic layer 31 is patterned for each pixel opening A so as to cover the lower electrode 27 exposed in the pixel opening A defined by the insulating film 29. The upper electrode 33 may be provided as a solid film above the substrate 1 or may be formed in a pattern for each of a plurality of portions while being shared by a plurality of pixels.
[0019]
Further, between the pixels 3 on the interlayer insulating film 25, an auxiliary electrode 27a which is insulated from the lower electrode 27 is pattern-formed in the same layer as the lower electrode 27 constituting the organic EL element 11. . The auxiliary electrodes 27a are arranged continuously in a stitch shape between pixels 3 arranged in a matrix on the substrate 1, for example. Then, it is assumed that the upper electrode 33 provided on the insulating film 29 is connected to the auxiliary electrode 27a. The connection position between the upper electrode 33 and the auxiliary electrode 27a does not need to be provided for each pixel opening A.
[0020]
In particular, in the peripheral region 1b of the display region 1a on the interlayer insulating film 25, a connection wiring 27b for connecting the wirings 23 is formed in the same layer as the lower electrode 27 constituting the organic EL element 11 in a pattern. And Here, it is assumed that the connection wiring 27b is provided in a state where the power supply lines v1, v2,. Thereby, the power supply lines v1, v2,... Are shared on the substrate 1.
[0021]
The insulating film 29 covering the periphery of the lower electrode 27 described above is formed so as to cover the connection wiring 27b and to expose the terminal 23b of the wiring 23 drawn to the peripheral region 1b.
[0022]
By the way, since the TFT 5 is formed for each pixel 3 on the substrate 1, the display device is of a top emission type that emits light from the upper electrode 33 side opposite to the substrate 1. This is advantageous in securing an aperture ratio of 11. In this case, the substrate 1 is not limited to a transparent material.
[0023]
When the display device is of a top emission type, the upper electrode 33 is formed by using a metal material having good light reflectivity such as aluminum (Al), silver (Ag), and chromium (Cr) for the lower electrode 27. Preferably, the emitted light is reflected to the side. In this case, for the purpose of flattening the surface of the lower electrode 27, a two-layer structure in which a light transmitting material layer having excellent surface flatness is provided on the above-described metal material layer may be used. Although the lower electrode 27 is used as an anode, it may be used as a cathode depending on the circuit configuration, and a material having an appropriate work function is selected and used depending on which one is used. And For example, when the lower electrode 27 is used as an anode, a material having a large work function is used for the uppermost layer in contact with the organic layer 31. Therefore, when the lower electrode 27 is configured with the above-described two-layer structure, ITO (Indium Tin Oxide) having a large work function and good light transmittance is used for the uppermost layer.
[0024]
The organic layer 31 has a laminated structure including at least a light emitting layer, and is formed by sequentially stacking, for example, a hole injection layer, a light emitting layer, an electron transport layer, an electron injection layer, and the like in this order from the anode side. These layers are appropriately selected and laminated.
[0025]
Further, when the display device is of a top emission type, the upper electrode 33 is formed using a material having light transmittance, and is preferably formed with a sufficiently thin film thickness in order to obtain good light extraction efficiency. preferable. When the lower electrode 27 is an anode, the upper electrode 33 is used as a cathode. Therefore, when the upper electrode 33 has a multilayer structure of two or more layers, the lowermost layer in contact with the organic layer 31 is made of a material having a small work function, for example, an alloy of magnesium and silver (Mg: Ag). For the upper layer, a conductive material having good light transmittance, such as a compound of indium, zinc, and oxygen (In-Zn-O), is used.
[0026]
On the other hand, when the display device is of a transmission type in which light is emitted from the substrate 1 side, the substrate 1 and the lower electrode 27 are made of a material having a light transmitting property. On the other hand, the upper electrode 33 is made of a material having good light reflectivity.
[0027]
The display device having the above-described configuration has a configuration in which the connection wiring 27b for connecting the power supply lines v1, v2,... As a common power supply is formed in the same layer as the lower electrode (pixel electrode) 27 of the organic EL element 11. . Therefore, compared to a configuration in which all the circuit wirings including such connection wirings are provided below the interlayer insulating film 25 in which the organic EL element 11 is provided, one of the layers constituting the wiring circuit is a pixel electrode. , And the number of wiring layers can be reduced. Thus, it is possible to suppress a multilayer structure of the display device.
[0028]
Hereinafter, an example of the method of manufacturing the display device of the above-described first embodiment and a more specific example of the detailed configuration of the display device will be described along the manufacturing procedure with reference to the manufacturing process diagrams of FIGS. In each of the manufacturing process drawings, (a) is a cross-sectional view of a main portion of a display region, (b) is a cross-sectional view of a main portion of a peripheral region, and (c) is a plan view of a main portion of a peripheral region. (B) corresponds to the AA ′ section of (c).
[0029]
First, as shown in each drawing of FIG. 3, on a substrate 1 made of, for example, a glass substrate, another element including the TFT 5 and a scanning line s1 (s2,...) Extending from a gate electrode constituting the TFT 5 are formed. Form. Next, an insulating film 21 is formed so as to cover them (above omitted in the main part plan view), and on this insulating film 21, the data lines d1, d2,. are formed as wirings 23.
[0030]
Thereafter, as shown in each of FIGS. 4A and 4B, an interlayer insulating film 25 having a flat surface is formed on the substrate 1 by forming the TFTs 5 and the wirings 23 so as to fill in the irregularities generated on the surface side of the substrate 1. In this case, for example, a positive photosensitive polyimide is applied on the substrate 1 by spin coating, pattern exposure is performed by irradiating only the upper part of the wiring 23 with exposure light using an exposure device, and then development is performed using a paddle type development device. I do. Next, main baking is performed in a clean bake furnace to imidize (cyclize) the polyimide. Thus, an interlayer insulating film 25 having a connection hole 25a reaching the wiring 23 is formed. This interlayer insulating film 25 is formed to have a thickness of about 2.0 μm, for example, when the unevenness in the state where the wiring 23 is formed is about 1.0 μm. The connection hole 25a is formed in the display area 1a at a position reaching the data lines d1, d2,... In the wiring 23, and in the peripheral area 1b, at a position reaching the power supply lines v1, v2,. It is formed at a position to be the terminal 23b of 23.
[0031]
Next, as shown in FIGS. 5A and 5B, the lower electrode 27 and the auxiliary electrode 27a are formed by the same process on the interlayer insulating film 25 in the display region 1a, and the interlayer insulating film in the peripheral region 1b. The connection wiring 27b is formed on the wiring 25. Here, for example, when the lower electrode 27 is formed as an anode, first, a metal material layer (for example, Ag) is formed on the interlayer insulating film 25 to a thickness of about 150 nm by a DC sputtering method. Next, an ITO layer is formed on the metal material layer to a thickness of about 10 nm by a DC sputtering method. Next, the metal material layer and the ITO layer are patterned by etching using a resist pattern formed by a normal lithography technique as a mask. Thus, in the display area 1a, the lower electrodes 27 connected to the data lines d1, d2,... Via the connection holes 25a are arranged in a matrix as pixel electrodes corresponding to the three pixels. At the same time, an auxiliary electrode 27a is formed between these lower electrodes 27. Also, in the peripheral region 1b, a connection wiring 27b connected to the power supply lines v1, v2,... Via a connection hole 25a is formed.
[0032]
Thereafter, as shown in each drawing of FIG. 6, the display area 1a has a pixel opening A and a connection hole 29a, covers the connection wiring 27b in the peripheral area 1b, and exposes the terminal 23b of the wiring 23. An insulating film 29 is formed. Here, first, silicon dioxide (SiO 2) ₂ ) A film is formed with a thickness of about 1.0 μm. Thereafter, the silicon dioxide film is patterned by etching using a resist pattern formed using a normal lithography technique as a mask. At this time, the etching is performed under the condition that the etching side wall has a tapered shape. As a result, an insulating film 29 made of a silicon dioxide film having a pixel opening A exposing the central portion of the lower electrode 27 and a connection hole 29a reaching the auxiliary electrode 27a and exposing the terminal 23b is obtained. The insulating film 29 is not limited to a silicon dioxide film.
[0033]
After the above, as shown in each of FIGS. 2A and 2B, first, an organic layer 31 having a shape covering the lower electrode 27 exposed at the bottom of the pixel opening A is pattern-formed. Here, it is assumed that vapor deposition is performed on the insulating film 29 in a state where a vapor deposition mask (not shown) is opposed to the vapor deposition mask. This vapor deposition mask has an opening corresponding to the formation portion of the organic layer 31 and has a shape covering the terminal 23b. When the opening is viewed in a plan view from the vapor deposition mask side, the opening is formed so that the organic layer 31 is formed in a state where the lower electrode 27 in the pixel opening A is securely covered. In order to expose the whole, it is assumed that it is designed to overlap the side wall of the insulating film 29 around the pixel opening A.
[0034]
Then, by vapor deposition using this vapor deposition mask, for example, 4,4 ｀, 4 ″ -tris (3-methylphenylphenylamino) triphenylamine (MTDATA) as a hole injection layer in order from the lower electrode 27 side. An organic layer 31 formed by stacking bis (N-naphthyl) -N-phenylbenzidine (α-NPD) as a hole transport layer and an 8-quinolinol aluminum complex (Alq3) as a light emitting layer is formed.
[0035]
At this time, each of the above materials constituting the organic layer 31 is filled in a resistance heating boat with 0.2 g and attached to a predetermined electrode of a vacuum evaporation apparatus. And 0.1 × 10 ^-4 After reducing the pressure to about Pa, a voltage is sequentially applied to each boat, whereby a plurality of organic materials are sequentially deposited and formed. The thickness of each material is about 30 nm for MTDATA as a hole injection layer, about 20 nm for α-NPD as hole transport, and about 30 nm for Alq3 as a light emitting layer.
[0036]
At the time of the above-described vapor deposition, the vapor deposition mask may be placed on the insulating film 29 to keep the vapor deposition mask 31 and the substrate 1 at a predetermined distance.
[0037]
After the above, an upper electrode 33 which covers the organic layer 31 and the insulating film 29 and is connected to the auxiliary electrode 27a via the connection hole 29a of the insulating film 29 is formed. The upper electrode 33 is formed by vapor deposition from above the mask so as to expose the terminal 23b. Here, first, as a lower layer of the upper electrode 33, Mg-Ag serving as a cathode is formed on the entire surface of the substrate 1 by co-evaporation.
[0038]
At this time, each of the boats is filled with 0.1 g of Mg and 0.4 g of Ag and attached to predetermined electrodes of a vacuum evaporation apparatus. And 0.1 × 10 ^-4 After the pressure is reduced to about Pa, Mg and Ag are co-evaporated above the substrate 1 by applying a voltage to each boat. Further, as an example, the ratio of the deposition rates of Mg and Ag is about 9: 1, and the film is formed with a thickness of about 10 nm.
[0039]
Since the formation of the organic layer 31 and the formation of the lower layer of the upper electrode 33 are both performed by vapor deposition, they are performed continuously in the same vapor deposition chamber. However, after the vapor deposition of the organic layer 31 is completed, the vapor deposition mask (31) is removed from the substrate 1 when performing the vapor deposition of the lower layer of the upper electrode 33.
[0040]
Next, the uppermost layer of the upper electrode 33 is formed on the lower layer of the upper electrode 33. This uppermost layer is made of a transparent conductive film and is formed by a DC sputtering method. Here, as an example, an In-Zn-0-based transparent conductive film which shows good conductivity at room temperature as the transparent conductive film is formed to have a thickness of about 200 nm as the uppermost layer 13b.
[0041]
As described above, the display device having the above-described configuration is obtained.
[0042]
According to such a manufacturing method, as described with reference to FIG. 5, the connection wiring 27b is formed in the same step as the formation of the lower electrode 27, so that the connection wiring 27b is formed below the interlayer insulating film 25. Compared with a configuration in which all circuit wirings including the connection wiring 27b are provided, the number of manufacturing steps can be reduced.
[0043]
<Second embodiment>
7A and 7B are diagrams illustrating a configuration of a display device according to a second embodiment, in which FIG. 7A is a cross-sectional view of a main part of a display area, FIG. 7B is a cross-sectional view of a main part of a peripheral area, and FIG. FIG. 3 is a plan view of a main part of a peripheral region. (B) corresponds to the AA ′ section of (c). Hereinafter, the configuration of the display device of the second embodiment will be described with reference to the circuit diagram of FIG. 1 together with FIG.
[0044]
The difference between the display device shown in these figures and the display device of the first embodiment described with reference to FIG. 2 is that connection wiring for connecting the power supply lines v1, v2,... Described in the first embodiment. However, it is different from the lower electrode 27 in the same layer as the auxiliary electrode, and the other configuration is the same as that of the first embodiment.
[0045]
That is, the auxiliary electrode 71 provided in the display region 1a and the connection wiring 71b provided in the peripheral region 1b are provided on the insulating film 29 provided so as to cover the periphery of the lower electrode 27 of the organic EL element 11. -ing The arrangement state and connection state of the auxiliary electrode 71 and the connection wiring 71b are the same as those of the auxiliary electrode (27a) and the connection wiring (27b) in the first embodiment. However, it is assumed that the connection wiring 71b is provided so as to maintain insulation with respect to the upper electrode 33. The upper electrode 33 of the organic EL element 11 is provided so as to directly cover the auxiliary electrode 71 and the organic layer 31.
[0046]
In the display device having such a configuration, the connection wiring 71b for connecting the power lines v1, v2,... Is formed in the same layer as the auxiliary electrode 71 connected to the upper electrode 33 of the organic EL element 11. . For this reason, similar to the first embodiment, the wiring circuit is configured as compared with a configuration in which all circuit wirings including such connection wirings are provided below the interlayer insulating film 25 on which the organic EL element 11 is provided. One of the layers to be used is shared with the layer constituting the auxiliary electrode, and the number of wiring layers can be reduced. Thus, it is possible to suppress a multilayer structure of the display device.
[0047]
Hereinafter, an example of the method for manufacturing the display device of the above-described second embodiment will be described along the manufacturing procedure with reference to the manufacturing process diagrams of FIGS. In each of the manufacturing process drawings, (a) is a cross-sectional view of a main portion of a display region, (b) is a cross-sectional view of a main portion of a peripheral region, and (c) is a plan view of a main portion of a peripheral region. (B) corresponds to the AA ′ section of (c).
[0048]
First, the same steps as those described in the first embodiment with reference to FIGS. 3 and 4 are performed until the interlayer insulating film 25 is formed as shown in FIGS. It is assumed that a connection hole 25a is provided in the interlayer insulating film 25 at the same position as in the first embodiment.
[0049]
Next, the lower electrodes 27 connected to the data lines d1, d2,... Via the connection holes 25a are formed on the interlayer insulating film 25 in the display region 1a only in the form of a matrix as pixel electrodes corresponding to three pixels. An array is formed. The formation of the lower electrode 27 is performed in the same manner as described with reference to FIG. 5 in the first embodiment.
[0050]
Thereafter, as shown in each of FIGS. 9A and 9B, the display region 1a has a pixel opening A, the peripheral region 1b has a connection hole 29b overlapping with the connection hole 25a of the interlayer insulating film 25, and the terminal 23b portion of the wiring 23. An insulating film 29 having a shape exposing the substrate is formed. The formation of the insulating film 29 is performed in the same manner as described with reference to FIG. 6 in the first embodiment.
[0051]
Next, an auxiliary electrode 71 is formed on the insulating film 29 in the display region 1a so as to surround the pixel opening A, and in the same step, the power supply lines v1 and v1 are formed on the insulating film 29 in the peripheral region 1b via the connection holes 29b. The connection wiring 71b connected to v2,... is formed. Here, first, a metal material layer (for example, Al) is formed with a thickness of about 150 nm on the insulating film 29 by a DC sputtering method. Next, these metal material layers are patterned by etching using a resist pattern formed by a normal lithography technique as a mask, thereby forming the auxiliary electrode 71 and the connection wiring 71b.
[0052]
After the above, as shown in FIGS. 7A and 7B, the organic layer 31 is patterned and the upper electrode 33 covering the organic layer 31, the auxiliary electrode 71 and the insulating film 29 is formed. The formation of the organic layer 31 and the upper electrode 33 is performed in the same manner as described in the first embodiment. However, the formation of the upper electrode 33 is performed so as to maintain the insulation with respect to the terminal 23 and the connection wiring 71b.
[0053]
As described above, the display device having the above-described configuration is obtained.
[0054]
According to such a manufacturing method, as described with reference to FIG. 9, since the connection wiring 71b is formed in the same step as the formation of the auxiliary electrode 71, the connection wiring 71b is formed below the interlayer insulating film 25. Compared with the configuration in which all the circuit wirings including the connection wiring 71b are provided, the number of manufacturing steps can be reduced.
[0055]
<Third embodiment>
10A and 10B are diagrams illustrating a configuration of a display device according to a third embodiment, in which FIG. 10A is a cross-sectional view of a main part of a display area, FIG. 10B is a cross-sectional view of a main part of a peripheral area, and FIG. FIG. 3 is a plan view of a main part of a peripheral region. (B) corresponds to the AA ′ section of (c). Hereinafter, the configuration of the display device of the second embodiment will be described with reference to the circuit diagram of FIG. 1 together with FIG.
[0056]
The difference between the display device shown in these figures and the display device of the second embodiment described with reference to FIG. 7 is that connection wiring for connecting the power supply lines v1, v2,... Described in the second embodiment. Reference numeral 33b is a layer different from the auxiliary electrode 71 and is formed of the same layer as the upper electrode 33, and the other configuration is the same as that of the second embodiment.
[0057]
That is, the upper electrode 33 provided in the display area 1a and the connection wiring 33b provided in the peripheral area 1b are composed of the insulating film 29 and the auxiliary wiring 71 provided so as to cover the periphery of the lower electrode 27 of the organic EL element 11. It is provided above. The arrangement state and connection state of the upper electrode 33 and the connection wiring 33b are the same as those of the auxiliary electrode (71) and the connection wiring (71b) in the second embodiment.
[0058]
In the display device having such a configuration, the connection wiring 33b for connecting the power lines v1, v2,... Is formed in the same layer as the upper electrode 33 of the organic EL element 11. For this reason, similar to the first and second embodiments, compared to a configuration in which all circuit wirings including such connection wirings are provided below the interlayer insulating film 25 on which the organic EL element 11 is provided, wiring One of the layers forming the circuit is shared with the layer forming the auxiliary electrode, so that the number of wiring layers can be reduced. Thus, it is possible to suppress a multilayer structure of the display device.
[0059]
When the display device of the third embodiment is manufactured, the connection wiring (71b) is not formed when the auxiliary electrode 71 is formed in the manufacturing method described in the second embodiment. The upper electrode 33 and the connection wiring 33b are patterned by the same process.
[0060]
In the third embodiment, the configuration in which the auxiliary electrode 71 is a single layer provided specifically is described. However, in the present embodiment, the same effect can be obtained if the connection wiring 33b is formed in the same layer as the upper electrode 33. Therefore, the present invention can be applied to a configuration in which the auxiliary electrode has the same layer as the lower electrode 27 as in the first embodiment.
[0061]
In the first to third embodiments described above, the wirings formed in the same layer as the lower electrode, the auxiliary electrode, the upper electrode, and the like are connected to make the power supply lines v1, v2,. It was described as wiring. However, this wiring is not particularly limited as long as it is a wiring used in a peripheral area of the display area, and the same effect can be obtained. Therefore, for example, as described in the related art, when a drive integrated circuit is formed in a peripheral region, the wiring forming the drive integrated circuit may be replaced with the connection wiring described in the first to third embodiments. good. Further, the display region 1a and the outer peripheral region 1b may not be clearly distinguished as shown in the drawing, but in the present invention, the portion where the pixels 3 are disposed is referred to as the display region 1a, and the display region 1a is disposed in other portions. The configuration in which the connection wiring is formed in the same layer as the lower electrode, the auxiliary electrode, and the upper electrode is also included.
[0062]
【The invention's effect】
As described above, according to the display device of the present invention, the same layer as the electrode layer provided on the interlayer insulating film covering the thin film transistor in the display region forms a part of a wiring circuit connected to the thin film transistor. By forming the wiring, the number of wiring layers in the active matrix display device can be reduced. Further, the number of manufacturing steps of the display device can be reduced.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a configuration showing an example of a circuit in a display area of a display device to which the present invention is applied.
FIG. 2 is a diagram illustrating a configuration of a display device according to the first embodiment.
FIG. 3 is a manufacturing process diagram (part 1) of the display device of the first embodiment.
FIG. 4 is a manufacturing process diagram (part 2) of the display device of the first embodiment.
FIG. 5 is a manufacturing process diagram (part 3) of the display device of the first embodiment.
FIG. 6 is a diagram (part 4) illustrating a process of manufacturing the display device of the first embodiment.
FIG. 7 is a diagram illustrating a configuration of a display device according to a second embodiment.
FIG. 8 is a manufacturing process diagram (part 1) of the display device of the second embodiment.
FIG. 9 is a manufacturing process diagram (part 2) of the display device of the second embodiment.
FIG. 10 is a diagram illustrating a configuration of a display device according to a third embodiment.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Substrate, 1a ... Display area, 1b ... Peripheral area, 3 ... Pixel, 5, 9 ... TFT (thin film transistor), 11 ... Organic EL element, 25 ... Interlayer insulating film, 27 ... Lower electrode (pixel electrode), 27b, 33b, 71b: connection wiring, 31: organic layer, 33: upper electrode, 71: auxiliary electrode

Claims (4)

A thin film transistor provided for each pixel constituting a display region on the substrate, an interlayer insulating film provided so as to cover the thin film transistor, and an organic layer and an upper electrode laminated in this order on a lower electrode connected to the thin film transistor In a display device having an organic EL element provided for each pixel on the interlayer insulating film in a state where
A display device, wherein a wiring formed on the same layer as at least one of the lower electrode and the upper electrode is provided around the display region on the interlayer insulating film. The display device according to claim 1,
The display device, wherein the wiring is a connection wiring that connects wirings connected to the thin film transistor. A thin film transistor provided for each pixel constituting a display region on the substrate, an interlayer insulating film provided so as to cover the thin film transistor, and an organic layer and an upper electrode laminated in this order on a lower electrode connected to the thin film transistor An organic EL element provided in each pixel on the interlayer insulating film in a state in which the lower electrode is insulated, and an auxiliary provided between the pixels on the interlayer insulating film in a state connected to the upper electrode insulated from the lower electrode. A display device having an electrode and
A display device, wherein a wiring formed in the same layer as the auxiliary electrode is provided around the display region on the interlayer insulating film. The display device according to claim 3,
The display device, wherein the wiring is a connection wiring that connects wirings connected to the thin film transistor.

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