JP2004343138A - Process for fabricating compound semiconductor light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a process for fabricating a chip in which wire bonding is required only once, alignment is facilitated in packaging, and man-hour is reduced. <P>SOLUTION: In the process for fabricating a compound semiconductor light emitting element by forming an n-type semiconductor thin film layer 13, an active layer and a p-type semiconductor thin film layer 17, in layers, on one side of a substrate 11 and providing one electrode 32 on the upper surface of the p-type semiconductor thin film layer 17 and the other electrode 33a on the other side of the substrate 11, a vertical hole 20 reaching the n-type semiconductor thin film layer 13 being connected with the electrode 33a is made from the other side of the substrate 11 by irradiating a short wave laser beam having a wavelength of 500 nm or less, the electrode 33a provided on the other side of the substrate 11 is connected electrically with the n-type semiconductor thin film layer 13 through a conductive material 30 filling the vertical hole 20, the electrode 32 is connected with a first lead electrode 101 on a base mount 100 and the electrode 33a is connected with a second lead electrode 103 by a bonding wire 104. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a compound semiconductor light emitting device such as a blue light emitting diode and a blue laser diode and a method of manufacturing the same, and more particularly to a method of manufacturing a light emitting device including a nitride compound semiconductor epitaxially grown on an insulating substrate such as sapphire.

Epitaxial growth of a nitride-based compound semiconductor used for a blue light-emitting diode, a blue laser diode, or the like is generally performed on a sapphire (Al ₂ O ₃ ) substrate lattice-matched to the nitride-based compound semiconductor. The basic structure of a blue semiconductor device using a nitride compound semiconductor is, for example, a structure as shown in FIG. That is, a buffer layer 220 made of, for example, Al _x Ga ₁ -xN (0 ≦ X ≦ 1) is provided on the sapphire substrate 210, and the buffer layer 220 is doped with, for example, silicon (Si). An n-type contact layer 230 made of n-type GaN is formed. Then, on the n-type contact layer 230, for example, an n-type cladding layer 240 made of n-type Al _x Ga ₁ -xN (0 ≦ X ≦ 1) doped with silicon (Si) is formed. On this n-type cladding layer 240, for _{example, Al a In b Ga 1-} ab N (0 ≦ a, 0 ≦ b, a + b ≦ 1) active layer 250 made of multiple quantum well composition is formed. On this active layer 250, for example, a p-type clad layer 260 made of p-type Al _Y Ga _1-Y N (0 ≦ Y ≦ 1) doped with magnesium (Mg) is formed. On p. 260, for example, a p-type contact layer 270 made of p-type GaN doped with magnesium (Mg) is formed.

  A p-type electrode 280 is provided on the surface of the p-type contact layer 270, and an n-type electrode 290 is provided on the surface of the n-type contact layer 230 where a part of the stacked semiconductor layers is exposed by etching.

  Since the above-mentioned sapphire substrate is an insulator, an electrode is provided on the back surface of the substrate and a bipolar electrode is formed with another electrode provided on the surface of the semiconductor layer as in a normal light emitting device including a conductive substrate. , Can not be energized.

  Therefore, as described above, a part of the semiconductor layer is removed from the surface of the semiconductor layer, one conductive semiconductor layer is exposed, and an electrode of the other pole is formed on the remaining semiconductor layer surface. Both electrodes were provided on the surface side, and electricity was supplied to function as a device.

  In this structure, since the bipolar electrodes are on the same surface side, the area of the light-shielded portion is large, and the light extraction efficiency is poor. Then, there is a problem that two wire bondings are absolutely necessary because the bipolar electrodes are present on the same surface side. Further, in the case of face-down mounting, the bipolar electrodes of the chip must exactly match the positions of the electrodes of the base facing the chip, and there has been a problem that this alignment is very precise and difficult.

  A semiconductor light emitting device in which a contact hole is formed in a sapphire substrate to make contact with a semiconductor layer from the sapphire substrate side is disclosed in Patent Document 1. In this semiconductor light emitting device, a step is formed on the back surface side of the sapphire substrate, and a contact hole for exposing the semiconductor layer is provided by a reactive ion etching in a thin portion of the substrate formed thin by the step.

Indeed, in the semiconductor light emitting device described in the above specification, a contact with the semiconductor layer can be made from the sapphire substrate side, and electrodes can be separately arranged on the substrate side and the semiconductor layer side.
JP-A-10-173235

  However, in this device, in order to form a contact hole by reactive ion etching, it is necessary to form a step in the substrate in advance, which complicates the process and easily breaks the substrate during etching. There was a problem.

  Therefore, an object of the present invention is to improve light extraction efficiency. Another object is to manufacture a chip that can be mounted with a simple wire bonding and can be easily aligned and that leads to a reduction in man-hours. Another object is to reduce the number of steps, reduce the occurrence of cracks in the substrate, and provide an element with a high yield.

  According to the first aspect of the present invention, a first conductive type semiconductor thin film layer, an active layer, and a second conductive type semiconductor thin film layer are formed on one surface of a substrate. A method of manufacturing a compound semiconductor light-emitting device in which one electrode is provided on the upper surface of a semiconductor thin film layer and the other electrode is provided on the other surface of the substrate, wherein the first conductive type is connected to the other electrode from the other surface of the substrate. A vertical hole having a depth reaching the semiconductor thin film layer is provided by irradiating a short-wavelength laser having a wavelength of 500 nm or less, and an electrode provided on the other surface of the substrate and the first semiconductor thin film layer are formed in the vertical hole. Electrically connected via a conductive material, the one electrode is connected to a first lead electrode of a base, and the other electrode is connected to a second lead electrode by a wire bond wire. .

  According to a second aspect of the present invention, in addition to the configuration of the first aspect, a groove is formed by laser processing when dividing a wafer on which a plurality of the compound semiconductor light emitting elements are formed into individual light emitting elements. Along the way, the wafer is divided into individual light emitting elements.

  According to a third aspect of the present invention, in addition to the configuration of the first aspect, after the groove processing, the semiconductor layer damaged by the processing is removed by dry etching using a chlorine-based or fluorine-based gas. And

  According to a fourth aspect of the present invention, in addition to the configuration of the second aspect, when the groove processing is performed by laser processing, the processing is performed on the insulating substrate side, the semiconductor layer laminated side, or the insulating substrate side and the semiconductor layer laminated side. It is characterized by performing from both.

  As described above, according to the present invention, highly efficient light extraction is possible. Further, the electrostatic breakdown voltage of the element can be improved.

  Then, the alignment with the base only needs to be performed using only the second conductivity type semiconductor layer, and easy and accurate mounting can be performed.

  The present invention will be described in more detail with reference to the accompanying drawings.

  First, a first embodiment will be described with reference to FIG. 1 and FIG. FIG. 1 is a bottom view of one compound semiconductor light emitting device 1 according to the first embodiment of the present invention as viewed from the back surface side, and FIG. 2 is a cross-sectional view taken along II-II of FIG. FIG. 2 is a cross-sectional view of the compound semiconductor light emitting device 1 obtained.

  As shown in FIG. 2, the element 1 is characterized in that it has a hole 2 penetrating in the vertical direction. The through-hole 2 is formed in a columnar or conical shape with a diameter of 30 μm to 100 μm by laser processing for irradiating a laser beam. In addition, the through-hole 2 may be formed in the shape of a middle hollow with a large diameter at the front and back openings and a hollow central portion.

  In this embodiment, the hole 2 having a diameter of 50 μm is formed by laser processing. It is preferable that the laser is irradiated from the side where the semiconductor layers are stacked. The hole 2 is used as a vertical electric path (electric path) of the element. In order to form an electric path, the hole 2 is provided with a conductive material 3 so as to fill the inside thereof. As the conductive material 3, for example, a conductive paste is filled by a press-fitting method.

  Further, the conductive material 3 can be formed by plating or the like. The plating may be performed, for example, by evaporating nickel (Ni) as a seed on the surface of the hole 2 and then performing copper (Cu) plating to form the conductive material 3 on the inner wall surface of the hole 2.

  Furthermore, when filling the inside, in addition to the conductive paste, molten solder or metal microballs can be used.

  The element 1 includes a semiconductor layer 4 in which two or more semiconductor thin films are stacked on a substrate 11. The substrate 11 is constituted by an insulating substrate. The substrate 11 is composed of, for example, a sapphire substrate. In the element 1, a semiconductor layer 4 in which a first conductive semiconductor layer and a second conductive semiconductor layer are stacked on a substrate 11 via a buffer layer 12 is sequentially formed.

The buffer layer 12 and the semiconductor layer 4 are formed, for example, by the MOCVD method. For example, as the buffer layer 12, an Al _X Ga _{1 -X} N (0 ≦ X ≦ 1) layer having a thickness of about 300 nm is formed on the substrate 11. It is formed. Then, an n-type contact layer 13 made of, for example, an n-type GaN layer doped with silicon (Si) and having a thickness of about 3 μm is formed on the buffer layer 12. Then, on the n-type contact layer 13, for example, an n-type clad layer 14 made of n-type Al _x Ga ₁ -xN (0 ≦ x ≦ 1) doped with silicon (Si) and having a thickness of about 300 nm is formed. Is done. On this n-type cladding layer 14, for _{example, Al a In b Ga 1-} ab N (0 ≦ a, 0 ≦ b, a + b ≦ 1) active layer 15 of multiple quantum well composition is formed. On this active layer 15, for example, a p-type cladding layer 16 made of p-type Al _Y Ga ₁ -YN (0 ≦ Y ≦ 1) doped with magnesium (Mg) and having a thickness of about 300 nm is formed. On this p-type cladding layer 16, for example, a p-type contact layer 17 made of p-type GaN doped with magnesium (Mg) and having a thickness of about 500 nm is formed.

  Note that the semiconductor layer 4 can be directly formed on the substrate 11 without the buffer layer 12 interposed therebetween.

  An exposed region where a part of the n-type contact layer 13 (first conductive type semiconductor layer) has a semiconductor layer (including the second conductive type semiconductor layer) laminated thereon removed and is partially exposed. It has ten. The removal of the semiconductor layer 4 is performed by a process including dry etching. The through-hole 2 is arranged in the exposed region 10.

  In order to suppress damage to the semiconductor layer 4, it is desirable to perform laser irradiation from the same side of the substrate 11 as the surface on which the semiconductor layer 4 is formed. The shape of the hole 2 is set to a columnar shape having the same upper and lower diameters, but a slight taper is formed. Further, after the semiconductor layer 4 is irradiated with the laser, the laser may be irradiated from the side of the substrate 11 to form the through-hole 2. A laser having a wavelength at which light absorption occurs in the substrate 11 is selected.

  Here, since a sapphire substrate is used as the substrate 11, a short-wavelength laser having a wavelength of 500 nm or less is used. In this embodiment, an ultraviolet laser having a wavelength of 355 nm using the third harmonic of a YAG laser which is a solid-state laser is used. With a repetition frequency (f) of 3 kHz, a scanning speed of 0.5 mm / sec, a defocus (DF) of -80 μm, and a power of 1.85 W, a laser is applied for about one second from the semiconductor layer 4 side with the center position of the n-electrode as the center position of the hole 2. Irradiated to form a 50 μm hole. The diameter of the hole 2 can be formed between 30 μm and 100 μm by controlling the defocus (DF) and the irradiation time.

  It should be noted that, besides the above, a YAG laser fundamental wave of 1060 nm, a second harmonic wave of 533 nm, and a fourth harmonic wave of 266 nm can also be used.

  The hole 2 formed as described above is filled with the conductive material 3. Before the hole 2 is filled with the conductive material 3, the damaged layer given to the semiconductor layer 4 by laser processing may be removed by dry etching. As an etching gas used for removing the damage given to the semiconductor layer by dry etching, a chlorine-based gas or a fluorine-based gas can be used.

  The filling of the conductive material 3 is performed, for example, as follows. First, the semiconductor layer 4 side is turned downward, and a mask of an adhesive sheet obtained by hollowing out a region of a desired size filled with a conductive material is attached to the substrate 11 side. A conductive material such as a conductive paste is applied around the hollowed portion of the mask. The conductive material is pressed with a spatula or the like and pressed into the hole 2. When the conductive material 3 is pressed into the hole 2 and the hole 2 is filled with the conductive material 3, the pressure-sensitive adhesive sheet serving as a mask is peeled off, and a heat treatment is performed in a curing furnace at a temperature of 200 ° C. for 30 minutes to obtain a conductive material. The conductive material 3 is cured. After that, the excess conductive material is removed by the stripping liquid, and the operation of filling the hole 2 with the conductive material 3 is completed.

  Subsequently, if necessary, the back surface of the substrate 11 is back-wrapped, and the thickness of the substrate 11 of about 350 μm to 430 μm is reduced to about 95 μm.

  An electrode 31 for forming an ohmic contact in the exposed region 10 is formed on the n-type contact layer 13. The n-type ohmic electrode 31 in the exposed region 10 is arranged so as to be in contact with the upper edge of the through hole 2. The n-type ohmic electrode 31 formed on the n-type contact layer 13 is electrically connected to the conductive material 3. If the conductive material 3 formed in the through hole 2 is a material that can make ohmic contact with the n-type contact layer 13, the electrode 31 can also serve as the conductive material 3 arranged in the through hole 2. That is, when the conductive material 3 is formed in the through hole 2 and the material can form an ohmic contact with the n-type contact layer 13, the formation of the electrode 31 can be omitted. The conductive material 3 formed in the through hole 2 can also serve as the electrode 31. Further, the metal material used for forming the electrode 31 can also be used as the conductive material 3 of the through hole 2.

  The p-type contact layer 17 has an electrode 32 for making an ohmic contact therewith. The electrode 32 is formed so as to cover the entire surface of the p-type contact layer 17. The electrode 32 is a reflective electrode that reflects light emitted from the element 1.

  Further, the electrode 32 is formed so as to cover only a part of the p-type contact layer 17, and the light emitted from the element 1 is reflected at this part. The wavelength of light emitted from the element 1 formed on the side opposite to the mold contact layer 17 can be reflected by a member that reflects the light. When light is extracted from the electrode 32 side, the electrode 32 may be a light transmissive electrode that transmits light emitted from the element 1.

  As shown in FIGS. 1 and 2, an electrode 33 is formed on a surface (back surface) of the substrate 11 opposite to the surface on which the semiconductor layer 4 is formed. This electrode 33 is electrically connected to the conductive material 3 arranged in the through hole 2. The electrode 33 can also serve as an electrode material arranged in the through hole 2. This electrode 33 also serves as a pad electrode 34 having a predetermined thickness. In this embodiment, as shown in FIG. 1, the pad electrode 34 is arranged so as to cover the through hole 2, but the pad electrode 34 may be arranged at a position apart from the through hole 2. The pad electrode 34 is used for wire bond connection. The pad electrode 34 is arranged at a position overlapping the exposed region 10 in a plane. For example, like the one shown in FIG. 19 described later, the pad electrode 34 is arranged so as to avoid a position overlapping the exposed region 10 in a plane. You can also.

  After a plurality of such devices 1 are formed on a substrate having a diameter of about 2 inches as a wafer (not shown), the wafer is separated into individual eyes by separating the wafer into bases. When dividing the wafer, a groove for element isolation can be formed by using the laser beam used for forming the through hole 2. The separation groove is opposite to the surface of the substrate 11 on which the semiconductor layer 4 is formed, the surface of the substrate 11 on which the semiconductor layer 4 is formed, or the surface opposite to the surface of the substrate 11 on which the semiconductor layer 4 is formed. It can be formed on both the side surface and the surface of the substrate 11 on which the semiconductor layer 4 is formed.

  When the separation groove is formed on the surface of the substrate 11 opposite to the side on which the semiconductor layer 4 is formed, the depth of the separation groove is set to the depth from the back side of the substrate 11 to just before the active layer 15. In this embodiment, the length is set to be slightly shorter than the thickness of the substrate 11 so that a part of the substrate 11 remains. Even when a groove is formed on the surface of the substrate 11 on which the semiconductor layer 4 is formed, the depth of the separation groove is preferably set to 20 to 70% of the thickness of the substrate 11. Further, it is desirable to remove a damaged layer generated by laser processing by dry etching. As an etching gas used for the dry etching, a chlorine-based gas or a fluorine-based gas is suitable.

  FIG. 3 shows a light emitting device including the light emitting element 1. The light emitting element 1 is turned upside down so that the substrate 11 is located above, and is arranged on the first lead electrode 100. The electrode 32 of the element 1 is electrically connected to the first lead electrode 100 by the conductive material 101. It is only necessary to pay attention so that the first lead electrode 100 is bonded directly above the conductive material 101, and fine positioning is not required. In order to prevent the conductive material 101 from coming into contact with the electrode 31 and the n-type contact layer 13, it is desirable to cover them with an insulating material 102. It is desirable that the insulating material 102 for this coating is disposed on the element 1 in advance so as to cover the exposed region 10. The pad electrode 34 on the substrate 11 and the second lead electrode 103 are electrically connected by a wire bond line such as a gold wire 104.

  When a predetermined voltage or current is supplied between the first and second lead electrodes 100 and 103, the first lead electrode 100, the conductive material 101, the electrode 32, the semiconductor layer 4, the electrode 31, the conductive material 3, and the electrode 33 ( 34), a path is formed between the wire bond line 104 and the second lead electrode 103, and light is extracted from the active layer 15. Here, when the light emitting element 1 is used for an LED display, it is desirable to mold the element 1 and the electrodes 100 and 103 with resin in order to increase the light extraction efficiency.

  Compared to the conventional example in which both electrodes are arranged on one side of the substrate, the electrodes can be arranged on one side and the other side of the substrate 11, respectively, so that the light shielding by the electrodes can be suppressed and the light extraction efficiency can be increased. In addition, only one wire bond is required, and assembling workability can be improved. Then, the alignment with the base only needs to be performed using only the p-type electrode 32, and easy and accurate mounting can be performed.

  Next, a second embodiment will be described with reference to FIGS. 4 and 5. FIG. FIG. 4 is a bottom view of the element 1 and corresponds to FIG. FIG. 5 is a sectional view taken along the line VV of FIG. 4, and corresponds to FIG. The same components as those of the first embodiment shown in FIGS. 1 and 2 are denoted by the same reference numerals, and the description thereof is omitted here to avoid duplication of description, and the description will focus on differences. I do.

  The element 1 has a vertical hole 20 which reaches the n-type contact layer 13 extending in the vertical direction and does not penetrate the n-type contact layer 13. The vertical hole 20 is formed in a cylindrical shape or a conical shape with a diameter of 30 μm to 100 μm by laser processing for irradiating a laser beam. Note that the vertical hole 20 may be formed in a hollow shape with a large diameter at the opening and at the bottom, and a recess at the center.

  In this embodiment, a vertical hole 20 having a diameter of 50 μm is formed by laser processing. The vertical hole 20 is used as a vertical electric path (electric path) of the element. In order to form an electrical path, a conductive material 30 such as a metal thin film is formed in the vertical hole 20 so as to cover the inner surface thereof. The conductive material 30 is preferably formed by plating that is easy to form in detail, but when the outer diameter of the hole is large or when a tapered surface is formed, the conductive material 30 can also be formed by vapor deposition of a metal. . The inside of the vertical hole 20 can be filled with a conductive material such as a metal material.

  When the conductive material 30 is formed by plating, for example, an n-type contact layer 13 of titanium (Ti), platinum (Pt), gold (Au) or the like having a thickness of about 20 nm is formed on the inner wall of the vertical hole 20 and an ohmic contact. A laminated film is formed by vapor deposition, and then copper (Cu) is plated to form a conductive material 30 made of a plating layer on the inner wall surface of the vertical hole 20. The conductive material 30 may be formed only of a material capable of making ohmic contact with the n-type contact layer 13, or a film capable of making ohmic contact with the n-type contact layer 13 may be formed by a vertical hole 20. The conductive material 30 may be formed by providing plating, a conductive paste, or the like thereon.

  When metal is filled, conductive paste, erosion solder, metal microballs, or the like can be used.

  In the first embodiment, the n-type contact layer 13 has a portion of the semiconductor layer 4 located thereon removed and a portion thereof exposed to form an exposed region. However, in this embodiment, the semiconductor layer including the n-type contact layer 13 and the p-type contact layer 17 located thereon is formed in the same plane shape in a region that makes contact with the n-type contact layer 13. No conventional exposed area is formed.

  The vertical hole 20 is formed by irradiating a laser beam and performing a boring process. The laser irradiation is performed from the surface (back surface) of the substrate 11 opposite to the surface (front surface) on which the semiconductor layer 4 is formed, in order to suppress damage to the semiconductor layer 4. The shape of the vertical hole 20 is set to a columnar shape having the same upper and lower diameters, but a slight taper is formed. In this embodiment, before the laser irradiation, for example, the back surface of the substrate 11 is back-wrapped, and the thickness of the substrate 11 of about 350 μm to 430 μm is reduced to about 45 μm. Then, a mortar-shaped vertical hole 20 having an opening of 50 μm in diameter and a bottom of 40 μm was formed.

  As in the first embodiment, a laser having a wavelength at which light absorption occurs in the substrate 11 is selected. Here, since a sapphire substrate is used as the substrate 11, a short-wavelength laser having a wavelength of 500 nm or less is used. In the second embodiment, similarly to the first embodiment, an ultraviolet laser having a wavelength of 355 nm using a third harmonic of a YAG laser which is a solid-state laser is used. In addition, a fundamental wave of a YAG laser, 1060 nm, a second harmonic 533 nm, and a fourth harmonic 266 nm can also be used.

  A laser beam having a Gaussian distribution beam profile as its intensity distribution is used. The vertical hole 20 is formed in a range where the tip reaches the inside of the n-type contact layer 13. Furthermore, the vertical hole 20 is formed in a range where the tip does not reach the cladding layer 14.

  As described above, as the conductive material 30 connected to the n-type contact layer 13, a metal thin film suitable for making ohmic contact with the n-type contact layer 13 is used. The p-type contact layer 17 has an electrode 32 for making an ohmic contact therewith. The electrode 32 is formed so as to cover the entire surface of the p-type contact layer 17. The electrode 32 can be formed so as to cover only a part of the p-type contact layer 17. The electrode 32 is a reflective electrode that reflects light emitted from the element 1.

  When light is extracted from the electrode 32 side, the electrode 32 may be a light transmissive electrode that transmits light emitted from the element 1. The electrode 32 may be an electrode having a light-transmitting structure by forming a light-shielding conductive material in a comb shape or a mesh shape in addition to the light-transmitting itself. In the second embodiment, since the semiconductor layer 4 on the n-type electrode is not removed, the light emission area can be increased when light is extracted from the electrode 12 side.

  Further, when light is not extracted from the side of the electrode 32, the electrode reflects the partially transmitted light to the wavelength of light emitted from the element formed on the side opposite to the p-type contact layer 17 with respect to the electrode 32. It can also be reflected by a member that does.

  As shown in FIGS. 4 and 5, an electrode 33a is formed on the surface of the substrate 11 opposite to the surface on which the semiconductor layer 4 is formed. The electrode 33a is electrically connected to the conductive material 30a arranged in the vertical hole 20. This electrode 33a can also serve as the conductive material 30 arranged in the vertical hole 20. The electrode 33a also serves as a pad electrode 34a having a predetermined thickness. In the second embodiment, as shown in FIG. 4, the pad electrode 34a is arranged so as to close the vertical hole 20 to reduce the light shielding area. Similarly, the pad electrode 34a can be arranged at a position apart from the vertical hole 20. The area of the pad electrode 34 a is set to be larger than the area of the entrance of the vertical hole 20. The pad electrode 34a is used for wire bond connection.

  As shown in FIG. 4, in the second embodiment, the pad electrode 34a and the vertical hole 20 are arranged so as to be located at one corner of the substrate 11, but FIG. 6 and FIG. As shown, it can also be arranged near the center of one side of the substrate 11 or in the center of the substrate when viewed in plan. The vertical hole 20 is arranged inside the outer edge 11 a while keeping a certain distance from the outer edge 11 a of the substrate 11.

  As described above, a plurality of such elements 1 are formed on a substrate having a diameter of about 2 inches as a wafer (not shown), and then the wafer is separated into bases, thereby forming individual elements. It is said. When dividing the wafer, a groove for element isolation can be formed by using the laser beam used for forming the vertical hole 20. The separation groove is opposite to the surface of the substrate 11 on which the semiconductor layer 4 is formed, the surface of the substrate 11 on which the semiconductor layer 4 is formed, or the surface opposite to the surface of the substrate 11 on which the semiconductor layer 4 is formed. It can be formed on both the side surface and the surface of the substrate 11 on which the semiconductor layer 4 is formed. When the separation groove is formed on the surface of the substrate 11 opposite to the side on which the semiconductor layer 4 is formed, the depth of the separation groove is set to the depth from the back side of the substrate 11 to just before the active layer 15. In this embodiment, the length is set to be slightly shorter than the thickness of the substrate 11 so that a part of the substrate 11 remains. Even when a groove is formed on the surface of the substrate 11 on which the semiconductor layer 4 is formed, the depth of the separation groove is preferably set to 20 to 70% of the thickness of the substrate 11. Further, it is desirable to remove a damaged layer generated by laser processing by dry etching.

  In the case of a structure in which a long groove is formed on the back surface of the substrate 11 in the vertical and horizontal directions of the wafer in the same manner as the separation groove, and the n-type contact layer 13 is contacted through the long groove. However, when the wafer is divided, there is a high possibility that the shape of the device is abnormal due to the start of the device separation from the long groove.

  However, as in the above embodiment, since the vertical hole 20 having a different form from the element isolation groove is formed, an abnormality in the element shape caused by element isolation starting from the vertical hole 20 is prevented beforehand. be able to.

  FIG. 8 shows a light emitting device including the light emitting element 1. The light-emitting element 1 is turned upside down so that the substrate 11 is located above, and is disposed on the first lead electrode 100 in order to use the substrate 11 as a light extraction surface. The electrode 32 of the element 1 is electrically connected to the first lead electrode 100 by the conductive material 101. The pad electrode 34a on the substrate 11 and the second lead electrode 103 are electrically connected by a wire bond line such as a gold wire 104.

  When a predetermined voltage or current is supplied between the second lead electrodes 100 and 103, the first lead electrode 100, conductive material 101, electrode 32, semiconductor layer 4, conductive material 30a, electrode 33a (34a), wire bond wire 104, a path of the second lead electrode 103 is formed, and light is extracted from the active layer 15. Therefore, the structure in which the number of places where the electric field is concentrated on the current path is small, and the electrostatic breakdown voltage can be increased.

  Light output from the active layer 15 passes through the substrate 11 and is extracted out of the element 1. Here, when the light emitting element 1 is used for an LED display, it is desirable to mold the element 1 and the electrodes 100 and 103 with resin in order to increase the light extraction efficiency.

  Compared to the conventional example in which both electrodes are arranged on one side of the substrate, the electrodes can be arranged on one side and the other side of the substrate, respectively, so that light shielding by the electrodes can be suppressed and the light extraction efficiency can be increased. In addition, only one wire bond is required, and assembling workability can be improved.

  Next, a third embodiment will be described with reference to FIGS. 9 and 10. FIG. FIG. 9 is a bottom view of the element 1 and corresponds to FIG. FIG. 10 is a sectional view taken along the line XX of FIG. 9 and corresponds to FIG. The same components as those in the above-described first and second embodiments are denoted by the same reference numerals, description thereof will be omitted, and differences will be mainly described.

  The third embodiment is characterized in that a groove 35 and a conductive material 36 disposed therein are added to the second embodiment. That is, a groove 35 that does not penetrate the semiconductor element 1 is added to the back surface of the substrate 11. The tip of the groove 35 is in contact with the n-type contact layer 13.

  The groove 35 is formed by laser irradiation similarly to the vertical hole 20. The groove 35 is connected to the vertical hole 20 and connected to each other. The groove 35 is formed inside the outer edge 11a while keeping a certain distance from the outer edge 11a of the substrate 11 so as not to be exposed from the outer edge 11a of the substrate 11. The groove 35 is formed in a flat rectangular shape along the outer shape of the substrate 11. Since the groove 35 does not intersect with the outer edge of the substrate 11 and the substrate has a frame-like shape outside the groove 35, the adverse effect of the groove 35 on element isolation can be suppressed.

  A conductive material 36 is formed on the inner surface of the groove 35. The conductive material 36 is formed simultaneously with the same material as the conductive material 30 for forming the electric path formed in the vertical hole 20, but may be formed separately from the same material. The conductive material 36 is in ohmic contact with the n-type contact layer 13 and is electrically connected. Therefore, compared to the second embodiment, it is possible to secure a wider electrical connection area between the n-type contact layer 13 and the electrode 33a. The conductive material 36 can be made translucent to transmit the light of the active layer 15 by forming a very thin metal that makes ohmic contact with the n-type contact layer 13. The conductive material 30 can also be made translucent to transmit the light of the active layer 15 by forming a very thin metal that makes ohmic contact with the n-type contact layer 13. By making all or part of the conductive material 36 or the conductive material 30 translucent, the light extraction efficiency can be remarkably increased as compared with the case of the light shielding property. This light emitting element is used by being incorporated in a light emitting device as shown in FIG. 8, as in the previous embodiment.

  Next, a fourth embodiment will be described with reference to FIGS. 11 and 12. FIG. FIG. 11 is a bottom view of the element 1 and corresponds to FIG. FIG. 12 is a sectional view taken along the line XX of FIG. 11 and corresponds to FIG. The same components as those in the embodiment shown in FIGS. 1 and 2 are denoted by the same reference numerals, and the description thereof will be omitted.

  The feature is that a groove 35 and an electrode material 36 arranged therein are added to the first embodiment. That is, a groove 35 that does not penetrate the semiconductor element 1 is added to the back surface of the substrate 11. The tip of the groove 35 is in contact with the n-type contact layer 13.

  The groove 35 is formed by irradiating a laser similarly to the through hole 2. The grooves 35 are connected to the through holes 2 and are connected to each other. The groove 35 is formed inside the outer edge 11 a of the substrate 11 so as not to be exposed from the outer edge 11 a of the substrate 11. In the through hole 2, a conductive material 3a is formed on the inner wall surface.

  Further, similarly to the third embodiment, the groove 35 is formed in a flat rectangular shape along the outer shape of the substrate 11. On the inner surface of the groove 35, an electrode material 36 which is the same as or similar to the conductive material 3a for forming an electric path formed on the inner wall surface of the through hole 2 is formed. The electrode material 36 is in ohmic contact with the n-type contact layer 13 and is electrically connected. Therefore, a larger electrical connection area between the n-type contact layer 13 and the electrode 33 can be secured than in the first embodiment.

  Next, a fifth embodiment will be described with reference to FIG. 13 and FIG. FIG. 13 is a bottom view of the element 1 and corresponds to FIG. FIG. 14 is a cross-sectional view taken along line XX of FIG. 13 and corresponds to FIG. The same components as those in the embodiment shown in FIGS. 1 and 2 are denoted by the same reference numerals, and the description thereof will be omitted.

  The first embodiment is characterized in that a vertical hole 37, an electrode material 38 disposed therein, and an electrode 39 for connecting the electrode material 38 on the back surface of the substrate 11 are added. That is, a plurality of vertical holes 37 not penetrating the semiconductor element 1 were additionally formed on the back surface of the substrate 11. The tip of the vertical hole 37 is in contact with the n-type contact layer 13. The vertical hole 37 is formed by laser irradiation similarly to the through hole 2. The vertical hole 37 is formed independently without being connected to the through hole 2. The vertical hole 37 is formed inside the outer edge 11 a of the substrate 11 so as not to protrude from the outer edge 11 a of the substrate 11. The vertical holes 37 are formed near three corners except the through hole 2 corresponding to the corners of the substrate 11. A conductive material 3b is formed on the inner wall of the through hole 2. On the inner surface of the vertical hole 37, an electrode material 38 that is the same as or similar to the conductive material 3b formed in the through hole 2 is formed. The electrode material 38 is in ohmic contact with the n-type contact layer 13 and is electrically connected.

  The electrode 39 connecting the conductive material 3b of the through hole 2 and the electrode material 38 of the vertical hole 37 is formed at the same time when the electrode 33 is formed. The electrode 39 connects the conductive material 3 b and the electrode material 38 to each other on the back side of the substrate 11. The electrode material 38 of the vertical hole 37 is also connected to each other by the material of the electrode 33 forming the pad electrode 34. Therefore, a larger electrical connection area between the n-type contact layer 13 and the electrode 33 can be ensured than in the first embodiment. Further, compared with the fourth embodiment, the area shielded by the electrodes in the vertical holes 37 can be reduced.

  In each of the above embodiments, when the electrode 32 is a light-transmitting thin electrode, or when an electrode for wire bonding is required, as shown in FIG. The pad electrode 40 may be formed separately.

  As shown in the sixth embodiment of FIGS. 15 and 16, an n-type contact layer 13 surrounds the p-type contact layer 17, the p-type cladding layer 16, the active layer 15, and the n-type cladding layer 14. A mesa is formed by etching until it is exposed, and an electrode is formed in the exposed n-type contact layer so as to be electrically connected to the through-hole 2, so that the current distribution inside the semiconductor is widened and a part of the pn junction surface is formed. Therefore, the concentration of current does not occur, so that the electrostatic withstand voltage can be improved.

  Next, a seventh embodiment will be described with reference to FIGS. 17 and 18. FIG. FIG. 17 is a bottom view of the element 1 and corresponds to FIG. FIG. 18 is a sectional view taken along the line XX of FIG. 17 and corresponds to FIG. The same components as those in the above embodiments are denoted by the same reference numerals, description thereof will be omitted, and the description will focus on differences.

  The second embodiment is characterized in that a vertical hole 37a, a conductive material 38a disposed therein, and an electrode 39a for connecting the conductive material 38a on the back surface of the substrate 11 are added. That is, a plurality of vertical holes 37a that do not penetrate the semiconductor element 1 are additionally formed on the back surface of the substrate 11. The tip of the vertical hole 37a is in contact with the n-type contact layer 13. The vertical hole 37a is formed by laser irradiation similarly to the vertical hole 20. The vertical hole 37a is formed independently without being connected to the vertical hole 20. The vertical hole 37 a is formed inside the outer edge 11 a of the substrate 11 so as not to protrude from the outer edge 11 a of the substrate 11. The vertical holes 37 a are formed close to three corners corresponding to the corners of the substrate 11 except for the vicinity of the vertical hole 20. On the inner surface of the vertical hole 37a, a conductive material 38b that is the same as or similar to the conductive material 31a formed in the vertical hole 20 is formed. The conductive material 38b is in ohmic contact with the n-type contact layer 13 and is electrically connected.

  The electrode 33a and the electrode 39a that connect the conductive material 31a of the vertical hole 20 and the conductive material 38b of the vertical hole 37a are formed by simultaneously forming both materials 33a and 39a. The conductive material 31a and the conductive material 38b are connected to each other on the back side of the substrate 11 by the electrode 39a. The conductive material 31a of the vertical hole 20 and the conductive material 38b of the vertical hole 37a are also connected to each other by the material of the electrode 33a forming the pad electrode 34. When the electrode 39a is translucent, it is preferable to remove the electrode 33a on the electrode 39a while leaving the pad electrode 34 in order to prevent light blocking by the electrode 33a. Therefore, compared to the second embodiment, a wider electrical connection area between the n-type contact layer 13 and the electrode 33a can be ensured. Further, compared with the third embodiment, the area shielded by the material in the vertical hole 20 can be reduced. This light-emitting element is also used by being incorporated in a light-emitting device in an arrangement such that the substrate 11 is on the upper side, as shown in FIG. 8, as in the previous embodiment.

  In each of the above embodiments, when the electrode 32 is a light transmissive electrode, or when an electrode for wire bonding is required, a predetermined thickness of the electrode 32 is formed on the electrode 32 as shown in FIG. The pad electrode 40 may be formed separately. In this way, the element 1 shown in FIG. 18 can be incorporated into the light emitting device shown in FIG. 8 in the form as it is, that is, the surface on which the semiconductor layer 4 of the substrate 11 is formed as a light extraction surface. Then, the electrode 33 on the substrate 11 side can be connected to the first lead electrode 100, and the electrode 40 on the opposite side can be wire-bonded to the second lead electrode 103.

  Next, an eighth embodiment will be described with reference to FIGS. 19 and 20. FIG. 19 is a bottom view of the element 1 and corresponds to FIG. FIG. 20 is a cross-sectional view taken along line XX of FIG. 19, and corresponds to FIG. The same components as those in the above embodiments are denoted by the same reference numerals, description thereof will be omitted, and the description will focus on differences.

  The second embodiment is characterized in that the cross-sectional shape of the vertical hole 20 is tapered in the depth direction, and that the pad electrode 34b connected to the conductive material 31a is arranged apart from the vertical hole 20a. That is, the shape of the vertical hole 20a was changed from a cylindrical shape to a truncated cone shape. For example, such a vertical hole 20a is changed from a Gaussian distribution beam profile to a distribution having a form in which a peak portion thereof is cut (a beam profile of a shaped beam) during laser beam processing. Can be formed.

  Since the vertical hole 20a has the above-mentioned shape, it is easy to form a conductive material having a predetermined thickness on the inner surface of the vertical hole 20a when forming the conductive material 30a from the back side of the substrate 11 by vapor deposition, sputtering, or the like. . Further, the inclined surface of the vertical hole 20a can be used as a light reflecting surface. This light-emitting element is also used by being incorporated in a light-emitting device in such an arrangement that the substrate 11 is on the upper side as shown in FIG. 21, as in the previous embodiment.

  Although the vertical hole 20a is arranged at the center of the substrate and the pad electrode 34b is arranged adjacent to the center of the lateral side, the arrangement may be changed as shown in FIG. FIG. 3A shows an example in which the vertical hole 20a is arranged at the center of the substrate, and the pad electrode 34a is arranged at a corner of the substrate 11. FIG. 3B shows an example in which the vertical hole 20a is arranged at one corner of the substrate 11 in the diagonal direction, and the pad electrode 34b is arranged at the other corner of the substrate 11 in the diagonal direction. FIG. 3C shows an example in which the vertical hole 20 a is arranged adjacent to the center of one side of the substrate 11, and the pad electrode 34 b is arranged at one corner of the substrate 11. FIG. 4D shows an example in which the vertical holes 20a are arranged at both corners of the substrate 11 in the diagonal direction, and the pad electrodes 34b are arranged at one corner of another diagonal direction of the substrate 34a.

  This light-emitting element is also used by being incorporated in a light-emitting device in such an arrangement that the substrate 11 is on the upper side as shown in FIG. 21, as in the previous embodiment.

  The present invention is not limited to the above embodiment, and various changes can be made without departing from the spirit of the present invention. For example, the present invention can be applied to a case where a semiconductor substrate is used as the substrate 11 other than the insulating substrate.

  As described above, the compound semiconductor light emitting device of the present invention is suitable for a blue light emitting diode, a blue laser diode, and the like.

FIG. 2 is a bottom view of one compound semiconductor light emitting device 1 according to the first embodiment of the present invention as viewed from the back surface side. FIG. 2 is a sectional view of the compound semiconductor light emitting device 1 taken along a line II-II in FIG. 1 is a sectional view of a display having a compound semiconductor light emitting device according to a first embodiment of the present invention. FIG. 9 is a bottom view of one compound semiconductor light emitting device 1 according to a second embodiment of the present invention as viewed from the back surface side. FIG. 5 is a sectional view of the compound semiconductor light emitting device 1 taken along a line VV in FIG. It is a bottom view of an element showing a modification of a 2nd embodiment of the present invention. It is a bottom view of an element showing a modification of a 2nd embodiment of the present invention. It is a sectional view of a display which has a compound semiconductor light emitting element concerning a 2nd embodiment of the present invention. FIG. 11 is a bottom view of one compound semiconductor light emitting device 1 according to a third embodiment of the present invention as viewed from the back surface side. FIG. 10 is a sectional view of the compound semiconductor light emitting device 1 taken along a line XX in FIG. 9; FIG. 14 is a bottom view of one compound semiconductor light emitting device 1 according to a fourth embodiment of the present invention, as viewed from the back surface side. FIG. 12 is a cross-sectional view of the compound semiconductor light emitting device 1 taken along a line XX in FIG. FIG. 13 is a bottom view of one compound semiconductor light emitting device 1 according to a fifth embodiment of the present invention, as viewed from the back surface side. FIG. 14 is a sectional view of the compound semiconductor light emitting device 1 taken along a line XX in FIG. It is a top view of an element showing a modification of a 6th embodiment of the present invention. It is a top view of an element showing a modification of a 6th embodiment of the present invention. FIG. 15 is a bottom view of one compound semiconductor light emitting device 1 according to a seventh embodiment of the present invention, as viewed from the back surface side. FIG. 18 is a sectional view of the compound semiconductor light emitting device 1 taken along a line XX in FIG. 17; It is the bottom view which looked at one element from the back side of the compound semiconductor light emitting element 1 concerning an 8th embodiment of this invention. FIG. 20 is a cross-sectional view of the compound semiconductor light emitting device 1 taken along a line XX in FIG. It is a sectional view of a display which has a compound semiconductor light emitting element concerning an 8th embodiment of the present invention. It is a bottom view of an element showing a modification of an 8th embodiment of the present invention. It is a perspective view of the element of the conventional example.

Explanation of reference numerals

Reference Signs List 1 compound semiconductor element 2 through hole 3 conductive material 4 semiconductor layer 11 substrate 12 buffer layer 13 n-type contact layer 17 p-type contact layer 31 n-type ohmic electrode 32 electrode

Claims (4)

A first conductive type semiconductor thin film layer, an active layer, and a second conductive type semiconductor thin film layer are formed on one surface of a substrate, and one of the first conductive type semiconductor thin film layers is formed on the upper surface of the second conductive type semiconductor thin film layer. In a method of manufacturing a compound semiconductor light emitting device in which an electrode is provided on the other surface of a substrate, the depth reaching the first conductive type semiconductor thin film layer connected to the other electrode from the other surface of the substrate. Are provided by irradiating a short-wavelength laser having a wavelength of 500 nm or less, and the electrode provided on the other surface of the substrate is electrically connected to the first semiconductor thin film layer via a conductive material formed in the vertical hole. A method for manufacturing a compound semiconductor light-emitting device, wherein the one electrode is connected to a first lead electrode of a base, and the other electrode is connected to a second lead electrode by a wire bond wire. When dividing the wafer on which the plurality of compound semiconductor light emitting elements are formed into individual light emitting elements, a groove is formed by laser processing, and the wafer is divided into individual light emitting elements along the groove. Item 2. The method for manufacturing a compound semiconductor light emitting device according to Item 1. 2. The method according to claim 1, wherein after the groove processing, the semiconductor layer damaged by the processing is removed by dry etching using a chlorine-based or fluorine-based gas. The compound semiconductor according to claim 2, wherein when the groove processing is performed by laser processing, the processing is performed from the insulating substrate side, the semiconductor layer lamination side, or both the insulating substrate side and the semiconductor layer lamination side. A method for manufacturing a light-emitting element.

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