JP2004248175A - Packet switching control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To decrease the range of replaced packets by decreasing variations in usage rates among transmission paths installed in parallel in a network system wherein node apparatuses are connected in a ring form by the parallel multiplex transmission paths and each node apparatus transmits packets to a prescribed multiplex transmission path to switch the packets. <P>SOLUTION: The node apparatus is provided with: a buffer monitor section for monitoring the number of packets temporarily stored in a buffer of each channel; a channel extract section for extracting an optional channel on the basis of the number of temporarily stored packets in each buffer; and a control information notice section for communicating buffer monitor information or channel extract information between the node apparatuses, and the node apparatus preferentially transmits packets to a channel of an adjacent node apparatus being a packet transmission destination wherein a buffer storing a smaller number of temporarily stored packets exists. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication network, and more particularly, to a switching system in a network system in which node devices are connected in a ring by a parallel multiplex transmission line, and the node devices exchange packets by sending out packets to predetermined channels of the parallel multiplex transmission line. Regarding control hand throw.
[0002]
[Prior art]
In recent years, as a large-capacity network system having a simple configuration, a network system in which node devices are connected in a ring shape by a parallel multiplex transmission path has been studied. For details of this network system, refer to Japanese Patent Application Laid-Open No. 8-172394, "Network System, Node Device, Transmission Control Method in Concentrator and Network System", and Japanese Patent Application Laid-Open No. 8-237306, "Network System, Node Device and Transmission Control Methods ”. Hereinafter, a network system described in JP-A-8-237306 "Network System, Node Device, and Transmission Control Method" will be described as an example.
[0003]
FIG. 9 is a configuration diagram of a node device in a conventional network, and shows an example in which terminals 951 to 958 are connected to a node device 900 via a sub-transmission line. Reference numerals 901 to 908 denote separation / insertion units serving as separation / insertion means, which detect the address of a packet input from a parallel multiplex transmission path and input the packet to a terminal and a buffer to be transmitted to a terminal via a sub transmission path. It has a function of separating a packet from a terminal and inserting a packet transmitted from a terminal into a packet stream input from a parallel multiplex transmission line. Reference numerals 911 to 918 denote buffers serving as buffer means, and have a function of temporarily storing packets output from the separation / insertion unit in a storage area corresponding to the output terminal of the switch 941. Reference numerals 921 to 928 and 931 to 938 denote parallel multiplex transmission lines for connecting nodes, for example, a plurality of spatially separated optical fiber transmission lines, or wavelength division on one optical fiber. And multiplexed wavelength multiplexing transmission paths. Reference numeral 941 denotes a switch, which is controlled by the switch control unit 942 and connects a packet input to the input terminals IN1 to IN8 to an arbitrary output terminal OUT1 to OUT8. When a plurality of optical fiber transmission lines are used for parallel multiplex transmission, the switch 941 performs exchange using a space switch or the like. In the case of using a wavelength division multiplex transmission line, although the configuration is slightly different from that of FIG. 9, a transmission unit including a plurality of variable wavelength laser diodes and a multiplexer is connected to the wavelength division multiplex transmission line, and A switch is configured between nodes by separating each wavelength by a demultiplexer in the receiving unit, and switching is performed by setting the transmission wavelength of the variable wavelength laser diode to an arbitrary wavelength of wavelengths λ1 to λ8. Reference numeral 942 denotes a switch control unit, which controls a switch according to, for example, the control pattern of FIG. Reference numeral 943 denotes a buffer control unit, which controls to read out a stored packet from the buffer when an input terminal of a switch connected to each buffer is connected to a desired output terminal.
[0004]
FIG. 10 is a diagram showing the internal configuration of the separation / insertion units 901 to 908, 1001 is a header detection unit for detecting a destination address from the header of a packet, 1002 and 1003 are gates for outputting or cutting off an input signal, and 1004 is a gate. A selector 1005 for outputting one of the two input signals is a FIFO (First In First Out) for temporarily storing a packet. In the demultiplexing / inserting units 901 to 908, the header of the packet input from the parallel multiplex transmission path is detected by the header detecting unit 1001, and the gates 1002 and 1003 are opened and closed according to the contents of the header. The address of the terminal connected to the separation / insertion unit is stored in advance in the header detection unit 1001. When the detected destination address matches the stored address, the gate 1003 is opened and the gate 1002 is closed. Output the packet only in the terminal direction. If the detected destination address does not match the stored address, the gate 1002 is opened and the gate 1003 is closed, the packet is output only to the selector 1004, and sent to the buffer through the selector 1004. On the other hand, the packet transmitted from the terminal is temporarily stored in the FIFO 1005, and when there is a gap in the packet stream input from the gate 1002 to the selector 1004, the packet is read from the FIFO 1005 and sent to the buffer through the selector 1004. .
[0005]
FIG. 11 shows the internal configuration of buffers 911 to 918, 1101 is a buffer memory composed of storage areas 1 to 8 corresponding to the output end of switch 941, 1102 is a header detector for detecting a destination address from the header of a packet, 1103 is an address counter for supplying a write address to the buffer memory 1101. In the buffers 911 and 918, the header of the packet input from the separation / insertion unit is detected by the header detection unit 1102, and the storage area for storing the packet is determined based on the content of the header. The address of a terminal connected to an adjacent downstream node is stored in advance in the header detection unit 1102, and when the detected destination matches the stored address, the transmission path to which the terminal is connected, that is, the switch 941 is connected. , And a write address is generated by the address counter 1103 and stored in the buffer memory 1101. When the detected destination address does not match the stored address, control is performed so that the packet is stored in an arbitrary storage area.
[0006]
FIG. 12 is a control pattern showing the input / output connection relation of the switch 941, and the switch input / output connection relation is changed by the control addresses Al to A8. The input terminals IN1 to IN8 correspond to the buffers 611 to 618, and the output terminals OUT1 to OUT8 (or the transmission wavelengths λ1 to λ8) correspond to the storage areas 1 to 8 of each buffer.
[0007]
FIG. 13 is a configuration example of a network system using the node devices shown in FIG. 9. Four node devices 1301 to 1304 are connected in a ring type by parallel multiplex transmission lines 1305 to 1308, and each node device has Eight terminals are connected via eight sub-transmission paths. Terminals 1311 to 1318 correspond to terminals 951 to 958, and similarly, 1321 to 1328, 1331 to 1338, and 1341 to 1348 also correspond to terminals 951 to 958.
[0008]
FIG. 14 is a diagram for explaining the communication principle of this network. Reference numerals 1401 to 1404 denote node devices, reference numerals 1405 to 1408 denote exchange switches corresponding to the switch 941, reference numerals 1409 to 1412 denote buffers corresponding to the buffers 911 to 918, and reference numeral 1421. -1436 is a terminal, and A, B, C, and D are parallel transmission lines forming a ring.
[0009]
First, the communication principle of this network will be described with reference to FIG. This network has a plurality of rings A, B, C and D, and the rings are interconnected by exchange switches 1405 to 1408. Each terminal is connected to one ring transmission line among the parallel transmission lines A, B, C, and D. Communication with a terminal connected to another ring is performed at least once by an arbitrary switching switch. The communication is performed by exchanging with another ring. Although the position where the exchange is performed is not specified, communication control is facilitated by switching to a destination transmission line at a node immediately before the destination node and switching to an arbitrary transmission line at another node. In order to simplify the node device in this network, the exchange switches 1405 to 1408 change the input / output connection relationship to a fixed cycle according to a specific cyclic pattern irrespective of the input signal, and temporarily store the input signal in the buffers 1409 to 1412. Exchange is performed by storing the packets and reading out the packets from the buffer when the input / output connection relation of the exchange switch becomes a desired relation.
[0010]
For example, when communication is performed from the terminal 1422 to the terminal 1432, the packet output from the terminal 1422 is accumulated in the buffer 1409 of the node 1401, and is read from the buffer when the input terminal IN2 of the switch 1405 is connected to, for example, the output terminal OUT2. The packet is output to the transmission path B, output to the buffer 1410 of the node 1402, and read from the buffer when the IN2 and OUT4 of the switch 1406 are connected. Sent.
[0011]
In this way, communication is performed by switching to an arbitrary ring transmission line in each node device.
[0012]
Next, details will be described with reference to FIGS. In the description, the parallel multiplex transmission line will be described as a plurality of spatially separated optical fiber transmission lines, and the switch will be described as a spatial switch.Wavelength multiplex transmission lines are also based on the above principle, and almost the same operation is performed. Be done. An operation example in the case where communication is performed from the terminal 1312 to the terminal 1335 will be described.
[0013]
Transmission data from the terminal 1312 is divided into fixed-length packets, and the destination address is described in the header of each packet and output. The output packet is input to the node device 1301 through the sub transmission path, and is temporarily stored in the FIFO 1005 of the separation / transmission unit 902. The stored packet is read from the FIFO 1005 when there is a gap in the packet stream input from the gate 1002 to the selector 1004, and sent to the buffer through the selector 1004.
[0014]
When detecting the header of the input packet, the header detecting unit 1102 of the buffer 912 specifies an arbitrary storage area because the detected destination address does not match the stored address. The write address counter 1103 receives the information, generates a write address, and writes the packet to the storage area of the buffer memory 1101. Here, it is assumed that the data is stored in the storage area 1.
[0015]
The buffer control unit 943 waits for reading of the packet until the input terminal IN2 of the switch 941 is connected to the output terminal OUT1, and reads the packet when connected.
[0016]
The switch control unit 942 sequentially supplies control addresses A1, A2, A3, A4, A5, A6, A7, and A8 to change the connection relationship of the switch 941 as shown in the table shown in FIG. For example, by supplying the data in one packet length cycle, the same pattern is controlled so as to be repeated in eight packet cycles. By notifying the information to the buffer control unit 943, the timing of reading from the buffer is controlled. Here, when the input terminal IN2 of the switch 941 is connected to the output terminal OUT1, a packet is read from the storage area 1 of the buffer 912, and the packet is output to the transmission line 931 through the switch 941.
[0017]
The packet transmitted through the transmission line 931 is input to the separation / transmission unit 901 of the node device 1302, and the header of the packet is detected by the header detection unit 1001. Since the detected destination address does not match the stored address, the gate 1002 is opened, the gate 1003 is closed, and the packet is output to the selector 1004. The packet output to the selector 1004 of the separation / insertion unit 901 passes through the selector 1004 and is input to the buffer 911.
[0018]
When detecting the header, the header detection unit 1102 specifies the storage area corresponding to the transmission path to which the terminal of the destination address is connected because the detected destination address matches the stored address. Here, since the destination terminal is connected to the transmission line 935, it is stored in the storage area 5.
[0019]
The buffer control unit 943 reads the packet from the storage area 5 of the buffer 911 when IN1 of the switch 941 is connected to OUT5, and outputs the packet to the transmission line 935 through the switch 941. Since the header of the packet input to the separating / transmitting unit 905 of the node device 1303 via the transmission path is detected by the header detecting unit 1001 and the detected destination address matches the stored address, the gate 1003 is opened and The gate 1002 is closed to output the packet only in the terminal direction. The packet output from the separation / insertion unit 905 toward the terminal is sent to the terminal 1335 through the sub-transmission path and received.
[0020]
Communication is performed in this manner.
[0021]
[Problems to be solved by the invention]
However, in the conventional example, there is a problem that the number of packets temporarily stored in the buffer corresponding to each channel becomes large in a node device in which there are many packets for which a transmission path is to be specified, and the order of the packets is greatly changed. Was.
[0022]
[Means for Solving the Problems]
A buffer monitoring unit that monitors the number of packets temporarily stored in the buffer of each channel, a priority determination unit that determines the priority for each channel based on the number of packets temporarily stored in each buffer, and a buffer monitoring unit between the node devices A control information notifying unit for communicating information or priority information is provided, and a packet is preferentially transmitted to a channel where a buffer having a small number of temporarily stored packets exists in a node device of an adjacent packet transmission destination.
[0023]
(Action)
The difference in the number of packets temporarily stored in the buffer corresponding to each transmission channel is reduced, and the permutation of the packet order is reduced.
[0024]
BEST MODE FOR CARRYING OUT THE INVENTION
[Embodiment 1]
FIG. 1 is a configuration diagram of a node device in the network of the first embodiment, and shows an example in which terminals 161 and 164 are connected to the node device 100 via a sub-transmission line. Reference numerals 111 to 114 denote separation / insertion units serving as separation / insertion means, which detect the address of a packet input from a parallel multiplex transmission path and input the packet to a terminal and a buffer to be received by a terminal via a sub transmission path. It has the function of separating packets into packets and inserting the packets transmitted from the terminal into the packet stream input from the parallel multiplex transmission path. Reference numerals 121 to 124 are buffers serving as buffer means, and have a function of temporarily storing a packet output from the separation / insertion unit in a storage area corresponding to an input terminal of the switch 151. Reference numerals 131 to 134 and 141 to 144 are parallel multiplex transmission lines for connecting nodes, for example, a plurality of spatially separated optical fiber transmission lines. Reference numeral 151 denotes a switch, which is controlled by the switch control unit 152 and connects a packet input to the input terminals IN1 to IN4 to an arbitrary output terminal OUT1 to OUT4. When a plurality of optical fiber transmission lines are used for the parallel multiplex transmission line, the switch 151 performs exchange using a space switch or the like. Reference numeral 152 denotes a switch control unit that controls a switch according to a predetermined control pattern. Reference numeral 153 denotes a buffer control unit, which controls to write a packet to a storage area corresponding to each channel according to the priority of each channel determined by the priority determination unit 156 (for example, at a proportional frequency). When the input terminal of the switch connected to the buffer is connected to the desired output terminal, control is performed so that the stored packet is read from the buffer. A buffer monitoring unit 154 monitors the number of packets temporarily stored in each of the buffers 121 to 124. Reference numeral 155 denotes a control information notification unit which transmits buffer monitoring information from the buffer monitoring unit 154 to the adjacent node and receives buffer monitoring information from the adjacent node. Reference numeral 156 denotes a priority determining unit which determines the priority of each channel based on the buffer monitoring information received from the adjacent node. Reference numeral 157 denotes a control information transmission path, which is used by the control information communication unit 155 to transmit and receive information to and from the control information communication unit of another node.
[0025]
FIG. 2 is a configuration example of a network system using the node devices shown in FIG. 1, in which four node devices 211 to 214 are connected in a ring type by parallel multiplex transmission lines A, B, C, and D, and each node device is connected. Four terminals are connected to the device via four sub-transmission paths. The terminals 221 to 224 correspond to the terminals 161 to 164, and similarly, 225 to 228, 229 to 232, and 233 to 236 similarly correspond to the terminals 161 to 164.
[0026]
FIG. 3 is a diagram showing the internal configuration of the separation / insertion units 111 to 114. Reference numeral 301 denotes a header detection unit that detects a destination address from the header of a packet. Reference numerals 302 and 303 denote gates for outputting or blocking an input signal. A selector 305 that outputs one of the two input signals, and 305 is a FIFO (First In First Out) for temporarily storing a packet. In the demultiplexing / inserting units 111 to 114, the header of the packet input from the parallel multiplex transmission path is detected by the header detecting unit 301, and the gates 302 and 303 are opened and closed according to the contents of the header. The address of the terminal connected to the separation / insertion unit is stored in advance in the header detection unit 301. When the detected destination address matches the stored address, the gate 303 is opened and the gate 302 is closed. Output the packet only in the terminal direction. If the detected destination address does not match the stored address, the gate 302 is opened and the gate 303 is closed, the packet is output only to the selector 304, and sent to the buffer through the selector 304. On the other hand, the packet transmitted from the terminal is temporarily stored in the FIFO 305, and is read out from the FIFO 305 when there is a gap in the packet stream input from the gate 302 to the selector 304, and is transmitted to the buffer through the selector 304. .
[0027]
FIG. 4 shows the internal configuration of the buffers 121 to 124; 401, a buffer memory composed of a storage area 1 and a storage area 4 corresponding to the output terminal of the switch 151; 402, a header detection unit for detecting a destination address from a packet header; An address counter 403 supplies a write address to the buffer memory 401. In the buffers 121 to 124, the header of the packet input from the separation / insertion unit is detected by the header detection unit 402, and the storage area for storing the packet is determined based on the content of the header. The address of a terminal connected to an adjacent downstream node (for example, in the case of the node 211 in FIG. 2, the addresses of the terminals 225 to 228 connected to the node 212) are stored in the header detection unit 402 in advance, and are detected. When the destination matches the stored address, the transmission path to which the terminal is connected, that is, the storage area corresponding to the output terminal of the switch 151 is designated, the write address is generated by the address counter 403 and the buffer memory 401 is generated. Remember. If the detected destination address does not match the stored address, the packet is stored in an arbitrary storage area, or the storage corresponding to each channel is performed according to the priority determined by the priority determining unit 156. Control is performed so that the packet is stored in the area.
[0028]
FIG. 5 is a control pattern showing the input / output connection relation of the switch 151, and the input / output connection relation of the switch is changed by the control addresses A1 and A4. The input terminals IN1 to IN4 correspond to the buffers 121 to 124, and the output terminals OUT1 to OUT4 correspond to the storage areas 1 to 4 of each buffer.
[0029]
First, the communication principle of this network will be described with reference to FIG. This network has a plurality of ring transmission lines A, B, C, and D, and the nodes are mutually connected by an exchange switch 151. Each terminal is connected to one ring transmission line of the parallel transmission lines A, B, C, and D. When communicating with a terminal connected to another ring, at least once, another terminal is switched by an arbitrary exchange switch. The communication is performed by exchanging the ring with the ring. Although the position where the exchange is performed is not specified, communication control is facilitated by switching to a destination transmission line at a node immediately before the destination node and switching to an arbitrary transmission line at another node. In order to simplify the node device in this network, the exchange switch 151 changes the connection relationship between input and output at a fixed period according to a specific cyclic pattern regardless of the input signal, and temporarily stores the input signal in the buffers 121 to 124. Thus, when the input / output connection relationship of the exchange switch becomes a desired relationship, the exchange is performed by reading the packet from the buffer.
[0030]
Next, a case where communication is performed from the terminal 221 to the terminal 232 under the network system of FIG. 2 will be described as an example, and the description will be given with reference to FIGS. 1, 3, 4, and 5. In FIG. 2, it is assumed that terminals 221 to 224, 225 to 228, 229, 232, and 233 to 236 are connected to transmission lines A, B, C, and D. The buffer monitoring unit 154 of each of the node devices 211 to 214 monitors the number of packets temporarily stored in the storage areas 1 to 4 of the buffers 121 to 124, and transmits monitoring information from the control information communication unit 155 to the control information transmission path. 157 to the adjacent upstream node devices 214 and 211 to 212. The transmission data from the terminal 221 is divided into fixed-length packets, and the destination address is described in the header of each packet and output. The output packet is input to the node device 211 through the sub transmission path, and is temporarily stored in the FIFO 305 of the separation / transmission unit 111. The stored packet is read out from the FIFO 305 when there is a gap in the packet stream input from the gate 302 to the selector 304, and sent to the buffer 121 through the selector 304.
[0031]
When the header detecting unit 402 of the buffer 121 detects the header of the input packet, the detected destination address does not match the stored address, so that the priority determining unit 156 determines based on the buffer monitoring information of the adjacent downstream node device 212. The storage area corresponding to each channel is specified according to the priority determined in (1). The write address counter 403 receives the information, generates a write address, and causes the packet to be written to the storage area of the buffer memory 401. Here, the priority of each channel is temporarily set to four levels from 0 (low) to 3 (high), the determined priority is 3-0-0-0, and the packet is stored in the storage area 1. (For example, if the priority is 0-3-2-0, packets are stored in the storage areas 2 and 3 at a ratio of “the number of packets to the storage area 2> the number of packets to the storage area 3”. Shall be sorted).
[0032]
The buffer control unit 153 waits for reading of the packet until the human-powered end IN1 of the switch 151 is connected to the output end OUT1, and reads out the packet when connected.
[0033]
The switch control unit 152 sequentially supplies control addresses A1, A2, A3, and A4 to change the connection relationship of the switch 151 as shown in the table shown in FIG. 5, and supplies the control address in, for example, one packet length cycle. Thus, control is performed so that the same pattern is repeated every four packets. By notifying the information to the buffer control unit 153, the timing of reading from the buffer is controlled. Here, when the input terminal IN1 of the switch 151 is connected to the output terminal OUT1, a packet is read from the storage area 1 of the buffer 121. As a result, the packet is output to the transmission path 141 (A) through the switch 151. The packet transmitted through the transmission path A is input to the separation / transmission unit 111 of the node device 212, and the header of the packet is detected by the header detection unit 301. Since the detected destination address does not match the stored address, the gate 302 is opened, the gate 303 is closed, and the packet is output to the selector 304. The packet output to the selector 304 of the separation / insertion unit 111 is input to the buffer 121 through the selector 304.
[0034]
When the header detection unit 402 detects the header, the detected destination address matches the stored address, and therefore, regardless of the channel extracted by the priority determination unit 156, the header detection unit 402 determines whether the destination address terminal is connected to the transmission path. Specify the corresponding storage area. Here, since the destination terminal is connected to the transmission line 144 (D), it is stored in the storage area 4.
[0035]
The buffer control unit 153 reads the packet from the storage area 4 of the buffer 121 when IN1 of the switch 151 is connected to OUT4, so that the packet is output to the transmission path 144 (D) through the switch 151. Since the header of the packet input to the separation / transmission unit 114 of the node device 213 through the transmission path is detected by the header detection unit 301 and the detected destination address matches the stored address, the gate 303 is opened and The gate 302 is closed to output the packet only in the terminal direction. The packet output from the separation / insertion unit 114 toward the terminal is sent to the terminal 232 through the sub-transmission path and received.
[0036]
[Embodiment 2]
FIG. 6 is a configuration diagram of the node device according to the second embodiment, and shows an example in which terminals 161 to 164 are connected to the node device 600 via sub-transmission lines. Reference numerals 111 to 114 denote separation / insertion units serving as separation / insertion means, which detect the address of a packet input from a parallel multiplex transmission path and input the packet to a terminal and a buffer to be received by a terminal via a sub transmission path. It has the function of separating packets into packets and inserting the packets transmitted from the terminal into the packet stream input from the parallel multiplex transmission path. Reference numerals 121 to 124 are buffers serving as buffer means, and have a function of temporarily storing a packet output from the separation / insertion unit in a storage area corresponding to an input terminal of the switch 151. Reference numerals 131 to 134 and 141 to 144 are parallel multiplex transmission lines for connecting nodes, for example, a plurality of spatially separated optical fiber transmission lines. Reference numeral 151 denotes a switch, which is controlled by the switch control unit 152 and connects a packet input to the input terminals IN1 to IN4 to an arbitrary output terminal OUT1 to OUT4. When a plurality of optical fiber transmission lines are used for the parallel multiplex transmission line, the switch 151 performs exchange using a space switch or the like. Reference numeral 152 denotes a switch control unit that controls a switch according to a predetermined control pattern. Reference numeral 153 denotes a buffer control unit, which controls to write a packet preferentially to a storage area corresponding to each channel according to the priority determined by the priority determination unit 62 of the adjacent downstream node device, and stores the packet in the buffer. When the input terminal of the connected switch is connected to the desired output terminal, control is performed so that the stored packet is read from the buffer. A buffer monitoring unit 154 monitors the number of packets temporarily stored in each of the buffers 121 to 124. Reference numeral 61 denotes a control information notifying unit which transmits the priority information from the priority determining unit 62 to the adjacent node and receives the priority information of the adjacent node. Reference numeral 62 denotes a priority determining unit which determines the priority of each channel based on the buffer monitoring information from the buffer monitoring unit 154. Reference numeral 63 denotes a transmission path for control information, which is a transmission path for the control information communication unit 61 to transmit and receive information to and from the control information communication unit of another node.
[0037]
The configuration and operation of the network system using the node devices of the present embodiment are the same as those of the first embodiment, but differ in how they are described. In the first embodiment, the buffer monitoring information is transmitted to the adjacent upstream node device, and the priority of the channel is determined based on the buffer monitoring information received from the adjacent downstream node device. On the other hand, in the third embodiment, after the priority of the channel is determined based on the buffer monitoring information, the priority information is transmitted to the adjacent upstream node device, and the priority information is received from the adjacent downstream node device.
[0038]
[Embodiment 3]
FIG. 7 is a configuration diagram of the buffer monitoring unit. Reference numerals 711 to 714 are monitoring units corresponding to the buffers 121 to 124 of each channel, and a set of monitoring units corresponding to the storage areas 1-4. Reference numerals 721 to 724 are monitoring units corresponding to the storage areas 1 to 4. Reference numeral 73 denotes a write counter, which counts the number of packets written in the storage area. A read counter 74 counts the number of packets read from the storage area. Reference numeral 75 denotes a packet number calculation unit, which compares (subtracts) the value of the write counter 73 with the value of the read counter 74 to calculate the number of packets temporarily stored in the storage area.
[0039]
[Embodiment 4]
FIG. 8 is a configuration diagram of the priority determining unit. Reference numerals 811 to 814 denote effective empty area calculation units corresponding to the respective channels, which calculate an empty storage area from the number of packets in each storage area and perform addition to calculate an empty area for each buffer unit. Reference numeral 82 denotes a comparing unit which compares the free areas in the respective buffer units, and sets a high priority to a channel having a large free area and a low priority to a channel having a small free area for each channel. .
[0040]
[Embodiment 5]
In the comparison unit 82 of the fourth embodiment, the priority of n (0 ≦ n ≦ 4) channels is set to a value of 0 or more and the priority of the other channels is set to 0 in order from the buffer having the largest free area.
[0041]
[Embodiment 6]
In the comparing unit 82 of the fourth embodiment, the priority of the channel corresponding to the buffer having the largest free area and the buffer whose difference between the free area and the buffer does not exceed a predetermined value is set to a value of 0 or more, and the priority of the other channels is set to 0 or more. Set the degree to 0.
[0042]
[Embodiment 7]
In the comparing unit 82 of the fourth embodiment, the priority of a channel whose free area is equal to or larger than the average number of temporary storage packets of each buffer is set to a value of 0 or more, and the priority of other channels is set to 0.
[0043]
[Embodiment 8]
In the comparing unit 82 according to the fourth embodiment, the priority of a channel having the same free area is set to a value of 0 or more, and the priority of the other channels is set to 0 regardless of the size of the free area.
[0044]
[Embodiment 9]
The effective free area calculation units 811 to 814 of the fourth embodiment calculate the number of packets after weighting the free areas of the storage areas 1 and 4 of the buffers 121 to 124 respectively. For example, according to the priority of each channel to which a packet is to be transmitted, the free area of the storage area corresponding to the highest priority channel is multiplied by 1, the free area of the storage area corresponding to the lowest channel is multiplied by 0, Is multiplied by a value between 0 and 1 in accordance with the priority of each of the empty areas of the storage area corresponding to the channel having the priority of, and the added hundred million is calculated as the effective empty area.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of a node device in a network system according to a first embodiment.
FIG. 2 is a configuration diagram of a network system according to the first embodiment.
FIG. 3 is an internal configuration diagram of a separation / insertion unit in the node device of FIG. 1;
FIG. 4 is an internal configuration diagram of a buffer unit in the node device of FIG. 1;
FIG. 5 is a control pattern showing a connection relationship between input and output of a switch of the node device according to the first embodiment.
FIG. 6 is a configuration diagram of a node device in the network system according to the second embodiment.
FIG. 7 is an internal configuration diagram of a buffer monitoring unit.
FIG. 8 is an internal configuration diagram of a priority determination unit.
FIG. 9 is a configuration diagram of a node device in a conventional network.
FIG. 10 is an internal configuration diagram of a separation / insertion unit in the node device of FIG. 9;
FIG. 11 is an internal configuration diagram of a buffer unit in the node device of FIG. 9;
FIG. 12 is a control pattern showing an input / output connection relationship of a switch of a conventional node device.
FIG. 13 is a configuration diagram of a conventional network system.
FIG. 14 is a diagram illustrating the communication principle of a conventional network.
[Explanation of symbols]
61 Switch control unit
62 Control information communication unit
63 Priority decision unit
64 control information transmission path
73 Write counter
74 read counter
75 Packet Number Calculator
82 Comparison section
100 node device
111-114 Separation insertion part
121 to 124 buffer unit
131-134 transmission line
141-144 transmission line
151 switch
152 switch control unit
153 Buffer control unit
154 Buffer monitoring unit
155 control information communication section
156 Priority decision unit
157 Control information transmission path
161 to 164 terminal device
211-214 node device
221-236 Terminal Device
301 header detector
302 gate
303 gate
304 selector
305 FIFO
401 buffer memory
402 header detector
403 Address counter
600 node device
Monitoring unit compatible with 711-714 channels
721 to 724 monitoring unit corresponding to storage area
811-814 Effective free area calculation unit
900 node device
901 to 908 Separation insertion part
911 to 918 Buffer section
921-928 transmission line
931 to 938 Transmission line
941 switch
942 switch control unit
943 Buffer control unit
1001 header detector
1002 gate
1003 gate
1004 selector
1005 FIFO
1101 buffer memory
1102 header detector
1103 address counter
1301 to 1304 node device
1311-1318 terminals
1321-1328 terminals
1331-1338 Terminal
1341-1348 Terminal
1305 to 1308 Parallel multiplex transmission line
1401 to 1404 node device
1405 to 1408 switches
1409-1412 Buffer section
1421-1436 terminal
A-D Parallel multiplex transmission line

Claims (4)

A node device for configuring a network system for transmitting a signal by connecting a plurality of node devices with a plurality of N channels,
N sub-transmission paths connected to the terminal;
N buffer means for temporarily storing a signal to be transmitted;
Buffer monitoring means for monitoring the signal amount temporarily stored in each of the buffer means;
Control information communication means for transmitting and receiving the buffer usage status observed by the buffer monitoring means to and from another node device;
Priority determining means for prioritizing the N channels based on the buffer usage status of the other node device received via the control information communication means;
Transmitting means for transmitting signals from the respective buffer means to N channels;
The transmission means is controlled to change a channel from which signals from each buffer means can be transmitted, based on a predetermined channel change pattern, so that signals from two or more buffer means are not simultaneously transmitted to the same channel. Channel change control means;
The respective buffer means are controlled to write a packet to a storage area corresponding to each channel according to the priority determined by the priority determining means, and a channel capable of transmitting a signal from each buffer means a desired channel. Buffer control means for reading a signal to be read on the desired channel in synchronization with the change to
Receiving means for receiving each of the N channels;
Separating means for separating a signal to be separated from the signal stream received by the receiving means and outputting the separated signal to a terminal connected via a sub-transmission path;
A node device comprising insertion means for inserting a signal transmitted from the terminal via a sub-transmission path into a signal stream received by the reception means. A node device for configuring a network system for transmitting a signal by connecting a plurality of node devices with a plurality of N channels,
N sub-transmission paths connected to the terminal;
N buffer means for temporarily storing a signal to be transmitted;
Buffer monitoring means for monitoring the signal amount temporarily stored in each of the buffer means;
Priority determining means for prioritizing the N channels based on the buffer usage status observed by the buffer monitoring means;
Control information communication means for transmitting and receiving the channel information extracted by the priority determination means to and from another node device;
Transmitting means capable of transmitting a signal from each buffer to N channels;
The transmission means is controlled to change a channel from which signals from each buffer means can be transmitted, based on a predetermined channel change pattern, so that signals from two or more buffer means are not simultaneously transmitted to the same channel. Channel change control means;
The respective buffer means are controlled to write a packet into a storage area corresponding to each channel according to the priority received from the other node device by the control information communication means, and a channel capable of transmitting a signal from each buffer means is provided. Buffer control means for reading a signal to be read on the desired channel in synchronization with the change to the desired channel;
Receiving means for receiving each of the N channels;
Separating means for separating a signal to be separated from the signal stream received by the receiving means and outputting the separated signal to a terminal connected via a sub-transmission path;
A node device comprising insertion means for inserting a signal transmitted from the terminal via a sub-transmission path into a signal stream received by the reception means. The buffer monitoring means of the node device according to claim 1 or 2,
A write counter for counting the number of packets written to each storage area of the buffer means,
A read counter that counts the number of packets read from the storage area; and a packet number calculation unit that compares the write counter and the read counter to calculate the number of temporary storage packets in the storage area,
A buffer monitoring unit having a set including the write counter, the read counter, and the packet number calculation unit for all storage areas of all channels. The priority determining means of the node device according to claim 1 or 2,
An effective free area calculation for calculating an effective free area by obtaining a free area of the storage area from the number of temporary storage packets in each storage area, multiplying the free area by an arbitrary value according to external information, and adding the values. Department and
A priority determining unit comprising comparing means for comparing the effective free areas of the respective channels to set the priority of a channel corresponding to a buffer having a large effective free area to be high and setting the priority of a channel corresponding to a buffer having a small effective free area to be low; means.

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