JP2004214294A - Power semiconductor module - Google Patents

Power semiconductor module Download PDF

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Publication number
JP2004214294A
JP2004214294A JP2002379805A JP2002379805A JP2004214294A JP 2004214294 A JP2004214294 A JP 2004214294A JP 2002379805 A JP2002379805 A JP 2002379805A JP 2002379805 A JP2002379805 A JP 2002379805A JP 2004214294 A JP2004214294 A JP 2004214294A
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JP
Japan
Prior art keywords
electrode terminal
base plate
power semiconductor
metal base
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002379805A
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Japanese (ja)
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JP4253183B2 (en
Inventor
Hideki Shitama
英樹 舌間
Original Assignee
Mitsubishi Electric Corp
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp, 三菱電機株式会社 filed Critical Mitsubishi Electric Corp
Priority to JP2002379805A priority Critical patent/JP4253183B2/en
Publication of JP2004214294A publication Critical patent/JP2004214294A/en
Application granted granted Critical
Publication of JP4253183B2 publication Critical patent/JP4253183B2/en
Expired - Fee Related legal-status Critical Current
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor module which can prevent occurrence of poor insulation because the distance along the insulation surface between an electrode terminal and a metal base plate even when bubbles are generated or mixed in the area near the electrode terminal when the gel state insulator is implanted. <P>SOLUTION: In the semiconductor module 1, a semiconductor chip 2 and the bottom-opening end 6a of a resin case 6 surrounding an insulation substrate 3 are fixed to the circumference edge of the main surface in the front side of a metal base plate 5. To the upper surface of the bottom-opening end 6a of the resin case 6, an electrode terminal 7 is inserted. In the area between the internal end 7a of the electrode terminal 7 and the main surface of the front side of the metal base plate 5, a couple of projected portions 10, which are partially projected toward the internal side of the module, are provided in order to prevent spread or transfer of bubbles in the lower side at the internal surface 6b of the bottom-opening end 6a. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an insulation structure of a semiconductor module (power module) used for controlling a motor such as an inverter or a servo.
[0002]
[Prior art]
Generally, in a power semiconductor module, a power semiconductor device including a plurality of power semiconductor elements such as a power transistor is housed in a casing including a metal base plate and a resin case and sealed with a gel-like insulator. (See Patent Documents 1 to 4). Here, the resin case is generally a substantially cylindrical body having an open bottom, and has a structure in which this opening is closed by a metal base plate.
[0003]
In such a power semiconductor module, the power semiconductor device is connected to an electrode terminal attached to the resin case, and is electrically connected to an external device via the electrode terminal. Here, the electrode terminal is attached to, for example, the upper surface of the bottom of the resin case. In this case, the electrode terminal is arranged at a position higher than the metal base plate by the thickness of the bottom of the resin case, and is sealed together with the power semiconductor device by the gel insulator.
[0004]
[Patent Document 1]
JP-A-11-87567 ([0016] to [0018], FIG. 2)
[Patent Document 2]
JP-A-9-232510 (page 3, FIG. 1)
[Patent Document 3]
JP-A-6-62550 ([0008] to [0009], FIG. 4)
[Patent Document 4]
JP-A-11-26691 ([0012] to [0013], FIG. 1)
[0005]
[Problems to be solved by the invention]
By the way, in the manufacturing process of this type of power semiconductor module, a power semiconductor device, an electrode terminal and the like are arranged in a casing, and a gel insulator is poured into the casing. Bubbles may be generated or mixed in the insulator. When the gel insulator solidifies in a state where the air bubbles stay near the electrode terminal, a gap, that is, a portion where the sealing resin does not exist is generated between the electrode terminal and the metal base plate, and the electrode terminal and the metal The insulation creepage distance between the base plate and the base plate becomes short, and insulation failure may occur. Here, the “insulating creepage distance” refers to the case where the electrode terminal and the metal base plate are arranged near the opening at the bottom of the resin case so as to sandwich the bottom of the resin case. It means the distance (thickness) of the portion gelatinous insulator is present between the (reference d 2 in Figure 1 (b)).
[0006]
The present invention has been made in order to solve the above-described conventional problems, and when a power semiconductor device, an electrode terminal, and the like are housed in a casing and a gel-like insulator is injected, bubbles are generated near the electrode terminal. It is an object of the present invention to provide a semiconductor module capable of preventing the insulation creepage distance between an electrode terminal and a metal base plate from becoming short and preventing insulation failure from occurring even in the case where or occurs.
[0007]
[Means for Solving the Problems]
The power semiconductor module according to the present invention, which has been made to solve the above problems, includes (i) a power semiconductor chip (power semiconductor element), and (ii) a back surface of the power semiconductor chip on the front side main surface. An insulating substrate provided with a circuit pattern to be attached, (iii) a metal base plate to which the back main surface of the insulating substrate is soldered to the front main surface, and (iv) a power semiconductor chip and the insulating substrate. A case in which the bottom opening end is fixed to the periphery of the front main surface of the metal base plate; and (v) a plate-like electrode terminal inserted into the case and one end of which is exposed on the inner side surface of the bottom opening end. (Vi) a gel resin covering (sealing) the power semiconductor chip, the insulating substrate, and the electrode terminal; and (vii) a portion of the inner surface of the bottom opening end where the one end of the electrode terminal is located. The bottom open end is in contact with the metal base plate. Between the sites, in which the protrusion of the insulating partially protrude inward module is characterized in that it is arranged.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be specifically described with reference to the accompanying drawings.
Embodiment. 1
As shown in FIG. 1A, a plurality of power semiconductor chips 2 (hereinafter abbreviated as “semiconductor chips 2”) are provided in a power semiconductor module 1 (hereinafter abbreviated as “semiconductor module 1”). ) And an insulating substrate 3 are provided. Here, a circuit pattern (not shown) to which the back surface of each semiconductor chip 2 is soldered is formed on the front side main surface (upper side main surface) of the insulating substrate 3.
[0009]
The back main surface (lower main surface) of the insulating substrate 3 is joined to the front main surface (upper main surface) of the metal base plate 5 (heat radiating plate) using solder 4 (soldered). ). As a material of the metal base plate 5, for example, copper or the like is used. Further, a bottom opening end 6 a of a resin case 6 surrounding the semiconductor chip 2 and the insulating substrate 3 is fixed to a peripheral portion of the front main surface of the metal base plate 5. As a material of the resin case 6, for example, an epoxy resin is used. The bottom opening end 6a protrudes from the bottom of the side wall of the resin case 6 toward the inside of the module.
[0010]
A bent plate-shaped electrode terminal 7 is inserted into the upper surface of the bottom opening end 6 a of the resin case 6. That is, the electrode terminal 7 is fitted into the cutout portion of the upper surface of the bottom opening end 6a. As a material of the electrode terminal 7, for example, copper or the like is used. The electrode terminal 7 is electrically connected to a power semiconductor element (the wiring pattern of the insulating substrate 3) via a wire 8 made of a conductive material. Here, the inner end portion 7a (end surface) of the electrode terminal 7 is viewed in the lateral direction (lateral direction) with the inner surface 6b of the bottom opening end 6a in a vertical wall shape (perpendicular to the front main surface of the metal base plate 5). Located on the same plane (exposed).
[0011]
On the inner side surface 6b of the bottom opening end 6a, two insulating portions partially projecting toward the inside of the module are provided between the inner end portion 7a of the electrode terminal 7 and the front main surface of the metal base plate 5. Are provided. Here, the protrusion 10 is formed integrally with the resin case 6. However, the protrusion 10 may be formed as a separate member from an insulating material and attached to the inner surface 6b of the bottom open end 6a (may be inserted). One of the two projections 10 is located near the upper end of the inner surface 6b of the bottom opening end 6a, and the other is located at a position slightly lower than the intermediate position (height) of the inner surface 6b. Note that the lower protrusion 10 may be omitted.
[0012]
In this semiconductor module 1, a box-shaped or container-shaped casing composed of a metal base plate 5 and a resin case 6 is filled with a gel resin 9, and a power semiconductor device (semiconductor chip 2, insulating substrate 3), electrodes The terminal 7 and the wire 8 are covered (sealed) by the gel resin 9.
[0013]
When the semiconductor module 1 is manufactured, the power semiconductor device including the semiconductor chip 2 and the insulating substrate 3, the electrode terminals 7, the wires 8, and the like are placed in a casing including the metal base plate 5 and the resin case 6. And the gel-like resin 9 is poured into the casing. In this case, bubbles 11 may be generated or mixed in the vicinity of the inner end 7a of the electrode terminal 7, and may stay there. However, the downward spread or movement of the bubble 11 is prevented by the upper protrusion 10.
[0014]
Therefore, even when the gel resin 9 is solidified in a state where the air bubbles 11 stay near the inner end 7 a of the electrode terminal 7, most of the inner side surface 6 b of the bottom opening end 6 a is covered with the gel resin 9, an inner end portion 7a of the terminal 7, the insulation creepage distance d 1 between the front main surface of the metal base plate 5 is not short, the substantially the same as the height of the inner surface 6b of the bottom open end 6a. Therefore, insulation failure of the electrode terminal 7 does not occur.
[0015]
As shown in FIG. 1B, when no protrusion is provided on the inner side surface 6b of the bottom opening end 6a, bubbles 11 generated or mixed in the vicinity of the inner end 7a of the electrode terminal 7 are removed from the bottom opening end 6a. spreads downward along the inner surface 6b of 6a, or so moves, the insulation creepage distance d 2 between the inner end portion 7a and the front main surface of the metal base plate 5 of the electrode terminals 7 is shortened, the electrode terminals 7 May cause insulation failure.
[0016]
Embodiment 2 FIG.
Hereinafter, a second embodiment of the present invention will be described with reference to FIG. However, since the semiconductor module according to the second embodiment has many points in common with the semiconductor module according to the first embodiment, in order to avoid duplication of description, the following mainly describes differences from the first embodiment. Note that among the components of the semiconductor module shown in FIG. 2, those that are common to the components of the semiconductor module shown in FIG. 1A are denoted by the same reference numerals as in FIG. 1A.
[0017]
As shown in FIG. 2, in the semiconductor module 1 according to the second embodiment, unlike the semiconductor module 1 according to the first embodiment, no protrusion is provided on the inner side surface 6b of the bottom opening end 6a. A groove 12 (recess) is formed in the front main surface of the metal base plate 5 in the vicinity of a position corresponding to the inner end 7a of the electrode terminal 7 in the lateral direction (left-right direction). That is, below the inner end 7a of the electrode terminal 7, the upper surface of the metal base plate 5 (the upper surface of the groove 12) is located below the lower end surface of the bottom opening end 6a. Other points are the same as in the first embodiment.
[0018]
In the semiconductor module 1 according to the second embodiment, the distance between the inner end 7a of the electrode terminal 7 and the upper surface of the metal base plate 5 (the upper surface of the groove 12) in the up-down direction according to the first embodiment. It is longer than the semiconductor module or the conventional semiconductor module by the depth of the groove 12. Therefore, even if the bubbles 11 generated or mixed in the vicinity of the inner end 7a of the electrode terminal 7 spread downward or move along the inner side surface 6b of the bottom opening end 6a having no projection, the electrode terminal is not affected. insulation creepage distance d 3 between the 7 of the inner end portion 7a and the upper surface of the metal base plate 5 (the groove 12 the upper surface of) can be sufficiently ensured. Therefore, insulation failure of the electrode terminal 7 does not occur.
[0019]
Further, in the semiconductor module 1 according to the first embodiment, when the gel resin 9 is injected, the clearance of the protrusion 10 provided on the inner side surface 6b of the bottom opening end 6a of the resin case 6 or the upper protrusion is formed. There is a possibility that air bubbles may be generated or mixed in the lower side of 10 and stay there. However, in the second embodiment, since no projection is provided on the inner side surface 6b of the bottom opening end 6a, such stagnation of bubbles can be prevented. Further, in the semiconductor module according to the second embodiment, since it is not necessary to form a protrusion on the inner side surface 6b of the bottom opening end 6a, the resin case 6 can be easily formed as compared with the first embodiment (forming). Good nature).
[0020]
【The invention's effect】
According to the present invention, even when the gel-like insulator is solidified in a state where air bubbles stay near one end of the electrode terminal, most of the inner side surface of the bottom opening end is covered with the gel-like insulating portion, and one end of the electrode terminal is provided. The insulation creepage distance between the metal plate and the front side main surface of the metal base plate is not reduced, and is substantially the same as the height of the inner surface of the bottom opening end. For this reason, insulation failure of the electrode terminals does not occur.
[Brief description of the drawings]
FIG. 1A is an elevational sectional view of a semiconductor module according to a first embodiment of the present invention, and FIG. 1B is an elevational sectional view of a main part of a semiconductor module having no projection.
FIG. 2 is an elevational sectional view of a semiconductor module according to a second embodiment of the present invention;
[Explanation of symbols]
Reference Signs List 1 semiconductor module, 2 semiconductor chip, 3 insulating substrate, 4 solder, 5 metal base plate, 6 resin case, 6a bottom opening end, 6b inner side surface, 7 electrode terminal, 7a inner end, 8 wire, 9 gel resin, 10 protrusions, 11 bubbles, 12 grooves.

Claims (2)

  1. A power semiconductor chip;
    On the front side main surface, an insulating substrate having a circuit pattern to which the back surface of the power semiconductor chip is soldered,
    On the front side main surface, a metal base plate to which the back side main surface of the insulating substrate is soldered,
    A case that surrounds the power semiconductor chip and the insulating substrate, and has a bottom opening end fixed to a peripheral portion of a front main surface of the metal base plate;
    A plate-shaped electrode terminal inserted into the case, one end of which is exposed on the inner surface of the bottom opening end;
    The power semiconductor chip, comprising a gel-like resin covering the insulating substrate and the electrode terminal,
    Insulation that partially protrudes toward the inside of the module between a portion of the inner surface of the bottom opening end where the one end of the electrode terminal is located and a portion where the bottom opening end contacts the metal base plate. A power semiconductor module, wherein the protrusions are disposed.
  2. A power semiconductor chip;
    On the front side main surface, an insulating substrate having a circuit pattern to which the back surface of the power semiconductor chip is soldered,
    On the front side main surface, a metal base plate to which the back side main surface of the insulating substrate is soldered,
    A case that surrounds the power semiconductor chip and the insulating substrate, and has a bottom opening end fixed to a peripheral portion of a front main surface of the metal base plate;
    A plate-shaped electrode terminal inserted into the case, one end of which is exposed on the inner surface of the bottom opening end;
    The power semiconductor chip, comprising a gel-like resin covering the insulating substrate and the electrode terminal,
    A power semiconductor module, wherein a concave portion is formed on a front main surface of the metal base plate at a position corresponding to the position of the one end of the electrode terminal.
JP2002379805A 2002-12-27 2002-12-27 Power semiconductor module Expired - Fee Related JP4253183B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002379805A JP4253183B2 (en) 2002-12-27 2002-12-27 Power semiconductor module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002379805A JP4253183B2 (en) 2002-12-27 2002-12-27 Power semiconductor module

Publications (2)

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JP2004214294A true JP2004214294A (en) 2004-07-29
JP4253183B2 JP4253183B2 (en) 2009-04-08

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7728413B2 (en) 2005-09-07 2010-06-01 Denso Corporation Resin mold type semiconductor device
US8558361B2 (en) 2010-04-12 2013-10-15 Mitsubishi Electric Corporation Power semiconductor module
WO2014057765A1 (en) * 2012-10-12 2014-04-17 住友電気工業株式会社 Semiconductor device and method for manufacturing same
WO2019008828A1 (en) * 2017-07-03 2019-01-10 三菱電機株式会社 Semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7728413B2 (en) 2005-09-07 2010-06-01 Denso Corporation Resin mold type semiconductor device
US8558361B2 (en) 2010-04-12 2013-10-15 Mitsubishi Electric Corporation Power semiconductor module
WO2014057765A1 (en) * 2012-10-12 2014-04-17 住友電気工業株式会社 Semiconductor device and method for manufacturing same
JP2014082233A (en) * 2012-10-12 2014-05-08 Sumitomo Electric Ind Ltd Semiconductor device and method of manufacturing the same
WO2019008828A1 (en) * 2017-07-03 2019-01-10 三菱電機株式会社 Semiconductor device
JP6461441B1 (en) * 2017-07-03 2019-01-30 三菱電機株式会社 Semiconductor device

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