JP2004186323A - Method of manufacturing semiconductor device and heat-resistant adhesive tape used therefor - Google Patents

Method of manufacturing semiconductor device and heat-resistant adhesive tape used therefor Download PDF

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JP2004186323A
JP2004186323A JP2002350180A JP2002350180A JP2004186323A JP 2004186323 A JP2004186323 A JP 2004186323A JP 2002350180 A JP2002350180 A JP 2002350180A JP 2002350180 A JP2002350180 A JP 2002350180A JP 2004186323 A JP2004186323 A JP 2004186323A
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Prior art keywords
heat
adhesive tape
lead frame
pressure
sealing
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JP2002350180A
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JP3934041B2 (en
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Hitoshi Takano
均 高野
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Nitto Denko Corp
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Nitto Denko Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2224/45144—Gold (Au) as principal constituent
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
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    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
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    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
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    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an adhesive tape which can be firmly attached even after such processes as mounting chips and wire bonding are performed. <P>SOLUTION: A method of manufacturing a semiconductor device includes a one-side sealing process wherein, after semiconductor chips 15 are mounted and wired in a lead frame 10, the heat-resistant adhesive tape 20 is pasted to the outer pad side of the lead frame 10, and then the semiconductor chip side of the lead frame 10 is sealed with sealing resin 17. In this method, the heat-resistant adhesive tape used comprises an adhesive layer whose storage modulus at 175°C is 1.0×10<SP>3</SP>Pa-5.0×10<SP>5</SP>Pa and whose thickness is 1-50 μm. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体チップの搭載及び結線が完了したリードフレームのアウターパッド側に耐熱性粘着テープを貼り合わせた後に、封止樹脂により半導体チップ側を片面封止する封止工程を含む半導体装置の製造方法、並びにこれに用いる耐熱性粘着テープに関する。
【０００２】
【従来の技術】
近年、ＬＳＩの実装技術において、ＣＳＰ（Ｃｈｉｐ Ｓｉｚｅ／ＳｃａｌｅＰａｃｋａｇｅ）技術が注目されている。この技術のうち、ＱＦＮ（ＱｕａｄＦｌａｔ Ｎｏｎ−ｌｅａｄｅｄ ｐａｃｋａｇｅ）に代表されるリード端子がパッケージ内部に取り込まれた形態のパッケージについては、小型化と高集積の面で特に注目されるパッケージ形態のひとつである。このようなＱＦＮの製造方法のなかでも、近年では複数のＱＦＮ用チップをリードフレームのパッケージパターン領域のダイパッド上に整然と配列し、金型のキャビティ内で、封止樹脂にて一括封止したのち、切断によって個別のＱＦＮ構造物に切り分けることにより、リードフレーム面積あたりの生産性を飛躍的に向上させるＭＡＰタイプの製造方法が、特に注目されている。
【０００３】
このような、複数の半導体チップを一括封止するＱＦＮの製造方法においては、樹脂封止時のモールド金型によってクランプされる領域はパッケージパターン領域より更に外側に広がった樹脂封止領域の外側だけである。従って、パッケージパターン領域、特にその中央部においては、アウターリード面をモールド金型に十分な圧力で押さえることができず、封止樹脂がアウターリード側に漏れ出すことを抑えることが非常に難しく、ＱＦＮの端子等が樹脂で被覆されるという問題が生じ易い。
【０００４】
このため、上記の如きＱＦＮの製造方法に対しては、リードフレームのアウターリード側に粘着テープを貼り付け、この粘着テープの自着力（マスキング）を利用したシール効果により、樹脂封止時のアウターリード側への樹脂漏れを防ぐ製造方法が提案されている。その際、リードフレーム上に半導体チップを搭載した後、あるいはワイヤボンディングを実施した後から耐熱性粘着テープの貼り合せを行うことは、非常にデリケートな回路が完成された状態のリードフレームにテープを加圧して圧着することとなるため、ハンドリングの面で実質的に困難であると考えられてきた。従って、耐熱性粘着テープは最初の段階でリードフレームのアウターパッド面に貼り合わせられ、その後、半導体チップの搭載工程やワイヤボンディングの工程を経て、封止樹脂による封止工程まで貼り合わせられるといったものであった（例えば、特許文献１参照）。
【０００５】
【特許文献１】
特開２００２−１８４８０１号公報（第２頁、図１）。
【０００６】
【発明が解決しようとする課題】
しかしながら、耐熱性粘着テープが貼り合わせられた状態でチップの搭載やワイヤボンディングといった工程を経ていくために、粘着剤の弾性によりチップ搭載時の位置ズレやワイヤボンディング操作における結線エネルギーのロスといった支障をきたし易い。このため、上記耐熱性粘着テープとしては、厚みが薄く弾性率の高いものが使用されているが、これにより位置ズレやエネルギーロスをある程度緩和できたとしても、完全に拭い去ることは困難である。
【０００７】
また、半導体チップ搭載時の接着キュアやワイヤボンディングの工程は高い加熱条件下で行われるため、耐熱性粘着テープから加熱発生ガスが生じると、これらのガス成分がインナーリード面あるいは半導体チップ等へ付着し表面汚染の原因となるため、モールド樹脂とリードフレームとの界面に樹脂剥離を生じたり、ワイヤボンディング時の接合性が著しく低下するなど、半導体装置としての信頼性そのものを損ねる重大な欠陥につながる可能性もある。
【０００８】
そこで、本発明では、あらかじめチップの搭載やワイヤボンディングといった工程を実施した後からでも充分に被着が可能な粘着テープを提供することで、先述の粘着剤の弾性やオフガスによる汚染といった問題を完全に回避する事を目的とするものである。
【０００９】
【課題を解決するための手段】
本発明者らは、上記目的を達成すべく、耐熱性粘着テープの物性、厚み等について鋭意研究したところ、高温で特定の範囲に限られる貯蔵弾性率を有する粘着材料で、かつ特定の厚さを形成した粘着剤層によって構成される耐熱性粘着テープを用いることにより、ワイヤボンディングなどの結線工程が完了した段階でも貼り付けが可能であることを見出し、本発明を完成するに至った。
【００１０】
即ち、本発明の半導体装置の製造方法は、金属製のリードフレームのダイパッド上に半導体チップをボンディングする搭載工程と、前記リードフレームの端子部先端と前記半導体チップ上の電極パッドとをボンディングワイヤで電気的に接続する結線工程と、結線工程の完了したリードフレームのアウターパッド側に耐熱性粘着テープを貼り合わせる貼着工程と、封止樹脂により半導体チップ側を片面封止する封止工程と、封止された構造物を個別の半導体装置に切断する切断工程とを、少なくとも含む半導体装置の製造方法であって、前記耐熱性粘着テープは、１７５℃における貯蔵弾性率が１．０×１０３ Ｐａ〜５．０×１０５ Ｐａからなる厚さ１〜５０μｍの粘着剤層を有することを特徴とする。本発明において、貯蔵弾性率などの物性は、具体的には後述の方法で測定される値である。
【００１１】
上記において、前記貼着工程は、結線工程の完了したリードフレームを、粘着剤層を上側にした前記耐熱性粘着テープに載置することで貼り合わせを行うことが好ましい。
【００１２】
一方、本発明の耐熱性粘着テープは、半導体チップの搭載及び結線が完了したリードフレームのアウターパッド側に、耐熱性粘着テープを貼り合わせた後に、封止樹脂により半導体チップ側を片面封止する封止工程を含む半導体装置の製造方法に用いられる耐熱性粘着テープであって、１７５℃における貯蔵弾性率が１．０×１０３ Ｐａ〜５．０×１０５ Ｐａからなる厚さ１〜５０μｍの粘着剤層を有することを特徴とする。
【００１３】
上記において、ステンレス板に貼り合わせた状態で１７５℃にて３分間加熱後の粘着力が５．０Ｎ／１９ｍｍ幅以下であることが好ましい。
【００１４】
［作用効果］
リードフレーム上に半導体チップを搭載した後、あるいはワイヤボンディングを実施した後から耐熱性粘着テープの貼り合せを行うことは、非常にデリケートな回路が完成された状態のリードフレームにテープを加圧して圧着することとなるため実質的に困難であると考えられてきたが、本発明によると、特定の弾性率を有し、かつ特定の厚さを有する粘着材料を用いることで、リードフレームを強く圧着しなくとも十分な密着性を得ることができる。そのため、ダイアタッチあるいはワイヤボンディングといった工程に先立って、耐熱性粘着テープ自体を貼り合わせておく必要そのものがなくなる。
【００１５】
したがって、先述のような耐熱性粘着テープの弾性によるダイアタッチの位置ズレ、ワイヤボンディング工程での結線エネルギーロス、あるいは耐熱性粘着テープからのオフガスによる汚染などといった問題は、いずれも根本的に原因となっている耐熱性粘着テープそのものが貼りあわせられていないので問題とはならない。
【００１６】
また、前記粘着剤層は、１７５℃における貯蔵弾性率が１．０×１０３ Ｐａ〜５．０×１０５ Ｐａであるため、材料自体の弾性率が適切な柔らかさを確保できていることから強い圧着を行わなくとも、粘着剤のもつ濡れ性により十分密着させることが可能となる。したがって、ワイヤボンディングなどの結線工程が完了したデリケートな状態のリードフレームであっても、たとえばテープの粘着面と接触させることにより、粘着剤の持つ濡れ性によりリードフレームとの密着が進みマスキングテープとしての効力を発揮することができる。この場合、１７５℃というのは一般的なトランスファーモールドにおける代表的な工程温度に値するので、実際のモールド工程で十分なマスキングに要する密着性が得られることになる。
【００１７】
上記の場合、粘着剤層の厚みが１μｍ未満であるとリードフレームの微妙な凹凸等に対する段差吸収効果が乏しくなるため密着性の確保が厳しくなる。したがって、糊厚としては少なくとも１μｍ以上、好ましくは５μｍ以上の粘着剤層の厚さがあることがよい。一方、粘着剤層の厚さが増すと密着性は向上していくが、５０μｍを超えた厚さになるとモールド時のクランプ圧力などにより、変形ひずみなどが生じる恐れがある。したがって５０μｍ以下、好ましくは３０μｍ以下の粘着剤層の厚さであることがよい。
【００１８】
本発明では、特に、結線工程の完了したリードフレームを粘着剤層を上側にした前記耐熱性粘着テープに載置するだけでも前記貼着工程を行うことができ、その場合、非常にデリケートな回路が完成された状態のリードフレームに対して、テープを加圧して圧着する必要がなく、回路の破損などの問題が生じにくくなる。また、簡易な工程によって実用的な手段で両者を貼着することで十分な密着性を得ることができる。
【００１９】
更に、前記耐熱性粘着テープは、ステンレス板に貼り合わせた状態で１７５℃にて３分間加熱後の粘着力がＪＩＳ Ｚ ０２３７に準じた測定方法で５．０Ｎ／１９ｍｍ幅以下である場合、封止工程での樹脂漏れ防止に必要な粘着力が得られると共に、封止工程後の引き剥がしが容易になり、封止樹脂の破損も生じなくなる。この場合の１７５℃にて３分間というのは、トランスファーモールドにおける代表的な工程温度および、リードフレームが金型に搭載されてからモールドが完了するまでの代表的な時間であるので、実際にモールドを実施した後のテープ剥離力に値するものである。
【００２０】
【発明の実施の形態】
以下、本発明の実施の形態について、図面を参照しながら説明する。図１は、本発明の半導体装置の製造方法の一例の工程図である。
【００２１】
本発明の半導体装置の製造方法は、図１（ａ）〜（ｆ）に示すように、半導体チップ１５の搭載工程と、ボンディングワイヤ１６による結線工程と、耐熱性粘着テープ２０の貼着工程と、封止樹脂１７による封止工程と、封止された構造物２１を切断する切断工程とを少なくとも含むものである。
【００２２】
搭載工程は、図１（ａ）〜（ｂ）に示すように、金属製のリードフレーム１０のダイパッド１１ｃ上に半導体チップ１５をボンディングする工程である。本発明では、耐熱性粘着テープ２０を貼着していない金属製のリードフレーム１０を使用する。
【００２３】
リードフレーム１０とは、例えば銅などの金属を素材としてＱＦＮの端子パターンが刻まれたものであり、その電気接点部分には、銀，ニッケル，パラジウム，金などのなどの素材で被覆（めっき）されている場合もある。リードフレーム１０の厚みは、５０〜３００μｍが一般的である。なお、部分的にエッチングなどで薄く加工されている部分はこのかぎりではない。
【００２４】
リードフレーム１０は、後の切断工程にて切り分けやすいよう、個々のＱＦＮの配置パターンが整然と並べられているものが好ましい。例えば図２に示すように、リードフレーム１０上に縦横のマトリックス状に配列された形状などは、マトリックスＱＦＮあるいはＭＡＰ−ＱＦＮなどと呼ばれ、もっとも好ましいリードフレーム形状のひとつである。とくに近年では、生産性の観点から１枚のリードフレーム中に配列されるパッケージ数を多くするため、これらの個々のパッケージが細密化されるばかりでなく、一つの封止部分で多数のパッケージを封止できるようこれらの配列数も大きく拡大してきている。
【００２５】
図２（ａ）〜（ｂ）に示すように、リードフレーム１０のパッケージパターン領域１１には、隣接した複数の開口１１ａに端子部１１ｂを複数配列した、ＱＦＮの基板デザインが整然と配列されている。一般的なＱＦＮの場合、各々の基板デザイン（図２（ａ）の格子で区分された領域）は、開口１１ａの周囲に配列れさた、アウターリード面を下側に有する端子部１１ｂと、開口１１ａの中央に配置されるダイパッド１１ｃと、ダイパッド１１ｃを開口１１ａの４角に支持させるダイバー１１ｄとで構成される。
【００２６】
上記のようなリードフレーム１０上に、半導体チップ１５、すなわち半導体集積回路部分であるシリコンウエハ・チップが搭載される。リードフレーム１０上にはこの半導体チップ１５を固定するためダイパッド１１ｃと呼ばれる固定エリアが設けられており、このダイパッド１１ｃへのボンディング（固定）の方法は導電性ペースト１９を使用したり、接着テープ、接着剤など各種の方法が用いられる。導電性ペーストや熱硬化性の接着剤等を用いてダイボンドする場合、一般的に１５０〜２００℃程度の温度で数分〜２時間程度加熱キュアする。
【００２７】
結線工程は、図１（ｃ）に示すように、リードフレーム１０の端子部１１ｂ（インナーリード）の先端と半導体チップ１５上の電極パッド１５ａとをボンディングワイヤ１６で電気的に接続する工程である。ボンディングワイヤ１６としては、例えば金線あるいはアルミ線などが用いられる。一般的には１２０〜２５０℃に加熱された状態で、超音波による振動エネルギーと印加加圧による圧着エネルギーの併用により結線される。その際、リードフレーム１０を真空吸引することで、ヒートブロックなどに確実に固定することができる。
【００２８】
貼着工程は、図１（ｄ）に示すように、結線工程の完了したリードフレーム１０のアウターパッド側に耐熱性粘着テープ２０を貼り合わせるものである。特に結線工程の完了したリードフレーム１０を、粘着剤層２０ｂを上側にした耐熱性粘着テープ２０に載置することで貼り合わせを行うことが好ましい。つまり、耐熱性粘着テープ２０の貼り合わせについては、既にリードフレーム上に半導体チップ１５が搭載され結線が施された状態の被着体に貼りあわせられることから、あまりに高い加圧密着をはかろうとするとリードフレーム１０の変形や半導体回路の破損を招く恐れがある。したがって、例えば結線工程の完了したリードフレーム１０を、粘着剤層２０ｂを上側にした耐熱性粘着テープ２０に載置して、その自重により密着性を得るなど、リードフレーム１０に対して変形が生じないような貼り合わせ方法を行うことが好ましい。
【００２９】
なお、一般的な耐熱性粘着テープでは、この程度の加圧では十分な密着性を確保し難かったが、本発明においては適切な弾性率と適切な厚みを持った粘着剤層２０ｂの耐熱性粘着テープ２０を用いることにより、十分な密着性を得ることが可能となり、モールド時の樹脂漏れを好適に防止するマスキング効果を得ることができる。かかる耐熱性粘着テープ２０の詳細については、後述する。
【００３０】
また、耐熱性粘着テープ２０は、例えば少なくともパッケージパターン領域１１より外側に貼着され、樹脂封止される樹脂封止領域の外側の全周を含む領域に貼着するのが好ましい。リードフレーム１０は、通常、樹脂封止時の位置決めを行うための、ガイドピン用孔１３を端辺近傍に有しており、それを塞がない領域に貼着するのが好ましい。また、樹脂封止領域はリードフレーム１０の長手方向に複数配置されるため、それらの複数領域を渡るように連続して粘着テープ２０を貼着するのが好ましい。
【００３１】
封止工程は、図１（ｅ）に示すように、封止樹脂１７により半導体チップ側を片面封止する工程である。封止工程は、リードフレーム１０に搭載された半導体チップ１５やボンディングワイヤ１６を保護するために行われ、とくにエポキシ系の樹脂をはじめとした封止樹脂１７を用いて金型中で成型されるのが代表的である。その際、図３に示すように、複数のキャビティ１２を有する上金型１８ａと下金型１８ｂからなる金型１８を用いて、複数の封止樹脂１７にて同時に封止工程が行われるのが一般的である。具体的には、例えば樹脂封止時の加熱温度は１７０〜１８０℃であり、この温度で数分間キュアされた後、更に、ポストモールドキュアが数時間行われる。なお、耐熱性粘着テープ２０はポストモールドキュアの前に剥離するのが好ましい。
【００３２】
切断工程は、図１（ｆ）に示すように、封止された構造物２１を個別の半導体装置２１ａに切断する工程である。一般的にはダイサーなどの回転切断刃を用いて封止樹脂１７の切断部１７ａをカットする切断工程が挙げられる。
【００３３】
本発明で使用する耐熱性粘着テープ２０は、１７５℃における貯蔵弾性率が１．０×１０３ Ｐａ〜５．０×１０５ Ｐａからなる厚さ１〜５０μｍの粘着剤層を有することを特徴とする。耐熱性粘着テープ２０は、粘着剤層のみで構成されていてもよいが、図１に示すように、基材２０ａと粘着剤層２０ｂとを備えることが好ましい。
【００３４】
粘着テープ２０の粘着剤層２０ｂは、モールド時にリードフレームと共に金型中でクランプされることなどから、クランプ圧力に対して大きな変形やひずみが生じないようある程度の高い弾性を確保している方が精度的には期待できる。
【００３５】
しかしながら、粘着剤本来の密着機能を確保するためには、弾性が高くいわば硬い素材であることは好ましくなく、とくに十分な加圧による貼り合せが困難な本発明においては、積極的にリードフレームと密着するための柔軟性あるいは濡れ性を確保できている必要がある。そこで、これらの相反する粘着剤層の必要性能を両立するために、本発明では、１７５℃における粘着剤層の貯蔵弾性率が１．０×１０３ Ｐａ〜５．０×１０５ Ｐａ、より好ましくは５．０×１０３ Ｐａ〜１．０×１０５ Ｐａとし、さらに粘着剤層の厚みを１〜５０μｍ、より好ましくは５〜３０μｍとする。これにより、粘着剤層全体としてモールドクランプ時に対する変形やひずみをわずかにとどめることが可能になり、また粘着剤の適度な弾性率によりリードフレームに対して強固な加圧を行わなくても、好適な密着性を得ることができるため、封止工程において十分なシール性を得ることができる。ここで、貯蔵弾性率は粘弾性スペクトロメーターにより、周波数１Ｈｚ 、昇温速度５℃／ｍｉｎにて測定された、せん断貯蔵弾性値である。
【００３６】
上記のような各物性を有する粘着剤の素材に関しては特に限定されるものではないが、一例として、シリコーン系粘着剤、アクリル系粘着剤、ゴム系粘着剤などが適切な貯蔵弾性率と粘着力を得やすい好適な粘着剤である。とくにシリコーン系粘着剤は、モールド時の加熱履歴に対し十分な耐熱性を確保しやすいことから、加熱後の剥離性に関しても安定した粘着特性を得やすく本発明において最も好適な素材のひとつであるといえる。
【００３７】
シリコーン系粘着剤は、例えばオルガノポリシロキサンを主成分とするシリコーンゴムやシリコーンレジンを含有してなり、これを架橋剤を添加してキュアーすることにより粘着剤層を形成することができる。
【００３８】
上記のシリコーンゴムとしては、シリコーン系感圧接着剤に使用されている各種のものを特に制限なく使用できる。たとえば、ジメチルシロキサンを主な構成単位とするオルガノポリシロキサンを好ましく使用できる。オルガノポリシロキサンには必要に応じてビニル基、その他の官能基が導入されていてもよい。オルガノポリシロキサンの重量平均分子量は通常１８万以上であるが、望ましくは２８万から１００万、特に５０万から９０万のものが好適である。
【００３９】
シリコーンレジンとしては、シリコーン系感圧接着剤に使用されている各種のものを特に制限なく使用できる。たとえば、Ｍ単位（Ｒ３ ＳｉＯ１／２ ）と、Ｑ単位（ＳｉＯ２ ）、Ｔ単位（ＲＳｉＯ３／２ ）およびＤ単位（Ｒ２ ＳｉＯ）から選ばれるいずれか少なくとも１種の単位（前記単位中、Ｒは一価炭化水素基または水酸基を示す）を有する共重合体からなるオルガノポリシロキサンを好ましく使用できる。前記共重合体からなるオルガノポリシロキサンは、ＯＨ基を有する他に、必要に応じてビニル基等の種々の官能基が導入されていてもよい。導入する官能基は架橋反応を起こすものであってもよい。前記共重合体としてはＭ単位とＱ単位からなるＭＱレジンが好ましい。Ｍ単位と、Ｑ単位、Ｔ単位またはＤ単位の比（モル比）は特に制限されないが、前者：後者＝０．３：１〜１．５：１程度、好ましくは０．５：１〜１．３：１程度のものを使用するのが好適である。
【００４０】
シリコーンゴムとシリコーンレジンの配合割合（重量比）は、前者：後者＝１００：１００〜１００：２２０程度が好ましく、１００：１２０〜１００：１８０程度のものを使用するのがより好ましい。シリコーンゴムとシリコーンレジンは、単にそれらを配合して使用してもよく、それらの部分縮合物であってもよい。
【００４１】
粘着剤層の形成方法としては、基材に粘着剤を、リバースコート法、ファンテンコート法、ディッピング法等の方式で塗工し、それぞれの架橋方式（加熱、ＵＶ照射等）によりキュアーさせて形成することができる。
【００４２】
また、その他の任意成分として、架橋剤、可塑剤、充填材、顔料、染料、老化防止剤、帯電防止剤などの各種添加剤を添加することもできる。更に、必要に応じて粘着剤の下塗りをはじめとした重ね塗りや、基材背面側に対して背面処理などを施してもよい。
【００４３】
また、これら耐熱性粘着テープは先述のような粘着剤層を少なくとも有していることが特徴であることから、粘着剤層だけによって構成される耐熱性粘着テープであったとしても構わないが、粘着テープとしてのハンドリングや対面側への被着性を考慮した場合、適度な強度のある基材層と粘着剤層が組み合わせられている構成がより好ましい。
【００４４】
この場合の基材層は、モールド工程における加熱履歴により著しく変形あるいは燃焼しない素材であれば特に限定されるものではないが、一例として、ポリイミドフィルム、ポリエステル系フィルム、ポリオレフイン系フィルムなどのプラスチックフィルムのほか、紙、布、アルミや銅などの金属箔なども挙げられる。
【００４５】
この耐熱性粘着テープは、封止工程後の任意の段階ではがされることになるが、あまりに強粘着力をもった粘着テープであっては引き剥がしが困難となるだけでなく、場合によっては引き剥がしのための応力によって、モールドした樹脂の剥離や破損を招く恐れもある。したがって、封止樹脂のはみ出しを抑える粘着力以上に強粘着性であることはむしろ好ましくない。この場合、ステンレス板に貼り合わせた状態で１７５℃にて３分間加熱後、ＪＩＳ Ｚ ０２３７に準じて測定された粘着力が５．０Ｎ／１９ｍｍ幅以下、より好ましくは２．０Ｎ／１９ｍｍ幅以下であることがよい。
【００４６】
本発明においては、例えばモノマーの種類を変えたり、材料の分子量変更や、充填材の添加などによって、貯蔵弾性率を所望の範囲に調整することができる。
【００４７】
一方、本発明の耐熱性粘着テープは、前述したように、半導体チップの搭載及び結線が完了したリードフレームのアウターパッド側に、耐熱性粘着テープを貼り合わせた後に、封止樹脂により半導体チップ側を片面封止する封止工程を含む半導体装置の製造方法に用いられるものである。この耐熱性粘着テープとしては、本発明の製造方法と同じのものが使用できる。
【００４８】
【実施例】
以下、本発明の構成と効果を具体的に示す実施例等について説明する。
【００４９】
実施例１
２５μｍ厚のポリイミドフィルム（東レデュポン製：カプトン１００Ｈ）を基材として、シリコーン系粘着剤（東レデュポン社製・ＳＤ４５８０）を用いて厚さ約２５μｍの粘着剤層を設けた耐熱性粘着テープを作製した（この粘着剤は、レオメトリック・サイエンティフィック社ＡＲＥＳを用いて、周波数１Ｈｚ、昇温速度５℃／ｍｉｎ、サンプルサイズφ７．９ｍｍのパラレルプレートによるせん断貯蔵弾性モードにて測定したところ、１７５℃における貯蔵弾性率が１．５×１０４ Ｐａであった）。なお、このテープは、ステンレス板に貼り合わせた状態で１７５℃にて３分加熱後の粘着力が３．５Ｎ／１９ｍｍ幅程度であった。この耐熱性粘着テープの粘着剤層を上向きとして広げておき、一辺が１６ＰｉｎタイプのＱＦＮが４個×４個に配列された銅製のリードフレームに半導体チップを搭載し、金線によってワイヤボンディングを施しておいたものをアウターパット側が密着するよう先のテープへ静かに載せ密着させた。
【００５０】
さらにエポキシ系封止樹脂（日東電工製：ＨＣ−３００Ｂタイプ）により、これらをモールドマシン（ＴＯＷＡ製Ｍｏｄｅｌ−Ｙ−ｓｅｒｉｓｅ）を用いて、１７５℃で、プレヒート設定３秒、インジェクション時間１２秒、キュア時間１５０秒にてモールドした後、耐熱性テープを剥離した。なお、さらに１７５℃にて３時間ほどポストモールドキュアを行って樹脂を十分に硬化させた後、ダイサーによって切断して、個々のＱＦＮタイプ半導体装置を得た。
【００５１】
このようにして得られたＱＦＮは、樹脂のはみ出しがみられない好適な半導体装置を得ることができた。
【００５２】
実施例２
厚さ１００μｍのポリエチレンテレフタレート製フィルム（東レ社製：ルミラーＳ−１０）を基材層として、ブチル（メタ）アクリレートモノマー１００重量部に対して（メタ）アクリル酸モノマー５重量部を構成モノマーとしたアクリル系共重合体を用いて、このポリマー１００重量部に対してエポキシ系架橋材（三菱ガス化学製：Ｔｅｔｒａｄ−Ｃ）を１．０重量部添加したアクリル系粘着剤（実施例１と同じ測定方法による１７５℃における貯蔵弾性率は９．０×１０４ Ｐａであった）を用いて５μｍの粘着剤層を設けた他は、実施例１と同様に検討を行った。なお、このテープは、ステンレス板に貼り合わせた状態で１７５℃にて３分加熱後の粘着力が４．５Ｎ／１９ｍｍ幅程度であり、本例によって得られたＱＦＮも実施例１同様に好適な半導体装置が得られていた。
【００５３】
比較例１
粘着剤として、実施例２で用いたアクリル系共重合体を用いて、このポリマー１００重量部に対してエポキシ系架橋材（三菱ガス化学製：Ｔｅｔｒａｄ−Ｃ）を６重量部添加したアクリル系粘着剤（実施例１と同じ測定方法による１７５℃における貯蔵弾性率が９．０×１０５ Ｐａであった）を用いた他は、実施例２と同様に検討を行った。しかしながら、テープにリードフレームを載せても十分な密着性を得ることができず、モールド時には樹脂のはみ出しをまったく抑えることができなかった。
【００５４】
比較例２
テープの粘着剤層の厚さが８０μｍ、ステンレス板に貼り合わせた状態で１７５℃にて３分間加熱後の粘着力が６．９Ｎ／１９ｍｍ幅のゴム系粘着剤を粘着剤層とした他は実施例１と同様に検討を行った。その結果、封止時のクランプ圧力によりモールド樹脂の漏れ出しが発生したばかりでなく、テープを剥がそうとした際、その粘着力でリードフレームが変形し、一部の樹脂封止部に剥離破壊を生じてしまった。
【図面の簡単な説明】
【図１】本発明の半導体装置の製造方法の一例を示す工程図
【図２】本発明におけるリードフレームの一例を示す図であり、（ａ）は正面図、（ｂ）は要部拡大図、（ｃ）は樹脂封止後の状態を示す底面図
【図３】本発明における樹脂封止工程の一例を示す縦断面図
【符号の説明】
１０ リードフレーム
１１ａ 開口
１１ｂ 端子部
１１ｃ ダイパッド
１５ 半導体チップ
１５ａ 電極パッド
１６ ボンディングワイヤ
１７ 封止樹脂
２０ 粘着テープ
２０ａ 基材
２０ｂ 粘着剤層
２１ 封止された構造物
２１ａ 半導体装置[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device including a sealing step of bonding a heat-resistant adhesive tape to an outer pad side of a lead frame on which mounting and connection of a semiconductor chip is completed, and then sealing the semiconductor chip side on one side with a sealing resin. The present invention relates to a production method and a heat-resistant adhesive tape used for the method.
[0002]
[Prior art]
In recent years, CSP (Chip Size / Scale Package) technology has attracted attention as an LSI mounting technology. Among these technologies, a package in which a lead terminal typified by a QFN (QuadFlat Non-leaded package) is incorporated in the package is one of the package forms that is particularly noted in terms of miniaturization and high integration. . Among such QFN manufacturing methods, in recent years, a plurality of QFN chips are neatly arranged on a die pad in a package pattern region of a lead frame, and are collectively sealed with a sealing resin in a mold cavity. In particular, attention has been paid to a MAP type manufacturing method in which individual QFN structures are cut by cutting to dramatically improve productivity per lead frame area.
[0003]
In such a method of manufacturing a QFN that collectively seals a plurality of semiconductor chips, the region to be clamped by the mold during resin sealing is only outside the resin sealing region that extends further outside the package pattern region. It is. Therefore, in the package pattern area, especially in the central part, the outer lead surface cannot be pressed with sufficient pressure to the mold, and it is very difficult to prevent the sealing resin from leaking to the outer lead side. The problem that the terminals of the QFN and the like are covered with resin is likely to occur.
[0004]
For this reason, in the QFN manufacturing method as described above, an adhesive tape is attached to the outer lead side of the lead frame, and a sealing effect using the self-adhesive force (masking) of the adhesive tape is used to form an outer layer during resin sealing. A manufacturing method for preventing resin leakage to the lead side has been proposed. At this time, bonding the heat-resistant adhesive tape after mounting the semiconductor chip on the lead frame or after performing the wire bonding can be performed by attaching the tape to the lead frame in a state where a very delicate circuit is completed. It has been considered that it is substantially difficult in terms of handling since the pressure is applied and the pressure is applied. Therefore, the heat-resistant adhesive tape is attached to the outer pad surface of the lead frame in the first stage, and then, after the semiconductor chip mounting process and the wire bonding process, it is attached to the sealing process with the sealing resin. (For example, see Patent Document 1).
[0005]
[Patent Document 1]
JP-A-2002-184801 (page 2, FIG. 1).
[0006]
[Problems to be solved by the invention]
However, the process of chip mounting and wire bonding is performed with the heat-resistant adhesive tape adhered, and the elasticity of the adhesive causes problems such as displacement during chip mounting and loss of connection energy in wire bonding operation. Easy to come. For this reason, as the above-mentioned heat-resistant pressure-sensitive adhesive tape, a tape having a small thickness and a high elastic modulus is used, but it is difficult to completely wipe off even if the displacement and the energy loss can be reduced to some extent. .
[0007]
In addition, since the adhesive curing and wire bonding processes when mounting the semiconductor chip are performed under high heating conditions, when heat-generating gas is generated from the heat-resistant adhesive tape, these gas components adhere to the inner lead surface or the semiconductor chip. This causes serious surface impairment, such as delamination of the resin at the interface between the mold resin and the lead frame, and significantly lowering the bondability during wire bonding, which impairs the reliability of the semiconductor device itself. There is a possibility.
[0008]
In view of the above, the present invention provides a pressure-sensitive adhesive tape which can be sufficiently adhered even after steps such as chip mounting and wire bonding have been performed in advance, thereby completely eliminating the above-mentioned problems of elasticity of the pressure-sensitive adhesive and contamination by off-gas. It is intended to avoid it.
[0009]
[Means for Solving the Problems]
The present inventors have conducted intensive studies on the physical properties and thickness of the heat-resistant pressure-sensitive adhesive tape in order to achieve the above object, and found that the pressure-sensitive adhesive material has a storage elastic modulus limited to a specific range at a high temperature, and has a specific thickness. It has been found that the use of a heat-resistant pressure-sensitive adhesive tape composed of a pressure-sensitive adhesive layer formed with a pressure-sensitive adhesive layer allows bonding even at the stage when a connection step such as wire bonding is completed, and has completed the present invention.
[0010]
That is, in the method of manufacturing a semiconductor device according to the present invention, a mounting step of bonding a semiconductor chip on a die pad of a metal lead frame, and a bonding wire between a terminal end of the lead frame and an electrode pad on the semiconductor chip. A connection step of electrically connecting, a bonding step of attaching a heat-resistant adhesive tape to the outer pad side of the lead frame after the completion of the connection step, and a sealing step of sealing the semiconductor chip side on one side with a sealing resin, And a cutting step of cutting the sealed structure into individual semiconductor devices, wherein the heat-resistant adhesive tape has a storage elastic modulus at 175 ° C. of 1.0 × 10 3. It is characterized by having a pressure-sensitive adhesive layer having a thickness of 1 to 50 μm consisting of Pa to 5.0 × 10 5 Pa. In the present invention, the physical properties such as the storage elastic modulus are values specifically measured by a method described later.
[0011]
In the above, it is preferable that the bonding step is performed by placing the lead frame on which the wiring step is completed on the heat-resistant adhesive tape with the adhesive layer on the upper side.
[0012]
On the other hand, the heat-resistant adhesive tape of the present invention is such that the semiconductor chip side is sealed on one side with a sealing resin after the heat-resistant adhesive tape is bonded to the outer pad side of the lead frame on which the mounting and connection of the semiconductor chip are completed. A heat-resistant pressure-sensitive adhesive tape used in a method for manufacturing a semiconductor device including a sealing step, wherein the storage elastic modulus at 175 ° C. is 1.0 × 10 3 Pa to 5.0 × 10 5 Pa, and the thickness is 1 to 50 μm. Characterized by having an adhesive layer of
[0013]
In the above, it is preferable that the adhesive strength after heating at 175 ° C. for 3 minutes in a state of being bonded to the stainless steel plate is 5.0 N / 19 mm width or less.
[0014]
[Effects]
After mounting the semiconductor chip on the lead frame or after performing wire bonding, bonding the heat-resistant adhesive tape is performed by applying pressure to the lead frame with a very delicate circuit completed. According to the present invention, the use of an adhesive material having a specific elastic modulus and a specific thickness strongly strengthens the lead frame. Sufficient adhesion can be obtained without pressure bonding. Therefore, there is no need to attach the heat-resistant adhesive tape itself prior to a step such as die attach or wire bonding.
[0015]
Therefore, the aforementioned problems such as displacement of the die attach due to the elasticity of the heat-resistant adhesive tape, connection energy loss in the wire bonding process, or contamination by off-gas from the heat-resistant adhesive tape are all fundamental causes. This is not a problem because the heat-resistant adhesive tape itself is not attached.
[0016]
In addition, since the pressure-sensitive adhesive layer has a storage elastic modulus at 175 ° C. of 1.0 × 10 3 Pa to 5.0 × 10 5 Pa, the elasticity of the material itself can secure appropriate softness. Thus, even if strong pressure bonding is not performed, it is possible to achieve sufficient adhesion due to the wettability of the adhesive. Therefore, even if the lead frame is in a delicate state where the connection process such as wire bonding has been completed, for example, by contacting with the adhesive surface of the tape, the wettability of the adhesive promotes close contact with the lead frame and as a masking tape Can exert its effect. In this case, since 175 ° C. is equivalent to a typical process temperature in a general transfer mold, the adhesiveness required for sufficient masking in an actual molding process can be obtained.
[0017]
In the above case, if the thickness of the pressure-sensitive adhesive layer is less than 1 μm, the effect of absorbing a step difference against delicate irregularities of the lead frame becomes poor, so that it is difficult to ensure adhesion. Accordingly, the adhesive layer preferably has a thickness of at least 1 μm or more, preferably 5 μm or more. On the other hand, when the thickness of the pressure-sensitive adhesive layer is increased, the adhesion is improved. However, when the thickness exceeds 50 μm, deformation distortion or the like may occur due to clamping pressure at the time of molding. Therefore, the thickness of the pressure-sensitive adhesive layer is preferably 50 μm or less, preferably 30 μm or less.
[0018]
In the present invention, in particular, the bonding step can be performed simply by placing the lead frame on which the connection step has been completed on the heat-resistant adhesive tape with the adhesive layer on the upper side, and in that case, a very delicate circuit There is no need to press and crimp the tape to the lead frame in a state where is completed, and problems such as breakage of the circuit hardly occur. In addition, sufficient adhesion can be obtained by sticking both together by a practical means by a simple process.
[0019]
Furthermore, when the adhesive strength after heating at 175 ° C. for 3 minutes with the heat-resistant adhesive tape bonded to a stainless steel plate is 5.0 N / 19 mm width or less according to a measuring method according to JIS Z 0237, sealing is performed. The adhesive strength required to prevent resin leakage in the stopping step is obtained, and peeling off after the sealing step is facilitated, and the sealing resin is not damaged. In this case, 3 minutes at 175 ° C. is a typical process temperature in the transfer molding and a typical time from the mounting of the lead frame on the mold to the completion of the molding. And the tape peeling force after performing the above.
[0020]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a process chart of an example of a method for manufacturing a semiconductor device according to the present invention.
[0021]
As shown in FIGS. 1A to 1F, the method of manufacturing a semiconductor device according to the present invention includes the steps of mounting a semiconductor chip 15, connecting with a bonding wire 16, and attaching a heat-resistant adhesive tape 20. And at least a cutting step of cutting the sealed structure 21 with the sealing resin 17.
[0022]
The mounting step is a step of bonding the semiconductor chip 15 onto the die pad 11c of the metal lead frame 10, as shown in FIGS. 1A and 1B. In the present invention, a metal lead frame 10 to which the heat-resistant adhesive tape 20 is not attached is used.
[0023]
The lead frame 10 is formed by engraving a terminal pattern of QFN using a metal such as copper, for example, and covering (plating) the electrical contact portions with a material such as silver, nickel, palladium, or gold. It may have been. The thickness of the lead frame 10 is generally 50 to 300 μm. Note that this does not apply to a portion that is partially processed to be thin by etching or the like.
[0024]
The lead frame 10 is preferably one in which the arrangement patterns of the individual QFNs are neatly arranged so that the lead frame 10 can be easily separated in a later cutting step. For example, as shown in FIG. 2, a shape arranged in a vertical and horizontal matrix on the lead frame 10 is called a matrix QFN or MAP-QFN, and is one of the most preferable lead frame shapes. In particular, in recent years, in order to increase the number of packages arranged in one lead frame from the viewpoint of productivity, not only are these individual packages miniaturized, but also a large number of packages can be formed with one sealing portion. The number of these arrangements has also been greatly expanded to enable sealing.
[0025]
As shown in FIGS. 2A and 2B, in the package pattern region 11 of the lead frame 10, a QFN board design in which a plurality of terminals 11b are arranged in a plurality of openings 11a adjacent to each other is neatly arranged. . In the case of a general QFN, each of the board designs (regions divided by the lattice in FIG. 2A) includes a terminal portion 11b having an outer lead surface on the lower side, which is arranged around the opening 11a. It comprises a die pad 11c arranged at the center of the opening 11a, and a diver 11d for supporting the die pad 11c at four corners of the opening 11a.
[0026]
On the lead frame 10 described above, a semiconductor chip 15, that is, a silicon wafer chip which is a semiconductor integrated circuit portion is mounted. A fixing area called a die pad 11c is provided on the lead frame 10 for fixing the semiconductor chip 15, and a method of bonding (fixing) to the die pad 11c uses a conductive paste 19, an adhesive tape, or the like. Various methods such as an adhesive are used. In the case of die bonding using a conductive paste, a thermosetting adhesive, or the like, it is generally heated and cured at a temperature of about 150 to 200 ° C. for several minutes to 2 hours.
[0027]
In the connection step, as shown in FIG. 1C, the tip of the terminal portion 11b (inner lead) of the lead frame 10 and the electrode pad 15a on the semiconductor chip 15 are electrically connected by the bonding wire 16. . As the bonding wire 16, for example, a gold wire or an aluminum wire is used. Generally, in a state heated to 120 to 250 ° C., the connection is made by using both vibration energy by ultrasonic waves and compression energy by applied pressure. At this time, the lead frame 10 can be securely fixed to a heat block or the like by vacuum suction.
[0028]
In the attaching step, as shown in FIG. 1D, a heat-resistant adhesive tape 20 is attached to the outer pad side of the lead frame 10 after the connection step is completed. In particular, it is preferable to perform bonding by placing the lead frame 10 on which the connection step has been completed on a heat-resistant adhesive tape 20 with the adhesive layer 20b facing upward. In other words, the heat-resistant adhesive tape 20 is bonded to the adherend in a state where the semiconductor chip 15 is already mounted on the lead frame and the wires are connected. This may lead to deformation of the lead frame 10 and damage to the semiconductor circuit. Therefore, for example, the lead frame 10 on which the connection step is completed is placed on the heat-resistant adhesive tape 20 with the adhesive layer 20b on the upper side, and the lead frame 10 is deformed, for example, by obtaining adhesion due to its own weight. It is preferable to perform a bonding method that does not have such a structure.
[0029]
It is difficult to secure sufficient adhesiveness with a general heat-resistant pressure-sensitive adhesive tape at this level of pressure. However, in the present invention, the heat resistance of the pressure-sensitive adhesive layer 20b having an appropriate elastic modulus and an appropriate thickness is reduced. By using the adhesive tape 20, it is possible to obtain sufficient adhesiveness, and it is possible to obtain a masking effect of suitably preventing resin leakage during molding. Details of the heat-resistant adhesive tape 20 will be described later.
[0030]
Further, it is preferable that the heat-resistant pressure-sensitive adhesive tape 20 is attached to, for example, at least the outside of the package pattern region 11 and is attached to a region including the entire outer periphery of the resin sealing region to be resin-sealed. Normally, the lead frame 10 has a guide pin hole 13 near an end for positioning at the time of resin sealing, and it is preferable that the lead frame 10 is adhered to a region where the hole is not closed. In addition, since a plurality of resin sealing regions are arranged in the longitudinal direction of the lead frame 10, it is preferable that the adhesive tape 20 be continuously applied so as to extend over the plurality of regions.
[0031]
The sealing step is a step of sealing the semiconductor chip side on one side with a sealing resin 17 as shown in FIG. The sealing step is performed to protect the semiconductor chip 15 and the bonding wires 16 mounted on the lead frame 10, and is molded in a mold using a sealing resin 17 such as an epoxy resin. Is typical. At this time, as shown in FIG. 3, a sealing step is performed simultaneously with a plurality of sealing resins 17 using a mold 18 including an upper mold 18a and a lower mold 18b having a plurality of cavities 12. Is common. Specifically, for example, the heating temperature at the time of resin sealing is 170 to 180 ° C. After curing at this temperature for several minutes, post-mold curing is further performed for several hours. Preferably, the heat-resistant adhesive tape 20 is peeled off before the post-mold cure.
[0032]
The cutting step is a step of cutting the sealed structure 21 into individual semiconductor devices 21a, as shown in FIG. Generally, a cutting step of cutting the cut portion 17a of the sealing resin 17 using a rotary cutting blade such as a dicer is exemplified.
[0033]
The heat-resistant pressure-sensitive adhesive tape 20 used in the present invention has a pressure-sensitive adhesive layer having a storage elastic modulus at 175 ° C. of 1.0 × 10 3 Pa to 5.0 × 10 5 Pa and a thickness of 1 to 50 μm. And The heat-resistant pressure-sensitive adhesive tape 20 may be composed of only a pressure-sensitive adhesive layer, but preferably includes a substrate 20a and a pressure-sensitive adhesive layer 20b as shown in FIG.
[0034]
Since the pressure-sensitive adhesive layer 20b of the pressure-sensitive adhesive tape 20 is clamped in a mold together with the lead frame at the time of molding, it is preferable that the pressure-sensitive adhesive layer 20b has a certain high elasticity so that a large deformation or distortion does not occur with respect to the clamping pressure. It can be expected in terms of accuracy.
[0035]
However, in order to secure the original adhesive function of the pressure-sensitive adhesive, it is not preferable that the material is a material having high elasticity, so-called a hard material. It is necessary to ensure flexibility or wettability for adhesion. Therefore, in order to achieve both of the required performances of these conflicting pressure-sensitive adhesive layers, in the present invention, the storage elastic modulus of the pressure-sensitive adhesive layer at 175 ° C. is 1.0 × 10 3 Pa to 5.0 × 10 5 Pa, Preferably it is 5.0 × 10 3 Pa to 1.0 × 10 5 Pa, and the thickness of the pressure-sensitive adhesive layer is 1 to 50 μm, more preferably 5 to 30 μm. This makes it possible to minimize the deformation and strain during mold clamping as a whole of the adhesive layer, and it is suitable even if strong pressure is not applied to the lead frame due to the appropriate elasticity of the adhesive. Since sufficient adhesion can be obtained, sufficient sealing properties can be obtained in the sealing step. Here, the storage elastic modulus is a shear storage elasticity value measured by a viscoelastic spectrometer at a frequency of 1 Hz and a heating rate of 5 ° C./min.
[0036]
The material of the pressure-sensitive adhesive having each physical property as described above is not particularly limited, but as an example, a silicone-based pressure-sensitive adhesive, an acrylic-based pressure-sensitive adhesive, a rubber-based pressure-sensitive adhesive and the like have an appropriate storage modulus and adhesive strength. It is a suitable pressure-sensitive adhesive that can easily obtain In particular, silicone-based pressure-sensitive adhesives are one of the most suitable materials in the present invention because they can easily secure sufficient heat resistance against the heating history during molding, and easily obtain stable pressure-sensitive adhesive properties with respect to peelability after heating. It can be said that.
[0037]
The silicone-based pressure-sensitive adhesive contains, for example, a silicone rubber or a silicone resin containing an organopolysiloxane as a main component, and the pressure-sensitive adhesive layer can be formed by adding a crosslinking agent and curing the resin.
[0038]
As the above-mentioned silicone rubber, various kinds used for a silicone-based pressure-sensitive adhesive can be used without particular limitation. For example, an organopolysiloxane containing dimethylsiloxane as a main constituent unit can be preferably used. A vinyl group or other functional group may be introduced into the organopolysiloxane as needed. The weight average molecular weight of the organopolysiloxane is usually 180,000 or more, but preferably 280,000 to 1,000,000, particularly preferably 500,000 to 900,000.
[0039]
As the silicone resin, various resins used for silicone-based pressure-sensitive adhesives can be used without any particular limitation. For example, at least one unit selected from the group consisting of M units (R 3 SiO 1/2 ), Q units (SiO 2 ), T units (RSiO 3/2 ), and D units (R 2 SiO) (the above units) In the formula, R represents a monovalent hydrocarbon group or a hydroxyl group). The organopolysiloxane comprising the copolymer may have various functional groups such as a vinyl group, if necessary, in addition to having an OH group. The functional group to be introduced may cause a crosslinking reaction. As the copolymer, an MQ resin composed of M units and Q units is preferable. Although the ratio (molar ratio) of the M unit to the Q unit, T unit or D unit is not particularly limited, the former: the latter = about 0.3: 1 to 1.5: 1, preferably 0.5: 1 to 1: 1 It is preferable to use one having a ratio of about 3: 1.
[0040]
The blending ratio (weight ratio) of the silicone rubber and the silicone resin is preferably about 100: 100 to 100: 220, and more preferably about 100: 120 to 100: 180. The silicone rubber and the silicone resin may be used simply by blending them, or may be a partial condensate thereof.
[0041]
As a method of forming the pressure-sensitive adhesive layer, a pressure-sensitive adhesive is applied to a base material by a method such as a reverse coating method, a fountain coating method, or a dipping method, and cured by a crosslinking method (heating, UV irradiation, or the like). Can be formed.
[0042]
Further, as other optional components, various additives such as a crosslinking agent, a plasticizer, a filler, a pigment, a dye, an antioxidant, and an antistatic agent can also be added. Further, if necessary, an overcoating such as an undercoat of the adhesive may be performed, or a back surface treatment may be performed on the back surface side of the base material.
[0043]
Further, since these heat-resistant pressure-sensitive adhesive tapes are characterized by having at least the pressure-sensitive adhesive layer as described above, it may be a heat-resistant pressure-sensitive adhesive tape composed of only the pressure-sensitive adhesive layer, In consideration of handling as an adhesive tape and adherence to the facing side, a configuration in which a base layer having appropriate strength and an adhesive layer are combined is more preferable.
[0044]
The base material layer in this case is not particularly limited as long as it is a material that does not significantly deform or burn due to the heating history in the molding process.As an example, a polyimide film, a polyester film, a plastic film such as a polyolefin film, etc. In addition, paper, cloth, metal foil such as aluminum and copper, and the like can also be used.
[0045]
This heat-resistant adhesive tape will be peeled off at any stage after the sealing step, but it is not only difficult to peel off the adhesive tape with too strong adhesive force, but in some cases The peeling stress may cause peeling or breakage of the molded resin. Therefore, it is rather unpreferable that the adhesive resin has a higher adhesive strength than the adhesive force for suppressing the protrusion of the sealing resin. In this case, after heating at 175 ° C. for 3 minutes in a state of being bonded to a stainless steel plate, the adhesive force measured according to JIS Z 0237 is 5.0 N / 19 mm width or less, more preferably 2.0 N / 19 mm width or less. It is good to be.
[0046]
In the present invention, the storage elastic modulus can be adjusted to a desired range by, for example, changing the type of monomer, changing the molecular weight of the material, or adding a filler.
[0047]
On the other hand, as described above, the heat-resistant adhesive tape of the present invention is formed by bonding the heat-resistant adhesive tape to the outer pad side of the lead frame on which the mounting and connection of the semiconductor chip has been completed, and then sealing the semiconductor chip with a sealing resin. Is used in a method for manufacturing a semiconductor device including a sealing step of sealing one side of the semiconductor device. As the heat-resistant pressure-sensitive adhesive tape, the same tape as in the production method of the present invention can be used.
[0048]
【Example】
Hereinafter, examples and the like that specifically show the configuration and effects of the present invention will be described.
[0049]
Example 1
Using a 25 μm thick polyimide film (manufactured by Toray Dupont: Kapton 100H) as a base material, a heat-resistant adhesive tape having an adhesive layer having a thickness of about 25 μm was prepared using a silicone-based adhesive (manufactured by Toray Dupont, SD4580). The adhesive was measured using ARES manufactured by Rheometric Scientific in a shear storage elastic mode using a parallel plate with a frequency of 1 Hz, a temperature rising rate of 5 ° C./min, and a sample size of φ7.9 mm. Storage elastic modulus at 1.5 ° C. was 1.5 × 10 4 Pa). This tape had an adhesive strength of about 3.5 N / 19 mm width after being heated at 175 ° C. for 3 minutes in a state where the tape was bonded to a stainless steel plate. With the adhesive layer of this heat-resistant adhesive tape facing upward, the semiconductor chip is mounted on a copper lead frame in which 16-pin type QFNs are arranged in 4 × 4 pieces, and wire bonding is performed using gold wires. The material placed on the tape was gently placed on the tape so that the outer pat side was in close contact with the tape.
[0050]
Further, using an epoxy-based sealing resin (manufactured by Nitto Denko: HC-300B type), using a molding machine (Model-Y-series manufactured by TOWA), these are preheated at 175 ° C. for 3 seconds, injection time is 12 seconds, and cured. After molding for 150 seconds, the heat-resistant tape was peeled off. After further performing post-mold curing at 175 ° C. for about 3 hours to sufficiently cure the resin, the resin was cut with a dicer to obtain individual QFN type semiconductor devices.
[0051]
The thus obtained QFN was able to obtain a suitable semiconductor device in which the resin did not protrude.
[0052]
Example 2
A 100 μm-thick polyethylene terephthalate film (Lumilar S-10, manufactured by Toray Industries, Inc.) was used as a base layer, and 5 parts by weight of (meth) acrylic acid monomer was used as a constituent monomer with respect to 100 parts by weight of butyl (meth) acrylate monomer. Using an acrylic copolymer, an acrylic pressure-sensitive adhesive (the same measurement as in Example 1) in which 1.0 part by weight of an epoxy-based cross-linking material (Mitsubishi Gas Chemical: Tetrad-C) is added to 100 parts by weight of this polymer The same examination as in Example 1 was conducted, except that a 5 μm pressure-sensitive adhesive layer was provided by using the method (the storage modulus at 175 ° C. was 9.0 × 10 4 Pa). The adhesive strength after heating at 175 ° C. for 3 minutes in a state where the tape was bonded to a stainless steel plate was about 4.5 N / 19 mm width, and the QFN obtained in this example is also suitable as in Example 1. Semiconductor device has been obtained.
[0053]
Comparative Example 1
Using the acrylic copolymer used in Example 2 as an adhesive, an acrylic adhesive obtained by adding 6 parts by weight of an epoxy-based crosslinking material (Mitsubishi Gas Chemical: Tetrad-C) to 100 parts by weight of this polymer Examination was carried out in the same manner as in Example 2 except that the agent (the storage elastic modulus at 175 ° C. by the same measuring method as in Example 1 was 9.0 × 10 5 Pa). However, even if the lead frame is placed on the tape, sufficient adhesion cannot be obtained, and the protrusion of the resin cannot be suppressed at the time of molding.
[0054]
Comparative Example 2
The thickness of the adhesive layer of the tape was 80 μm, and the adhesive strength after heating at 175 ° C. for 3 minutes in a state of being bonded to a stainless steel plate was 6.9 N / 19 mm in width. A study was conducted in the same manner as in Example 1. As a result, not only did leakage of the mold resin occur due to the clamping pressure during sealing, but also when the tape was to be peeled off, the lead frame was deformed due to the adhesive force, and peeling and destruction occurred in some resin sealing parts Has occurred.
[Brief description of the drawings]
FIG. 1 is a process diagram showing an example of a method for manufacturing a semiconductor device according to the present invention. FIG. 2 is a diagram showing an example of a lead frame according to the present invention, wherein (a) is a front view and (b) is an enlarged view of a main part. , (C) is a bottom view showing a state after resin sealing. FIG. 3 is a longitudinal sectional view showing an example of a resin sealing step in the present invention.
DESCRIPTION OF SYMBOLS 10 Lead frame 11a Opening 11b Terminal part 11c Die pad 15 Semiconductor chip 15a Electrode pad 16 Bonding wire 17 Sealing resin 20 Adhesive tape 20a Base material 20b Adhesive layer 21 Sealed structure 21a Semiconductor device

Claims (4)

金属製のリードフレームのダイパッド上に半導体チップをボンディングする搭載工程と、前記リードフレームの端子部先端と前記半導体チップ上の電極パッドとをボンディングワイヤで電気的に接続する結線工程と、結線工程の完了したリードフレームのアウターパッド側に耐熱性粘着テープを貼り合わせる貼着工程と、封止樹脂により半導体チップ側を片面封止する封止工程と、封止された構造物を個別の半導体装置に切断する切断工程とを、少なくとも含む半導体装置の製造方法であって、前記耐熱性粘着テープは、１７５℃における貯蔵弾性率が１．０×１０３ Ｐａ〜５．０×１０５ Ｐａからなる厚さ１〜５０μｍの粘着剤層を有することを特徴とする半導体装置の製造方法。A mounting step of bonding a semiconductor chip on a die pad of a metal lead frame, a connecting step of electrically connecting a terminal end of the lead frame and an electrode pad on the semiconductor chip with a bonding wire, and a connecting step. A bonding step of attaching a heat-resistant adhesive tape to the outer pad side of the completed lead frame, a sealing step of sealing the semiconductor chip side with a sealing resin on one side, and a sealed structure for individual semiconductor devices. A heat treatment pressure-sensitive adhesive tape having a storage elastic modulus at 175 ° C. of 1.0 × 10 3 Pa to 5.0 × 10 5 Pa. A method for manufacturing a semiconductor device, comprising a pressure-sensitive adhesive layer having a thickness of 1 to 50 μm. 前記貼着工程は、結線工程の完了したリードフレームを、粘着剤層を上側にした前記耐熱性粘着テープに載置することで貼り合わせを行う請求項１記載の半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 1, wherein, in the attaching step, the lead frame on which the wiring step is completed is attached to the heat-resistant adhesive tape with the adhesive layer on the upper side. 半導体チップの搭載及び結線が完了したリードフレームのアウターパッド側に、耐熱性粘着テープを貼り合わせた後に、封止樹脂により半導体チップ側を片面封止する封止工程を含む半導体装置の製造方法に用いられる耐熱性粘着テープであって、１７５℃における貯蔵弾性率が１．０×１０３ Ｐａ〜５．０×１０５ Ｐａからなる厚さ１〜５０μｍの粘着剤層を有することを特徴とする耐熱性粘着テープ。After attaching a heat-resistant adhesive tape to the outer pad side of the lead frame on which the mounting and connection of the semiconductor chip are completed, the method for manufacturing a semiconductor device includes a sealing step of sealing the semiconductor chip side on one side with a sealing resin. A heat-resistant pressure-sensitive adhesive tape to be used, which has a pressure-sensitive adhesive layer having a storage elastic modulus at 175 ° C. of 1.0 × 10 3 Pa to 5.0 × 10 5 Pa and a thickness of 1 to 50 μm. Heat resistant adhesive tape. ステンレス板に貼り合わせた状態で１７５℃にて３分間加熱後の粘着力が５．０Ｎ／１９ｍｍ幅以下である請求項３記載の耐熱性粘着テープ。The heat-resistant adhesive tape according to claim 3, wherein the adhesive strength after heating at 175 ° C for 3 minutes in a state of being bonded to a stainless steel plate is 5.0 N / 19 mm width or less.
JP2002350180A 2002-12-02 2002-12-02 Semiconductor device manufacturing method and heat-resistant adhesive tape used therefor Expired - Lifetime JP3934041B2 (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008131006A (en) * 2006-11-24 2008-06-05 Nitto Denko Corp Heat-resistant adhesive tape for manufacturing semiconductor device
JP2011124495A (en) * 2009-12-14 2011-06-23 Nitto Denko Corp Heat-resistant adhesive tape for sealing resin, and method of manufacturing resin-sealed semiconductor device using the same
CN102136432A (en) * 2010-01-26 2011-07-27 东丽世韩株式会社 Method of making semiconductor device through heat-resistant gluing sheet
JP2012062373A (en) * 2010-09-14 2012-03-29 Nitto Denko Corp Heat-resistant pressure-sensitive adhesive tape for manufacturing semiconductor device, and method for manufacturing the semiconductor device using the tape
WO2012111540A1 (en) * 2011-02-14 2012-08-23 日東電工株式会社 Heat-resistant adhesive tape for semiconductor device manufacturing, and method for manufacturing semiconductor chips using tape
KR101218144B1 (en) * 2012-05-01 2013-01-21 도레이첨단소재 주식회사 Manufacturing method of semiconductor device using a heat-resistant adhesive sheet
KR20140145414A (en) * 2013-06-13 2014-12-23 엘지이노텍 주식회사 Light emitting apparatus

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002033345A (en) * 2000-07-14 2002-01-31 Dainippon Printing Co Ltd Method for manufacturing resin-sealed semiconductor device
JP2002226797A (en) * 2001-01-29 2002-08-14 Nitto Denko Corp Heat resistant adhesive tape and method for manufacturing semiconductor device
JP2002249737A (en) * 2001-02-22 2002-09-06 Nitto Denko Corp Method for producing air-permeable adhesive sheet and air-permeable adhesive sheet
JP2002343816A (en) * 2001-05-18 2002-11-29 Lintec Corp Resin tie bar, tape for forming the same, lead frame therewith, resin sealing-type semiconductor device and manufacturing method therefor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002033345A (en) * 2000-07-14 2002-01-31 Dainippon Printing Co Ltd Method for manufacturing resin-sealed semiconductor device
JP2002226797A (en) * 2001-01-29 2002-08-14 Nitto Denko Corp Heat resistant adhesive tape and method for manufacturing semiconductor device
JP2002249737A (en) * 2001-02-22 2002-09-06 Nitto Denko Corp Method for producing air-permeable adhesive sheet and air-permeable adhesive sheet
JP2002343816A (en) * 2001-05-18 2002-11-29 Lintec Corp Resin tie bar, tape for forming the same, lead frame therewith, resin sealing-type semiconductor device and manufacturing method therefor

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008131006A (en) * 2006-11-24 2008-06-05 Nitto Denko Corp Heat-resistant adhesive tape for manufacturing semiconductor device
JP2011124495A (en) * 2009-12-14 2011-06-23 Nitto Denko Corp Heat-resistant adhesive tape for sealing resin, and method of manufacturing resin-sealed semiconductor device using the same
CN102136432A (en) * 2010-01-26 2011-07-27 东丽世韩株式会社 Method of making semiconductor device through heat-resistant gluing sheet
JP2012062373A (en) * 2010-09-14 2012-03-29 Nitto Denko Corp Heat-resistant pressure-sensitive adhesive tape for manufacturing semiconductor device, and method for manufacturing the semiconductor device using the tape
WO2012111540A1 (en) * 2011-02-14 2012-08-23 日東電工株式会社 Heat-resistant adhesive tape for semiconductor device manufacturing, and method for manufacturing semiconductor chips using tape
KR101218144B1 (en) * 2012-05-01 2013-01-21 도레이첨단소재 주식회사 Manufacturing method of semiconductor device using a heat-resistant adhesive sheet
KR20140145414A (en) * 2013-06-13 2014-12-23 엘지이노텍 주식회사 Light emitting apparatus
KR102042471B1 (en) 2013-06-13 2019-11-08 엘지이노텍 주식회사 Light emitting apparatus

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