JP2004104134A - Pattern-forming method and thin-film transistor manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a new manufacturing method of a TFT by devising a pattern forming method, where photolithographic processes can be reduced easily and conveniently, and drastically reducing the production process of a liquid crystal display device. <P>SOLUTION: A material membrane constituting a TFT is laminated and formed on an insulating membrane substrate, and then a resist mask, having a plurality of regions whose thickness of the membrane is different to one another, is formed at the uppermost layer of the material membrane by conducting patterning. Then, a pattern forming of a conductive body membrane is conducted by a lift-off method by using this resist mask. Or a plurality of material membranes among the material membranes, where a resist mask having a plurality of regions whose membrane thickness is different to one another formed separately, is made as an etching mask and laminated are processed sequentially. By these new pattern forming method and process method, a liquid crystal display device manufactured in five photolithographic processes in the conventional technique is manufactured in two or three photolithographic processes. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to a method for manufacturing a thin film transistor (TFT) used for a liquid crystal display device and a method for forming a pattern thereof.

(4) In an active matrix substrate for a liquid crystal display device, a TFT, particularly an inversely staggered TFT, is generally used. In the manufacture of this active matrix substrate for a liquid crystal display device, five photolithography steps (hereinafter, referred to as a photolithography step) are currently required.

(4) The element structure (for example, TFT structure) constituting the active matrix substrate for the liquid crystal display device is much simpler than that of the semiconductor integrated circuit, and it is urgently necessary to shorten the manufacturing process.

削減 To shorten the manufacturing process, it is effective to reduce the photolithography process. The inventor has been studying reduction and simplification of the photolithography process for many years. Japanese Patent Application Laid-Open No. 11-307780 (Patent Document 1) and the like propose a method of forming a resist mask having a plurality of regions having different film thicknesses by devising an exposure method using a photolithography technique. A technique for manufacturing a TFT using such a resist mask is disclosed.

The present invention is to further reduce the manufacturing process of the active matrix substrate for a liquid crystal display device. Therefore, the present inventor has devised a novel pattern forming method using a resist mask having a plurality of regions having different thicknesses from each other, and by making full use of this pattern forming method, a TFT constituting the active matrix substrate is formed. Can be greatly reduced. This pattern forming method basically includes a resist mask forming technique having a plurality of regions having different thicknesses from each other and a lift-off technique.

This lift-off technique has been often used in forming wiring of semiconductor integrated circuits. Therefore, as a conventional technique, first, wiring formation by this lift-off technique will be described with reference to FIGS. 12 and 13 with reference to a prior art described in Japanese Patent Application Laid-Open No. 7-240535 (Patent Document 2).

As shown in FIG. 12A, a lower layer electrode 202 such as a gate electrode of a TFT is formed by patterning a metal such as chromium on a glass substrate 201 which is a transparent insulating substrate. Then, an insulating film 203 such as a gate insulating film of a TFT is formed so as to cover the lower electrode 202. Then, a first resist mask 205 having a first opening 204 is formed by a known photolithography technique, and a contact hole 206 reaching the surface of the lower electrode 202 is formed in the insulating film 203 using the first resist mask 205 as an etching mask. .

Next, using the photomask 209 having the light-shielding portion 207 and the light-transmitting portion 208 as shown in FIG. 12B as a mask, the first resist mask 205 is exposed again with the exposure light 210. After this exposure, the laminated resist film is developed by an ordinary method.

Thus, as shown in FIG. 12C, a second resist mask 212 having a second opening 211 larger than the contact hole 206 is formed.

Next, a metal film 213 is deposited on the entire surface by a sputtering method. In this way, as shown in FIG. 13A, a metal film 213 is formed on the surface of the insulating film 203 and the surface of the second resist mask through the second opening 211 to be connected to the lower electrode 202.

Next, the second resist mask 212 is removed by a normal lift-off technique. In the step of removing the second resist mask 212, the metal film 213 deposited on the second resist mask 212 is removed at the same time, and the metal film 213 is patterned. Subsequently, the second resist mask 212 is peeled and removed.

Thus, as shown in FIG. 13B, an upper electrode 214 connected to the lower electrode 202 through the contact hole 206 provided in the insulating film 203 is formed.
JP-A-11-307780 JP-A-7-240535

As described above, in the conventional technique for forming two layers of interconnects connected to each other, whether the method is based on the lift-off technique or the etching technique, the lower layer electrode, the contact hole, the upper layer At least three photolithography steps are required for the electrodes.

The above-mentioned conventional technique is intended to shorten the photolithography process of the lift-off technique. However, in the related art, in the etching of the insulating film 203, for example, in dry etching, the surface of the first resist mask 205 is deteriorated by light irradiation or ion irradiation. Attempts to transfer the pattern to the first resist mask 205 thus altered with the exposure irradiation light 210 described with reference to FIG. For this reason, this method cannot be applied to the formation of electrodes or wiring in the manufacture of an active matrix substrate.

現在 At present, it has become essential to reduce the manufacturing cost of liquid crystal display devices. However, in order to manufacture such an active matrix substrate for a liquid crystal display device, at least five photolithography steps are used in the related art. Therefore, it has become essential to reduce the number of photolithography steps for manufacturing an active matrix substrate for a liquid crystal display device, and technical development therefor is strongly desired.

(4) Such a reduction in the number of photolithography steps inevitably increases the production yield of the liquid crystal display device and improves the productivity. And the reliability is also improved.

An object of the present invention is to provide a novel pattern forming method capable of easily reducing the number of photolithography steps. Another object of the present invention is to provide a new method of manufacturing a TFT, which greatly shortens the manufacturing process of a liquid crystal display device.

For this purpose, the present invention provides a step of forming a lower electrode on an insulating substrate, covering the lower electrode and forming an insulating film, and a resist mask patterned to have a plurality of thicknesses. Forming a resist mask having an opening in the first portion on the surface of the insulating film, using a thin region as a first portion and a thick region as a second portion, and using the resist mask as an etching mask. Forming a contact hole reaching the surface of the lower electrode in the opening by etching the insulating film; and subsequently, covering the second portion remaining after the first portion is removed by etching. Forming a conductor film; and patterning the conductor film by lift-off by removing the second portion after the formation of the conductor film.

Here, the etching removal of the first portion is performed by dry etching using an active species in which a halogen compound gas and an oxygen gas are plasma-excited. Alternatively, the etching of the insulating film is dry etching, the surface of the second portion is modified by the dry etching, and the cross-sectional shape of the second portion is inversely tapered by the dry etching of the first portion. I do.

Here, in the mask pattern of the photomask used in the photolithography process, a light-shielding portion, a semi-light-transmitting portion, and a light-transmitting portion are formed, and the light-shielding portion pattern, the semi-light-transmitting portion pattern, and the light-transmitting portion are formed by one exposure. After the pattern and the resist film (photosensitive organic film) are transferred and irradiated, the resist mask is formed through development. Alternatively, a predetermined region of the resist film is continuously exposed to light using two or more types of photomasks having different mask patterns in the exposure in the photolithography process, and then the resist mask is formed through development. The resist film is composed of two resist films having different exposure sensitivities.

Alternatively, the present invention is a method for forming a thin film transistor (TFT) on an insulating substrate, wherein a step of laminating and forming a material film forming the TFT on the insulating film substrate is different from a film thickness. A step of patterning and forming a resist mask having a plurality of regions on the uppermost layer of the material film, and a step of processing a plurality of material films of the stacked material films using the resist mask as an etching mask; Forming another resist mask having a plurality of regions having different thicknesses, and then patterning the conductive film by the pattern formation method using lift-off to form a TFT electrode or wiring.

Alternatively, according to the present invention, a gate electrode is formed on an insulating substrate by patterning, and the insulating substrate and the gate electrode are covered and a gate insulating film, a semiconductor thin film, a semiconductor thin film for ohmic contact, and a conductive film for source and drain are sequentially laminated. Forming a resist mask having a first portion of a thin region and a second portion of a thick region on the conductive film for source and drain, and forming the resist mask on the conductive film for source / drain. A step of sequentially etching the conductive film for source / drain, a semiconductor thin film for ohmic contact, and a semiconductor thin film by etching with an etching mask; and dry etching with active species in which a halogen compound gas and an oxygen gas are plasma-excited. Etching back the resist mask until is etched, Patterning the conductive film for source and drain and the semiconductor thin film for ohmic contact by etching using the second portion remaining after the etch-back step as an etching mask, and forming a passivation film on the entire surface after removing the resist mask. Again, another resist mask having a plurality of regions having different film thicknesses is formed, and the conductor film is patterned by the pattern formation method using the lift-off, and wirings respectively connected to the gate electrode and the source / drain electrodes are formed. Forming step.

Alternatively, the present invention comprises a step of sequentially laminating a conductive film for a gate electrode, a gate insulating film, a semiconductor thin film, a semiconductor thin film for an ohmic contact, and a conductive film for a source / drain on an insulating substrate; Forming a resist mask having a portion and a second portion of a thick region on the conductive film for source / drain, and etching the conductive film for source / drain by etching using the resist mask as an etching mask. The first portion is etched by a step of sequentially etching a film, a semiconductor thin film for ohmic contact, a semiconductor thin film, a gate insulating film, and a conductive film for a gate electrode, and a dry etching by active species in which a halogen compound gas and an oxygen gas are plasma-excited. Etching back the resist mask until completed, and the etch back process Patterning the source / drain conductive film and the ohmic contact semiconductor thin film by etching using the second portion remaining as an etching mask, forming a passivation film on the entire surface after removing the resist mask, Forming another resist mask having a plurality of regions having different thicknesses, patterning the conductive film by the pattern forming method using the lift-off, and forming wirings respectively connected to the gate electrode and the source / drain electrodes; And

Alternatively, the present invention provides a method for forming a gate electrode on an insulating substrate by patterning and covering the insulating substrate and the gate electrode to form a gate insulating film, and forming a semiconductor thin film and an ohmic contact semiconductor thin film on the gate insulating film. And a semiconductor thin film in which a resist mask having a first portion of a thin film region and a second portion of a thick film region is patterned by the gate insulating film and the semiconductor thin film for ohmic contact. Forming a contact hole by dry-etching the gate insulating film by etching using the resist mask as an etching mask, and forming a contact hole reaching the surface of the gate electrode by plasma etching with a halogen compound gas and an oxygen gas. The first portion is etched by dry etching using the excited active species. Etching the resist mask, covering the second part remaining after the etch back step, forming a metal conductive film on the entire surface, and removing the second part by a lift-off method. Patterning a conductive film to form a wiring connected to the gate electrode and a source / drain electrode of a TFT.

As described above, according to the present invention, a material film forming a TFT is laminated on an insulating film substrate, and then a resist mask having a plurality of regions having different thicknesses is patterned on the uppermost layer of the material film. Formed. Then, the conductor film is patterned by a lift-off method using the resist mask. Alternatively, a plurality of material films among the stacked material films are sequentially processed using a separately formed resist mask having a plurality of regions having different thicknesses as an etching mask.

(4) With the new pattern forming method and processing method as described above, a liquid crystal display device that has been manufactured in five photolithographic processes by the conventional technology can be manufactured in two or three photolithographic processes.

The reduction in the number of steps increases the production yield of the liquid crystal display device, increases the productivity, and significantly reduces the production cost of the liquid crystal display device.

In the main part of the present invention described above, a material film constituting a TFT is laminated on an insulating film substrate and formed, and then a resist mask having a plurality of regions having different thicknesses is formed on the top of the material film. It is formed by patterning on the upper layer. Then, a conductive film pattern is formed by a lift-off method using the resist mask. Alternatively, a plurality of material films among the stacked material films are sequentially processed using a separately formed resist mask having a plurality of regions having different thicknesses as an etching mask.

(4) With the new pattern forming method and processing method as described above, a liquid crystal display device that has been manufactured in five photolithographic processes by the conventional technology can be manufactured in two or three photolithographic processes.

{Circle around (2)} By such a shortening of the process, the production yield of the liquid crystal display device is improved, the productivity is increased, and the production cost of the liquid crystal display device is greatly reduced. Further, its reliability is greatly improved.

Next, a novel pattern forming method of the present invention will be described as a first embodiment with reference to FIG. Here, FIG. 1 is a sectional view of a two-layered electrode showing the features of the present invention in the order of the manufacturing process.

1) As shown in FIG. 1A, a lower electrode 2 such as a gate electrode of a TFT is formed on a glass substrate 101 by patterning a metal such as chrome on a glass substrate 101 in the same manner as described in the related art. Then, an insulating film 3 covering the lower electrode 2 is formed.

Next, a resist mask 6 composed of a first portion 4 that is a thin film region and a second portion 5 that is a thick film region is formed by the method described in JP-A-11-307780. . Here, the thickness of the first portion 4 is about 0.5 μm, and the first opening 7 is formed by patterning. The thickness of the second portion 5 is about 2.5 μm, and the second opening 8 is formed by patterning. Such a resist mask is formed in one photolithography process.

Next, the insulating film 3 is dry-etched by reactive ion etching (RIE) using the above-described resist mask 6 as an etching mask. Thus, the contact hole 9 reaching the surface of the lower electrode 2 is formed. In the dry etching step, ions in the plasma irradiate the surface of the resist mask 6 to cure and modify the surface.

Next, the mixed gas of O ₂ and CF ₄ is plasma-excited to form these ions or radicals, that is, active species, and the resist mask 6 is etched back by dry etching. Only the first portion 4 of the resist mask 6 is removed by this etch back. In this dry etching, the second portion 5 of the resist mask 6 is also etched to cause side etching. In this manner, the second portion 5a of the resist mask 6 having the reversely tapered second opening 8a as shown in FIG. 1B is left. Here, the thickness of the remaining second portion 5a is about 1.5 μm.

(4) Next, as described in the background art, the metal film 10 having a thickness of about 0.8 μm is deposited on the entire surface by the linear sputtering method. In this way, as shown in FIG. 1C, a metal film 10 is formed on the surface of the insulating film 3 and the surface of the second portion 5a in the region of the second opening 8a and connected to the lower electrode 2. In this sputtering step, since the second opening 8a has an inversely tapered shape as described above, the metal film 10 is suppressed from adhering to the side wall of the second opening 8a.

Next, the second portion 5a of the resist mask is removed by a normal lift-off technique. In the step of removing the second portion 5a, the metal film 10 deposited on the second portion 5a is simultaneously removed, and the metal film 10 is patterned. Subsequently, the second portion 5a is peeled and removed.

Thus, as shown in FIG. 1D, the upper wiring 11 connected to the lower electrode 2 through the contact hole 9 provided in the insulating film 3 is formed.

According to the present invention, as understood from the above description, the lower electrode, the contact hole, and the upper electrode can be formed by two photolithography steps. That is, the number of photolithography steps is reduced.

According to the present invention, as described above, the second opening 8a having an inversely tapered shape can be easily formed in the second portion 5a of the resist mask. For this reason, the patterning of the upper electrode by the lift-off technique becomes much easier than the conventional technique. In addition, the reliability of the upper electrode is greatly improved, and the production yield and mass productivity are greatly improved.

(4) Next, a method of manufacturing a TFT that will greatly reduce the manufacturing process of the liquid crystal display device will be described. As a second embodiment of the present invention, a method for manufacturing a TFT and a liquid crystal display device in three photolithography steps will be described with reference to FIGS. Here, FIG. 2 is a schematic plan view of a pixel portion of the active matrix substrate for a liquid crystal display device. Here, hatching is given in the figure for easy understanding. FIGS. 3 to 6 are cross-sectional views in the order of the manufacturing process of the inverted staggered TFT constituting the active matrix substrate, that is, the TFT constituting the pixel portion or the protection circuit portion.

(2) As shown by a broken line in FIG. 2, a gate electrode 22 of a TFT serving as a switch transistor is formed on a glass substrate 21. Then, the semiconductor layer 23 is formed in a region indicated by oblique lines from upper right to lower left in the drawing. Further, a source / drain electrode 24 and a source / drain electrode 25 are formed in a region indicated by oblique lines from upper left to lower right. Here, the source / drain electrodes 24 constitute the data wiring of the active matrix substrate.

(4) The gate electrode 22 is connected to the gate terminal electrode 27 through the contact hole 26. Similarly, the source / drain electrodes 24 are connected to the transparent electrode wiring 30 through the contact holes 28. Further, the source / drain electrodes 25 are connected to the transparent pixel electrodes 31 through the contact holes 29. Although not shown, a liquid crystal is formed on the transparent pixel electrode 31. Here, the gate terminal electrode 27, the transparent electrode wiring 30, and the transparent pixel electrode 31 are made of ITO which is a transparent conductor.

Next, a method of manufacturing the inverted staggered TFT will be described. As shown in FIG. 3A, a gate electrode 22 is formed on a glass substrate 21 by patterning a chromium (Cr) conductive film. Here, the thickness of the gate electrode 22 is about 200 nm. Then, a gate insulating film 32 is formed on the gate electrode 22. Here, the gate insulating film 32 is formed of a silicon nitride film having a thickness of 500 nm.

Next, an amorphous silicon film 33 having a thickness of about 300 nm, which is a semiconductor thin film, an n ⁺ amorphous silicon film 34 having a thickness of about 50 nm, which is a semiconductor thin film for ohmic contact, and a source / drain conductive film such as chromium. The metal conductive film 35 is stacked and deposited.

Next, as shown in FIG. 3B, a resist film 36 is formed on the surface of the metal conductive film 35 in a photolithography process. Here, the resist film 36 is a positive resist, and each has a thickness of 2.0 μm. Then, the resist film 36 is exposed to exposure light 41 using a photomask 40 having a light-shielding portion 37, a semi-light-transmitting portion 38, and a light-transmitting portion 39 as shown in FIG. After this exposure, the resist film 36 is developed by an ordinary method.

{Examples of a photomask having such a light-shielding portion, a semi-transmissive portion, and transmitted light will be described. In the example shown in FIG. 3B, a light shielding portion 37 is formed in a predetermined pattern on the photomask 40 by using, for example, chromium metal. Then, the semi-transparent portion 38 is formed of a halftone material. Here, the halftone material is, for example, tungsten silicide. In this way, a semi-transparent portion is formed. The transmissive portion 39 is a region where the chromium metal and the halftone material do not exist.

In addition, as an example of a photomask having a light-shielding portion, a semi-light-transmitting portion, and transmitted light, a light-shielding portion is formed in a predetermined pattern on a photomask substrate by, for example, chrome metal. The semi-transparent portion is formed by thinning the chromium metal. In this case, the setting is made such that about half of the exposure irradiation light is transmitted in the region where the chromium metal thin film portion is formed. In this way, a semi-transparent portion is formed.

As described above, the resist mask 44 composed of the first portion 42 having a small thickness and the second portion 43 having a large thickness as shown in FIG. Formed. Here, the transfer pattern of the light-shielding portion 37 of the photomask 40 becomes the second portion 43 of the resist mask 44, and the transfer pattern of the semi-transmissive portion 38 becomes the first portion 42 of the resist mask 44.

Next, as shown in FIG. 4A, the metal conductive film 35, the n ⁺ amorphous silicon film 34, and the amorphous silicon film 33 are sequentially etched using the resist mask 44 as an etching mask. Thus, as shown in FIG. 4A, the semiconductor layer 23, which is an island-shaped amorphous silicon layer, the island-shaped n ⁺ amorphous silicon layer 45, and the metal conductive layer 46 are formed.

Here, the metal conductive film 35 is etched by wet etching using a chemical solution in which ceric ammonium nitrate and perchloric acid are mixed as an etchant. Then, the n ⁺ amorphous silicon film 34 and the amorphous silicon film 33 are dry-etched by RIE using a mixed gas of Cl ₂ and HBr excited by plasma as a reaction gas. In this dry etching step, the gate insulating film 32 made of the silicon nitride film is hardly etched.

Next, a mixed gas of O ₂ and CF ₄ is excited by plasma to form active species such as these ions or radicals, and the resist mask 44 is etched back by anisotropic dry etching. In this etch-back step, the first portion 42 of the resist mask 44 is removed without causing much side etching. In this way, as shown in FIG. 4B, the second portion 43a remaining on the metal conductive layer 46 is formed.

Next, as shown in FIG. 4C, the metal conductive layer 46 and the n ⁺ amorphous silicon layer 45 are sequentially etched using the second portion 43a of the resist mask as an etching mask. Thus, the source / drain electrodes 24 and 25 are formed, and the ohmic layers 47 and 48 are further formed.

Next, the second portion 43a is removed, and a passivation film 49 is formed on the entire surface as shown in FIG. Here, the passivation film 49 is formed of a silicon nitride film having a thickness of about 500 nm.

Next, a resist mask 50 composed of a first portion, which is a thin region, and a second portion, which is a thick region, is formed by a method similar to that described with reference to FIG. Here, a first opening 51 is formed in the first portion, and a second opening 52 is formed in the second portion.

Next, the passivation film 49 or the gate insulating film 32 is dry-etched by RIE using the resist mask 50 as an etching mask. Here, the reaction gas is a plasma gas of a mixed gas of SF6 and He. In this way, as shown in FIG. 5B, the contact holes 26, 28 and 29 are formed on the gate electrode 22 and the source / drain electrodes 24 and 25.

Next, as described with reference to FIG. 1, the mixed gas of O ₂ and CF ₄ is plasma-excited, and the resist mask 50 is etched back. The first portion of the resist mask 50 is removed by this etch back. By this dry etching, as shown in FIG. 6A, a resist mask 50a having a reverse tapered opening is left. Then, a transparent electrode film 53 having a thickness of about 0.8 μm is deposited on the entire surface by a linear sputtering method so as to be connected to the gate electrode 22 and the source / drain electrodes 24 and 25. Then, the resist mask 50a is removed by a normal lift-off technique.

In this way, as shown in FIG. 6B, the gate terminal electrode 27 connected to the gate electrode 22 and the transparent electrode wiring 30 connected to the source / drain electrode 24 are formed as shown in FIG. Is formed, and a transparent pixel electrode 31 connected to the source / drain electrode 25 is formed. As described above, the TFT of the pixel portion is formed.

According to the present invention, as can be seen from the above description, a TFT can be manufactured by three photolithography steps instead of five photolithography steps in the prior art. For this reason, the manufacturing process of the liquid crystal display device including the TFT is greatly reduced. Then, the production yield of the liquid crystal display device is improved, and the productivity is increased. Further, the manufacturing cost of the liquid crystal display device is greatly reduced, and the manufacture of a highly reliable TFT is facilitated.

Next, a third embodiment of the present invention will be described with reference to FIGS. In this embodiment, a method for manufacturing a TFT and a liquid crystal display device in two photolithography steps will be described. Here, FIGS. 7 and 8 are cross-sectional views of the inverted staggered TFT constituting the active matrix substrate, that is, the TFTs constituting the pixel portion or the protection circuit portion in the order of main manufacturing steps.

First, a chromium conductive film serving as a gate electrode, a gate insulating film, an amorphous silicon film, an n ⁺ amorphous silicon film, and a metal conductive film are stacked and deposited.

Next, in a photolithography process, as shown in FIG. 7A, a resist mask 62 is formed on the surface of the uppermost metal conductive film. Here, the resist mask 62 has a first portion 63 that is a thin region and a second portion 64 that is a thick region. Here, the thickness of the first portion 63 is about 1.0 μm, and the thickness of the second portion 64 is about 3.0 μm. Such a resist mask 62 is formed by the method described with reference to FIG. 3 of the second embodiment.

Next, as shown in FIG. 7A, the metal conductive film, the n ⁺ amorphous silicon film, the amorphous silicon film, the gate insulating film, and the chromium conductive film are sequentially etched using the above-described resist mask 62 as an etching mask. . Thus, a gate electrode 65, a gate insulating film 66, a semiconductor layer 67, an n ⁺ amorphous silicon layer 68, and a metal conductive layer 69 are formed. Here, the method of etching the metal conductive film and the chromium conductive film is the same as that described in the second embodiment. The etching of the n ⁺ amorphous silicon film and the amorphous silicon film is performed by dry etching in which a mixed gas of SF ₆ , HCl and He is plasma-excited. The gate insulating film is etched by dry etching in which a mixed gas of SF ₆ and He is plasma-excited.

Next, as described with reference to FIG. 4, a mixed gas of O ₂ and CF ₄ is excited by plasma, and the resist mask 62 is etched back by anisotropic dry etching. In this etch back step, the first portion 63 of the resist mask 62 is removed. Then, a second portion 64a remaining on the metal conductive layer 69 is formed.

Next, the metal conductive layer 69 and the n ⁺ amorphous silicon layer 68 are sequentially etched using the second portion 64a as an etching mask. Thus, as shown in FIG. 7B, ohmic layers 70 and 71 and source / drain electrodes 72 and 73 are formed.

Next, the second portion 64a is removed, and a passivation film 74 is formed on the entire surface as shown in FIG.

Next, as described with reference to FIG. 5, a resist mask 75 including a first portion that is a thin region and a second portion that is a thick region is formed. Then, dry etching is performed using the resist mask 75 as an etching mask. In this etching step, as shown in FIG. 8A, the passivation film 74, the semiconductor layer 67, and the gate insulating film 66 on the gate electrode 65 are sequentially dry-etched to form a contact hole. At the same time, contact holes 77, 78 are formed on the source / drain electrodes 72, 73.

Thereafter, in the same manner as described with reference to FIG. 6A, as shown in FIG. 8B, a resist mask 75a having an opening having an inversely tapered shape is formed, and the transparent electrode film 79 is formed by a linear sputtering method. After depositing on the entire surface, the resist mask 75a is removed by a normal lift-off technique. In this way, wirings or electrodes respectively connected to the gate electrode 65, the source / drain electrode 72, and the source / drain electrode 73 are formed as described with reference to FIG.

Next, a schematic plan view of a pixel portion of the active matrix substrate for a liquid crystal display device formed as described above will be described with reference to FIG. Here, hatching is given in the figure for easy understanding.

ゲ ー ト As shown by the broken line in FIG. 9, the gate electrode 65 of the TFT serving as the switch transistor is formed. Then, the semiconductor layer 67 is formed in a region indicated by oblique lines from upper right to lower left in the drawing. Here, the gate electrode 65 and the semiconductor layer 67 have the same pattern. Further, a source / drain electrode 72 and a source / drain electrode 73 are formed in a region indicated by oblique lines from upper left to lower right. Here, the source / drain electrode 72 is divided into three. This is because the same pattern as the pattern of the source / drain electrodes is formed as the gate electrode and the semiconductor layer.

The gate electrode 65 is connected to the gate terminal electrode 80 through the contact hole 76. Similarly, the source / drain electrodes 72 are connected to the transparent electrode wiring 81 through the contact holes 77. Further, the source / drain electrodes 73 are connected to the transparent pixel electrodes 82 through the contact holes 78.

効果 The effects of the third embodiment are more remarkable than those described in the second embodiment.

Next, a fourth embodiment of the present invention will be described with reference to FIGS. In the present embodiment, features of the pattern formation of the present invention will be further described. However, in this case, the TFT is formed by four photolithography steps.

First, as shown in FIG. 10A, a chrome conductive film is patterned to form a gate electrode 92 on a glass substrate 91. Then, a gate insulating film 93 is formed, and a semiconductor layer 94 and an n ⁺ amorphous silicon layer 95 are formed.

(4) Next, as described in the second or third embodiment, a resist mask 96 is formed in the photolithography step as shown in FIG. 10B. Here, the resist mask 96 has a first portion 97 that is a thin film region and a second portion 98 that is a thick film region. Then, a contact hole 99 is formed in the gate insulating film 93 on the gate electrode 92.

Next, a mixed gas of O ₂ and CF ₄ is excited by plasma, and the resist mask 96 is etched back by anisotropic dry etching. In this etch back step, the first portion 97 of the resist mask 96 is removed. Then, the remaining second portion 98a is formed as shown in FIG.

Next, as shown in FIG. 10D, a transparent electrode film 100 and a metal conductive film 101 are stacked and formed. Here, the transparent electrode film 100 is an ITO film, and the metal conductive film 101 is a chromium film. Then, the second portion 98a is peeled off. That is, lift-off is performed to form a gate terminal electrode 102 connected to the gate electrode 92 and source / drain electrodes 103 and 104 connected to the n ⁺ amorphous silicon layer 95, as shown in FIG. Here, the gate terminal electrode 102 and the source / drain electrodes 103 and 104 are both formed of the above-described two-layer conductor film.

Next, the n ⁺ amorphous silicon layer 95 is etched using the source / drain electrodes 103 and 104 as an etching mask. In this way, as shown in FIG. 11B, ohmic layers 105 and 106 connected to the source / drain electrodes 103 and 104 are formed at the ends of the semiconductor layer 94, respectively.

Then, a passivation film 107 is deposited on the entire surface, and an opening 108 is formed on the gate terminal electrode 102. Further, the metal conductive film 101 in the region of the source / drain electrode 104 is also removed to form the transparent pixel electrode 109.

In the present invention, in the manufacture of a liquid crystal display device, a material film constituting a semiconductor element such as a TFT is deposited in advance as a multilayer laminated film, and has a plurality of thicknesses as an etching mask for patterning the laminated film. A resist mask patterned as described above.

方法 There are various variations in the method of forming such a resist mask. Hereinafter, this will be described.

In the second embodiment, a positive resist is applied, and the pattern is transferred by a single exposure method. In the above-described second embodiment, a one-layer resist film is used, but a two-layer resist film may be used. When this two-layer resist film is used, the exposure sensitivity of the lower resist film may be lower than that of the upper resist film. Then, the first portion is formed on the lower resist film, and the second portion is formed on the upper resist film. By doing so, the accuracy of the transfer pattern is greatly improved.

In addition, in the case of the single exposure method, a single-layer negative resist may be used as the resist film. Since a negative resist generally has lower exposure sensitivity than a positive resist, a single-layer resist film can easily cope with the negative resist. Alternatively, a negative-type two-layer resist film may be used. However, when this negative resist is used, the photomask is different from the photomask 40 of the second embodiment. In this case, the light shielding portion 37 of the photomask 40 becomes a light transmitting portion, and the light transmitting portion 39 becomes a light shielding portion. Then, the semi-transparent portion 38 is the same.

In the present invention, the pattern may be transferred by continuous exposure using a plurality of photomasks. That is, the resist mask can be formed by performing overexposure and development on a single-layer resist film. In this case, a positive or negative resist film or a two-layer resist film can be used.

In the above embodiment, the case where the gate electrode or the source / drain electrode is formed of chromium has been described. It should be noted that Ti, Mo, W, or an alloy thereof can be used as the material of the metal conductive film or the gate electrode serving as the source / drain electrodes.

In the above embodiment, the case where the inverted staggered TFT is formed on the insulating substrate has been described. It should be noted that the present invention can be similarly applied to the case of forming a staggered TFT.

In the above-described embodiment, in the resist mask patterned to have a plurality of thicknesses, the region having a small thickness is defined as a first portion, and the region having a large thickness is defined as a second portion. Here, the surface of the second portion may be selectively silylated. In this case, it is very effective when the base step is large. That is, in the step of removing the first portion by etching, even if the step of the base is large, the film loss of the second portion is eliminated. The present inventor has disclosed in detail the technique of this silylation application in JP-A-11-307780.

The present invention is not limited to the above-described embodiment, and the embodiment can be appropriately modified within the scope of the technical idea of the present invention.

FIG. 2 is a cross-sectional view illustrating a two-layer electrode in order of a manufacturing process for explaining the first embodiment of the present invention. FIG. 9 is a plan view of a pixel portion of a liquid crystal display device for describing a second embodiment of the present invention. It is sectional drawing of the manufacturing process order of TFT for describing 2nd Embodiment of this invention. It is sectional drawing of the manufacturing process order of TFT for demonstrating the continuation of the said process. It is sectional drawing of the manufacturing process order of TFT for demonstrating the continuation of the said process. It is sectional drawing of the manufacturing process order of TFT for demonstrating the continuation of the said process. It is sectional drawing of the manufacturing process order of TFT for describing 3rd Embodiment of this invention. It is sectional drawing of the manufacturing process order of TFT for demonstrating the continuation of the said process. FIG. 13 is a plan view of a pixel portion of a liquid crystal display device for describing a third embodiment of the present invention. It is sectional drawing of the manufacturing process order of TFT for describing 4th Embodiment of this invention. It is sectional drawing of the manufacturing process order of TFT for demonstrating the continuation of the said process. It is sectional drawing of the order of a manufacturing process of a two-layer electrode for demonstrating the prior art. It is sectional drawing of the order of a manufacturing process for demonstrating continuation of the said process.

Explanation of reference numerals

1,21,61,91 Glass substrate 2 Lower electrode 3 Insulating film 4,42,63,97 First part 5,5a, 43,43a, 64,64a, 98,98a Second part 6,44,50,50a , 62, 75, 75a, 96 Resist mask 7, 51 First opening 8, 8a, 52 Second opening 9, 26, 28, 29, 76, 77, 78, 99 Contact hole 10 Metal film 11 Upper layer electrode 22, 65 , 92 Gate electrode 23, 67, 94 Semiconductor layer 24, 25, 72, 73, 103, 104 Source / drain electrode 27, 80, 102 Gate terminal electrode 30, 81 Transparent electrode wiring 31, 82, 109 Transparent pixel electrode 32, 66,93 Gate insulating film 33 Amorphous silicon film 34 n ⁺ amorphous silicon film 35,101 Metal conductive film 36 Resist film 37 light-shielding part 38 semi-transmissive part 39 translucent part 40 photomask 41 exposure irradiation light 45, 68, 95 n ⁺ amorphous silicon layer 46, 69, 79 metal conductive layer 47, 48, 70, 71, 105, 106 ohmic layer 49, 74, 107 Passivation film 53, 79, 100 Transparent electrode film 108 Opening

Claims (37)

A method for forming an element on a substrate, wherein a step of selectively forming a film forming an electrode on the substrate, and a step of forming a first insulating film on the film forming the substrate and the electrode Forming at least one first conductive film forming an element on the first insulating film film; and forming the at least one first conductive film by a first resist mask having a plurality of regions having different thicknesses. Processing the one conductive film, and processing the at least one first conductive film by removing the thin region of the first resist mask and using the remaining thick region as a mask; Performing a step of removing the first resist mask; a step of coating the processed at least one first conductive film to form a second insulating film; The second resist mask having the region of Forming a second insulating film, forming a contact hole by processing at least the second insulating film with the second resist mask, and forming a region of the second resist mask having a small thickness. And leaving only a region having a large film thickness by removing. 2. The method for forming an element according to claim 1, wherein the element is formed by two photolithography steps. The method for forming an element according to claim 1, wherein the element is formed by three photolithography steps. 4. The element forming method according to claim 1, wherein the contact hole reaches at least one of the processed at least one first conductive film and a film forming the electrode. 5. . 5. The method according to claim 4, further comprising the step of: forming at least one second conductive film on the second insulating film and in the contact hole. 5. The method according to claim 4, further comprising the step of: forming at least one second conductive film on a thick region of the second insulating film and the second resist mask and in the contact hole. 7. The device forming method according to claim 1, further comprising: a step of patterning the at least one second conductive film by lift-off. 8. The method according to claim 7, further comprising the step of: patterning the at least one second conductive film by lift-off for removing a thick region of the second resist mask. The method according to any one of claims 1 to 8, wherein the at least one first conductive film includes a semiconductor film. The method according to any one of claims 1 to 9, wherein the at least one second conductive film includes at least one of a metal film and a transparent film. The method according to claim 10, wherein the at least one second conductive film comprises a pixel electrode. 12. The method according to claim 1, wherein the step of selectively forming a film forming the electrode includes a step of patterning the film forming the electrode with a resist film. At least one first conductive film constituting the element is formed of a laminate of a plurality of films, and the laminate includes a gate insulating film, a semiconductor thin film, a semiconductor thin film for ohmic contact, and a conductive film for source and drain. The method for forming an element according to any one of claims 1 to 12, comprising: 14. The method according to claim 1, wherein the removal of the thin portion of at least one of the first and second resist masks is performed by dry etching using active species in which oxygen gas is plasma-excited. The method for forming the element described above. 15. The method according to claim 1, wherein the removal of the thin portion of at least one of the first and second resist masks is performed by dry etching using an active species in which at least a halogen compound gas is plasma-excited. A method for forming an element according to any one of the above. 16. The method according to claim 1, wherein a thinner portion of at least one of the first and second resist masks is removed so that a cross-sectional shape of the remaining thicker portion has an inverse taper. A method for forming an element according to any one of the first to third aspects. A light-shielding portion, a semi-light-transmitting portion, and a light-transmitting portion are formed in a mask pattern of a photomask used in a photolithography step, and the light-shielding portion pattern, the semi-light-transmitting portion pattern, and the light-transmitting portion pattern are formed by one exposure. 17. The method according to claim 1, wherein the resist film is transferred and irradiated, and then developed to form at least one of the first and second resist masks. At least one of the first and second resist masks is developed by continuously exposing and irradiating a predetermined region of a resist film using two or more types of photomasks having different mask patterns in exposure in a photolithography process. The method of forming an element according to claim 1, wherein: 20. The device forming method according to claim 1, wherein at least one of the first and second resist masks is formed by processing a resist film having a multilayer structure. When the resist film has a two-layer structure, a lower resist film is formed so as to be a thin region of at least one of the first and second resist masks, and the upper resist film is formed of the first resist mask. 20. The device forming method according to claim 19, wherein at least one of the second resist mask and the second resist mask is formed to be a thick region. 21. The device forming method according to claim 19, wherein the resist film is formed of a multilayer resist film having different exposure sensitivities. 22. The device forming method according to claim 21, wherein the resist film is composed of two resist films having different exposure sensitivities, and the lower resist film has lower exposure sensitivity than the upper resist film. 23. The method according to claim 1, wherein a surface of at least one of the first and second resist masks in the thick region is silylated. 24. The method according to claim 1, wherein at least one of the first and second resist masks is formed of a photosensitive organic film. 25. The method according to claim 1, wherein the second insulating film includes a passivation film. 26. The method according to claim 1, wherein the electrode includes a gate electrode. 27. The method according to claim 26, wherein the gate electrode further includes a wiring extending from the gate electrode. 28. The method according to claim 1, wherein the processed at least one first conductive film forms a source / drain electrode. 29. The method according to claim 28, wherein the source / drain electrodes further include a wiring extending from the source / drain electrodes. The method according to claim 11, wherein the pixel electrode further includes a wiring extending from the pixel electrode. 31. The method for forming an element according to claim 1, wherein the element comprises a thin film transistor. 32. The method according to claim 1, wherein the electrode comprises a gate electrode, and the processed at least one second conductive film is connected to the gate electrode. 32. The method according to claim 1, wherein the at least one first conductive film includes a source / drain electrode, and the processed at least one second conductive film is connected to the source / drain electrode. 5. A method for forming an element according to any one of the above. The electrode comprises a gate electrode, the at least one first conductive film comprises a source / drain electrode, a gate line extending from the gate electrode, and a source / drain line extending from the source / drain electrode 34. The method for forming an element according to claim 1, wherein the elements are formed so as to three-dimensionally cross each other. 35. The method according to claim 34, wherein one of the gate wiring and the source / drain wiring is formed so as to three-dimensionally cross each other by including a lead portion. The at least one first conductive film is formed of a film in which a semiconductor thin film, a semiconductor thin film for ohmic contact, and a conductive film for source / drain are sequentially laminated, and the processing step uses the first resist mask as an etching mask. Sequentially etching the conductive film for source / drain, the semiconductor thin film for ohmic contact, and the semiconductor thin film by etching, and the first resist mask until the thinned region of the first resist mask is removed. 36. The element forming method according to claim 1, comprising: a step of etching back; and an etching step using the thick region remaining after the etch back step as an etching mask. The film forming the electrode is formed of a conductive film for a gate electrode, the first insulating film is formed of a gate insulating film, and the at least one first conductive film is a semiconductor thin film, a semiconductor thin film for ohmic contact, and a source. A process in which a conductive film for a drain is sequentially laminated, and the processing step and the processing steps of the electrode and the first insulating film are performed by etching using the first resist mask as an etching mask; A step of sequentially etching the film, the semiconductor thin film for ohmic contact, the semiconductor thin film, the gate insulating film, and the conductive film for the gate electrode, and until the thin region of the first resist mask is removed. Etching back the first resist mask, and etching the thick region remaining after the etch back step. Method of forming a device according to any one of claims 1 to 35 consisting of an etching step described in Ngumasuku.

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