JP2003347493A - Mounting method for electronic part and contamination- preventing chip used for it - Google Patents

Mounting method for electronic part and contamination- preventing chip used for it

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Publication number
JP2003347493A
JP2003347493A JP2002150244A JP2002150244A JP2003347493A JP 2003347493 A JP2003347493 A JP 2003347493A JP 2002150244 A JP2002150244 A JP 2002150244A JP 2002150244 A JP2002150244 A JP 2002150244A JP 2003347493 A JP2003347493 A JP 2003347493A
Authority
JP
Japan
Prior art keywords
chip
contamination
mounting
electronic component
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002150244A
Other languages
Japanese (ja)
Other versions
JP3994327B2 (en
Inventor
Toru Nomura
徹 野村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
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Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP2002150244A priority Critical patent/JP3994327B2/en
Publication of JP2003347493A publication Critical patent/JP2003347493A/en
Application granted granted Critical
Publication of JP3994327B2 publication Critical patent/JP3994327B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for mounting an electronic part by which the electronic part is mounted while contamination of a circuit element on a substrate is prevented, and bonding characteristics of wire bonding is improved, and to provide a contamination-preventing chip used for the method. <P>SOLUTION: In a step S3 for mounting a contamination-preventing chip, a contamination-preventing chip 7 is mounted on a pad conductor 3 provided to a thick film circuit board 20. In a step S4, solder is reflowed. In a step S5 for collecting the contamination-preventing chip, the contamination-preventing chip 7 is detached from the pad conductor 3 to collect. Because these steps are performed in this order, contamination of the pad conductor 3 due to defluxion of solder flux and scattering of solder powder is prevented. Thereby wire bonding to the pad conductor 3 is performed well. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は電子部品の実装方法
及び汚染防止用チップに関するもので、特に、回路基板
上の導体に対して直接ワイヤボンデイングを行い、半導
体チップ等の電子部品の接続を行う実装方法において、
ワイヤボンデイングの接合性を向上させるための方法及
び汚染防止用チップに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for mounting an electronic component and a chip for preventing contamination, and more particularly, to directly connecting a conductor on a circuit board with a wire to connect an electronic component such as a semiconductor chip. In the mounting method,
The present invention relates to a method for improving bondability of wire bonding and a chip for preventing contamination.

【０００２】[0002]

【従来の技術】従来、厚膜回路基板とパワー素子との電
気的接続や、外部端子への取り出しのための樹脂ケース
とターミナルとの電気的接続を図るために、Ａｌワイヤ
を用いて超音波接合（ワイヤボンディング）する方法が
行われている。そして、厚膜回路基板の導体上へ直接Ａ
ｌワイヤを接合する際、導体表面が汚染されたり付着物
が存在しているとＡｌワイヤの接合性が劣化するという
問題がある。特に、回路基板上に電子部品を接合するた
めのはんだリフロー時には、導体上にはんだ材料中のフ
ラックスによる汚染やはんだ粉の付着が生じるため、Ａ
ｌワイヤの導体への接合信頼性を大きく劣化させる等の
問題が発生する。2. Description of the Related Art Conventionally, an ultrasonic wave using an Al wire has been used for electrical connection between a thick film circuit board and a power element and electrical connection between a resin case and a terminal for taking out to an external terminal. A bonding (wire bonding) method has been used. Then, A is directly put on the conductor of the thick film circuit board.
When joining the l wires, there is a problem that if the surface of the conductor is contaminated or there is an attached matter, the joining property of the Al wires is deteriorated. In particular, at the time of solder reflow for joining electronic components on a circuit board, contamination by flux in the solder material and adhesion of solder powder occur on the conductor.
Problems such as a significant deterioration in the reliability of joining the l-wire to the conductor occur.

【０００３】このような問題点に鑑みて、従来、はんだ
リフロー工程を実行する前に、Ａｌワイヤが接合される
導体上に樹脂材料をコートして、フラックスの汚染やは
んだ粉の付着を防止する方法が提案されている（特開平
９−２９３７４４号公報）。[0003] In view of such problems, conventionally, before conducting a solder reflow process, a resin material is coated on a conductor to which an Al wire is joined to prevent contamination of flux and adhesion of solder powder. A method has been proposed (JP-A-9-293744).

【０００４】すなわち、同公報に記載された従来の方法
では、アルミナ基板５１上に配線・部品搭載ランド用導
体５２及びワイヤボンディング用パッド導体（以下、パ
ッド導体と略記する）５３をそれぞれ表面上に形成した
厚膜回路基板７０において（図６参照）、まず、パッド
導体５３を完全に覆うように樹脂コート５４をディスペ
ンサー等を用いて塗布し硬化させる（図７）。その後、
図８に示すように、はんだ接合ペーストを用い、印刷等
の工法で配線・部品搭載ランド用導体５２上に所定パタ
ーンのはんだ層５５を形成する。その後、パワー素子５
６やＩＣ等のチップ部品５７を搭載し、約２３０℃で、
はんだをリフローすることにより、パワー素子５６やＩ
Ｃ等のチップ部品５７のはんだ付けを行う。この際に、
はんだペースト中のフラックスが分離して流出したり、
はんだ粉が飛散するが、パッド導体５３は樹脂コート５
４により覆われているためフラックス汚染やはんだ粉の
付着が生じることが防止される。そして、厚膜回路基板
７０表面の洗浄を行い、樹脂コート５４を除去した後、
Ａｌ等からなるワイヤ５９を用いてパッド導体５３とパ
ワーＩＣ５６とをワイヤボンディングし、これらの電気
的接続を行う。さらに、接着剤６１により厚膜回路基板
７０を金属ベース６０に接着した後、金属ベース６０と
パッド導体５３とをワイヤボンディングし、これらの電
気的接続を行うようにする。That is, according to the conventional method described in the publication, a conductor 52 for wiring and component mounting lands and a pad conductor 53 for wire bonding (hereinafter abbreviated as pad conductor) 53 are formed on the surface of an alumina substrate 51, respectively. In the formed thick film circuit board 70 (see FIG. 6), first, a resin coat 54 is applied using a dispenser or the like so as to completely cover the pad conductor 53, and is cured (FIG. 7). afterwards,
As shown in FIG. 8, a solder layer 55 having a predetermined pattern is formed on the wiring / component mounting land conductor 52 by a method such as printing using a solder bonding paste. Then, the power element 5
6 and chip components 57 such as IC,
By reflowing the solder, the power elements 56 and I
Soldering of a chip component 57 such as C is performed. At this time,
The flux in the solder paste separates and flows out,
Although the solder powder is scattered, the pad conductor 53 is covered with the resin coat 5.
4 prevents flux contamination and adhesion of solder powder. Then, after cleaning the surface of the thick film circuit board 70 and removing the resin coat 54,
The pad conductor 53 and the power IC 56 are wire-bonded using a wire 59 made of Al or the like, and these are electrically connected. Further, after the thick film circuit board 70 is adhered to the metal base 60 with the adhesive 61, the metal base 60 and the pad conductor 53 are wire-bonded to each other to make an electrical connection therebetween.

【０００５】[0005]

【発明が解決しようとする課題】しかしながら、図６乃
至図９に示された従来の電子部品の実装方法において
は、パッド導体５３のフラックス汚染やはんだ粉の付着
を防止するために、樹脂材料を印刷し硬化させて樹脂コ
ート５４を形成する工程、及びはんだリフロー工程後に
樹脂コート５４を剥離する工程を必要とする。このた
め、多くの工数を要するという問題があると共に、樹脂
材料のダレが配線・部品搭載ランド用導体５２に付着し
て、はんだ濡れ不良が生じるという不具合が発生すると
いう問題がある。However, in the conventional electronic component mounting method shown in FIGS. 6 to 9, the resin material is used to prevent flux contamination of the pad conductor 53 and adhesion of solder powder. A step of forming the resin coat 54 by printing and curing, and a step of peeling the resin coat 54 after the solder reflow step are required. For this reason, there is a problem that many man-hours are required, and there is a problem that a dripping of the resin material adheres to the wiring / component mounting land conductor 52 to cause poor solder wetting.

【０００６】本発明は、上述した問題点に鑑み、既存設
備を使用し且つ少ない工数で基板上の回路要素の汚染を
防止しつつ電子部品の実装が可能な電子部品の実装方
法、及びワイヤボンデイングの接合性を向上させること
ができる電子部品の実装方法、並びにこれらに使用され
る汚染防止用チップを提供することを解決すべき課題と
する。SUMMARY OF THE INVENTION In view of the above-described problems, the present invention provides an electronic component mounting method and a wire bonding method that can mount electronic components while preventing contamination of circuit elements on a board by using existing facilities and with a small number of steps. It is an object of the present invention to provide a method of mounting an electronic component capable of improving the bonding property of the electronic component and a chip for preventing contamination used in the electronic component mounting method.

【０００７】[0007]

【課題を解決するための手段】この目的を達成するため
に、請求項１に記載の電子部品の実装方法は、回路基板
上へ電子部品を実装する方法であって、前記回路基板上
に設けられた導体及び電子部品等の所定の回路要素の少
なくとも一部を覆うように汚染防止用チップを搭載する
汚染防止用チップ搭載工程と、前記回路基板上の少なく
とも一部を汚染する可能性のある所定の処理工程と、前
記所定の回路要素より前記汚染防止用チップを取り外し
て回収する汚染防止用チップ回収工程と、を備えたこと
を特徴とする。To achieve this object, a method for mounting an electronic component according to claim 1 is a method for mounting an electronic component on a circuit board, wherein the electronic component is mounted on the circuit board. A contamination prevention chip mounting step of mounting a contamination prevention chip so as to cover at least a part of a predetermined circuit element such as a conductor and an electronic component, which may contaminate at least a part of the circuit board. A predetermined processing step; and a contamination preventing chip collecting step of removing and collecting the contamination preventing chip from the predetermined circuit element.

【０００８】従って、回路基板上に設けられた導体及び
電子部品等の所定の回路要素の少なくとも一部を覆った
状態で、回路基板上の少なくとも一部を汚染する可能性
のある所定の処理工程を実行するので、前記所定の回路
要素が前記所定の処理工程において汚染されることを確
実に防止することができる。また、前記所定の処理工程
終了後、所定の回路要素より汚染防止用チップを取り外
して回収し、前記所定の回路要素の汚染が防止された部
分に対して所望の処理を良好に施すことができる。Therefore, in a state where at least a part of a predetermined circuit element such as a conductor and an electronic component provided on the circuit board is covered, a predetermined processing step which may contaminate at least a part of the circuit board is provided. Is performed, it is possible to reliably prevent the predetermined circuit element from being contaminated in the predetermined processing step. Further, after the predetermined processing step is completed, the contamination preventing chip is removed from the predetermined circuit element and collected, and the desired processing can be satisfactorily performed on the portion where the predetermined circuit element is prevented from being contaminated. .

【０００９】また、請求項２に記載の電子部品の実装方
法は、前記所定の処理工程が、はんだリフロー工程であ
ることを特徴とする。Further, in the electronic component mounting method according to the present invention, the predetermined processing step is a solder reflow step.

【００１０】従って、はんだリフロー工程では、回路基
板上に、はんだフラックスの流出による汚染やはんだ粉
の付着による汚染等が生じる可能性があるが、所定の回
路要素の少なくとも一部が汚染防止用チップにより覆わ
れた状態で、はんだリフロー工程が実行されるので、前
記所定の回路要素がはんだリフロー工程における汚染か
ら確実に防止される。Therefore, in the solder reflow process, contamination due to outflow of solder flux and contamination due to adhesion of solder powder may occur on the circuit board. Since the solder reflow step is performed in a state covered by the above, the predetermined circuit element is reliably prevented from being contaminated in the solder reflow step.

【００１１】また、請求項３に記載の電子部品の実装方
法は、前記汚染防止用チップが、少なくとも一つの面が
弾性材料により構成され、前記汚染防止用チップ搭載工
程では、前記弾性材料を前記所定の回路要素の少なくと
も一部の表面へ密着させるように前記汚染防止用チップ
を搭載することを特徴とする。According to a third aspect of the present invention, in the electronic component mounting method, at least one surface of the chip for preventing contamination is made of an elastic material, and in the step of mounting the chip for preventing contamination, the step of mounting the elastic material is performed. The contamination prevention chip is mounted so as to be in close contact with at least a part of the surface of a predetermined circuit element.

【００１２】従って、汚染防止用チップの弾性材料を所
定の回路要素の少なくとも一部の表面に密着させること
により、当該部分を確実に汚染から防止することができ
る。また、汚染防止用チップの弾性材料からなる面を所
定の回路要素に対して当接させ、加圧することにより容
易且つ確実に汚染防止用チップを搭載することができ
る。Therefore, by adhering the elastic material of the contamination prevention chip to at least a part of the surface of the predetermined circuit element, the part can be reliably prevented from being contaminated. Further, the surface made of the elastic material of the contamination prevention chip is brought into contact with a predetermined circuit element and pressurized, so that the contamination prevention chip can be easily and reliably mounted.

【００１３】また、請求項４に記載の電子部品の実装方
法は、回路基板上に形成された配線導体に電子部品をは
んだ付けするとともに、前記回路基板上に形成されたパ
ッド導体に対してワイヤボンディングを行うようにした
電子部品の実装方法であって、前記回路基板上にはんだ
材料からなるはんだ層を形成するはんだ層形成工程と、
前記はんだ層上に電子部品を搭載する電子部品搭載工程
と、前記パッド導体の少なくとも一部を覆うように汚染
防止用チップを搭載する汚染防止用チップ搭載工程と、
前記パッド導体に前記汚染防止用チップが搭載された状
態で、前記電子部品が搭載された前記はんだ層を所定の
加熱条件下でリフローし、前記電子部品を前記配線導体
に接合するはんだリフロー工程と、そのはんだリフロー
工程後に前記汚染防止用チップを取り外して回収する汚
染防止用チップ回収工程と、前記汚染防止用チップを取
り外した前記パッド導体に対してワイヤボンディングを
行うワイヤボンディング工程と、を備えたことを特徴と
する。According to a fourth aspect of the present invention, in the electronic component mounting method, the electronic component is soldered to a wiring conductor formed on the circuit board, and a wire is connected to a pad conductor formed on the circuit board. A method of mounting an electronic component for performing bonding, a solder layer forming step of forming a solder layer made of a solder material on the circuit board,
An electronic component mounting step of mounting an electronic component on the solder layer, and a contamination prevention chip mounting step of mounting a contamination prevention chip so as to cover at least a part of the pad conductor,
In a state where the contamination prevention chip is mounted on the pad conductor, the solder layer on which the electronic component is mounted is reflowed under a predetermined heating condition, and a solder reflow step of joining the electronic component to the wiring conductor; A contamination prevention chip collecting step of removing and collecting the contamination prevention chip after the solder reflow step, and a wire bonding step of performing wire bonding on the pad conductor from which the contamination prevention chip has been removed. It is characterized by the following.

【００１４】従って、回路基板上にはんだ材料からなる
はんだ層を形成し、はんだ層上に電子部品を搭載し、パ
ッド導体の少なくとも一部を覆うように汚染防止用チッ
プを搭載し、パッド導体に汚染防止用チップが搭載され
た状態で、電子部品が搭載されたはんだ層を所定の加熱
条件下でリフローし、電子部品を配線導体に接合する。
よって、はんだフラックスやはんだ粉等の汚染が生じ易
いはんだリフロー工程において、パッド導体の少なくと
も一部が汚染防止用チップにより覆われることにより汚
染から確実に防止される。また、はんだリフロー工程後
に汚染防止用チップを取り外して回収し、パッド導体の
汚染が防止された部分に対して良好にワイヤボンディン
グを行うことができる。Therefore, a solder layer made of a solder material is formed on a circuit board, an electronic component is mounted on the solder layer, and a contamination prevention chip is mounted so as to cover at least a part of the pad conductor. In a state where the contamination prevention chip is mounted, the solder layer on which the electronic component is mounted is reflowed under a predetermined heating condition, and the electronic component is joined to the wiring conductor.
Therefore, in a solder reflow process in which contamination of solder flux, solder powder, and the like is likely to occur, at least a portion of the pad conductor is covered with the contamination prevention chip, thereby reliably preventing contamination. Further, the chip for preventing contamination is removed and collected after the solder reflow process, and the wire bonding can be favorably performed on the portion where the contamination of the pad conductor is prevented.

【００１５】また、請求項５に記載の電子部品の実装方
法は、前記電子部品搭載工程と前記汚染防止用チップ搭
載工程とは、同時に行われることを特徴とする。Further, in the electronic component mounting method according to the present invention, the electronic component mounting step and the contamination preventing chip mounting step are performed simultaneously.

【００１６】従って、電子部品搭載工程と汚染防止用チ
ップ搭載工程とを同時に行うことにより、電子部品の実
装に要する工数を大幅に低減することができる。Therefore, by simultaneously performing the electronic component mounting step and the contamination prevention chip mounting step, the number of steps required for mounting the electronic component can be greatly reduced.

【００１７】また、請求項６に記載の電子部品の実装方
法は、前記汚染防止用チップが、少なくとも一つの面が
弾性材料により構成され、前記汚染防止用チップ搭載工
程では、前記弾性材料を前記パッド導体の少なくとも一
部の表面へ密着させるように前記汚染防止用チップを搭
載することを特徴とする。According to a sixth aspect of the present invention, in the electronic component mounting method, at least one surface of the contamination prevention chip is made of an elastic material, and in the contamination prevention chip mounting step, the elastic material is attached to the surface. The contamination prevention chip is mounted so as to be in close contact with at least a part of the surface of the pad conductor.

【００１８】従って、汚染防止用チップの弾性材料をパ
ッド導体の少なくとも一部の表面に密着させることによ
り、確実に汚染から防止することができる。また、汚染
防止用チップの弾性材料からなる面をパッド導体に対し
て当接させ、加圧することにより容易且つ確実に搭載す
ることができる。Therefore, the elastic material of the contamination preventing chip is brought into close contact with at least a part of the surface of the pad conductor, whereby the contamination can be reliably prevented. Further, the surface of the contamination prevention chip made of an elastic material is brought into contact with the pad conductor, and the chip can be easily and reliably mounted by applying pressure.

【００１９】また、請求項７に記載の電子部品の実装方
法は、前記弾性材料が、耐熱性ゴムからなることを特徴
とする。Further, in the electronic component mounting method according to a seventh aspect, the elastic material is made of a heat-resistant rubber.

【００２０】従って、弾性材料が耐熱性ゴムからなるの
で、はんだリフロー工程等の加熱を伴う処理工程におい
ても変形等が生じることがない。Therefore, since the elastic material is made of a heat-resistant rubber, no deformation or the like occurs even in a process involving heating such as a solder reflow process.

【００２１】また、請求項８に記載の電子部品の実装方
法は、前記汚染防止用チップ搭載工程は、電子部品を回
路基板上に搭載するための部品搭載機を用いて行われる
ことを特徴とする。According to a eighth aspect of the present invention, in the method of mounting an electronic component, the step of mounting the chip for preventing contamination is performed using a component mounting machine for mounting the electronic component on a circuit board. I do.

【００２２】従って、既存の部品搭載機をそのまま使用
することが可能であり、生産工程を大きく変えることな
く、汚染防止を図りつつ電子部品の実装を行うことがで
きる。また、電子部品搭載工程と汚染防止用チップ搭載
工程とで同一の部品搭載機を使用することにより、両工
程を同時に実行することも可能となる。Therefore, the existing component mounting machine can be used as it is, and the electronic components can be mounted while preventing contamination without largely changing the production process. In addition, by using the same component mounting machine in the electronic component mounting process and the contamination prevention chip mounting process, both processes can be performed simultaneously.

【００２３】また、請求項９に記載の汚染防止用チップ
は、回路基板上に設けられた導体及び電子部品等の回路
要素上に着脱可能に搭載されて前記回路要素の汚染を防
止するための電子部品の実装方法に使用される汚染防止
用チップであって、パッド状チップの少なくとも一つの
面に弾性材料を貼り付けてなることを特徴とする。[0023] The chip for preventing contamination according to claim 9 is removably mounted on a circuit element such as a conductor and an electronic component provided on a circuit board to prevent contamination of the circuit element. A chip for preventing contamination used in a method of mounting an electronic component, wherein an elastic material is attached to at least one surface of a pad-shaped chip.

【００２４】従って、汚染防止用チップは、金属材料又
は樹脂材料等の材質からなるパッド状チップの少なくと
も一つの面に、柔軟性のある弾性材料が貼り付けられて
いるので、汚染防止対象の回路要素を傷つけることなく
密着状に搭載可能であり、前記回路要素をはんだフラッ
クスやはんだ粉の付着等の種々の汚染から確実に防止す
ることができる。また、弾性材料が回路要素に密着する
ことにより搭載されるので、汚染防止用チップを容易に
回路要素から取外し、回収することができる。Therefore, in the contamination prevention chip, since a flexible elastic material is attached to at least one surface of a pad-like chip made of a material such as a metal material or a resin material, a circuit to be prevented from being polluted. The circuit element can be mounted in close contact without damaging the element, and the circuit element can be reliably prevented from various contaminations such as adhesion of solder flux and solder powder. Further, since the elastic material is mounted by being in close contact with the circuit element, the contamination prevention chip can be easily removed from the circuit element and collected.

【００２５】また、請求項１０に記載の汚染防止用チッ
プは、前記弾性材料が、耐熱性ゴムからなることを特徴
とする。[0025] In the chip for preventing contamination according to a tenth aspect, the elastic material is made of heat-resistant rubber.

【００２６】従って、弾性材料が耐熱性ゴムからなるの
で、はんだリフロー工程等の加熱を伴う処理工程におい
ても変形等が生じることがない。Therefore, since the elastic material is made of a heat-resistant rubber, no deformation or the like occurs even in a heating process such as a solder reflow process.

【００２７】また、請求項１１に記載の汚染防止用チッ
プは、前記汚染防止用チップが、前記回路要素の搭載面
よりも大きく形成されたことを特徴とする。In the eleventh aspect of the present invention, the anti-pollution chip is formed to be larger than a mounting surface of the circuit element.

【００２８】従って、汚染防止用チップが、回路要素の
搭載面よりも大きく形成されているので、回路要素の搭
載面全体を確実に覆い、その回路要素全体をはんだリフ
ロー工程等の汚染を伴う処理工程における汚染から確実
に防止することができる。Therefore, since the contamination preventing chip is formed larger than the mounting surface of the circuit element, the entire surface for mounting the circuit element is surely covered, and the entire circuit element is subjected to a process involving contamination such as a solder reflow process. The contamination in the process can be reliably prevented.

【００２９】[0029]

【発明の実施の形態】以下、本発明の電子部品の実装方
法及び汚染防止用チップを具体化した一実施形態につい
て、図面を参照しつつ説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment embodying a method for mounting an electronic component and a chip for preventing contamination according to the present invention will be described below with reference to the drawings.

【００３０】図１は、本実施形態における電子部品の実
装方法を採用した混成集積回路装置２１の製造工程の全
体の流れを示すフローチャートである。図２、３、４は
各工程を具体的に示す図であり、それぞれ（ａ）は側面
図、（ｂ）は平面図である。FIG. 1 is a flowchart showing an overall flow of a manufacturing process of a hybrid integrated circuit device 21 employing the electronic component mounting method according to the present embodiment. 2, 3 and 4 are views specifically showing each step, in which (a) is a side view and (b) is a plan view.

【００３１】まず、配線・部品搭載ランド２及びワイヤ
接合用導体３をアルミナ基板１上に形成した厚膜回路基
板２０を用意する（図２参照）。First, a thick-film circuit board 20 having a wiring / component mounting land 2 and a wire bonding conductor 3 formed on an alumina substrate 1 is prepared (see FIG. 2).

【００３２】ここで、配線・部品搭載ランド２は、Ｃ
ｕ、Ａｇ等の導体からなり、回路基板１０上に搭載され
る半導体チップ等の電子部品を搭載し、電気的接続を図
るために設けられる配線導体である。尚、配線・部品搭
載ランド２では、幅広の平面視長方形の部分に電子部品
が搭載され、これらが線状の配線パターンにより接続さ
れている。Here, the wiring / component mounting land 2 is C
It is a wiring conductor formed of a conductor such as u, Ag, etc., and provided for mounting an electronic component such as a semiconductor chip mounted on the circuit board 10 and achieving electrical connection. In the wiring / component mounting land 2, electronic components are mounted on a wide rectangular portion in a plan view, and these are connected by a linear wiring pattern.

【００３３】一方、ワイヤボンディング用パッド導体
（以下、パッド導体と略記する）３は、Ａｇ、Ａｇ−Ｐ
ｄ、Ａｕ等の導体からなり、パワーＩＣ５や金属ベース
９との間でＡｌ又はＡｕ等のワイヤが超音波接合、すな
わちワイヤボンディングが行われる導体である。On the other hand, the pad conductor for wire bonding (hereinafter abbreviated as pad conductor) 3 is made of Ag, Ag-P
The conductor is made of a conductor such as d, Au, or the like, and a wire of Al, Au, or the like is ultrasonically bonded to the power IC 5 or the metal base 9, that is, a wire bonding.

【００３４】以上の構成を有する厚膜回路基板２０上
に、ペースト状のはんだ材料を所定のパターンで配線・
部品搭載ランド２上に印刷し、はんだ層４を形成する
（はんだ層形成工程Ｓ１、図１参照）。はんだ層４の形
成は、スクリーン印刷等の公知の種々の印刷方法により
行うことができる。On the thick-film circuit board 20 having the above-described structure, a paste-like solder material is wired and formed in a predetermined pattern.
Printing is performed on the component mounting land 2 to form the solder layer 4 (solder layer forming step S1, see FIG. 1). The formation of the solder layer 4 can be performed by various known printing methods such as screen printing.

【００３５】次に、パワーＩＣ５やチップコンデンサ等
の素子６等の電子部品をはんだ層４上に搭載するととも
に（部品搭載工程Ｓ２）、汚染防止用チップ７をパッド
導体３の上面を覆うように搭載する（汚染防止用チップ
搭載工程Ｓ３）。部品搭載工程Ｓ２及び汚染防止用チッ
プ搭載工程Ｓ３は、電子部品を厚膜回路基板２０に搭載
するための公知の部品搭載機（チップマウンタ）を使用
して同時に実施される。すなわち、部品搭載工程Ｓ２と
汚染防止用チップ搭載工程Ｓ３とは、図１のフローチャ
ートでは分けて記載しているが、部品搭載機を用いて搭
載がおこなわれる部品が電子部品であるか汚染防止用チ
ップ７であるかが異なるのみであり、同一の装置を用い
て同時に実施されるものである。Next, electronic components such as the power IC 5 and the element 6 such as a chip capacitor are mounted on the solder layer 4 (component mounting step S2), and the contamination preventing chip 7 is covered so as to cover the upper surface of the pad conductor 3. Mounting (contamination prevention chip mounting step S3). The component mounting step S2 and the contamination preventing chip mounting step S3 are simultaneously performed using a known component mounting machine (chip mounter) for mounting electronic components on the thick film circuit board 20. That is, although the component mounting step S2 and the contamination-preventing chip mounting step S3 are separately described in the flowchart of FIG. 1, the component mounted using the component mounting machine is an electronic component or a contamination-preventing component. The only difference is whether the chip 7 is used, and the chip 7 is simultaneously implemented using the same device.

【００３６】ここで、汚染防止用チップ７は、図５に示
すように、鉄等の金属材料又は樹脂材料等により作製さ
れたパッド状チップ７ｂの両面に、薄板状のゴム７ａを
Ｓｉ系接着剤等により貼り付けたものであり、搭載され
るパッド導体３の上面全体を覆うことができるようにパ
ッド導体３上面より一回り大きいサイズに加工されてい
る。また、ゴム７ａは、柔軟性を有し且つはんだリフロ
ー温度（約２３０℃〜約２７０℃）において溶融が生じ
ない程度の耐熱性を有するフッ素系又はＳｉ系等の耐熱
性ゴムからなる。より好ましくは、ゴム７ａの熱変形温
度は、３００℃以上である。As shown in FIG. 5, the contamination preventing chip 7 is formed by bonding a thin rubber 7a to both surfaces of a pad-like chip 7b made of a metal material such as iron or a resin material by Si-based bonding. The upper surface of the pad conductor 3 is processed to have a size slightly larger than the upper surface of the pad conductor 3 so as to cover the entire upper surface of the pad conductor 3 to be mounted. The rubber 7a is made of a heat-resistant rubber, such as a fluorine-based or Si-based rubber, which has flexibility and heat resistance that does not cause melting at a solder reflow temperature (about 230 ° C. to about 270 ° C.). More preferably, the heat deformation temperature of the rubber 7a is 300 ° C. or higher.

【００３７】汚染防止用チップ７は、柔軟性を有するゴ
ム７ａ側をパッド導体３側に向けて当接させ且つ加圧す
ることにより、ゴム７ａがパッド導体３の上面へ密着状
に搭載される。The rubber 7a is mounted on the upper surface of the pad conductor 3 by bringing the flexible rubber 7a into contact with the pad conductor 3 and pressurizing the rubber 7a.

【００３８】次に、約２３０℃〜約２７０℃の加熱条件
の下で、はんだ層４のリフローを行い、パワーＩＣ５や
チップコンデンサ等の素子６を、溶融したはんだ材料に
より配線・部品搭載ランド２へ固着させる（はんだリフ
ロー工程Ｓ４）。この時、はんだペースト中のフラック
スが分離して流出したり、はんだ粉が飛散したりする
が、汚染防止用チップ７がゴム７ａ側がパッド導体３上
面に密着しパッド導体３を覆うように搭載されているの
で、パッド導体３を、はんだフラックスやはんだ粉付着
による汚染から確実に防止することができる。尚、汚染
防止用チップ７のゴム７ａは、はんだリフロー温度（約
２３０℃〜約２７０℃）に対して耐熱性を有するので、
はんだリフロー工程Ｓ４において変形が生じることがな
い。Next, the solder layer 4 is reflowed under a heating condition of about 230 ° C. to about 270 ° C., and the elements 6 such as the power IC 5 and the chip capacitor are connected to the wiring / component mounting land 2 using a molten solder material. (Solder reflow step S4). At this time, the flux in the solder paste separates and flows out, or the solder powder scatters. However, the chip 7 for preventing contamination is mounted so that the rubber 7a side adheres to the upper surface of the pad conductor 3 and covers the pad conductor 3. Therefore, the pad conductor 3 can be reliably prevented from being contaminated by solder flux or solder powder. Since the rubber 7a of the contamination prevention chip 7 has heat resistance to the solder reflow temperature (about 230 ° C. to about 270 ° C.)
No deformation occurs in the solder reflow step S4.

【００３９】その後、汚染防止用チップ７のみを取り除
いて回収する（汚染防止用チップ回収工程Ｓ５）。汚染
防止用チップ７は、ゴム７ａがパッド導体３に密着する
ことにより搭載されているので、容易に取り外して回収
することができる。続いて、厚膜回路基板２０を洗浄す
る（洗浄工程Ｓ６）。Thereafter, only the contamination preventing chip 7 is removed and collected (contamination preventing chip collecting step S5). Since the contamination preventing chip 7 is mounted by the rubber 7a being closely attached to the pad conductor 3, it can be easily removed and collected. Subsequently, the thick film circuit board 20 is cleaned (cleaning step S6).

【００４０】そして、Ａｌ又はＡｕ等のワイヤ１０を用
いて、パッド導体３とパワーＩＣ５とを超音波接合（ワ
イヤボンディング）することにより、これらを電気的に
接続する（ワイヤボンディング工程（基板内）Ｓ７）。
ここで、パッド導体３は、はんだリフロー工程Ｓ４にお
いて汚染防止用チップ７により覆われ、はんだフラック
スやはんだ粉付着による汚染から防止されて清浄が保た
れているので、接合信頼性が劣化することなく良好にワ
イヤボンディングを行うことができる。Then, the pad conductor 3 and the power IC 5 are ultrasonically bonded (wire-bonded) using the wire 10 of Al or Au to electrically connect them (wire bonding step (in the substrate)). S7).
Here, since the pad conductor 3 is covered with the contamination preventing chip 7 in the solder reflow step S4 and is prevented from being contaminated by solder flux or solder powder adhesion and is kept clean, the bonding reliability is not deteriorated. Good wire bonding can be performed.

【００４１】さらに、厚膜回路基板２０を、接着剤８を
用いて金属ベース９に接着する（金属ベース接着工程Ｓ
８）。Further, the thick film circuit board 20 is bonded to the metal base 9 using the adhesive 8 (metal base bonding step S
8).

【００４２】最後に、Ａｌ又はＡｕ等のワイヤ１０を用
いて、パッド導体３と金属ベース９とを超音波接合（ワ
イヤボンディング）することにより、これらを電気的に
接続する（ワイヤボンディング工程（基板−金属ベース
間）Ｓ９）。ワイヤボンディング工程（基板−金属ベー
ス間）Ｓ９においても、上述したワイヤボンディング工
程（基板内）Ｓ７と同様に、パッド導体３が、はんだリ
フロー工程Ｓ４において汚染防止用チップ７により覆わ
れ、はんだフラックスやはんだ粉付着による汚染から防
止されて清浄が保たれているので、接合信頼性が劣化す
ることなく良好にワイヤボンディングを行うことができ
る。Finally, the pad conductor 3 and the metal base 9 are ultrasonically bonded (wire-bonded) by using a wire 10 of Al or Au to electrically connect them (wire bonding process (substrate)). -Between metal bases) S9). Also in the wire bonding step (between the substrate and the metal base) S9, similarly to the above-described wire bonding step (in the substrate) S7, the pad conductor 3 is covered with the contamination preventing chip 7 in the solder reflow step S4, and the solder flux and the solder flux are removed. Since contamination is prevented from being contaminated by the solder powder and cleanliness is maintained, wire bonding can be performed satisfactorily without deteriorating the bonding reliability.

【００４３】以上の各工程を経て厚膜回路基板２０にお
ける電子部品の実装が完了し、混成集積回路装置２１が
完成する。Through the above steps, the mounting of the electronic components on the thick film circuit board 20 is completed, and the hybrid integrated circuit device 21 is completed.

【００４４】上述したことから明らかなように、本実施
形態によれば、汚染防止用チップ７でパッド導体３を覆
った状態において、はんだリフロー工程Ｓ４が実行され
るので、パッド導体３をはんだフラックスやはんだ粉の
付着等による汚染から確実に防止することができる。As is clear from the above description, according to the present embodiment, the solder reflow step S4 is performed in a state where the pad conductor 3 is covered with the contamination preventing chip 7, so that the pad conductor 3 is connected to the solder flux. And contamination from solder powder and the like can be reliably prevented.

【００４５】また、はんだリフロー工程Ｓ４前の汚染防
止用チップ搭載工程Ｓ３は部品搭載工程Ｓ２と同時に行
うことができるので、部品搭載工程とパッド導体への樹
脂コーティングとを別工程で行う必要がある従来方法と
比べて、工数を大幅に低減することが可能である。Further, since the chip mounting step S3 for preventing contamination before the solder reflow step S4 can be performed simultaneously with the component mounting step S2, the component mounting step and the resin coating on the pad conductor need to be performed in separate steps. Compared with the conventional method, the number of steps can be significantly reduced.

【００４６】また、汚染防止用チップ搭載工程Ｓ３は、
部品搭載工程Ｓ２において使用される部品搭載機を利用
して実行することができるので、既存の設備をそのまま
活用することにより、生産工程の大幅な変更なく、パッ
ド導体３の汚染対策を図ることができる。さらに、樹脂
等のダレが生じて配線・部品搭載ランド２に付着し、は
んだ濡れ不良が発生する等の不具合が生じることもな
い。Further, the chip mounting step S3 for preventing contamination is
Since it can be executed using the component mounting machine used in the component mounting step S2, by using the existing equipment as it is, it is possible to take measures against contamination of the pad conductor 3 without a significant change in the production process. it can. Further, there is no problem such as dripping of the resin or the like, which adheres to the wiring / component mounting land 2 and causes poor solder wetting.

【００４７】また、汚染防止用チップ回収工程Ｓ５にお
いて回収された使用済みの汚染防止用チップ７は再使用
可能であるので、材料の無駄がないという利点がある。Further, since the used pollution preventing chip 7 collected in the pollution preventing chip collecting step S5 can be reused, there is an advantage that there is no waste of material.

【００４８】尚、本発明は上述した各実施形態に限定さ
れるものではなく、本発明の主旨を逸脱しない範囲で種
々の変更を施すことが可能である。The present invention is not limited to the above embodiments, and various changes can be made without departing from the gist of the present invention.

【００４９】例えば、前記実施形態では、パッド導体３
よりも当接面のサイズが大きい汚染防止用チップ７を用
いてパッド導体３の上面全体を覆うようにしたが、パッ
ド導体３の少なくとも一部分（例えば、ワイヤ１０が接
合される表面の一部分のみ）を汚染防止用チップ７によ
り覆うようにしてもよい。For example, in the above embodiment, the pad conductor 3
Although the entire surface of the pad conductor 3 is covered by using the contamination prevention chip 7 having a larger contact surface than the contact surface, at least a part of the pad conductor 3 (for example, only a part of the surface to which the wire 10 is bonded). May be covered with the contamination preventing chip 7.

【００５０】また、図５に示す汚染防止用チップ７では
パッド状チップ７ｂの両面にゴム７ａを貼り付ける構成
としたが、片面のみに貼り付けてもよい。要するに、少
なくともパッド導体３に当接する面にゴム７ａを貼り付
ければよいのである。In the chip 7 for preventing contamination shown in FIG. 5, the rubber 7a is attached to both sides of the pad-shaped chip 7b, but it may be attached to only one side. In short, it suffices to attach the rubber 7a to at least the surface in contact with the pad conductor 3.

【００５１】また、前記実施形態では、ワイヤボンディ
ングが行われるパッド導体３に汚染防止用チップ７を搭
載してはんだリフロー工程Ｓ４における汚染を防止する
例を示したが、これには限られない。要するに、回路基
板上へ電子部品を実装する方法であって、前記回路基板
上に設けられた導体及び電子部品等の所定の回路要素の
少なくとも一部を覆うように汚染防止用チップを搭載す
る汚染防止用チップ搭載工程と、前記回路基板上の少な
くとも一部を汚染する可能性のある所定の処理工程と、
前記所定の回路要素より前記汚染防止用チップを取り外
して回収する汚染防止用チップ回収工程と、を備えてい
ればよいのである。そして、この電子部品の実装方法に
よれば、回路基板上に設けられた導体及び電子部品等の
所定の回路要素の少なくとも一部を覆った状態で、回路
基板上の少なくとも一部を汚染する可能性のある所定の
処理工程を実行するので、前記所定の回路要素が前記所
定の処理工程において汚染されることを確実に防止する
ことができる。また、前記所定の処理工程終了後、所定
の回路要素より汚染防止用チップを取り外して回収し、
前記所定の回路要素の汚染が防止された部分に対して所
望の処理を良好に施すことができる。Further, in the above-described embodiment, an example has been described in which the contamination preventing chip 7 is mounted on the pad conductor 3 on which wire bonding is performed to prevent the contamination in the solder reflow step S4, but the present invention is not limited to this. In short, a method of mounting an electronic component on a circuit board, the method comprising mounting a pollution prevention chip so as to cover at least a part of predetermined circuit elements such as conductors and electronic components provided on the circuit board. Prevention chip mounting step, a predetermined processing step that may contaminate at least a part of the circuit board,
It is only necessary to provide a contamination prevention chip collecting step of removing and collecting the contamination preventing chip from the predetermined circuit element. According to the electronic component mounting method, it is possible to contaminate at least a part of the circuit board while covering at least a part of a predetermined circuit element such as a conductor and an electronic component provided on the circuit board. Since the predetermined processing step is performed, it is possible to reliably prevent the predetermined circuit element from being contaminated in the predetermined processing step. Further, after the predetermined processing step is completed, the contamination preventing chip is removed from the predetermined circuit element and collected.
Desired processing can be satisfactorily performed on the portion where the contamination of the predetermined circuit element is prevented.

【００５２】[0052]

【発明の効果】以上述べたように本発明の請求項１乃至
３のいずれかに記載の電子部品の実装方法によれば、所
定の回路要素の少なくとも一部が、汚染を伴う可能性の
ある所定の処理工程において汚染されることを確実に防
止し、所定の回路要素の汚染が防止された部分に対して
所望の処理を良好に施すことができるという効果を奏す
る。As described above, according to the electronic component mounting method according to any one of the first to third aspects of the present invention, at least a part of the predetermined circuit element may be contaminated. It is possible to reliably prevent contamination in a predetermined processing step, and to perform a desired process on a portion of the predetermined circuit element in which the contamination is prevented.

【００５３】また、請求項４乃至８のいずれかに記載の
電子部品の実装方法によれば、はんだフラックスやはん
だ粉により汚染が生じ易いはんだリフロー工程におい
て、パッド導体の少なくとも一部が汚染防止用チップに
より覆われることにより汚染から確実に防止され、パッ
ド導体に対するワイヤボンディングの接合性を向上させ
ることができるという効果を奏する。According to the electronic component mounting method of the present invention, at least a part of the pad conductor is used to prevent contamination in a solder reflow step in which contamination is likely to occur due to solder flux or solder powder. The effect of being able to be reliably prevented from being contaminated by being covered with the chip and improving the bonding property of the wire bonding to the pad conductor can be achieved.

【００５４】また、請求項９乃至１１のいずれかに記載
の汚染防止用チップによれば、汚染防止対象の回路要素
を傷つけることなく密着させることができるので、回路
要素への搭載及び取外しが容易であり、回路要素をはん
だフラックスやはんだ粉の付着等による汚染から確実に
防止することができるという効果を奏する。According to the contamination preventing chip of any one of claims 9 to 11, the circuit element to be prevented from being polluted can be adhered to the chip without damaging it, so that the circuit element can be easily mounted on and removed from the circuit element. This has the effect that the circuit elements can be reliably prevented from being contaminated by the adhesion of solder flux or solder powder.

【図面の簡単な説明】[Brief description of the drawings]

【図１】 本発明の一実施形態の電子部品の実装方法に
おける工程の流れを示すフローチャートである。FIG. 1 is a flowchart showing a flow of steps in a method for mounting an electronic component according to an embodiment of the present invention.

【図２】 厚膜回路基板を示す図である。FIG. 2 is a view showing a thick film circuit board.

【図３】 汚染防止用チップが搭載された厚膜回路基板
を示す図である。FIG. 3 is a diagram showing a thick-film circuit board on which a pollution prevention chip is mounted.

【図４】 電子部品の実装が完了した混成集積回路装置
を示す図である。FIG. 4 is a diagram showing a hybrid integrated circuit device on which mounting of electronic components is completed.

【図５】 汚染防止用チップの構造を示す図である。FIG. 5 is a view showing a structure of a contamination prevention chip.

【図６】 従来例における厚膜回路基板を示す図であ
る。FIG. 6 is a diagram showing a conventional thick-film circuit board.

【図７】 従来例におけるパッド導体に樹脂がコーティ
ングされた厚膜回路基板を示す図である。FIG. 7 is a view showing a conventional thick-film circuit board in which a pad conductor is coated with a resin.

【図８】 従来例におけるチップ部品等が搭載された厚
膜回路基板を示す図である。FIG. 8 is a view showing a conventional thick-film circuit board on which chip parts and the like are mounted.

【図９】 従来例における電子部品の実装が完了した混
成集積回路装置を示す図である。FIG. 9 is a view showing a hybrid integrated circuit device in which mounting of electronic components is completed in a conventional example.

【符号の説明】[Explanation of symbols]

２…配線・部品搭載ランド（配線導体）、３…ワイヤボ
ンディング用パッド導体（パッド導体）、４…はんだ
層、５…パワーＩＣ（電子部品）、６…コンデンサ（電
子部品）、７…汚染防止用チップ、７ａ…ゴム、７ｂ…
パッド状チップ、２０…厚膜回路基板（回路基板）、Ｓ
１…はんだ層形成工程、Ｓ２…部品搭載工程、Ｓ３…汚
染防止用チップ搭載工程、Ｓ４…はんだリフロー工程、
Ｓ５…汚染防止用チップ回収工程、Ｓ７…ワイヤボンデ
ィング工程（基板内）、Ｓ９…ワイヤボンディング工程
（基板−金属ベース間）。2 land for wiring / components (wiring conductor), 3 pad conductor for wire bonding (pad conductor), 4 solder layer, 5 power IC (electronic component), 6 capacitor (electronic component), 7 contamination prevention Chip, 7a ... rubber, 7b ...
Pad-shaped chip, 20 thick circuit board (circuit board), S
1. Solder layer forming step, S2 ... Component mounting step, S3 ... Contamination prevention chip mounting step, S4 ... Solder reflow step,
S5: Pollution prevention chip collection step, S7: Wire bonding step (within the substrate), S9: Wire bonding step (between the substrate and the metal base).

Claims (11)

【特許請求の範囲】[Claims] 【請求項１】 回路基板上へ電子部品を実装する方法で
あって、 前記回路基板上に設けられた導体及び電子部品等の所定
の回路要素の少なくとも一部を覆うように汚染防止用チ
ップを搭載する汚染防止用チップ搭載工程と、 前記回路基板上の少なくとも一部を汚染する可能性のあ
る所定の処理工程と、 前記所定の回路要素より前記汚染防止用チップを取り外
して回収する汚染防止用チップ回収工程と、 を備えたことを特徴とする電子部品の実装方法。1. A method of mounting an electronic component on a circuit board, comprising: forming a pollution prevention chip so as to cover at least a part of a predetermined circuit element such as a conductor and an electronic component provided on the circuit board. A contamination prevention chip mounting step to be mounted; a predetermined processing step that may contaminate at least a part of the circuit board; and a contamination prevention step of removing and collecting the contamination prevention chip from the predetermined circuit element. A method for mounting an electronic component, comprising: a chip collecting step. 【請求項２】 前記所定の処理工程は、はんだリフロー
工程であることを特徴とする請求項１に記載の電子部品
の実装方法。2. The method according to claim 1, wherein the predetermined processing step is a solder reflow step. 【請求項３】 前記汚染防止用チップは、少なくとも一
つの面が弾性材料により構成され、 前記汚染防止用チップ搭載工程では、前記弾性材料を前
記所定の回路要素の少なくとも一部の表面へ密着させる
ように前記汚染防止用チップを搭載することを特徴とす
る請求項１又は２に記載の電子部品の実装方法。3. The contamination prevention chip has at least one surface made of an elastic material. In the contamination prevention chip mounting step, the elastic material is brought into close contact with at least a part of the surface of the predetermined circuit element. The method for mounting an electronic component according to claim 1, wherein the contamination prevention chip is mounted as described above. 【請求項４】 回路基板上に形成された配線導体に電子
部品をはんだ付けするとともに、前記回路基板上に形成
されたパッド導体に対してワイヤボンディングを行うよ
うにした電子部品の実装方法であって、 前記回路基板上にはんだ材料からなるはんだ層を形成す
るはんだ層形成工程と、 前記はんだ層上に電子部品を搭載する電子部品搭載工程
と、 前記パッド導体の少なくとも一部を覆うように汚染防止
用チップを搭載する汚染防止用チップ搭載工程と、 前記パッド導体に前記汚染防止用チップが搭載された状
態で、前記電子部品が搭載された前記はんだ層を所定の
加熱条件下でリフローし、前記電子部品を前記配線導体
に接合するはんだリフロー工程と、 そのはんだリフロー工程後に前記汚染防止用チップを取
り外して回収する汚染防止用チップ回収工程と、 前記汚染防止用チップを取り外した前記パッド導体に対
してワイヤボンディングを行うワイヤボンディング工程
と、 を備えたことを特徴とする電子部品の実装方法。4. A method for mounting an electronic component, comprising: soldering an electronic component to a wiring conductor formed on a circuit board; and performing wire bonding to a pad conductor formed on the circuit board. A solder layer forming step of forming a solder layer made of a solder material on the circuit board; an electronic component mounting step of mounting an electronic component on the solder layer; and a contamination covering at least a part of the pad conductor. A contamination prevention chip mounting step of mounting the prevention chip, and in a state where the contamination prevention chip is mounted on the pad conductor, the solder layer on which the electronic component is mounted is reflowed under a predetermined heating condition, A solder reflow process for joining the electronic component to the wiring conductor; and a contamination prevention method for removing and collecting the contamination prevention chip after the solder reflow process. Chip and recovery step, the mounting method of the electronic component to the wire bonding step of performing wire bonding to the pad conductor removing the pollution chip, comprising the. 【請求項５】 前記電子部品搭載工程と前記汚染防止用
チップ搭載工程とは、同時に行われることを特徴とする
請求項４に記載の電子部品の実装方法。5. The electronic component mounting method according to claim 4, wherein the electronic component mounting step and the contamination preventing chip mounting step are performed simultaneously. 【請求項６】 前記汚染防止用チップは、少なくとも一
つの面が弾性材料により構成され、 前記汚染防止用チップ搭載工程では、前記弾性材料を前
記パッド導体の少なくとも一部の表面へ密着させるよう
に前記汚染防止用チップを搭載することを特徴とする請
求項４又は５に記載の電子部品の実装方法。6. The contamination preventing chip has at least one surface made of an elastic material. In the contamination preventing chip mounting step, the elastic material is brought into close contact with at least a part of the surface of the pad conductor. The electronic component mounting method according to claim 4, wherein the contamination prevention chip is mounted. 【請求項７】 前記弾性材料は、耐熱性ゴムからなるこ
とを特徴とする請求項３又は６に記載の電子部品の実装
方法。7. The method according to claim 3, wherein the elastic material is made of a heat-resistant rubber. 【請求項８】 前記汚染防止用チップ搭載工程は、電子
部品を回路基板上に搭載するための部品搭載機を用いて
行われることを特徴とする請求項１乃至７のいずれかに
記載の電子部品の実装方法。8. The electronic device according to claim 1, wherein the contamination preventing chip mounting step is performed using a component mounting machine for mounting an electronic component on a circuit board. Component mounting method. 【請求項９】 回路基板上に設けられた導体及び電子部
品等の回路要素上に着脱可能に搭載されて前記回路要素
の汚染を防止するための電子部品の実装方法に使用され
る汚染防止用チップであって、 パッド状チップの少なくとも一つの面に弾性材料を貼り
付けてなることを特徴とする汚染防止用チップ。9. A method for preventing contamination used in a method of mounting an electronic component which is detachably mounted on a circuit element such as a conductor and an electronic component provided on a circuit board to prevent the circuit element from being contaminated. A chip for preventing contamination, wherein an elastic material is attached to at least one surface of a pad-like chip. 【請求項１０】 前記弾性材料は、耐熱性ゴムからなる
ことを特徴とする請求項９に記載の汚染防止用チップ。10. The chip according to claim 9, wherein the elastic material is made of heat-resistant rubber. 【請求項１１】 前記汚染防止用チップは、前記回路要
素の搭載面よりも大きく形成されたことを特徴とする請
求項９又は１０に記載の汚染防止用チップ。11. The pollution prevention chip according to claim 9, wherein the pollution prevention chip is formed larger than a mounting surface of the circuit element.
JP2002150244A 2002-05-24 2002-05-24 Electronic component mounting method and anti-contamination chip used therefor Expired - Fee Related JP3994327B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007027227A (en) * 2005-07-13 2007-02-01 Mitsubishi Electric Corp Semiconductor device and its manufacturing method
CN109413886A (en) * 2017-08-17 2019-03-01 富士电机株式会社 The manufacturing method and welding auxiliary tool of semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007027227A (en) * 2005-07-13 2007-02-01 Mitsubishi Electric Corp Semiconductor device and its manufacturing method
CN109413886A (en) * 2017-08-17 2019-03-01 富士电机株式会社 The manufacturing method and welding auxiliary tool of semiconductor device
JP2019036653A (en) * 2017-08-17 2019-03-07 富士電機株式会社 Manufacturing method of semiconductor device and soldering auxiliary tool
US11164846B2 (en) 2017-08-17 2021-11-02 Fuji Electric Co., Ltd. Semiconductor device manufacturing method and soldering support jig
JP7013717B2 (en) 2017-08-17 2022-02-01 富士電機株式会社 Manufacturing method of semiconductor device and soldering auxiliary jig
CN109413886B (en) * 2017-08-17 2023-11-21 富士电机株式会社 Method for manufacturing semiconductor device and soldering auxiliary tool

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