JP2003124117A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method capable of controlling the occurrence of voids when an amorphous semiconductor film is polycrystallized by the use of a cap film. SOLUTION: This semiconductor device manufacturing method comprises a first process of forming an amorphous semiconductor film on the main surface of an insulating board, a second process of forming a cap film with an opening on the amorphous semiconductor film by the use of ultraviolet-transmitting material, and a third process of irradiating the amorphous semiconductor film with ultraviolet rays through the intermediary of the cap film so as to crystallize at least a part of the amorphous semiconductor film under the cap film for the formation of a polycrystalline semiconductor film.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device.

[0002]

2. Description of the Related Art In order to realize high definition and high brightness display of an active matrix type semiconductor device, higher mobility of a semiconductor thin film is required. Silicon is mainly used for the semiconductor thin film. Silicon is deposited using a CVD (chemical vapor deposition) device or a sputtering device. Immediately after the film formation of silicon, the silicon thin film is in an amorphous state, and therefore its mobility is as low as 0.1 to ¹ cm ² / Vsec.

In order to increase the mobility of this silicon thin film, it is necessary to crystallize the silicon thin film. For crystallization of the silicon thin film, there is a method of irradiating the silicon thin film with ultraviolet rays. An excimer laser or an ultraviolet (UV) lamp capable of outputting high energy is used as a light source of ultraviolet rays. By irradiating the silicon thin film with ultraviolet rays, the surface of the silicon thin film or the entire film is melted and crystallized, and the silicon thin film changes from an amorphous state to a polycrystalline state.

However, when the silicon thin film is crystallized by irradiating it with ultraviolet rays to form a polycrystalline silicon thin film, irregularities (ridges) are formed in the polycrystalline silicon thin film. To solve this problem, Japanese Patent No. 2776276 discloses that a cap film made of a translucent insulating film is formed on a silicon thin film, and the silicon thin film is irradiated with ultraviolet rays through the cap film. According to this publication, the silicon thin film is covered with a cap film at the time of irradiation with ultraviolet rays, thereby preventing the polycrystalline silicon thin film from being uneven.

[0005]

The mobility of the obtained polycrystalline silicon thin film greatly depends on the irradiation energy value of ultraviolet rays, and in order to further increase the mobility of the polycrystalline silicon thin film,
It is necessary to raise this irradiation energy value to a certain threshold. The inventor of the present application, when performing ultraviolet irradiation using a cap film as in Japanese Patent No. 2776276, if the irradiation energy value of ultraviolet exceeds a certain threshold value, the silicon thin film cannot withstand the applied irradiation energy, It was discovered that a void-free space called a void is formed in the silicon thin film. When such voids occur, ablation may occur in some cases, and the silicon thin film may scatter. Therefore, in order to prevent the occurrence of voids, it is necessary to set the irradiation energy value of ultraviolet rays to be less than the above threshold value and near the above threshold value.

However, even if the irradiation energy value is set to be less than the threshold value and in the vicinity of the threshold value, the irradiation energy of ultraviolet rays has a variation in distribution, so that a void is generated. Therefore, in order to prevent the generation of voids, it is necessary to lower the irradiation energy value, which lowers the mobility of the obtained polycrystalline silicon thin film.

The position or number of the generated voids varies depending on the irradiation energy density / irradiation conditions of ultraviolet rays, the composition and the film thickness of a thin film such as silicon formed on the substrate, and is 1 or more within 1 μm ² . Voids may occur at high density. When the void generation density is high as described above, it may become a large obstacle beyond the pinhole in the manufacturing process of the semiconductor device.

Therefore, the present invention is to solve the above-mentioned problems, and a method of manufacturing a semiconductor device capable of controlling the generation of voids when an amorphous semiconductor film is polycrystallized using a cap film. Another object is to provide a semiconductor device manufactured using the same.

[0009]

A method of manufacturing a semiconductor device according to the present invention comprises a step of forming an amorphous semiconductor film on a main surface of an insulating substrate, and an opening formed on the amorphous semiconductor film by using an ultraviolet-transparent material. Forming a cap film having a portion, and irradiating the amorphous semiconductor film with ultraviolet rays through the cap film to crystallize at least a part of the amorphous semiconductor film under the cap film to form a polycrystalline semiconductor. The step of forming a film is included to solve the above problems.

In the step of forming the polycrystalline semiconductor film, voids may be intensively generated in the polycrystalline semiconductor film in the outer peripheral region of the opening.

The outer peripheral region of the opening may be less than 5 μm from the outer periphery of the opening.

The method may further include a step of removing the polycrystalline semiconductor film in the opening and the outer peripheral region of the opening.

The cap film preferably contains at least one selected from the group consisting of SiO ₂ , SiN, and SiON.

The area of the opening of the cap film is 0.
It may be 1 μm ² or more.

The cap film may have one or more openings in 1 mm ² .

The method may further include a step of forming a transistor having the polycrystalline semiconductor film in at least a channel region other than the opening and the outer peripheral region of the opening.

The transistor may include a part of the cap film as a gate insulating film.

The semiconductor device of the present invention is preferably formed by the above method.

The operation will be described below.

In the method of manufacturing a semiconductor device of the present invention, a cap film having an opening is formed using an ultraviolet-transparent material, and the amorphous semiconductor film is irradiated with ultraviolet light through the cap film, so that the amorphous film under the cap film is amorphous. At least a part of the semiconductor film is crystallized to form a polycrystalline semiconductor film. As a result, voids are intensively generated in the region of the polycrystalline semiconductor film corresponding to the outer peripheral region of the opening of the cap film, and at the same time, the void is formed in the region of the polycrystalline semiconductor film separated from the opening of the cap film by a predetermined distance. Can be suppressed. As described above, since it is possible to selectively form a region in which the generation of voids is suppressed in the polycrystalline semiconductor film, it is possible to irradiate ultraviolet rays having a high irradiation energy value when crystallizing the amorphous semiconductor film. It will be possible. Thus, a polycrystalline semiconductor film having high mobility can be formed. In addition, a high-performance semiconductor element can be formed by selectively using the region of the polycrystalline semiconductor film in which void generation is suppressed. In addition, as a light source of ultraviolet rays, XeF (wavelength 351 nm) and XeCl (wavelength 308 are typically used.
nm), KrF (wavelength 248 nm), ArF (wavelength 19)
An excimer laser having a medium of 3 nm) or F ₂ (wavelength of 157 nm), a high-pressure UV (ultraviolet) lamp, an ultra-high-pressure UV lamp, or the like can be used.

In the above manufacturing method, after the polycrystalline semiconductor film is formed, a region of the polycrystalline semiconductor film corresponding to the opening of the cap film and a region of the polycrystalline semiconductor film corresponding to the outer peripheral region of the opening ( That is, the void generation region) may be removed.

Furthermore, by using a high mobility polycrystalline semiconductor film in which the above-mentioned generation of voids is suppressed in the channel region, a high performance transistor can be formed. If at least a part of the cap film is used as the gate insulating film, the manufacturing process can be simplified and the manufacturing cost can be reduced. Further, a semiconductor device can be manufactured by forming the above transistors in an array.
Such a semiconductor device is suitably used, for example, in an active matrix substrate of a liquid crystal display device.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION A method of manufacturing a semiconductor device according to the present invention comprises (1) a step of forming an amorphous semiconductor film on a main surface of an insulating substrate, and (2) an ultraviolet-transparent material on the amorphous semiconductor film. And (3) irradiating the amorphous semiconductor film with ultraviolet rays through the cap film to crystallize at least a part of the amorphous semiconductor film below the cap film, Forming a crystalline semiconductor film. Hereinafter, an embodiment of a method for manufacturing a semiconductor device of the present invention will be described with reference to FIG.

1A and 1B are views for explaining the method of manufacturing the semiconductor device of this embodiment.
1A is a plan view of the semiconductor device, and FIG. 1B is FIG.
FIG. 1B is a sectional view of 1B-1B ′ in FIG.

First, as shown in FIG. 1B, the insulating substrate 1
A base coat film 2 is formed on the main surface of, and a silicon thin film 3 is formed on the base coat film 2. The silicon thin film 3 is formed by using, for example, a plasma CVD method or a sputtering method, and the silicon thin film 3 after the film formation is in an amorphous state.

After forming the silicon thin film 3, a cap film 4 having an opening 5 is formed on the silicon thin film 3. The cap film 4 is formed of a material that transmits ultraviolet rays, and for example, a high melting point material such as an insulating material such as SiO ₂ , SiN, or SiON is preferably used. This is because when the silicon thin film 3 is irradiated with ultraviolet rays through the cap film 4 in a later step, the cap film is heated by the ultraviolet rays, so that a material that is not melted by this heating can be selected as the material of the cap film 4. This is because it is preferable. The stoichiometric ratio of SiN and SiON is arbitrary.

Among the materials of the cap film 4 shown above,
Particular preference is given to using SiO ₂ or SiN. When SiO ₂ is used for the cap film 4, this SiO ₂ and Si
Since the density of the interface state formed at the interface with the (silicon thin film 3) is relatively small, there is an advantage that good interface characteristics can be obtained. In addition, the cap film 4 has SiO ₂ or S
When iN is used, the cap film 4 can be used as a gate insulating film of a transistor, so that there is an effect that a separate gate film need not be formed. Further, since SiN has excellent mechanical strength, even if the silicon thin film 3 has irregularities, it is possible to prevent cracks from forming in the cap film 4. The cap film 4 may be formed by laminating a plurality of thin films made of different materials.

The thickness of the cap film 4 is about 10 nm.
It is preferably in the range of ˜500 nm. This is because if the film thickness of the cap film 4 is less than about 10 nm, it may not be possible to prevent unevenness from being formed on the silicon thin film 3. On the other hand, the thickness of the cap film 4 is about 50.
If the thickness exceeds 0 nm, the ultraviolet rays 6 may be excessively absorbed by the cap film 4 when the ultraviolet rays 6 are irradiated in a later step, so that the silicon thin film 3 is irradiated with the ultraviolet rays 6 at a sufficient energy density. This is because it becomes necessary to irradiate with very high intensity ultraviolet rays. However, cap film 4
It is preferable to appropriately adjust the preferable film thickness according to the conditions such as the film thickness and composition of the silicon thin film 3 or the energy density of the ultraviolet rays 6 to be irradiated.

The cap film 4 has a film thickness within the above range and a film thickness d of d = λ / 4n × (2k + 1) (λ:
It is preferable to satisfy incident light wavelength, n: refractive index of the cap film, and k: integer. When d satisfies the above expression, reflection of incident light (ultraviolet rays) on the surface of the cap film can be suppressed, so that the silicon thin film 3 can efficiently absorb the incident light.

The opening 5 of the cap film 4 is formed by, for example, a dry etching method or a wet etching method after the cap film 4 is formed. The shape of the opening 5 may be arbitrary. The area of the opening 5 depends on the capability of the stepper, but is preferably 0.1 μm ² or more. The formation density of the openings 5 depends on the formation density of the semiconductor elements formed on the silicon thin film 3, but one or more is preferable within 1 mm ² .

After forming the cap film 4, as shown in FIG. 1A, ultraviolet rays 6 are irradiated from above the cap film 4 by a light source such as an excimer laser or a UV lamp. Thereby, the silicon thin film 3 below the cap film 4 is irradiated with the ultraviolet rays 6 through the cap film 4, and the silicon thin film 3 below the cap film 4 is crystallized. Voids 7 are generated in the polycrystalline silicon semiconductor film 3P thus obtained. Note that, in FIG. 1A, the voids 7 formed in the polycrystalline silicon semiconductor film 3P are schematically illustrated on the cap film 4 for easy understanding.

FIG. 2 is an SEM of the polycrystalline silicon thin film 3P.
It is a figure which shows an observation result typically. The polycrystalline silicon thin film 3P shown in FIG. 2 has a diameter of about 2 μm at intervals of about 6 μm.
The opening 5 of m is formed by using the cap film 4 having a plurality of openings. From FIG. 2, it can be seen that about 120 voids 7 are concentratedly generated in a region less than about 2 μm from the outer periphery of the region 5S of the polycrystalline silicon thin film 3P corresponding to the opening 5 of the cap film 4. The generated voids 7 each have an irregular shape surrounded by a curve, and from the substantially circular void having a diameter of less than 0.1 μm, the major axis is 0.8 μm.
It can be seen that voids having a substantially elliptical shape of m × minor axis 0.2 μm are distributed. On the other hand, the void 7 is not generated in the region of about 2.0 μm or more from the outer periphery of the opening 5.

In the present embodiment, the polycrystalline silicon thin film 3P is formed by using the cap film 4 in which the intervals and the areas adjacent to the openings 5 are variously changed, and the polycrystalline silicon thin film 3 is formed.
The void 7 contained in P was observed. As a result, the polycrystalline silicon thin film 3P corresponding to the opening 5 of the cap film 4 is formed.
Area 5V less than about 5.0 μm from the outer periphery 5C of area 5S
It was found that the generation of voids was concentrated on (see FIG. 1) and the generation of voids was suppressed in a region away from the outer periphery 5C of the opening 5 by about 5.0 μm to 30 μm. It is considered that the location where the void 7 is generated is controlled by the change in the thermal gradient and the stress in the vicinity of the cap film 4. Note that the cap film 4 in the present embodiment has an effect of preventing unevenness (ridge) from being formed on the polycrystalline silicon thin film, as in the case of Japanese Patent No. 2776276 described in the related art. Specifically, in the polycrystalline silicon thin film 3P in the region covered with the cap film 4, the average value of the height difference between the concave portion and the convex portion was about 7 nm or less.

The appropriate value of the irradiation energy density of the ultraviolet rays 6 depends on the thickness of the silicon thin film 3 and the thickness of the cap film 4, but is 100 mJ / cm ² to 800 mJ / cm ^2.
The range of irradiation is preferably from 1 to 100.
It is preferably in the range up to times. When the conventional cap film having no opening is used, it is necessary to use ultraviolet rays having a relatively low irradiation energy density in order to suppress the generation of voids. A density of UV light can be used.
For example, the irradiation energy density is 400 mJ / cm for a silicon thin film having a film thickness of 40 nm as in Examples described later.
^{Even when the second} ultraviolet ray 6 is irradiated, it is possible to selectively form a region in which the generation of voids is suppressed. The irradiation energy density of the usable ultraviolet rays 6 depends on the composition of the silicon thin film as well as the film thickness of the silicon thin film.

After forming the polycrystalline silicon thin film 3P as described above, if necessary, the polycrystalline silicon thin film in the region corresponding to the opening 5 of the cap film 4 and the region corresponding to the outer peripheral region of the opening 5 are formed. The polycrystalline silicon thin film (that is, the void generation region) is removed by an etching method or the like.
After that, a semiconductor device is manufactured by further performing a predetermined process.

As described above, according to the method of manufacturing the semiconductor device of the present embodiment, the semiconductor device is formed of the ultraviolet transmitting material,
Further, the amorphous silicon thin film is irradiated with ultraviolet rays through the cap film having the opening to crystallize at least the amorphous silicon thin film under the cap film to form a polycrystalline silicon thin film. As a result, voids can be concentratedly generated in the region of the polycrystalline silicon thin film corresponding to the outer peripheral region of the cap film opening, and the generation of voids can be suppressed in the region away from the opening of the cap film by a predetermined distance. As described above, since it is possible to selectively form a region in which the generation of voids is suppressed in the polycrystalline silicon thin film, when crystallizing the amorphous silicon thin film,
Ultraviolet rays can be irradiated with a high irradiation energy density. As a result, a polycrystalline silicon thin film having high mobility can be formed.

Therefore, a high-performance semiconductor device can be formed by using the obtained polycrystalline silicon thin film. For example, if such a polycrystalline silicon thin film is used in the channel region, a high performance transistor can be formed. Alternatively, a semiconductor device in which the above transistors are formed in an array may be manufactured. Such a semiconductor device is preferably used for an active matrix substrate of a liquid crystal display device, for example. In this embodiment, an opening is provided in the cap film to prevent the resulting polycrystalline silicon thin film from being uneven, and a region in which the generation of voids is suppressed is selected in this polycrystalline silicon thin film. However, the cap film used in the present invention is not limited to this. For example, when the amorphous silicon thin film is irradiated with ultraviolet rays by using the cap film used in the present invention, it is possible to promote energy absorption in the amorphous silicon thin film. In this case, the thickness d of the cap film is preferably set to d = λ / 4n × (2k + 1) (λ: incident light wavelength, n: refractive index of the cap film, k: integer). This is because it is possible to suppress reflection of ultraviolet rays on the surface of the cap film and promote energy absorption into the amorphous silicon thin film.

Further, by using the cap film used in the present invention, it is possible to control the crystal nucleus and crystal orientation by forming the energy distribution of ultraviolet rays when irradiating the amorphous silicon thin film with ultraviolet rays. In this case, for example, the thickness of the cap film is set to the above d, and the energy density is abruptly changed at the boundary between the region where the cap film of the amorphous silicon thin film is formed and the region where it is not formed. When the amorphous silicon thin film is irradiated with ultraviolet rays using such a cap film, the amorphous silicon thin film in the region where the cap film is formed is completely melted in the film thickness direction, and the amorphous silicon thin film in the region where the cap film is not formed is melted. Can be partially melted in the film thickness direction. As a result, crystal grains can be grown laterally (lateral growth) with the region of the partially melted amorphous silicon thin film as a nucleus. Further, by repeatedly irradiating the region where lateral growth is desired with ultraviolet rays through the cap layer, the lateral growth region can be continuously formed (SLS: Sequential Lateral Solidificatio).
n).

(Example) A method of manufacturing an active matrix substrate will be described using the manufacturing method of the above-described embodiment. This embodiment will be described below with reference to FIGS. 3 and 4 which schematically show the manufacturing process of the active matrix substrate. 3A is a sectional view taken along line 3A-3A 'in FIG. 3C, and FIG. 3B is a sectional view taken along line 3B-3B' in FIG. 3D. Further, FIG. 4A shows 4A- of FIG. 4F.
4A ′ is a cross-sectional view of FIG. 4E ′, and FIG. 4E is 4E of FIG.
-4E is a cross-sectional view of FIG.

First, as shown in FIG. 3A, a base coat film 102 made of SiO ₂ (having a thickness of about 3) is formed on an insulating substrate 101 made of glass or heat-resistant plastic.
00 nm) and a silicon thin film 103 (film thickness of about 40 nm)
And a cap film 104 made of SiO ₂ (film thickness of about 100
nm) are deposited in this order. A plasma CVD method is used for depositing the base coat film 102, the silicon thin film 103, and the cap film 104.

Base coat film 1 by plasma CVD method
No. 02 deposition condition is that the pressure is 0.6 Torr and TE
Gas flow rate of OS (tetraethoxysilane) is 110sc
cm, and the gas flow rate of O ₂ is 3000 sccm. Moreover, the substrate temperature in the plasma CVD apparatus is set to 320 ° C.
The RF power is 0.45 W / cm ² and the distance between the electrodes is 13 mm. Further, the deposition conditions of the silicon thin film 103 by the plasma CVD method, under pressure 1.3 Torr, a gas flow rate of SiO ₂ is 250 sccm, H ₂
Has a gas flow rate of 1000 sccm. The substrate temperature in the plasma CVD apparatus is 320 ° C., the RF power is 0.1 W / cm ^2, and the distance between the electrodes is 25 mm.

Cap film 104 formed by plasma CVD method
The deposition conditions of TEOS are:
Has a gas flow rate of 110 sccm and O _{2 has} a gas flow rate of 3000 sccm. Further, the substrate temperature in the plasma CVD apparatus is set to 320 ° C., and the RF power is 0.45 W /
cm ^2, and the inter-electrode distance and 13 mm. The opening 5 of the cap film 104m is formed by etching after forming the thin film.

The three layers of the base coat film 102, the silicon thin film 103 and the cap film 104 may be formed by a single-wafer method or a batch method. Further, instead of the plasma CVD method, the sputtering method may be used.

Base coat film 102, silicon thin film 10
After laminating 3 and the cap film 104, a plurality of circular openings 105 are formed in the cap film 104 by using a photoresist method, as shown in FIGS. 3A and 3C. The area of the opening 105 of the cap film 104 is 0.
1 μm ² or more, and the formation density of the cap film 104 is
One or more in 1 mm ² .

Next, the XeCl excimer laser is used to irradiate the cap film 104 with ultraviolet rays 106 to anneal the silicon thin film 103. Irradiation conditions are XeC
The irradiation energy density of the excimer laser 106 is set to 400
and mJ / cm ^2, the irradiation number of times and 20 times.

By such irradiation of the ultraviolet rays 106, the silicon thin film 103 under the cap film 104 is crystallized to become a polycrystalline silicon thin film 103P. Also, ultraviolet rays 10
6 irradiation, as shown in FIGS.
A void 107 is generated in the polycrystalline silicon thin film 103P. Note that the cap film 104 is omitted in FIG. The void 107 is formed in the opening 1 of the cap film 104 in the polycrystalline silicon thin film 103P.
It is generated in the outer peripheral region 107V of less than 5 μm from the outer periphery of 05. On the other hand, generation of voids is suppressed in a region 5 μm to 30 μm away from the outer periphery of the opening 105 of the cap film 104. In the following steps, a plurality of thin film transistors are manufactured by using the region 207 of the polycrystalline silicon thin film 103P in a region 5 μm to 30 μm away from the outer periphery of the opening 105 as a channel region, a source region, and a drain region. To do.

After forming the polycrystalline silicon thin film 103P as shown in FIGS. 3B and 3D, a cap film is formed on BHF (buffered hydrofluoric acid, and the concentration ratio of hydrofluoric acid and ammonium fluoride is 1:10). Soak 104 for 70 seconds,
As shown in FIGS. 4A and 4F, the cap film 104
Remove all. Further, the silicon thin film 103 is removed by etching by a photoresist method, and patterning is performed.

Then, as shown in FIG. 4B, patterning is performed.
A plasma CVD method is applied on the formed silicon thin film 103.
Using SiO₂Of the gate insulating film 108 (film thickness 10
0 nm) is deposited. Gate by plasma CVD method
The insulating film 108 is deposited under a pressure of 0.6 Torr.
And the gas flow rate of TEOS is 110 sccm, ₂
Has a gas flow rate of 3000 sccm. Also, the substrate temperature
To 320 ° C., RF power 0.45 W / cm²When
The distance between the electrodes is 13 mm.

The cap film 104 is replaced with the gate insulating film 1
You may use as 08. In this case, the cap film 104 is etched without completely removing the cap film 104 in the step of FIG. 4A to form the gate insulating film 108 made of the cap film 104.

After forming the gate insulating film 108, as shown in FIG. 4C, an Al-Ti (Ti concentration of 1 wt%) alloy is deposited on the gate insulating film 108 by sputtering.
Patterning is performed to form the gate electrode 109. Next, using the gate electrode 109 as a mask, phosphorus ions or boron ions 110 are implanted into the polycrystalline silicon thin film 103P. As a result, the region of the polycrystalline silicon thin film 103P into which the ions 110 are implanted becomes the source / drain region 111 of the TFT, and the region below the gate electrode 109 where the ions are not implanted becomes the channel region 103.

Next, as shown in FIG. 4D, plasma C
An interlayer insulating film 112 made of SiO ₂ is deposited by using the VD method. The conditions for depositing the interlayer insulating film 112 by the plasma CVD method are that the pressure is 1.6 Torr, the gas flow rate of TEOS is 240 sccm, and the gas flow rate of O ₂ is 60.
It is 00 sccm. Also, the substrate temperature is set to 300 ° C.,
RF power was set to 0.65 W / cm ² and electrode distance was 13
mm.

After forming the interlayer insulating film 112, the source / drain regions 1 are formed on the interlayer insulating film 112 as shown in FIG.
An opening (contact hole) 112H reaching 11 is formed. Then, after depositing an Al—Ti alloy by a sputtering method, patterning is performed by etching. Thereby, the source / drain electrodes 113 electrically connected to the source / drain regions 111 via the contact holes 112H are formed. As described above, the stagger type polycrystalline silicon TFT 140 is manufactured. Also, FIG.
As shown in (g), the polycrystalline silicon TFT 140
Are formed in an array, and the active matrix substrate 142
Is created.

[0053]

As described above, according to the present invention, it is possible to form a polycrystalline semiconductor film having a high mobility and selectively forming a region in which void generation is suppressed.
By using such a polycrystalline semiconductor film, a high-performance semiconductor device can be manufactured.

[Brief description of drawings]

1A and 1B are diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention, FIG. 1A is a plan view of the semiconductor device, and FIG. 1B is a sectional view taken along line 1B-1B ′ of FIG. It is a figure.

FIG. 2 is a diagram schematically showing an SEM observation result of the polycrystalline silicon thin film of this embodiment.

FIG. 3 is a diagram schematically showing a manufacturing process of a semiconductor device, (a) and (b) are cross-sectional views, and (c) and (d) are plan views.

FIG. 4 is a diagram schematically showing a manufacturing process of a semiconductor device, wherein (a), (b), (c), (d), and (e) are sectional views, and (f) and (g). ) Is a plan view.

[Explanation of symbols]

1 Insulation board 2 Base coat film 3 Silicon thin film 3P polycrystalline silicon thin film 4 Cap film 5 openings 5C outer circumference 7 void 7V area 101 insulating substrate 102 Base coat film 103 Silicon thin film 103 Polycrystalline silicon thin film 104 Cap film 105 opening 106 UV 107 void 108 gate insulating film 109 gate electrode 112 Interlayer insulation film 112H contact hole 113 Source / drain electrodes 140 Polycrystalline silicon TFT 142 Active matrix substrate

Continued front page    F-term (reference) 2H092 JA25 JA29 KA04 KA05 KA07                       MA05 MA08 MA18 MA19 MA30                       NA21 PA01                 4M104 AA01 AA09 BB02 CC01 CC05                       DD16 DD37 DD63 DD91 EE03                       EE05 EE16 GG09                 5F052 AA02 AA24 BB07 CA08 DA02                       DB03 DB07 EA01 EA16 FA00                       JA01                 5F110 AA01 BB01 CC02 DD01 DD02                       DD13 EE06 EE44 FF02 FF03                       FF04 FF05 FF09 FF28 FF30                       GG02 GG13 GG43 GG45 HJ01                       HJ13 HL00 HL06 NN02 NN23                       NN35 PP02 PP03 PP23 PP31                       PP40 QQ11

Claims (10)

[Claims] 1. A step of forming an amorphous semiconductor film on a main surface of an insulating substrate, a step of forming a cap film having an opening using an ultraviolet-transparent material on the amorphous semiconductor film, and the cap film. And a step of irradiating the amorphous semiconductor film with ultraviolet rays through the solution to crystallize at least a part of the amorphous semiconductor film under the cap film to form a polycrystalline semiconductor film. . 2. The method of manufacturing a semiconductor device according to claim 1, wherein in the step of forming the polycrystalline semiconductor film, voids are intensively generated in the polycrystalline semiconductor film in the outer peripheral region of the opening. 3. The outer peripheral region of the opening is a region less than 5 μm from the outer periphery of the opening.
A method of manufacturing a semiconductor device according to item 1. 4. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of removing the polycrystalline semiconductor film in the opening and the outer peripheral region of the opening. 5. The cap film is formed of SiO ₂ , SiN,
5. The method for manufacturing a semiconductor device according to claim 1, further comprising at least one selected from the group consisting of: and SiON. 6. The method of manufacturing a semiconductor device according to claim 1, wherein the area of the opening of the cap film is 0.1 μm ² or more. 7. The method of manufacturing a semiconductor device according to claim 1, wherein the cap film has one or more openings in 1 mm ² . 8. The method according to claim 3, further comprising a step of forming a transistor having at least a channel region of the polycrystalline semiconductor film other than the opening and the outer peripheral region of the opening. A method of manufacturing a semiconductor device according to item 1. 9. The method of manufacturing a semiconductor device according to claim 8, wherein the transistor includes a part of the cap film as a gate insulating film. 10. A semiconductor device formed by the method according to claim 1.