JP2003091566A - Layout and wiring designing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To effectively utilize circuit diagram information and mounting symbol information, and simplify necessary preparation in designing layout and wiring for a printed circuit board. SOLUTION: A circuit diagram forming part 110 with which a circuit designer is skillful is provided with means 11 and 12 to simply set network attributes and part attributes which must be inputted at the least for control of layout and wiring design examination, and examination of layout and wiring design. A circuit information interface part 111 is provided with a means 13 to extract necessary information from circuit diagram data containing the attributes, etc., to be optimized. A layout and wiring design examination preparation part 112 is provided with a means 19 to simplify preparation work that must be executed every time of layout and wiring design, and a means 18 to automatically generate a device model which is short in a layout and wiring design examining part 113.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention makes it easy to utilize a circuit diagram in the upstream stage of printed circuit board development so that a circuit designer unfamiliar with mounting design can give an appropriate placement / wiring instruction to the mounting designer. The present invention relates to a layout / wiring concept design device having a support function capable of simulating a transmission line or the like and checking the layout / wiring relationship by the mounting shape.

[0002]

2. Description of the Related Art When developing a printed circuit board mounted on a digital device, a circuit design for logically selecting an appropriate component that realizes a desired function and connecting components, and efficient production in a factory There is a process called mounting design in which layout wiring is performed on a printed circuit board in consideration of the above.

Many of the multi-layered printed boards mounted on the digital equipment have a method in which circuit design and packaging design are shared and designed by another person in charge. In addition to design data such as circuit drawings, connection information, and parts lists, constraint information such as layout instructions and wiring instructions is transmitted. The packaging designer designs packaging based on these design data and constraint information. After the implementation design is completed, the circuit designer who is the client of the implementation design inspects whether the implementation design was performed as desired, and if there is no problem, actually produce a printed circuit board and mount the components. , The actual printed circuit board is completed.

The selection of an appropriate termination component in the upstream of the design and the design instruction regarding the layout and wiring are very important points in designing a highly complete printed circuit board in a short period of time. Based on the prediction of the circuit diagram and the image mounted on the printed circuit board, the following three methods have been mainly performed.

The first method is to write a circuit diagram in which the board is imaged in the circuit design. Figure 15
FIG. 6 is a flowchart of a conventional layout and wiring concept study (1) by this method.

In FIG. 15, the circuit designer 201 creates a circuit diagram 210 by using the circuit diagram CAD. At this time, the circuit designer 201 solidifies the layout and wiring concept 211 by imagining an actual printed circuit board in his head. The result of the layout and wiring concept is expressed in the circuit diagram by using the circuit diagram symbol 212 prepared in consideration of the mounting shape prepared in advance. As a result, the circuit diagram takes into consideration the arrangement of parts and the flow of wiring on the printed circuit board.
Information such as data and drawings extracted from this circuit diagram 25
0 is passed to the mounting designer 202, and the placement / wiring design 220 is mounted on the mounting symbol 2 so that the state close to the circuit diagram is realized.
Ask 21 to go. The circuit designer 203, who is also the client of the packaging design, receives this result and performs a drawing 230 to confirm whether the desired packaging design has been performed.
If an unintended placement / wiring design is performed in the inspection 230, the process returns to the placement / wiring design 220 to request the correction,
When the problem disappears, the factory 204 is requested to make an actual printed circuit board prototype 240. In this way,
The circuit designer is studying the layout and wiring concept using, for example, the layout and wiring concept study device as described below.

FIG. 19 is a functional block diagram of a conventional layout and wiring concept study device (1) used by a circuit designer. FIG. 19
As shown in, an input unit 100 for inputting and operating information using a mouse or a keyboard, a display unit 101 for displaying an input-edited circuit diagram and various input editing menus, a circuit diagram and related information are newly created. A circuit diagram creation unit 110 that performs editing, correction, deletion, etc., and a component DB unit 160 that stores information regarding components in units of component numbers.

In the circuit diagram creating section 110, a main body having a shape expressing the logical operation of the circuit diagram part made in consideration of the mounting shape of the part to be mounted on the printed board, and a pin expressing the terminal of the part, And a circuit symbol management unit 120 for creating / recording a logical symbol having attribute information associated with parts and pins, a circuit diagram editing unit for calling out a registered circuit symbol and arranging it, and connecting the parts to each other. 121, a circuit diagram data storage unit 122 for recording circuit diagram data, and a circuit diagram output unit 660 for drawing the stored circuit diagram as a drawing on paper or the like.

The second method, apart from the circuit diagram,
In this method, the result of examining the layout and wiring concept of the printed circuit board is made into a drawing by a word processor or handwriting, and it is handed to the person in charge of mounting design together with the circuit diagram. FIG. 16 is a flowchart of the conventional layout and wiring concept study (2) by this method.

In FIG. 16, the circuit designer 201 makes a circuit diagram 210 in the same manner as the first method described above.
Here, in addition to the first method described above, the circuit designer 201 newly conducts a layout and wiring concept study 312 using a word processor or a handwritten drawing. In addition to the information 250 such as data and drawings extracted from the circuit diagram, the placement / wiring concept result 351 is passed to the mounting designer 202 to have the placement / wiring design 220 performed. The subsequent drawing inspection, trial manufacture, and modification thereof are the same as those described above. In such a method, the circuit designer 201 conducts a layout and wiring concept study 312 using, for example, a layout and wiring concept study device as described below.

FIG. 20 is a functional block diagram of a conventional placement / wiring concept study device (2) used by a circuit designer. In addition to the configuration shown in FIG. 19 described above, a layout / wiring plan study unit 713 using software such as a word processor, an input unit 100 equipped with a mouse and a keyboard for operating it, and a layout / wiring plan study result edited by input are displayed. It comprises a display unit 101 for displaying.
These are not connected to the circuit diagram creation unit 110.

The third and final method is a multi-function in which the layout and wiring examination (reference numeral 312 in FIG. 16) conducted in a word processor or the like is linked with the circuit design and the mounting design, and the simulation function such as the transmission line is also provided. This is a method replaced with a dedicated place and route concept design tool. FIG. 17 is a flowchart of the conventional layout and wiring concept study (3) by this method.

In FIG. 17, the interface unit 4 for passing the circuit diagram information to the placement / wiring plan examination by the placement / wiring plan study unit in the above-mentioned conventional placement / wiring plan study flow diagram (2).
60, an interface unit 461 that passes the mounting symbol information used in the mounting design to the placement and wiring concept design to study the placement and wiring with an accurate component shape, and information for performing the placement and wiring concept study from the above interface. The preparatory unit 413 is added to the received information, and the placement / routing study unit 414 is configured to study placement and routing using these information.
The number of commercially available devices that can be applied to the layout and wiring examination unit 414 is increasing. Further, by using a device similar to the placement and routing examination unit 414, it is possible to perform a preliminary check parallel to the placement and routing design in mounting before performing drawing inspection.
Preparations 431 similar to those in No. 3 are required. In such a method, the circuit designer conducts a layout and wiring concept study using, for example, a layout and wiring concept study device as described below.

FIG. 21 is a functional block diagram of a conventional placement / wiring concept study device (3) used by a circuit designer. 21, the circuit information interface unit 111, the placement / wiring plan study advance preparation unit 112, and the placement / wiring plan study unit 113 in FIG.
become.

The circuit information interface unit 111 is called from the netlist generation control unit 850 in the circuit diagram creation unit 110, and a netlist extraction unit 851 that automatically generates a netlist from the circuit diagram data in the circuit diagram data storage unit 122. And a netlist storage unit 131 that stores the extracted netlist.

The layout and wiring concept study advance preparation section 112 displays an input section 100 for inputting and operating information using a mouse or keyboard different from the circuit diagram creation section 110, and information for advance preparation. A mounting symbol management unit 140 that has a display unit 101 and controls reference access of data interfaced from a mounting symbol DB that includes pad information that is actually used in printed circuit board design; The board design condition management unit 141 that manages the board design condition data created with reference to the board design condition DB including electrical characteristics, the netlist storage unit 131 and the circuit symbol arrangement information storage unit of the circuit information interface unit 111. Based on certain information, the information extracted via the mounting symbol management unit 140 and the board design condition management unit 141 is added. A concept study board data generating unit 852 that generates a substrate for data placement and routing concept design Te, consisting concept study board data storage unit 142 for storing the generated placement and routing concept design data and the input information.

The layout study board data generation section 852 in the layout and wiring design study advance preparation section 112 defines a board shape and size and edits a board outline editing section (not shown), and a net of the circuit information interface section. The mounting symbol allocation unit (not shown) allocates the mounting symbols corresponding to the components in the netlist in the list storage unit from the mounting symbol management unit 140, and generates the board data similar to the mounting design here.

The layout and wiring concept study unit 113 lays out components and a layout surface with a device model management unit 150 which manages a device model used in a simulation such as a transmission line analysis carried out at the time of studying the layout and wiring concept. The concept study unit 151 for switching, rotating parts, and controlling the simulation, and the board data retrieved from the concept study board data storage unit of the layout and wiring study preparatory unit are stored, and then the concept study unit is examined. It is composed of a concept study board data storage unit 152 for storing board data changed according to the result, and a study result output unit 153 for outputting the study result as a report.

These placement and wiring concept study advance preparation section 11
Step 2 is repeatedly executed several times until the correction of the circuit diagram becomes unnecessary.

[0020]

The above-described method of studying the layout and wiring concept (1) is not only convenient for the circuit designer to use only the circuit diagram creating apparatus he is familiar with, but also to some extent if the circuit diagram is viewed. There is a merit that you can grasp the image of placement and wiring. This is especially effective when designing a single-sided printed circuit board. However, it is not possible to express the thickness of circuit symbols and wiring in the same size as actual parts, when parts are placed on both sides of a multilayer printed circuit board, and BGA (Ball Grid Array), which is increasing rapidly in recent years.
In the case of a package type component in which the pins are arranged in a grid pattern, it has become difficult to accurately design a layout and wiring due to the problem that it cannot be expressed in a circuit diagram.

Next, in the method of studying the layout and wiring concept (2) described above, in addition to the method of (1), the layout and wiring are studied by using a word processor or the like, so that a shape that cannot be represented by a circuit diagram can be handled. There was a merit such as. However, since the circuit diagram information and the mounting symbol DB are not linked to each other, the problem that the wiring of the pins is mistaken, the problem that the back and front of the layout surface cannot be considered at the same time, and the package shape must be prepared every time Due to such problems, it was difficult to make an accurate place and route concept.

Next, the method of the layout and wiring concept examination (3) described above has abundant functions such as simulation,
Since the circuit diagram information and the mounting symbol DB can be linked, the above problems can be solved. However, on the other hand, it became possible to perform a detailed study, but the ease of use up to now has disappeared, and the problem of work loss such as having to prepare in advance the information necessary for the layout and wiring concept design and the input by setting each time. The problem of mistakes,
It is desired that the circuit designer can easily study the layout and wiring concept because of the problem that the design can be considered only after the layout including the peripheral components for design instruction is performed.

For this reason, there has been a demand for realization of a printed wiring board layout / wiring design device which can effectively use circuit diagram information and mounting symbol information and can simplify preparation in advance.

[0024]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides a designer for studying a layout / wiring concept study in a circuit diagram creation section which is familiar to circuit designers. Means to easily set the net attributes and component attributes that must be input at least, and the necessary information is extracted from the circuit diagram data in which the above attributes are stored in the circuit information interface section and the information is optimized. Means, a means for simplifying the preliminary work that must be performed every time the placement and routing concept study preparation unit performs the placement and routing concept study preparation, and a device model that is lacking in the placement and routing concept study unit as necessary. It is equipped with a means that can automatically generate.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. FIG. 18 is a flow chart of the placement / wiring plan study using the new placement / wiring plan study device of the present invention.
In FIG. 18, reference numeral 516 is concept study information addition, where the circuit diagram creation unit is using the means described in claims 1 and 2 to add information for designing the layout and wiring. Also, 5
Reference numeral 17 is a portion of which preparation is simplified by the means of claims 1 to 4.

(Embodiment 1) FIG. 1 is a functional configuration diagram of a layout and wiring concept designing device of Embodiment 1.

As shown in FIG. 1, the layout and wiring concept designing apparatus of the present invention comprises a circuit diagram creation unit 110, a circuit information interface unit 111, a layout and wiring concept study advance preparation unit 112,
The layout and wiring concept study unit 113 is used. In addition,
In FIG. 1, the same reference numerals are given to the same functional units as those in FIGS. 19 to 21 described above.

The circuit diagram generator 110 is composed of the following functional units. An input unit 100 is used for inputting and operating drawings and attribute information using a mouse and a keyboard. A display unit 101 displays an input / edited circuit diagram and various attribute input / edit menus. Reference numeral 120 denotes a circuit symbol for creating / recording a logic symbol having a main body having a shape expressing a logical operation of a circuit component mounted on a printed circuit board, a pin expressing a terminal of the component, and a component and attribute information associated with the pin. It is the management department. Reference numeral 121 denotes a circuit diagram editing unit that calls a registered circuit symbol and arranges it as a component, creates a net that connects components to each other, and adds / edits attributes to components and nets. 122
Is a circuit diagram data storage unit for recording edited circuit diagram data. Reference numeral 10 denotes a definition of a circuit block from which a placement / wiring concept study is to be carried out from the circuit diagram, and processing such as activation / termination / error of the circuit information interface unit 111, placement / wiring plan study advance preparation unit 112, and placement / wiring plan study unit 113. Is a layout and wiring concept examination control unit for controlling the. 11
Is a placement / wiring concept study net attribute editing unit that adds / edits attribute information such as a net group to a net to be subjected to simulation such as transmission line analysis when studying the placement / wiring concept for the circuit diagram being edited. . The reference numeral 12 automatically generates necessary component attributes for main components such as LSI and termination components such as damping resistors, which are targets of simulation such as transmission line analysis when considering the layout and wiring concept for the edited circuit diagram. It is a component attribute editing unit for studying the layout and wiring concept that is added or edited.

Next, the circuit information interface section 111 is composed of the following functional sections. 130 is activated by the placement / wiring plan study control unit 10 of the circuit diagram creation unit 110, and based on the circuit diagram data in the circuit diagram data storage unit 122, the component information in the circuit block instructed by the placement / wiring plan study control unit 10 and its information. It is a netlist generation unit that automatically generates netlist information including connection information and their attribute information. Reference numeral 14 is an attribute optimizing unit that compensates for the excess or deficiency of the attribute information in the netlist information. Reference numeral 13 is a netlist extraction optimization unit having a netlist generation unit 130 and an attribute optimization unit 14. Reference numeral 131 denotes a netlist storage unit that stores the extracted netlist information. Reference numeral 15 denotes a circuit layout information extraction unit that extracts layout coordinates and layout angles of symbols used in the circuit diagram from the circuit diagram data in the circuit diagram data storage unit 122. A circuit layout information storage unit 16 stores layout information of symbols used in the extracted circuit diagram.

Next, the layout and wiring concept study advance preparation section 112.
Is composed of the following functional parts. An input unit 100 is used for inputting and selecting information in advance preparation for a layout and wiring concept study such as a board outline and design conditions using a mouse or a keyboard. A display unit 101 displays a menu for these preparations. 140 is a mounting symbol DB including pad information and the like actually used in the printed circuit board design
It is an implementation symbol management unit that controls reference access to. Reference numeral 141 denotes a board design condition management unit that controls reference access to the board design condition DB including the names of layers constituting the board and the electrical characteristics of the layers. Reference numeral 18 indicates the mounting symbol data to be mounted on the board data by using the data stored in the netlist storage section 131 of the circuit information interface section 111 and the data registered in advance in the mounting symbol management section 140 and the board design condition management section 141. It is a board outline simple coordinate generation unit that prepares and simply creates the board outline to be a layout and wiring concept study by inputting coordinates.
Reference numeral 19 denotes a component initial placement unit that initially places a mounting symbol in the board outline created by the board outline simple coordinate generation unit 18 using the data in the circuit layout information storage unit 16 of the circuit information interface unit 111. Reference numeral 17 denotes a board data generation / processing unit having a component initial arrangement unit 19. Reference numeral 142 denotes a concept study board data storage unit that stores the generated board data for studying the layout and wiring scheme.

Next, the layout and wiring concept study unit 113 is composed of the following functional units. Reference numeral 100 denotes an input unit for setting a concept study work using a mounting symbol and a simulation condition using a mouse or a keyboard. A display unit 101 displays these menus, work results, simulation results, and the like.
Reference numeral 150 denotes a device model management unit that manages a device model used in a simulation such as a transmission line analysis performed when the layout and wiring concept is examined. Reference numeral 151 denotes a concept study unit that performs placement and rotation of mounting symbols, wiring between pins of mounting symbols, switching of placement surfaces, control of simulation, and the like. Reference numeral 152 is a board data for design study which stores board data retrieved from the board data storage section 142 for design study of the layout and wiring design study preliminary preparation section 112 and then stores board data changed by the study result of the study section 151 for design. It is a storage unit. An examination result output unit 153 outputs the examination result as a report.

In these configurations, the placement and routing concept study control unit 10 and the placement and routing concept study net attribute editing unit 1
1, a layout and wiring concept study part attribute editing unit 12, a netlist extraction optimizing unit 13 having an attribute optimizing unit 14,
A board data generation / processing section 17 having a circuit layout information extraction section 15 and a circuit layout information storage section 16 for recording the same, a board outline simple coordinate generation section 18 and a component initial placement section 19.
It is characterized by having and.

These features will be described with reference to FIGS. FIG. 2 is an example of a circuit diagram immediately after being created by the circuit diagram creating unit 110, and is stored in the circuit diagram data storage unit 122. FIG. 3 is a part attribute editing unit 1 for studying the layout and wiring concept.
It is a typical menu of 2. FIG. 4 is an example in which a circuit block to be subjected to the placement / wiring concept study by the placement / wiring concept study control unit 10 is defined for the circuit diagram of FIG. Figure 5
Is a typical operation menu of the layout and wiring concept study control unit 10. FIG. 6 is a diagram showing an example of placement / wiring concept study data when the circuit block BLOCK1 is selected from the menu of FIG. 5 with respect to the circuit diagram of FIG. FIG. 7 shows FIG.
For the circuit diagram of the circuit block ALL in the menu of FIG.
Is a diagram showing an example of layout / wiring design study data stored in a design study board data storage section 142 before the component initial placement section 19 is executed via the circuit information interface section 111. In FIG. 8, the circuit block ALL is selected from the menu of FIG. 5 with respect to the circuit diagram of FIG. 4, and is stored in the board data storage unit 152 via the circuit information interface unit 111 and the layout / wiring concept study advance preparation unit 112. It is a figure which shows an example of the data for arrangement | positioning wiring design examination.

First, a detailed description will be given of the layout and wiring concept study control unit 10, the layout and wiring concept study net attribute editing unit 11, and the layout and wiring concept study component attribute editing unit 12.

Placement and wiring concept study part attribute editing unit 12
Defines the device model name used by the layout and wiring concept study unit 113 as an attribute.

In FIG. 2, IN1 to IN8 are input pins, and IC1 to IC6 are LSIs. Where IC1
The mounting shape of the circuit symbol is BGA (Ball Grid Arra).
y), and similarly IC2 uses QFP (Quad
Flat Package), IC3 to IC6 are SOP (Small
Outline Package). Also, from R1 to R
Reference numeral 5 is a resistor used as a termination component. R1 to R4 represent chip resistance, and R5 represents collective resistance. It should be noted that R4 surrounded by a dotted line means an insurance component, but the insurance component will be described in detail in Embodiment 3 described later.

As described above, the circuit symbol in consideration of the mounting shape is called from the circuit symbol management unit 120, and the circuit diagram editing unit 121 edits the circuit diagram so that it is as close as possible to the mounting image on the printed circuit board. When the circuit symbols are written in consideration of the mounting shape, the number of pins is very large, and since they are on the matrix, the nets connecting the parts on the circuit diagram will intersect. Since a circuit diagram cannot be created with this, a circuit diagram is created using a symbol such as the IC1 shown in FIG. 2 in which pins are disassembled, but it is not possible to imagine the pin arrangement and mounting shape of components in the circuit diagram.

In the parts on the circuit diagram using these symbols, the circuit symbol management unit 12 that manages circuit symbols for some attributes including the symbol type attribute.
0 and the attribute value defined in the parts DB unit 160 are reflected. As an example of the symbol type attribute, the resistor stores an attribute value starting with R, the LSI stores an attribute value starting with IC, and the collective resistor stores an attribute value starting with BCMP.

As attributes for designating a device model name, a device model default attribute for storing a value registered in advance in the parts DB 160 and a device model manual input attribute for storing a value manually input by the assist function. And a device model automatic generation attribute for storing a value automatically generated using another attribute value already registered in the component DB.

In FIG. 3, reference numeral 50 denotes an LSI layout / wiring design study component attribute editing menu. Reference numeral 60 denotes a layout and wiring concept study component attribute edit menu for the termination component. For the LSI, since it is possible to define the component characteristics for analysis on a component-by-component basis without depending on the circuit, it has a menu consisting of a default attribute display section 51 and a manual input attribute input section 52 registered in the component DB. ing. On the other hand, for the termination component, the definition method in the device model is different even if the termination component uses the same component depending on the circuit configuration.
Cannot use the same menu as. For this reason, after starting an optimum menu by seeing the symbol type attribute, the device model attribute automatic generation unit 61 that can select the type of termination that the symbol type takes from the menu and finally automatically generate the device model name. , A manual input attribute 62 for a device model with an assist device. Enter the device model name using these menus that change depending on the part.

Placement / Wiring Concept Study Net Attribute Editing Unit 11
Is a layout and wiring concept study unit 11 for nets and bus lines.
Attributes such as signal names and constraint information used in 3 etc. are defined. As the net attribute, the group name to which the net belongs,
The maximum wiring delay time, shield designation, etc. are provided.
These values are entered in nets that must be taken care of during wiring, and do not exist in all nets. In the downstream process, it suffices to pay attention to the net to which these values are input, and by highlighting the net by selecting it, the layout and wiring concept study, mounting design, and drawing inspection can be made efficient.

In FIG. 2, DA1 represents a signal name for a net connecting component terminals of R1, IC3, and IC5. Similarly, DA2, DB1, and DB2 also represent signal names for nets. BUSA and BUSB are names of bus lines used for convenience in the circuit diagram to route these signals together.

When defining net group attributes for such nets, it is useless to repeatedly enter the same attributes for all nets. Therefore, there is a function to handle information hierarchically by utilizing the bus line.

This function will be described with an actual example. For example, on the bus line BUSA, the group name "/ CPU"
And the maximum wiring delay time “1.2 ns”, the group name “A” and the maximum wiring delay time “0.8 ns” are given to the net DA1, and nothing is given to the net DA2. With this function, the attributes that are not on the net are applied to the attributes on the bus line.
When both have attributes, the value on the bus line side starting with "/" can be hierarchically combined and expanded, and other than that, the one on the net has priority. That is, the group name of the net DA1 is "/ CPU" and "A" are combined to form "/ CPU".
/ A ”, and the maximum wiring delay time is“ 0.8 ns ”with the net having priority. Since the attributes of the net DA2 are not set, all the attributes of the bus line are applied,
The group name is "/ CPU" and the maximum wiring delay time is "1.
2 ns ". Generally, the same attribute is often given to each bus line, and the input amount of net attributes can be significantly reduced.

The placement / wiring plan examination control unit 10 selects a circuit block for which the placement / wiring scheme study is to be performed, and activates / terminates the circuit information interface unit 111, the placement / wiring scheme study advance preparation unit 112, and the placement / wiring scheme study unit 113. /
This is a placement and routing examination control unit that controls error processing.

In FIG. 4, ALL and BLOCK 1 are defined in the circuit diagram so that the placement / wiring concept examination control unit 10 can visually understand the range of the circuit to be studied. IN1 to IN4, IC1, R
When the placement / wiring concept study of the circuit blocks 1 to R4 and IC3 to IC6 is desired, a range such as BLOCK1 is input using the block designation menu in the placement / wiring concept study control unit 10. Input is input section 100
The range is graphically specified by using the mouse in FIG. 2 and is checked while confirming the range displayed on the display unit 101 in real time. A name is given to the last specified range. If these specified ranges are separated in the circuit diagram, it is possible to treat them as being in the same logical block by using the same name as the name.

In FIG. 5, when the circuit block for which the layout and wiring concept is to be studied is selected from the block selection menu and the execute button is pressed, the circuit information interface unit 111 is called and netlist information is generated. If there is no problem in processing, then the placement and routing concept study advance preparation unit 112
Is called, and if there is no problem in processing, the placement and wiring concept study unit 113 is finally called. FIG. 6 shows an example in which BLOCK1 is selected from the block selection menu and a part of the circuit is examined by the placement / wiring concept study unit 113. In this way, the start-up and end can be monitored, the respective processes can be controlled to operate in order, and arbitrary circuit blocks can be extracted from the circuit diagram to study the layout and wiring concept.

Next, a detailed description will be given of the netlist extraction optimizing unit 13 having the attribute optimizing unit 14, the circuit arrangement information extracting unit 15, and the circuit arrangement information storage unit 16 for recording the same.

In the netlist generation unit 130, the circuit diagram data in the circuit diagram data storage unit 122 is composed of component information, terminal information, connection information, and attribute information in the circuit block instructed by the layout and wiring concept examination control unit 10. It is converted to netlist information, and is temporarily written in the temporary storage device of the netlist extraction optimizing unit 13.

The attribute optimization unit 14 optimizes the netlist information by prioritizing the device models and reconstructing the net attributes, and then stores the netlist information in the netlist storage unit. In order to prioritize the device models, the attribute with the highest priority is converted as netlist information from the device model name information input in plural by the layout / wiring concept study component attribute editing unit 12. In descending order of priority, a device model manual input attribute, a device model automatic generation attribute, and a device model default attribute. As a result, it becomes possible to achieve simplification of device model name input that makes heavy use of default attributes and automatic generation attributes and fine instructions by manual input.

The circuit layout information extraction unit 15 and the circuit layout information storage unit 16 which records the circuit layout information are stored in the circuit layout information extraction unit 15 by the circuit layout data storage unit 122. With respect to the designated component symbol in the circuit block, the circuit symbol layout information is extracted from the reference serving as the component identifier, the XY coordinates, and the layout angle, and stored in the circuit layout information storage unit 16.

Next, a detailed description will be given of the board data generation / processing section 17 having the board outline simple coordinate generation section 18 and the component initial placement section 19.

The board outline simple coordinate generation unit 18 is assumed to be used by an electric designer who is infrequently used and is difficult to edit the board outline, and the distance (X, Y) from the origin (0, 0) in each of the X and Y directions. This is a function to create the outline of the board only by inputting numerical values. By selecting the actual printed circuit board design used in the mounting design through the board design condition management unit,
Substrate data including design conditions related to the design of the substrate such as layer configuration and electrical characteristics is generated.

The component initial placement unit 19 uses the circuit symbol placement information stored in the circuit placement information storage unit 16 to place the component in the board defined for studying the placement and wiring concept having the board outline created earlier. Initial placement. FIG. 7 shows an initial screen when this function is not used. All parts are placed near the origin. Since it takes too much time to study the layout and wiring concept, initial layout is performed by taking advantage of how to write the circuit diagram. The initial placement is calculated so that the placement coordinates of the circuit diagram data can be placed within the coordinates (X, Y) input by the board outline simple coordinate creation unit 18. Using these coordinates and the placement angle of the circuit symbol, initial placement is performed on the surface of the substrate. The data of FIG. 7 becomes the state of FIG. 8, and the circuit designer can start the layout and wiring concept study from here.

Due to the above characteristics, even when a component such as a BGA that cannot express the mounting shape is used, the mounting used in the mounting design while making the most of the circuit image of the mounting expressed in the circuit diagram The placement and wiring concept can be studied with the accurate part shape using symbols. In addition, by adding information to the device model and net in the circuit diagram, you can easily perform simulations such as transmission line analysis.In addition, even when performing repeated work, you can restart the place and route concept without making preparations. it can.

As a result, the circuit designer can easily study the layout and wiring concept utilizing the circuit diagram.

(Embodiment 2) FIG. 9 is a functional block diagram of a layout and wiring concept design device according to a second embodiment.

In FIG. 9, the placement / wiring concept study part attribute editing section 12 in the circuit diagram creating section 110 includes a termination type designating section 20 and a device model designating section 21, and the placement / wiring plan study. A feature is that the advance preparation unit 112 includes the device model automatic generation unit 22.

In FIG. 3, reference numeral 60 denotes a placement / wiring concept study component attribute edit menu for the termination component, which shows an example of a menu for the resistor. For the termination part, since the definition method in the device model is different even if the termination part uses the same part depending on the circuit configuration, the optimum menu is set up by looking at the symbol type attribute. This menu is composed of a device model attribute automatic generation unit 61 capable of automatically generating a device model name, and a device model manual input attribute unit 62 with an assist device.

In the device model attribute automatic generator 61,
First, when the TERMINATOR button 71 is clicked, the terminal type is selected and selected from the menu candidates that appear. The candidates at this time are only termination types that can be taken depending on the symbol type. For example, in the case of a chip resistor, four of a damping resistor, a pull-up resistor, a pull-down resistor, and an AC termination resistor unit can be selected. The selected value is added as an attribute of the component symbol and is finally stored in the circuit diagram data storage unit together with the circuit diagram data.
The selected termination type is written in the display window on the right side of the button and can be easily confirmed by the electric designer.

The VALUE column 72 is the resistance value already registered in the component symbol. The VOLTAGE column 73 is a place for selecting the previous reference potential from the parts that become effective when the pull-up resistor or the pull-down resistor is selected as the termination type. For example, in the case of a pull-up resistor connected to the 3.3V power supply line, this 3.3V is selected. In addition to this, the menu for parts having a pin number larger than two terminals such as collective resistance has a function of extracting the number of terminals of a part symbol.

AUTO GENERATION OF
The IBIS MODEL button 74 is a button for executing automatic generation. A device model name is automatically generated using the attribute selected by the device model attribute automatic generation unit 61 and the attribute value that the component symbol already has. The automatically generated device model name is IBIS MODEL field 75.
Is displayed in. In the example of FIG. 3, r series Although it is 56, by automatically generating the device model name in this way, it is possible to eliminate the definition error of the device model name that exists innumerably depending on the combination of the termination type and the value such as the resistance value and the capacitance value. .

An example of the rule of automatic generation will be introduced. When the chip collective resistance with 8 terminals is used as the damping resistance, the device model name is "symbol type".
The device model name is a combination of + “termination type” + “number of terminals” + “resistance value”.

In the device model manual input attribute 62, the device model name is manually input using the assist function. Similar to the device model attribute automatic generation unit 61, the assist button unit 76 prepares an optimum button by looking at the symbol type attribute. When this button is clicked, a prefix part which is a hint for inputting the device model name is displayed in the IBIS MODEL column 77. Use this hint to manually enter any device model name.

Next, the device model automatic generation unit 22 will be described. The device model has been specified by the device model specification unit 21 described above, but the device model management unit 150 has to prepare device models for many termination parts in advance. . However, there are so many combinations, it is difficult to prepare all of them, and only the most frequently used models are prepared.

In order to deal with the case where a model which is not prepared is designated in the device model management unit 150, the device model automatic generation unit 22 is provided in the layout and wiring concept study advance preparation unit 112 in FIG. The device model automatic generation unit extracts the device model name information stored as the component attribute and the device model stored in the device model management unit from the board data stored in the concept study board data storage unit 142. If there is a device model name that is not registered in the device model management unit, the device model is automatically generated in the IBIS format and stored in the temporary area managed by the device model management unit.

As a result, the circuit designer can easily study the layout and wiring concept utilizing the circuit diagram.

(Third Embodiment) FIG. 10 is a functional block diagram of the layout and wiring concept designing apparatus of the third embodiment.

The feature of FIG. 10 is that the netlist extraction optimizing unit 13 in the circuit information interface unit 111 includes an insurance component handling unit 30.

These features will be described with reference to FIG.
FIG. 11 is an example of a mounting state of insurance components on a printed circuit board.

The functions that differ depending on the destination and the grade may be expressed in one circuit diagram and shared by one board. Depending on the model, the parts having the same circuit number in such a shared circuit diagram may not be mounted on the printed circuit board. For convenience, the parts used in this way are called insurance parts.

In FIG. 11, 1101 is an example showing the mounting state of the insurance component on the actual printed circuit board.
4 is an insurance component. Reference numeral 1102 shows a state in which components are mounted on R4 as a comparison with 1101. That is, in the case of an insurance component, a pad for component mounting is always present on the printed circuit board for another shared model, and the component is present in the netlist information in terms of mounting design. However, since the component is not mounted, it is necessary to create a state where the component is not mounted in the simulation used in the layout and wiring concept study.

Therefore, when an insurance component is found in the netlist information, the insurance component handling unit 30 automatically assigns a device model name indicating unconnected and rewrites the netlist information stored in the netlist. By doing this, we eliminated circuit mistakes and model assignment work for all insurance components when considering the place-and-route concept.

As a result, the circuit designer can easily study the layout and wiring concept utilizing the circuit diagram.

(Embodiment 4) FIG. 12 is a functional block diagram of a layout and wiring concept designing apparatus of Embodiment 4.

The feature of FIG. 12 is that the board data generation / processing section 17 in the layout and wiring concept study advance preparation section 112 is provided with a main inter-component connection extraction section.

These features will be described with reference to FIGS. 6, 13 and 14. FIG. 6 is as described above. In FIG. 13, the terminal parts are temporarily deleted from the state of FIG. 6 by the main part connection extraction unit 40, and the main parts such as the connector and the LS are connected.
This is an example of the board data for design study in which I is extracted, and is stored in the board data storage unit for design study 142 or 152. FIG. 14 shows the layout and wiring concept study unit 1 based on the data of FIG.
13 is an example of conducting a layout and wiring concept study based on the results of simulations such as transmission line analysis and virtual wiring.
It is stored in the concept study board data storage unit 152.

When the extraction of the connection between the main components is designated in the board data generation / processing unit 17, the connection extraction unit between the main components 40 operates. The inter-main-component connection extraction unit 40 searches for a termination component from the concept study board data in the concept study board data storage unit 142.

When the type of the terminal component is a component inserted in series with respect to the net, the process of connecting the nets at both ends is performed after removing the component. When there are a plurality of parts to be inserted in series in the net connecting the main parts and the main parts, the above work is repeated. When there are no more serial components, they are written back to the concept study board data storage unit 142.

As a result, the circuit designer can easily study the layout and wiring concept utilizing the circuit diagram.

[0081]

As described above, according to the present invention, the net attributes and parts which the designer must input at least in order to control the placement / wiring concept study in the circuit diagram creation section and to study the placement / wiring concept. A means for easily setting attributes, a means for extracting necessary information from the circuit diagram data in the circuit information interface section in which the above attributes and the like are stored, and optimizing the information, and a layout and wiring concept study advance preparation section. By providing means for simplifying the preliminary work that must be performed every time the layout and wiring concept is designed, and means for automatically generating a device model lacking in the layout and wiring concept study unit as needed, The layout and wiring concept can be easily studied using the circuit diagram that designers are familiar with.

[Brief description of drawings]

FIG. 1 is a functional configuration diagram of a layout and wiring concept study device according to a first embodiment.

FIG. 2 is a diagram showing an example of a circuit diagram.

FIG. 3 is a diagram showing an example of a menu of a layout and wiring concept study component attribute editing unit.

FIG. 4 is a diagram showing an example of defining a layout and wiring concept study range in a circuit diagram.

FIG. 5 is a diagram showing an example of a menu of a layout and wiring concept examination control unit.

FIG. 6 is a diagram showing an example of layout / wiring design study data in which a circuit block is designated.

FIG. 7 is a diagram showing an example of placement / wiring concept study data before initial placement.

FIG. 8 is a diagram showing an example of placement / wiring concept study data for the entire circuit block.

FIG. 9 is a functional configuration diagram of the layout and wiring concept study device according to the second embodiment.

FIG. 10 is a functional configuration diagram of a layout and wiring concept study device according to a third embodiment.

FIG. 11 is a diagram showing an example of an insurance component.

FIG. 12 is a functional configuration diagram of a layout and wiring concept study device according to a fourth embodiment.

FIG. 13 is a diagram showing an example of layout and wiring design examination data in which only main components are extracted.

FIG. 14 is a diagram showing an example of placement / wiring plan study data in which wiring intersections on the same placement surface are eliminated at the temporary layer wiring stage.

FIG. 15 is a flowchart of a conventional layout and wiring concept study device (1).

FIG. 16 is a flowchart of a conventional layout and wiring design study device (2).

FIG. 17 is a flow diagram of a conventional layout and wiring design study device (3).

FIG. 18 is a flow chart of the layout and wiring concept study device of the present invention.

FIG. 19 is a functional configuration diagram of a conventional layout and wiring concept study device (1).

FIG. 20 is a functional configuration diagram of a conventional layout and wiring concept study device (2).

FIG. 21 is a functional configuration diagram of a conventional layout and wiring concept study device (3).

[Explanation of symbols]

10 Placement and wiring concept examination control unit 11 Placement and wiring concept study net attribute editing unit 12 Placement and wiring concept study parts attribute editing section 13 Netlist extraction optimization unit 14 Attribute optimization unit 15 Circuit layout information extraction unit 16 Circuit arrangement information storage unit 17 Board data generation processing unit 18 Board outline simple coordinate generator 19 Parts initial placement section 100 input section 101 display 110 Circuit diagram creation section 111 Circuit information interface section 112 Placement and Wiring Concept Study Advance Preparation Department 113 Placement and wiring concept study section 120 Circuit symbol management section 121 Circuit diagram editorial department 130 Netlist generator 131 Netlist storage section 140 Implementation symbol management unit 141 board design condition management unit 142 Design Study Board Data Storage Unit 150 Device model management section 151 Concept Study Department 152 board data storage unit 153 Examination result output section 160 parts DB

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Kazuaki Oda             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. (72) Inventor Yoshihiro Oura             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. (72) Inventor Fumiko Morisaki             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. F-term (reference) 5B046 AA08 BA05 BA06 JA03 JA04                       JA10

Claims (4)

[Claims] 1. A layout and wiring concept study device comprising a circuit diagram creation unit for studying and creating a layout and wiring design instruction for a printed circuit board, a circuit information interface unit, a layout and wiring concept advance preparation unit, and a layout and wiring concept study unit. In the circuit diagram creation section, the definition of the circuit block for which the placement / wiring concept study is to be carried out from the circuit diagram, and the start / end / error processing of the circuit information interface section, the placement / wiring plan study advance preparation section and the placement / wiring study design section Placement and routing study control unit that controls the network and a placement and routing concept that adds / edits attribute information such as net groups to nets that are the targets of simulations such as transmission line analysis when studying the placement and routing concept for the circuit diagram being edited. The study net attribute editing section and the simulation such as transmission line analysis etc. when considering the placement and wiring concept for the circuit diagram being edited The circuit information interface unit is equipped with a component attribute editing unit for studying the placement and routing concept that automatically generates or adds / edits the required component attributes for the main components such as LSIs and the termination components such as damping resistors. Then, the attribute optimization unit that optimizes the attribute data required for the placement and wiring concept study with respect to the netlist information generated from the circuit diagram data, and the placement coordinates and placement angles of the component symbols placed from the circuit diagram data. The circuit layout information extracting unit that extracts the circuit layout information and the circuit layout information that stores the circuit layout information are stored. First, the circuit board data for the layout and wiring concept is created using the circuit board layout simple coordinate generation unit to be created and the circuit layout information extracted by the circuit layout information extraction unit. Placement and routing concept design apparatus being characterized in that a component initial arrangement unit arranged to. 2. The shape / attribute information registered in advance for the circuit symbol stored in the circuit symbol management unit in the layout / wiring concept study component attribute editing unit of the circuit diagram creation unit or the circuit diagram editing unit. A termination type specification section that allows you to define the optimal termination type for each component type in the circuit by utilizing values such as the component type and rated value from the set attribute information. And a device model specification part that has a function to automatically generate a device model name required for a simulation used in the placement and wiring concept study from the value selected or entered using a menu whose selection items change depending on the termination type. If the device model specified by the above device model specification unit does not exist in the device model management unit in the place and route concept study advance preparation unit 2. The layout and wiring concept design apparatus according to claim 1, further comprising a model automatic generation unit that automatically generates a device model from the device model name. 3. The circuit information interface unit, after generating and optimizing a netlist in the range designated by the placement and routing concept examination control unit, includes insurance components in the generated netlist. In this case, the arrangement and wiring concept designing apparatus according to claim 1, further comprising: an insurance component corresponding portion that automatically adds a device model name defining an insurance component to the component body of the insurance component and each terminal. . 4. In the board data generation / storage section of the layout and wiring concept study advance preparation section, small parts such as terminal parts around the main parts are deleted in the circuit block for which the layout and wiring concept is to be studied, and connection between the main parts is performed. In the case of conducting a study limited to only the above, it is characterized by including the inter-main-part connection extraction unit that deletes the small parts from the layout / wiring board data and extracts only the main parts and their connection relationships. The layout and wiring concept design device according to claim 1.