JP2002344124A - Manufacturing method of electronic device - Google Patents
Manufacturing method of electronic deviceInfo
- Publication number
- JP2002344124A JP2002344124A JP2001081896A JP2001081896A JP2002344124A JP 2002344124 A JP2002344124 A JP 2002344124A JP 2001081896 A JP2001081896 A JP 2001081896A JP 2001081896 A JP2001081896 A JP 2001081896A JP 2002344124 A JP2002344124 A JP 2002344124A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- mounting
- electronic component
- manufacturing
- electronic device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、ＩＣチップやトラ
ンジスタ、コンデンサ等の電子部品を配線基板に実装し
た電子装置の製造方法に関し、特に、配線基板に電子部
品を実装する際に、配線基板にクラック等が生じないよ
うにした電子装置の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electronic device in which electronic components such as an IC chip, a transistor, and a capacitor are mounted on a wiring board. The present invention relates to a method for manufacturing an electronic device in which cracks and the like are prevented from occurring.
【０００２】[0002]
【従来の技術】今日、トランジスタやコンデンサ等の電
子部品をセラミック等の配線基板の表面に実装した電子
装置は様々な分野で使用されている。図２は、従来の電
子装置の製造方法における配線基板への電子部品の実装
方法を説明するための図である。2. Description of the Related Art Today, electronic devices in which electronic components such as transistors and capacitors are mounted on the surface of a wiring board made of ceramic or the like are used in various fields. FIG. 2 is a view for explaining a method of mounting an electronic component on a wiring board in a conventional method of manufacturing an electronic device.
【０００３】図２（ａ）において、７は電子部品、２は
配線基板を示している。電子部品７には、配線基板２と
実装するための面実装端子６が形成されている。また、
配線基板２の上面２ａには、前記電子部品７と実装する
ための実装端子４が形成されている。更に、配線基板の
上面２ａ及び下面２ｂにはメタライズ部３ａ、３ｂが形
成されている。In FIG. 2A, reference numeral 7 denotes an electronic component, and 2 denotes a wiring board. On the electronic component 7, surface mounting terminals 6 for mounting with the wiring board 2 are formed. Also,
On the upper surface 2a of the wiring board 2, mounting terminals 4 for mounting the electronic components 7 are formed. Further, metallized portions 3a and 3b are formed on the upper surface 2a and the lower surface 2b of the wiring board.
【０００４】電子部品の配線基板への実装は次のように
して行う。まず、ステージ１上に配線基板２を配置す
る。次に、ツール８により電子部品７の背面７ａを吸着
するとともに、電子部品７に形成された面実装端子６
と、配線基板上面２ａに形成された実装端子４とが接合
可能な位置に位置決めする。[0004] Electronic components are mounted on a wiring board as follows. First, the wiring board 2 is arranged on the stage 1. Next, the back surface 7a of the electronic component 7 is sucked by the tool 8 and the surface mount terminals 6 formed on the electronic component 7 are sucked.
And the mounting terminal 4 formed on the upper surface 2a of the wiring board.
【０００５】一方、ツール８により電子部品７を背面７
ａから図２中Ｚ方向に押圧する。このようにして、電子
部品７と配線基板２の各端子４、６が電気的かつ機械的
に接合される。その結果、電子装置が得られる。On the other hand, the electronic component 7 is moved to the rear
a is pressed in the Z direction in FIG. In this manner, the electronic component 7 and the terminals 4 and 6 of the wiring board 2 are electrically and mechanically joined. As a result, an electronic device is obtained.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、上記の
従来の方法は、以下の問題点を有している。However, the above-mentioned conventional method has the following problems.
【０００７】図３に示すような基板下面２ｂにメタライ
ズ部３ｂを有する配線基板２であって、基板上面２ａの
電子部品を実装する実装領域１０に対向する基板下面２
ｂにメタライズ部３ｂが存在しない対向領域１１を有す
る配線基板２に電子部品７を実装する場合、基板下面２
ｂの対向領域１１とステージ１との間に隙間９（図２
（ａ））が形成される。このような状態で電子部品の実
装を行うと、配線基板２にせん断応力が働き、その結
果、図２（ｂ）に示すように配線基板２にクラック１３
等が発生するという問題があった。A wiring board 2 having a metallized portion 3b on a lower surface 2b of the substrate as shown in FIG. 3, wherein the lower surface 2 of the substrate opposes a mounting region 10 for mounting electronic components on the upper surface 2a of the substrate.
When the electronic component 7 is mounted on the wiring board 2 having the facing region 11 in which the metallized portion 3b does not exist in
The gap 9 (see FIG. 2)
(A)) is formed. When the electronic components are mounted in such a state, a shear stress acts on the wiring board 2, and as a result, as shown in FIG.
And so on.
【０００８】特に、マイクロ波帯からミリ波帯領域で使
用される高周波用配線基板においては、高周波信号の特
性を劣化されることなく伝送するために、前記配線基板
の厚みを高周波信号の波長の１／５以下にすることが望
ましい。例えば、使用周波数が１０ＧＨｚの場合では、
配線基板の比誘電率が９とするとその厚みは２．０ｍｍ
以下にすることが望ましい。今後さらに高周波化が進む
ほど配線基板の厚みが薄くなる傾向にあり、それに伴
い、電子装置の製造において配線基板に電子部品を実装
する際に、配線基板にクラック等の問題が益々生じやす
くなる。In particular, in a high-frequency wiring board used in a microwave band to a millimeter wave band, the thickness of the wiring board is adjusted to the wavelength of the high-frequency signal in order to transmit the signal without deteriorating the characteristics of the high-frequency signal. It is desirable to make it 1/5 or less. For example, when the operating frequency is 10 GHz,
If the relative permittivity of the wiring board is 9, its thickness is 2.0 mm
It is desirable to make the following. In the future, as the frequency is further increased, the thickness of the wiring board tends to become thinner. Accordingly, when electronic components are mounted on the wiring board in the manufacture of electronic devices, problems such as cracks are more likely to occur in the wiring board.
【０００９】本発明は上記の課題を解決するためになさ
れたものであり、その目的は、電子部品を配線基板に実
装する電子装置の製造方法において、配線基板に電子部
品を実装する際に、配線基板にクラック等が発生するこ
とを低減することができる電子装置の製造方法を提供す
ることにある。SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a method of manufacturing an electronic device in which electronic components are mounted on a wiring board. An object of the present invention is to provide a method of manufacturing an electronic device that can reduce occurrence of cracks and the like in a wiring board.
【００１０】[0010]
【課題を解決するための手段】上記の課題を解決するた
めに、本発明の電子装置の製造方法は、面実装端子を有
する電子部品と、上記電子部品を基板上面に定められた
実装領域に実装するための実装端子、基板下面に上記実
装領域に対向して定められた対向領域、及び上記対向領
域の周縁部の少なくとも一部に形成されたメタライズ部
を有する配線基板と、を上記面実装端子と上記実装端子
を介して接合してなる電子装置の製造方法であって、上
記配線基板の上記対向領域を上記メタライズ部の厚み以
上の高さの凸状部を有する支持部材によって支持する支
持工程と、上記電子部品の面実装端子を、上記実装端子
と接合可能な位置に位置決めする位置決め工程と、位置
決めした上記電子部品を、面実装端子の形成面と対向す
る背面側から押圧して、上記電子部品と上記配線基板と
を接合する接合工程と、を含むことを特徴とするもので
ある。In order to solve the above-mentioned problems, a method of manufacturing an electronic device according to the present invention comprises an electronic component having surface-mounting terminals and the electronic component in a mounting area defined on an upper surface of a substrate. Mounting the mounting terminal for mounting, the opposing area defined on the lower surface of the substrate opposing the mounting area, and a wiring board having a metallized portion formed on at least a part of a peripheral portion of the opposing area; A method of manufacturing an electronic device, comprising joining the terminal and the mounting terminal via the mounting terminal, wherein the supporting region supports the facing region by a supporting member having a convex portion having a height equal to or greater than the thickness of the metallized portion. And a positioning step of positioning the surface-mounting terminal of the electronic component at a position that can be joined to the mounting terminal, and pressing the positioned electronic component from the back side facing the surface on which the surface-mounting terminal is formed. Te and is characterized in that it comprises a bonding step of bonding the above-mentioned electronic component and the wiring board.
【００１１】[0011]
【作用】本発明の電子装置の製造方法によれば、配線基
板下面に形成されたメタライズ部の厚み以上の高さの凸
状部を有する支持部材によって配線基板の対向領域を支
持して電子部品を実装するので、配線基板と支持部材と
の間に隙間が存在しないため、電子部品の実装時におい
て、配線基板にクラック等が生じる可能性が少なくな
る。そのため、電子装置の製造歩留まりを向上してコス
ト低減を図ることができる。According to the method for manufacturing an electronic device of the present invention, the opposing region of the wiring board is supported by the supporting member having the convex portion having a height greater than the thickness of the metallized portion formed on the lower surface of the wiring board. Since there is no gap between the wiring board and the support member, the possibility of cracks or the like occurring on the wiring board when mounting electronic components is reduced. Therefore, the manufacturing yield of the electronic device can be improved and the cost can be reduced.
【００１２】[0012]
【発明の実施の形態】以下、本発明の実施の形態につい
て図面を用いて説明する。図１は本発明における電子装
置の製造方法であって、電子部品を配線基板に実装した
状態を示す断面図である。なお、図１において図２、３
と同一機能部分には同一符号を付した。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view showing a method of manufacturing an electronic device according to the present invention, in which an electronic component is mounted on a wiring board. In FIG. 1, FIGS.
The same reference numerals are given to the same functional parts.
【００１３】図１において、７は電子部品であり、２は
配線基板を示している。電子部品７には、配線基板２と
実装するための面実装端子６が形成されている。配線基
板２の上面２ａには、前記電子部品７と実装するための
実装端子４が形成されている。配線基板２の上面２ａ及
び下面２ｂにはメタライズ部３ａ、３ｂが形成されてい
る。配線基板２は図３に示すように、電子部品７を実装
するための実装領域１０に対向する基板下面２ａの対向
領域１１の周縁部の少なくとも一部にメタライズ部３ｂ
が形成されている。また、ステージ１には配線基板下面
２ｂに形成されたメタライズ部３ｂの厚み以上の高さの
凸状部１ａが形成されている。In FIG. 1, reference numeral 7 denotes an electronic component, and reference numeral 2 denotes a wiring board. On the electronic component 7, surface mounting terminals 6 for mounting with the wiring board 2 are formed. On the upper surface 2a of the wiring board 2, mounting terminals 4 for mounting the electronic components 7 are formed. Metallized portions 3a, 3b are formed on the upper surface 2a and the lower surface 2b of the wiring board 2. As shown in FIG. 3, the wiring board 2 has a metallized portion 3b on at least a part of the periphery of the facing area 11 on the lower surface 2a of the board facing the mounting area 10 for mounting the electronic component 7.
Are formed. The stage 1 has a convex portion 1a having a height equal to or greater than the thickness of the metallized portion 3b formed on the lower surface 2b of the wiring board.
【００１４】配線基板２への電子部品７の実装は次のよ
うにして行う。まず、ステージ１に形成された凸状部１
ａ上面と配線基板の対向領域１１とが接触するようにス
テージ１上に配線基板２を配置する。次に、ツール８に
より電子部品７の背面７ａを吸着するとともに、電子部
品７に形成された面実装端子６と、配線基板２上面に形
成された実装端子４とが接合可能な位置に位置決めす
る。The mounting of the electronic component 7 on the wiring board 2 is performed as follows. First, the convex portion 1 formed on the stage 1
a The wiring substrate 2 is arranged on the stage 1 so that the upper surface and the opposing region 11 of the wiring substrate are in contact with each other. Next, the back surface 7a of the electronic component 7 is sucked by the tool 8 and positioned at a position where the surface mounting terminals 6 formed on the electronic component 7 and the mounting terminals 4 formed on the upper surface of the wiring board 2 can be joined. .
【００１５】一方、ツール８により電子部品７を背面７
ａから図１中Ｚ方向に押圧することにより接合が行われ
る。このようにして、電子部品７と配線基板２の各端子
（面実装端子６と実装端子４）が電気的かつ機械的に接
合され、目的とする電子装置が得られる。On the other hand, the electronic component 7 is moved to the back 7
The bonding is performed by pressing from a in the Z direction in FIG. In this way, the electronic component 7 and the terminals of the wiring board 2 (the surface mounting terminals 6 and the mounting terminals 4) are electrically and mechanically joined, and a desired electronic device is obtained.
【００１６】上記のように本発明に係る電子装置の製造
方法では、配線基板下面２ｂに形成されたメタライズ部
３ｂの厚み以上の高さ（メタライズ部の厚みと同じかも
しくはそれ以上の高さ）の凸状部１ａにより配線基板２
の対向領域１１を支持して電子部品７の実装を行うこと
により、配線基板２とステージ１との間に隙間９（図
２）が存在しないため、電子部品実装時に配線基板にク
ラック等が発生する可能性が少なくなる。そのため、電
子装置の製造歩留まりを向上してコスト低減を図ること
ができる。凸状部１ａの高さは、メタライズ部３ｂの厚
みを超える高さであるとより好ましい。メタライズ部３
ｂがステージ１の表面と接触しないようにすることで、
メタライズ部３ｂに接触痕等の外観不良が発生すること
や、ピン曲がりを防止できる利点がある。As described above, in the method of manufacturing an electronic device according to the present invention, the height equal to or greater than the thickness of the metallized portion 3b formed on the lower surface 2b of the wiring board (height equal to or greater than the thickness of the metallized portion) Of the wiring board 2
When the electronic component 7 is mounted while supporting the opposing area 11, no gap 9 (FIG. 2) exists between the wiring board 2 and the stage 1, so that a crack or the like occurs on the wiring board when the electronic component is mounted. Is less likely to occur. Therefore, the manufacturing yield of the electronic device can be improved and the cost can be reduced. It is more preferable that the height of the convex portion 1a be greater than the thickness of the metallized portion 3b. Metallization unit 3
By preventing b from contacting the surface of stage 1,
There are advantages in that appearance defects such as contact marks occur in the metallized portion 3b and that pin bending can be prevented.
【００１７】なお、本願発明にいうメタライズ部は、配
線パターンもしくは外部接続用端子電極等よりなる。ま
た、メタライズ部は、導電ペーストのスクリーン印刷、
蒸着、めっきもしくはスパッタリング等によりメタライ
ズ層として形成できるが、ピンをメタライズ層上にロー
付けしたピン状端子としても形成できる。ピン状端子を
用いる場合における「メタライズ部の厚み以上の高さ」
とは、「ピンをメタライズ層上にロー付けした状態にお
ける配線基板面からピン状端子の末端までの高さ以上の
高さ」をいう。ピン状端子の末端がステージ１の表面と
接触しないようにすることで、ピン状端子の末端に接触
痕等の外観不良が発生することを防止できる利点があ
る。The metallized portion according to the present invention comprises a wiring pattern or a terminal electrode for external connection. In addition, the metallized part is screen printed with conductive paste,
It can be formed as a metallized layer by vapor deposition, plating, sputtering, or the like, but can also be formed as a pin-shaped terminal in which pins are brazed on the metallized layer. "Height greater than the thickness of the metallized part" when using pin-shaped terminals
The term "height equal to or higher than the height from the wiring board surface to the end of the pin-like terminal in a state where the pins are soldered on the metallization layer" means. By preventing the terminal of the pin-shaped terminal from being in contact with the surface of the stage 1, there is an advantage that appearance defects such as contact marks can be prevented from being generated at the terminal of the pin-shaped terminal.
【００１８】また、電子部品に設けられた面実装端子
と、配線基板上面に設けられた実装端子を接合する方法
は、位置決めした電子部品を、面実装端子の形成面と対
向する背面側から押圧して、電子部品と配線基板とを接
合するものであれば特に制限は無いが、押圧することの
みに限られるものではない。好ましい方法としては、例
えば、電子部品の背面を押圧するとともに、超音波を印
加する方法が考えられる。このようにすれば、超音波が
電子部品を介して面実装端子と端子電極との接合界面に
印加され、より良好な接合を行うことができる。また、
電子部品実装の際に、ヒータ等により電子部品や配線基
板を加熱するとともに押圧する方法がある。更に、より
好ましい方法としては、電子部品や配線基板を加熱し超
音波を印加するとともに押圧する方法等が考えられる。Also, the method of joining the surface mounting terminal provided on the electronic component to the mounting terminal provided on the upper surface of the wiring board is such that the positioned electronic component is pressed from the back side facing the surface on which the surface mounting terminal is formed. There is no particular limitation as long as it joins the electronic component and the wiring board, but it is not limited to only pressing. As a preferable method, for example, a method of pressing the back surface of the electronic component and applying ultrasonic waves can be considered. With this configuration, the ultrasonic wave is applied to the bonding interface between the surface-mounting terminal and the terminal electrode via the electronic component, so that better bonding can be performed. Also,
There is a method of heating and pressing an electronic component or a wiring board by a heater or the like when mounting the electronic component. Further, as a more preferable method, a method in which an electronic component or a wiring board is heated and ultrasonic waves are applied and pressed is considered.
【００１９】支持部材の材質としては、金属やセラミッ
ク等が挙げられる。面実装端子と端子電極との接合時に
加熱を併用する場合は、熱伝導率のより高い材質を用い
るのがよい。なお、図示していないが、支持部材の配線
基板を支持する側のエッジ部は面取りされているのがよ
い。鋭利なエッジ部に起因する配線基板への好ましくな
い応力集中の発生を回避することができる。面取り部
は、いわゆるＲ面取り（曲面状の面取り）やＣ面取り
（直線的にカットする面取り）等により形成できる。ま
た、配線基板としては、薄膜基板、厚膜基板、多層基板
等が挙げられる。更に、配線基板の材質としては、アル
ミナ質セラミック、ムライト質セラミック、窒化アルミ
ニウムセラミック、窒化珪素セラミック、炭化珪素セラ
ミック及び低温焼成セラミック等が挙げられる。また、
ＦＲ−４、ＦＲ−５等のガラス−エポキシ複合材を用い
たプリント配線板や、更にエポキシ系絶縁層をビルドア
ップした多層プリント配線板にも適用できる。一方、電
子部品としては、ＩＣチップやトランジスタ等の半導体
部品や抵抗、インダクタ、コンデンサ等が挙げられる。Examples of the material of the support member include metals and ceramics. When heating is used together when the surface mounting terminal and the terminal electrode are joined, it is preferable to use a material having a higher thermal conductivity. Although not shown, the edge of the support member on the side supporting the wiring board is preferably chamfered. Undesirable stress concentration on the wiring board due to the sharp edge can be avoided. The chamfered portion can be formed by so-called R-chamfering (curved chamfering), C-chamfering (chamfering to cut straight). Examples of the wiring substrate include a thin film substrate, a thick film substrate, and a multilayer substrate. Further, examples of the material of the wiring board include alumina ceramic, mullite ceramic, aluminum nitride ceramic, silicon nitride ceramic, silicon carbide ceramic, and low-temperature fired ceramic. Also,
The present invention can be applied to a printed wiring board using a glass-epoxy composite material such as FR-4 and FR-5, and a multilayer printed wiring board further built up with an epoxy-based insulating layer. On the other hand, examples of electronic components include semiconductor components such as IC chips and transistors, resistors, inductors, and capacitors.
【００２０】[0020]
【実施例】本発明の効果を確認するために、以下の実験
を行った。EXAMPLES The following experiments were performed to confirm the effects of the present invention.
【００２１】外形サイズ８．５×８．０×０．２（ｍ
ｍ）のアルミナセラミックパッケージを用意した。パッ
ケージ上面には電子部品を実装するための実装領域、パ
ッケージ下面には前記実装領域に対向する対向領域の周
縁部に厚さ１２μｍの配線パターン層が形成されてい
る。External size 8.5 × 8.0 × 0.2 (m
m) An alumina ceramic package was prepared. A mounting region for mounting electronic components is formed on the upper surface of the package, and a wiring pattern layer having a thickness of 12 μm is formed on the lower surface of the package at a peripheral portion of a region facing the mounting region.
【００２２】このパッケージ上面にセラミックチップ部
品（外形サイズ２．５×２．０×０．５（ｍｍ））を図
１に示す方法により実装した。このとき、ステージに設
けられた凸状部の高さを０、７、１２、１７、２２μｍ
としてチップ部品を実装したときにパッケージにクラッ
クが生じたか否かを評価した。その結果を表１に示す。A ceramic chip component (outer size 2.5 × 2.0 × 0.5 (mm)) was mounted on the upper surface of the package by the method shown in FIG. At this time, the height of the convex portion provided on the stage was 0, 7, 12, 17, 22 μm.
Then, it was evaluated whether or not cracks occurred in the package when the chip component was mounted. Table 1 shows the results.
【００２３】[0023]
【表１】 [Table 1]
【００２４】表１から明らかな様に、本実施例の製造方
法では、配線パターン層と同じ高さ（実施例Ａ）もしく
はそれ以上の高さ（実施例Ｂ、Ｃ）の凸状部をステージ
に設けて実装することにより、パッケージとステージと
の間の隙間がなくなり、パッケージにクラックが発生し
なかった。As is clear from Table 1, in the manufacturing method of the present embodiment, the convex portion having the same height (Example A) or a higher height (Examples B and C) as the wiring pattern layer is placed on the stage. In this case, there was no gap between the package and the stage, and no crack was generated in the package.
【００２５】それに対し、比較例Ｄではステージに凸状
部が形成されていないのでパッケージとステージとの間
に隙間ができるためクラックが発生した。また、比較例
Ｅではステージに凸状部を設けてチップ部品を実装した
が、凸状部の高さが配線パターン層よりも低いために、
パッケージとステージとの間にわずかながら隙間ができ
クラックが発生した。On the other hand, in Comparative Example D, no crack was formed between the package and the stage because no convex portion was formed on the stage. Further, in Comparative Example E, the stage was provided with a convex portion and the chip component was mounted. However, since the height of the convex portion was lower than the wiring pattern layer,
A slight gap was created between the package and the stage, and cracks occurred.
【００２６】[0026]
【発明の効果】本発明の電子装置の製造方法によれば、
メタライズ部の厚み以上の高さの凸状部を有する支持部
材によって配線基板の対向領域を支持して電子部品を実
装するので、配線基板にクラック等が生じる可能性が少
なくなる。そのため、電子装置の製造歩留まりを向上し
てコスト低減を図ることができる。According to the method for manufacturing an electronic device of the present invention,
Since the electronic component is mounted while supporting the opposing region of the wiring board by the support member having the convex portion having a height equal to or greater than the thickness of the metallized portion, the possibility of cracks or the like occurring on the wiring board is reduced. Therefore, the manufacturing yield of the electronic device can be improved and the cost can be reduced.
【図１】本発明の電子装置の製造方法を説明するための
模式図である。FIG. 1 is a schematic view for explaining a method for manufacturing an electronic device of the present invention.
【図２】従来の電子装置の製造方法を説明するための模
式図である。FIG. 2 is a schematic view for explaining a conventional method for manufacturing an electronic device.
【図３】配線基板の外観を示す図である。FIG. 3 is a diagram illustrating an appearance of a wiring board.
１ ステージ ２ 配線基板 ３ａ、３ｂ メタライズ部 ４ 実装端子 ６ 面実装端子 ７ 電子部品 ８ ツール ９ 隙間 Reference Signs List 1 stage 2 wiring board 3a, 3b metallized portion 4 mounting terminal 6 surface mounting terminal 7 electronic component 8 tool 9 gap
Claims (1)
るための実装端子、基板下面に上記実装領域に対向して
定められた対向領域、及び上記対向領域の周縁部の少な
くとも一部に形成されたメタライズ部を有する配線基板
とを、上記面実装端子と上記実装端子を介して接合して
なる電子装置の製造方法であって、 上記配線基板の上記対向領域を、上記メタライズ部の厚
み以上の高さの凸状部を有する支持部材によって支持す
る支持工程と、 上記電子部品の面実装端子を、上記実装端子と接合可能
な位置に位置決めする位置決め工程と、 位置決めした上記電子部品を、面実装端子の形成面と対
向する背面側から押圧して、上記電子部品と上記配線基
板とを接合する接合工程と、を含むことを特徴とする電
子装置の製造方法。An electronic component having surface mounting terminals; a mounting terminal for mounting the electronic component in a mounting area defined on an upper surface of a substrate; a facing region defined on the lower surface of the substrate so as to face the mounting region; And a wiring board having a metallized portion formed on at least a part of a peripheral portion of the facing region, the method for manufacturing an electronic device, comprising joining the surface mounting terminal and the mounting terminal via the mounting terminal. A supporting step of supporting the facing region of the substrate by a supporting member having a convex portion having a height equal to or greater than the thickness of the metallized portion; and positioning the surface mounting terminal of the electronic component at a position where the surface mounting terminal can be joined to the mounting terminal. And a bonding step of pressing the positioned electronic component from the back side facing the surface on which the surface mounting terminals are formed, and bonding the electronic component and the wiring board. Method of manufacturing an electronic device according to symptoms.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001081896A JP2002344124A (en) | 2001-03-13 | 2001-03-22 | Manufacturing method of electronic device |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001-70142 | 2001-03-13 | ||
| JP2001070142 | 2001-03-13 | ||
| JP2001081896A JP2002344124A (en) | 2001-03-13 | 2001-03-22 | Manufacturing method of electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002344124A true JP2002344124A (en) | 2002-11-29 |
Family
ID=26611131
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001081896A Pending JP2002344124A (en) | 2001-03-13 | 2001-03-22 | Manufacturing method of electronic device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002344124A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007535179A (en) * | 2004-04-27 | 2007-11-29 | カネカ テキサス コーポレーション | Multilayer printed wiring board |
-
2001
- 2001-03-22 JP JP2001081896A patent/JP2002344124A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007535179A (en) * | 2004-04-27 | 2007-11-29 | カネカ テキサス コーポレーション | Multilayer printed wiring board |
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