JP2002236459A - Electro-optic device, its manufacturing method, semiconductor device and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent continuity failure among pads existing on a substrate and wirings of a flexible wiring board or the like. SOLUTION: Pads to which signals from the outside are to be inputted are formed on the substrate of the electro-optic device. First electrically conductive films 271 having parts corresponding to the pads, first interlayer insulating layers 283 covering the first electrically conductive films 271, second electrically conductive films 272 which are formed on the first interlayer insulating films 283 and which have parts corresponding to the pads, second interlayer insulating films which are formed on surfaces of the first interlayer insulating films 283 and third electrically conductive films 273 constituting the pads are formed on the surface of the substrate 20. The second interlayer insulating film is formed by avoiding a pad formation region consisting of a region where the pad is formed and the peripheral reign of the pad. The third electrically conductive film 273 is made to be in contact with the second electrically conductive film 272 in the pad formation region.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electro-optical device,
Manufacturing method, semiconductor device and electronic equipment, in particular,
Regarding the structure near the pad where external signals are input
You.

[0002]

2. Description of the Related Art An electro-optical device generally includes a substrate for holding an electro-optical material such as a liquid crystal or an EL (electroluminescence) element, and an electrode for applying a voltage to the electro-optical material. It is. Further, as this type of electro-optical device, a device in which a plurality of pads are formed on the substrate is known. Under such a configuration, a signal indicating a voltage applied to the electrode (ie, a signal corresponding to a display image) is input from an external device via the pad.

FIG. 22 is a plan view showing a configuration of a liquid crystal device as an example of a conventional electro-optical device. FIG. 1 illustrates a liquid crystal device in which driving circuits (scanning line driving circuits and data line driving circuits) for generating and outputting drive signals to be applied to the electrodes are formed directly on the surface of a substrate. I have. As shown in FIG. 1, in the liquid crystal device 10, the active matrix substrate 20 and the opposing substrate 30
And the liquid crystal is sealed between both substrates. That is, after liquid crystal is injected from the liquid crystal injection port 41 provided in the sealing material 40, the liquid crystal injection port 41 is sealed by the sealing material 42. Counter substrate 3
In 0, a counter electrode is formed over the entire surface, and a light-shielding layer 31 that shields a region other than a region that can contribute to display is formed. On the other hand, a plurality of scanning lines and data lines are provided on the surface of the active matrix substrate 20,
A pixel electrode and a thin film transistor provided corresponding to each of these intersections are provided. Further, the active matrix substrate 20 has a region extending from the counter substrate 30, and includes a scanning line driving circuit 211 for outputting a scanning signal to the scanning line, and a data line for the data line. Data line driving circuit 2 for outputting a signal
12 are formed. These drive circuits are connected to each of a plurality of pads 214 in a row along the edge of the active matrix substrate 20 via a plurality of routing wirings 213. In a region of the active matrix substrate 20 near the pad 214, a flexible print circuit (hereinafter referred to as “F”) is provided.
PC) is joined at one edge. Under such a configuration, the scanning line driving circuit 21
1 and the data line driving circuit 212
A scanning signal or a data signal is generated according to a signal input to the pad via C.

FIG. 23 is a cross-sectional view showing a configuration near the pad 214 of the liquid crystal device 10 shown in FIG. As shown in the figure, a first conductive film 271 and a second conductive film 27 are formed on a gate insulating film 282 covering the active matrix substrate 20.
2 and a third conductive film 273 are formed.
73 functions as a pad 214. This third insulating film 2
73 has a concave cross-sectional shape that tapers from the bottom side toward the opening side, and has a flange-shaped ground surface 2731 on the opening side. A first interlayer insulating film 283 and a second interlayer insulating film 2
84 are provided in order from the lower side in FIG.
More specifically, a portion of the first interlayer insulating film 283 on the first conductive film 271 has been removed, and the second conductive film 272 has been removed.
Are electrically connected to the first conductive film 271 through this portion. The portion of the second interlayer insulating film 284 on the second conductive film 272 has been removed, and the third conductive film 27 has been removed.
3 is electrically connected to the second conductive film 272 through this portion. That is, the first conductive film 271, the second conductive film 272, and the third conductive film 273 are mutually conductive.

On the other hand, an FPC connected to the pad 214
As shown in FIG. 24 (a), a plurality of metal conductors 91 arranged substantially in parallel are covered with an insulating synthetic resin layer 92, and a flexible flat mounting component is provided. It is. Here, FIG. 24B is a cross-sectional view showing a configuration near a portion of the FPC 9 to be joined to the active matrix substrate 20. As shown in the figure, at the edge of the FPC 9, the synthetic resin layer 92 on one side of the metal conductor 91 is peeled off, and an anisotropic conductive film 93 is used instead of the synthetic resin layer 92. It is stuck. This anisotropic conductive film 93 has a large number of conductive particles 93.
1 is composed of an adhesive 932 dispersed therein. The conductive particles 9
31 is a resin-plated metal-plated particle;
Alternatively, particles made of a metal such as copper or a conductive resin material are used.

FIG. 25 is a sectional view showing a state in which the FPC 9 is joined to the active matrix substrate 2.
When these are joined, the pad 214 (third conductive film 27
3) The FPC 9 is thermocompression-bonded to the active matrix substrate 2 with the metal conductor 91 of the FPC 9 superposed thereon. As a result, as shown in FIG.
The metal conducting wire 91 on the PC 9 and the ground surface 2731 and the inner surface 2732 of the third conductive film 273 on the active matrix substrate 20 conduct through the metal particles 931 in the adhesive 932.

FIG. 26 is a plan view showing the structure of a liquid crystal device 11 as another example of a conventional electro-optical device. As shown in the figure, the liquid crystal device 11 is different from the liquid crystal device 11 in that the scanning line driving circuit 211 and the data line driving circuit 212 are not formed on the active matrix substrate 20 and these driving circuits are provided outside. 22 is different from the liquid crystal device 10 shown in FIG. On the active matrix substrate 20 of such a liquid crystal device 11, pads 215 are provided which are equal in number or more to the number of scanning lines and data lines. FIG. 27 is a schematic sectional view showing the configuration of the pad 215 in the liquid crystal device 11. As shown in FIG. 23, the layer structure of the pad 215 in the liquid crystal device 11 is as shown in FIG.
Is the same as the configuration of the pad 214 in the liquid crystal device 10 shown in FIG. That is, the third conductive film 273 forming the pad 215 is electrically connected to the first conductive film 271 and the second conductive film 272 formed thereunder. The third conductive film 273 has a concave shape in cross-section that becomes wider in a tapered shape from the bottom side toward the opening side.
31. However, the liquid crystal device 1 shown in FIG.
1 is a pad 2 compared to the liquid crystal device 10 shown in FIG.
Since the number of pads 15 is large, the interval between the pads 215 is narrow. FIG. 28 is a cross-sectional view illustrating a state in which the FPC 9 illustrated in FIG. 24 is bonded to the active matrix substrate 20 of the liquid crystal device 11. As shown in FIG. 28, in a state where these are joined, the metal conductive wire 91 of the FPC 9 and the ground surface 2731 and the inner surface 2732 of the third conductive film 273 are electrically connected via the conductive particles 931.

[0008]

However, in the liquid crystal device 10 or 11 described above, since the contact area between the metal conductor 91 and the third conductive film 273 is small, the pad 2
14 or 215 and the metal conducting wire 91 are liable to cause poor conduction. This is the third conductive film 273
Is formed so as to enter the opening of the tapered second interlayer insulating film 283, so that the ground plane 2731 located on the surface of the second interlayer insulating film 283 has to be narrowed. In addition, since the steps of the third conductive film 273 are large, the conductive particles 931 and the adhesive 932
The reason for this is that the contact is not made over the entire surface of 73. In particular, in a case where a driving circuit is provided outside as in the liquid crystal device 11 shown in FIG. 26, a large number of pads 215 need to be formed.
The distance between the five must be narrowed. Therefore, the ground plane 2731 of the third conductive film 273 corresponding to each pad 215
Of the third conductive film 27 becomes extremely small.
3 has a problem that conduction failure between the metal conductor 91 and the metal conductor wire 91 tends to occur.

In addition, in recent years, there is a strong demand for higher definition and higher resolution of display. If the number of input signals is increased to meet such a demand, the pad 2
It is inevitable to reduce the interval between 14 or 215. Considering such circumstances, the ground plane 27 of the third conductive film 273 is considered.
It has become even more difficult to secure a sufficient area for the FPC 31, and with this, it can be said that poor conduction between the pad 214 or 215 and the FPC 9 is more likely to occur. Further, these problems are not limited to the liquid crystal device, but may also occur in other electro-optical devices such as an EL display panel.

The present invention has been made in view of the circumstances described above, and has an electro-optical device including a pad that is unlikely to cause a conduction failure with a terminal of a mounted component such as an FPC, a method of manufacturing the same, and a semiconductor device. And electronic equipment.

[0011]

In order to solve the above-mentioned problems, an electro-optical device according to the present invention is an electro-optical device for displaying an image in accordance with a signal input through a pad on a substrate. A first conductive film formed on a surface of the substrate and having a portion corresponding to the pad; a first interlayer insulating film formed on the surface of the substrate and covering the first conductive film; A second conductive film formed on the surface of the interlayer insulating film and having a portion corresponding to the pad; a region on the surface of the first interlayer insulating film where the pad is formed; and a region around the pad And a third interlayer conductive film formed avoiding the pad formation region consisting of:

In this electro-optical device, since the second interlayer insulating film is provided in a region excluding the pad formation region, the step of the third conductive film is reduced by the thickness of the second interlayer insulating film. Can be suppressed. For this reason, since the area of the portion of the pad that can be used for conduction with the wiring of the mounted component such as the flexible printed circuit board can be secured widely, the poor conduction between the pad and the wiring of the mounted component is prevented. can do. For this reason, the yield can be improved.

That is, the second interlayer insulating film is formed so as to reach the pad formation region, and the second conductive film and the third
In a case where a configuration is adopted in which the conductive film and the pad are electrically connected to each other through an opening provided in the second interlayer insulating film corresponding to the pad, The step (that is, the depth from the bottom side to the opening side) of the third conductive film becomes large, so that the adhesive for joining the substrate and the mounted component can sufficiently enter the recessed portion of the third conductive film. Can not. Further, the shape of the opening of the second interlayer insulating film is changed to the second shape.
When the tapered shape is such that the opening area on the side where the third conductive film is formed is larger than the opening area on the conductive film side,
The area of the ground plane located on the surface of the second interlayer insulating film in the third conductive film must be reduced. As described above, when the second interlayer insulating film is formed so as to reach the pad formation region, it is not possible to sufficiently secure an area that can be used for bonding with the mounted component. Poor conduction with the pad is likely to occur. In contrast,
According to the present invention, as described above, such a problem can be solved.

In the above electro-optical device, it is preferable that the second interlayer insulating film is formed so as to avoid an edge region from the pad formation region to an edge of the substrate in addition to the pad formation region. With this configuration, the step between the pad formation region and the edge region can be suppressed, and therefore, when a mounting component such as a flexible printed board is bonded to the substrate, the bonding can be easily performed.
In the electro-optical device, the pad formation region may include a region between adjacent pads among the plurality of pads arranged in a row on the substrate.
By doing so, the step near the pad can be further reduced, so that poor conduction between the pad and the wiring of the mounted component can be suppressed more reliably.

In the above-mentioned electro-optical device, it is preferable that a protective insulating layer is further provided to cover a peripheral portion of the second conductive film located in the pad formation region. As described above, since the second interlayer insulating film is formed so as to avoid the pad formation region, a configuration in which the peripheral portion of the second conductive film is covered only by the third conductive film may be adopted. However, under such a configuration, a problem may occur that the second conductive film may be easily separated from the first interlayer insulating film at the peripheral portion in some cases. On the other hand, if a configuration is adopted in which the peripheral portion of the second conductive film is covered by the protective insulating film, the situation in which the second conductive film separates at the peripheral portion can be suppressed.

In the case where a protective insulating layer is provided, the first conductive film is formed inside the inner peripheral edge of the protective insulating layer along the peripheral portion of the second conductive film. It is desirable. In other words, it is desirable to adopt a configuration in which the protective insulating layer and the first conductive film do not overlap when viewed from the direction perpendicular to the substrate surface. With this configuration, the height of the surface of the protective insulating layer can be reduced by the thickness of the first conductive film, as compared with the case where the two are overlapped. Can be flattened. In this case, if the thickness of the protective insulating layer is substantially the same as the thickness of the first conductive film, the area near the pad can be made a flat area with almost no step.

According to another aspect of the present invention, there is provided an electro-optical device for displaying an image in accordance with a signal input through a pad on a substrate, wherein the electro-optical device is formed on a surface of the substrate. A first conductive film having a portion corresponding to the pad, a first interlayer insulating film formed on the surface of the substrate to cover the first conductive film, and a first conductive film formed on the surface of the first interlayer insulating film; A second conductive film having a portion corresponding to the pad, and a second interlayer insulating layer including a plurality of insulating layers stacked on a surface of the first interlayer insulating film; Some insulating layers are formed so as to avoid a pad forming region including a region where the pad is formed and a region around the pad, while another insulating layer is formed over a region including the pad forming region. A second interlayer insulating layer and the other insulating layer; And through an opening in contact with the second conductive film is characterized by comprising a third conductive film of the pad.

According to such an electro-optical device, a part of the insulating layer constituting the second interlayer insulating film is formed avoiding the pad formation region. For this reason, compared with the case where the entire second interlayer insulating layer is formed to reach the pad formation region,
The step generated in the third conductive film can be suppressed by the thickness of the part of the insulating layer. For this reason, for the same reason as described for the electro-optical device described above, the third
It is possible to prevent poor conduction between the pad formed of the conductive film and the wiring of the mounted component. In addition, in this electro-optical device, similarly to the above, it is assumed that the part of the insulating layer is formed in addition to the pad formation region and avoids an edge region from the pad formation region to an edge of the substrate. Alternatively, the pad formation region may include a region between adjacent pads among the plurality of pads arranged in a row on the substrate.

Further, in this electro-optical device, it is preferable that the opening is provided over most of the other insulating layer corresponding to the third conductive film. With this configuration, the second conductive film and the third conductive film can be brought into contact with each other over a wide area corresponding to the opening, so that the resistance value of the pad can be reduced.

When the opening is provided, it is preferable that the other insulating layer covers a peripheral portion of the second conductive film located in the pad formation region. By doing so, the second conductive film can be prevented from peeling off from the surface of the first interlayer insulating film at the peripheral portion thereof. Can be suppressed. Further, in this case, it is preferable that the first conductive film is formed inside an inner peripheral edge of the opening. In this way, the first
As compared with the case where the conductive film is formed so as to overlap with the other insulating layer, the height of the surface of the other insulating layer can be reduced by the thickness of the first conductive film. In other words, the height near the center of the third conductive film can be maintained higher by the thickness of the first conductive film than in the case where the first conductive film is not provided. Therefore, a step formed in a region near the pad can be suppressed, so that conduction failure can be suppressed more reliably.

On the other hand, instead of providing the opening portion over most of the region corresponding to the pad in the other insulating layer, a plurality of opening portions are provided in the region corresponding to the pad in the other insulating layer. May be provided. With this configuration, the height of the third conductive film other than the region corresponding to the opening can be maintained higher by the thickness of the other insulating layer, and the region near the pad can be further flattened. can do. In addition, when this configuration is adopted, the plurality of openings may be substantially uniformly distributed in a region covered by the third conductive film, or the substantially rectangular third conductive film may be formed. It may be unevenly distributed in the vicinity of two opposing sides of the area covered by the film. In the case of adopting the latter configuration, it is preferable to further provide an opening corresponding to the vicinity of the central portion of the third conductive film.

In the case where a plurality of openings are provided in the other insulating layer as described above, and when the third conductive film is connected to the terminal of the mounted component via conductive particles, It is preferable that the size of the opening is selected so that the conductive particles fit into the depression formed in the third conductive film corresponding to the opening. By doing so, it is possible to avoid that the conductive particles fitted into the dent move from that position, so that the conductive particles are reliably positioned between the terminal of the mounting component and the third conductive film. be able to. Furthermore, in this case, it is desirable to select the size of the opening such that a part of the conductive particles fitted into the recess of the third conductive film protrudes from the surface of the third conductive film. . Assuming that the conductive particles completely enter the recesses of the third conductive film,
Although the conductive particles cannot contribute to the conduction between the terminal of the mounted component and the pad at all, such a situation can be suppressed by selecting the size of the opening as described above, and as a result, Thus, conduction between the two can be more reliably achieved.

Further, in the electro-optical device according to the present invention, the electro-optical device may be provided through an opening provided in a region of the first interlayer insulating film where the first conductive film and the second conductive film face each other. It is desirable that the first conductive film is in contact with the second conductive film. In this case, the resistance value of the pad can be kept low.

In this case, if the opening is provided over most of a region corresponding to the third conductive film in the first interlayer insulating film, the first conductive film and the second conductive film
Since the contact area with the conductive film can be increased, the resistance value can be significantly reduced. On the other hand, if the first interlayer insulating film has a configuration in which a plurality of apertures are provided in a region corresponding to the third conductive film, the first interlayer insulating film has a structure other than the apertures. Since the height of the third conductive film can be maintained high by the thickness of the first interlayer insulating film, a region near the pad can be a flat region with few steps.

Further, in the electro-optical device according to the present invention, the electro-optical device further includes a thin film transistor formed on a surface of the substrate, wherein the first conductive film is formed from the same layer as a gate electrode of the thin film transistor. Preferably, the two conductive films are formed from the same layer as the source electrode of the thin film transistor. This makes it possible to simultaneously form the components near the pad in the step of forming the thin film transistor, so that the manufacturing process can be further simplified. Note that the thin film transistor in this case may be a thin film transistor which is connected to a pixel electrode and controls a voltage applied to the pixel electrode, or may be a thin film transistor included in a driver circuit formed over a substrate. You may. In the former case, if the third conductive film is formed from the same layer as the pixel electrode, the manufacturing process can be further simplified.

According to another aspect of the present invention, there is provided an electronic apparatus including the above-described electro-optical device. As described above, according to the electro-optical device of the present invention, conduction failure between a pad and a terminal of a mounted component can be effectively suppressed, so that high reliability is ensured even in an electronic device equipped with the same. be able to.

According to another aspect of the present invention, there is provided a method of manufacturing an electro-optical device which displays an image in accordance with a signal input through a pad on a substrate. Forming a first conductive film having a portion corresponding to the pad on the surface of the substrate;
Forming a second interlayer insulating film covering the first conductive film on the surface of the substrate, and forming a second conductive film having a portion corresponding to the pad on the surface of the first interlayer insulating film; And a fourth step of forming a second interlayer insulating film on the surface of the first interlayer insulating film, avoiding a pad formation region including a region corresponding to the pad and a peripheral region of the pad. And a fifth step of forming a third conductive film in contact with the second conductive film as the pad.

Another method of manufacturing an electro-optical device according to the present invention is a method of manufacturing an electro-optical device that displays an image in accordance with a signal input through a pad on a substrate,
A first step of forming a first conductive film having a portion corresponding to the pad on the surface of the substrate, and a second step of forming a first interlayer insulating film covering the first conductive film on the surface of the substrate Forming a second conductive film having a portion corresponding to the pad on the surface of the first interlayer insulating film; and stacking a plurality of insulating layers on the surface of the first interlayer insulating film. Forming a second interlayer insulating film, wherein a part of the plurality of insulating layers is formed so as to avoid a pad forming region including a region corresponding to the pad and a peripheral region of the pad; On the other hand, a fourth step of forming another insulating layer over a region including the pad forming region, and a third step of contacting the second conductive film through an opening formed in the other insulating layer.
Forming a conductive film as the pad.

According to the electro-optical device obtained by these manufacturing methods, poor conduction between the pad and the terminal of the mounted component can be effectively suppressed for the same reason as described above.

In the case where the above-described manufacturing method is applied to an electro-optical device having a thin film transistor formed on the substrate, the first step is performed by forming the gate electrode of the thin film transistor from the same layer as the gate electrode. While the step of forming the first conductive film is performed, the third step includes:
It is preferable that a step of forming the second conductive film from the same layer as the source electrode be formed together with the formation of the source electrode of the thin film transistor. This eliminates the need to separately perform the steps of forming the first conductive film and the second conductive film on the substrate, thereby simplifying the manufacturing process.

In the case where the thin film transistor is connected to a pixel electrode for applying a voltage to an electro-optical material, the fifth step is performed simultaneously with the formation of the pixel electrode from the same layer as the pixel electrode. It is preferable to form a step of forming three conductive films. With this configuration, it is not necessary to independently execute a step for forming the third conductive film.
The manufacturing process can be further simplified.

Further, in the above-described manufacturing method, the fourth step may include the step of forming an opening for electrically connecting the thin film transistor and the pixel electrode in the second interlayer insulating film formed on the substrate. It is preferable to include a step of simultaneously removing a region corresponding to the portion and the pad formation region. In this case, the manufacturing process can be simplified as compared with the case where the opening for connecting the thin film transistor and the pixel electrode and the process for removing the pad formation region are separately executed. .

[0033]

Embodiments of the present invention will be described below with reference to the drawings. These embodiments show one aspect of the present invention, and do not limit the present invention, and can be arbitrarily changed within the technical idea of the present invention. In each of the drawings described below, the scale of each layer and each member is different in order to make each layer and each member have a size recognizable in the drawings.

<A-1: First Embodiment><A-1-1: Configuration of Electro-Optical Device> First, a first embodiment of the present invention applied to a liquid crystal device using liquid crystal as an electro-optical material.
An embodiment will be described. FIG. 1 is a plan view illustrating the configuration of the liquid crystal device according to the present embodiment. The liquid crystal device 101 shown in the figure has a TFT (Thin Fil) as a switching element.
m Transistor) is an active matrix type liquid crystal device. Further, the liquid crystal device 101 includes, in addition to the TFT for controlling whether to write a data signal to the pixel electrode,
The TFTs forming the driving circuits (scanning line driving circuit and data line driving circuit) are also formed on the substrate.

As shown in FIG. 1, in the liquid crystal device 101, the active matrix substrate 20 and the opposing substrate 30 facing each other are bonded together via a substantially rectangular sealing material 40, and both substrates and the sealing material 40 are bonded together. In an area surrounded by the above, for example, TN (Twisted Ne
matic) type liquid crystal is enclosed.
The active matrix substrate 20 and the counter substrate 30
It is an insulating plate-like member having optical transparency, such as glass, quartz, or plastic. Of these, on the surface of the opposing substrate 30 opposing the active matrix substrate 20, an opposing electrode made of a transparent conductive material such as ITO (Indium Tin Oxide) is formed over the entire surface, and a region other than a region that can contribute to display is formed. A light shielding layer 31 for shielding the region from light is formed. On the other hand, pixel electrodes, TFTs, and the like are formed on the surface of the active matrix substrate 20. In practice, a polarizing plate for reflecting incident light, a retardation plate for compensating for interference colors, and the like are attached to the outer surfaces of the active matrix substrate 20 and the counter substrate 30. Since it has no direct relation to the invention, its illustration and description are omitted.

Here, the active matrix substrate 20
Is a portion protruding from the edge of the counter substrate 30 (hereinafter, referred to as
(Referred to as “overhang area”) 201. A plurality of pads 221 to which various signals from an external circuit (not shown) are input,
A scanning line driving circuit 211 and a data line driving circuit 212 connected to each of the pads 221 via 13 are formed. The scanning line driving circuit 211 and the data line driving circuit 212 are circuits including TFTs formed directly on the active matrix substrate 20.
And generates and outputs a scanning signal and a data signal, respectively, in accordance with the signal input from.

Further, a plurality of scanning lines extending in a predetermined direction and a plurality of scanning lines extending in a predetermined direction And a plurality of data lines extending in a direction intersecting with each other (both not shown). further,
In the display area, a TFT and a pixel electrode connected to the scanning line and the data line via the TFT are provided corresponding to each intersection of the scanning line and the data line. The plurality of pixel electrodes are formed of a transparent conductive material such as ITO, are arranged in a matrix, and face a counter electrode on the counter substrate 30 with a liquid crystal interposed therebetween. With this configuration, the orientation of the liquid crystal sandwiched between the pixel electrode and the counter electrode changes in accordance with the voltage applied between the two electrodes.

Next, FIG. 2 is a cross-sectional view showing a configuration near the TFT 24 provided corresponding to each pixel in the display area. As shown in the figure, a silicon layer 241 is formed on the surface of the active matrix substrate 20 with a base protective film 281 made of SiO ₂ (silicon oxide) or the like as a base. The surface of the silicon layer 241 is covered with the gate insulating film 282. A region of the silicon layer 241 that overlaps with the gate electrode 242 with the gate insulating film 282 interposed therebetween is a channel region 241a. This gate electrode 242 is a part of the scanning line. On the other hand, the surface of the underlying protective film 281 on which the silicon layer 241 and the gate electrode 242 are formed is covered with a first interlayer insulating film 283 made of SiO ₂ or the like.

Further, as shown in FIG.
1, a low-concentration source region 241b and a high-concentration source region 241S are provided on the source side of the channel region 241a, while a low-concentration drain region 241c and a high-concentration drain region 241D are provided on the drain side of the channel region 241a. So-called LDD (Lightly Dope
d Drain) structure. Of these, the high-concentration source region 241S is connected to the source electrode 243 via a contact hole that opens over the gate insulating film 282 and the first interlayer insulating film 283. The source electrode 243 is configured as a part of the above-described data line (extending in a direction perpendicular to the plane of FIG. 2). On the other hand, the high-concentration drain region 241D is formed between the gate insulating film 282 and the first
It is connected to a drain electrode 244 formed of the same layer as the source electrode 243 via a contact hole opened to the interlayer insulating film 283.

The source electrode 243 and the drain electrode 24
4 is formed on the surface of the first interlayer insulating film 283 made of, for example, an acrylic resin material.
4 is covered. Then, the above-described pixel electrode 2
3 is formed on the surface of the second interlayer insulating film 284 and is connected to the drain electrode 244 via a contact hole 23a provided in the second interlayer insulating film 284. That is, the pixel electrode 23 is connected to the drain electrode 2
It is connected to the high-concentration drain region 241D of the silicon layer 241 via 44.

The TFTs included in the scanning line driving circuit 211 and the data line driving circuit 212, ie, N-channel type and P-channel type TFTs constituting an inverter included in a shift register among these driving circuits, for example.
As described in detail later in the description of the manufacturing process, the FT is the same as the FT except that the FT is not connected to the pixel electrode 23.
It has the same configuration as FT24.

Next, the configuration of the pad 221 formed in the overhang region 201 of the active matrix substrate 20 will be described. As shown in FIG. 1, the pads 221 functioning as input terminals for signals provided from an external device are formed in rows along the edge of the active matrix substrate 20. Here, FIG. 3A shows this pad 221.
FIG. 3B is a cross-sectional view illustrating a configuration near the pad 221 in a state where the active matrix substrate 20 and the FPC 9 illustrated in FIG. 24 are joined together.

As shown in FIG. 3A, on the gate insulating film 282 covering the active matrix substrate 20, a first conductive film 271 and a second conductive film 272 having a portion corresponding to the pad 221 are formed. 221 are formed. Among them, the first conductive film 271 is formed from the same layer as the gate electrode 242 (that is, the scanning line), while the second conductive film 272 is formed.
Are the source electrode 243 (and the drain electrode 2)
44) is formed from the same layer. Here, the first interlayer insulating film 283 is interposed between the gate electrode 242 and the source electrode 243 in the display region as described with reference to FIG. 283 is formed so as to reach the overhang region 201 as well. However,
An opening 272a is provided in a portion of the first interlayer insulating film 283 corresponding to the pad 221.
The first conductive film 271 and the second conductive film 272 are brought into surface contact with each other via 72a. Conversely, in a region between adjacent pads 221, a first interlayer insulating film 283 is formed as in the display region. Thus the first
The conduction between the conductive film 271 and the second conductive film 272 is performed by
This is to reduce the resistance value of the routing wiring 213 from the pad 221 to the scanning line driving circuit 211 or the data line driving circuit 212.

The third conductive film 273 corresponding to the pad 221 is formed from the same layer as the pixel electrode 23 described above. Here, the second interlayer insulating film 284 is interposed between the pixel electrode 23 and the source electrode 243 in the display region as described above.
4 is formed so as to reach not only the display area but also the overhang area 201. However, the second interlayer insulating film 284 in this embodiment is, as shown in FIG. Region 20 surrounding the pad 221).
1a is not provided. Since the second interlayer insulating film 284 is not formed in the pad forming region 201a as described above, the second interlayer insulating film 284 does not appear in FIG. Further, in the present embodiment, as shown in FIG.
A region between each of the plurality of pads 221 arranged in a row above zero is also included in the pad formation region 201a, and the second interlayer insulating film 284 is not provided in this region.

Further, in the present embodiment, in addition to the pad formation region 201a, the pad formation region 20
The second interlayer insulating film 284 is not provided also in a region 201b from 1a to the edge of the active matrix substrate 20 near each of the pads 221 (hereinafter referred to as “edge region”). Thus, in the present embodiment, the second interlayer insulating film 284 is formed in the pad formation region 2
01a and the edge region 201b, the third conductive film 273 forming the pad 221 is formed.
Is formed so as to cover the surface of the second conductive film 272 and to come into contact with the second conductive film 272, and has a concave shape in cross section as shown in FIG. With such a configuration, the first conductive film 271, the second conductive film 272, and the third conductive film 273 are electrically connected to each other.

The FPC 9 shown in FIG. 24 is bonded to a region of the active matrix substrate 20 near the pad 221. That is, the pads 221 and F
The active matrix substrate 20 and the FPC 9 are arranged so that the metal conductive wire 91 of the PC 9 faces the ACF 93 with the ACF 93 interposed therebetween. At this time, FIG.
As shown in (b), conduction between the pad 221 and the FPC 9 is obtained by contact between the metal conductor 91 and the entire surface of the third conductive film 273.

As described above, in the liquid crystal device 101 according to the present embodiment, the active matrix substrate 2
0 is formed in the pad formation region 20
1a and the edge region 201b. That is, the second conductive film 272 and the third conductive film 273
The second interlayer insulating film 284 is not formed between the second interlayer insulating film 284 and the adjacent pads 221. Therefore, when the third conductive film 273 is formed so as to cover the surface of the second conductive film 272, the depth of the concave inner surface of the third conductive film 273 is smaller than that of the conventional liquid crystal device shown in FIG. Can be reduced by the thickness of the second interlayer insulating film 284. Therefore, the adhesive 932 of the FPC 9 can sufficiently penetrate into the inner surface of the third conductive film 273, so that the third conductive film 27
3 can be used for bonding with the FPC 9. As described above, according to the liquid crystal device 101 of the present embodiment, the FP in the pad 221 (the third conductive film 273) is used.
Since the area of the portion in contact with C9 can be sufficiently ensured, the pad 221 and the metal conductive wire 91 of the FPC 9 can be reliably made conductive through the conductive particles 931. As a result, the poor conduction between the two is prevented, so that the yield of the liquid crystal device is improved. In addition, the second conductive film 272
Since the third conductive film 273 is formed so as to cover the surface of the second conductive film 273, the conduction between the second conductive film 272 and the third conductive film 273 is further ensured.

Further, in the liquid crystal device 101,
The second interlayer insulating film 284 is formed so as to avoid the edge region 201b in addition to the pad formation region 201a. Therefore, the area near the pad 221 and the edge area 2
Since the step between the active matrix substrate 20 and the FPC 9 can be easily performed.

<A-1-2: Manufacturing Process> Next, the manufacturing process of the liquid crystal device 101 according to the present embodiment will be described. First, referring to FIG. 4 to FIG.
01, especially the active matrix substrate 2
The manufacturing process for each of the components on 0 will be described. The cross-sectional views shown in FIG. 4 to FIG.
A cross section of the area where the drive circuit is formed (left side in the drawing), a cross section of the area where the TFT 24 is formed (center in the drawing), and a cross section of the pad forming area 201a and the edge area 201b (the right side in the drawing) of the cross section taken along the line A ′. And respectively correspond. In the following description, each impurity concentration is expressed as an impurity concentration after activation annealing.

First, as shown in FIG. 4A, a base protective film 281 made of a silicon oxide film or the like is formed on the surface of an active matrix substrate 20 which is an insulating substrate such as a quartz substrate or a glass substrate. Next, the amorphous silicon layer 501 is formed using an ICVD method, a plasma CVD method, or the like.
Is formed, crystal grains are grown by a laser annealing method or a rapid heating method to form a polysilicon layer. further,
As shown in FIG. 4B, the polysilicon layer is patterned by photolithography to leave island-shaped silicon layers 241, 251 and 261. Of these, the silicon layer 241 is formed in the display area and
3 constitutes a TFT (hereinafter, may be referred to as a “pixel TFT”) 24 connected to the TFT 3, and the silicon layers 251 and 261 are included in the scanning line driving circuit 211 or the data line driving circuit 212. P-channel type TFTs and N-channel type TFTs (hereinafter sometimes referred to as “TFTs for driving circuits”) 25 and 26 are configured, respectively.

Next, plasma CVD, thermal oxidation, etc.
Thus, the thickness of the silicon layer is about 30 nm to about 20
A gate insulating film 282 made of a 0 nm silicon oxide film;
Form. Here, the gate insulating film 2 is formed using a thermal oxidation method.
When forming the silicon layer 82, the silicon layers 241, 251 and
261 are also crystallized, and these silicon layers are
It can be a recon layer. Place to do channel doping
In this case, for example, about 1 × 10¹²cm^-2
Boron ions are implanted at a dose of. As a result,
The con layers 241, 251 and 261 have an impurity concentration of about
1 × 10¹⁷cm ^-3Becomes a low-concentration P-type silicon layer.

Next, as shown in FIG. 4C, a gate electrode formed of doped silicon, a silicide film, or a metal film such as an aluminum film, a chromium film, or a tantalum film is formed on the entire surface of the gate insulating film 282. Conductive film 5
02 is formed. The thickness of the conductive film 502 is approximately 2
It is about 00 nm.

Next, a patterning mask 503 is formed on the surface of the conductive film 502 for forming a gate electrode, and patterning is performed in this state, and as shown in FIG.
A gate electrode 252 constituting the channel-type driver circuit TFT 25 is formed. At this time, portions of the gate electrode forming conductive film 502 corresponding to the pixel TFTs 24 and the N-channel type driving circuit TFTs 26 are covered with the patterning mask 503 and are not removed during the above patterning. Further, a portion of the conductive film 502 for forming a gate electrode corresponding to the pad 221 is not removed.

Then, as shown in FIG. 4E, boron ions are applied to the silicon layer 251 by about 1 × with the gate electrode forming conductive film 502 remaining without being removed in the patterning as a mask. Ion implantation is performed at a dose of 10 ¹⁵ cm ^-2 . As a result, the impurity concentration becomes 1 × 1
A source region 251S and a drain region 251D having a high concentration of 0 ²⁰ cm ⁻³ are formed in a self-aligned manner with respect to the gate electrode 252. A region of the silicon layer 251 covered by the gate electrode 252 is a channel region 25.
1a.

Next, as shown in FIG. 5A, the portion corresponding to the P-channel type driving circuit TFT 25 is completely covered, and the gate electrode of the pixel TFT 24 and the N-channel type driving circuit TFT 26 are formed. A patterning mask 504 is formed to cover a region where a gate electrode is to be formed. At this time, a region to be the first conductive film 271 in the pad formation region 201a is also covered with the patterning mask 504 at the same time. Thereafter, as shown in FIG. 5B, the conductive film 502 for forming a gate electrode is patterned using a mask 504 for patterning to form a pixel TF.
The gate electrode 242 of T24, the gate electrode 262 of the N-channel type driving circuit TFT 26, and the first conductive film 271 in the overhang region 201 are simultaneously formed.

Next, phosphorus ions are implanted at a dose of 1 × 10 ¹⁵ cm ⁻² while leaving the patterning mask 504. As a result, the patterning mask 504 is formed.
Is introduced into the silicon layers 241 and 261 in a self-aligned manner.
And 261S and high concentration drain region 241D
And 261D are formed. Here, the silicon layer 24
Of the regions 1 and 261, the region into which high-concentration phosphorus is not introduced is wider than the region covered by the gate electrodes 242 and 262. Therefore, in the silicon layers 241 and 261, the gate electrodes 242 and 262
And the high-concentration source regions 241S and 261S and the high-concentration drain regions 241D and 261D (that is, on both sides of the gate electrodes 242 and 262).
A region where a high concentration of phosphorus is not introduced is formed.

Next, the patterning mask 504 is removed, and in this state, phosphorus ions are implanted at a dose of 1 × 10 ¹³ cm ⁻² . As a result, low-concentration impurities are introduced into silicon layers 241 and 261 in a self-aligned manner with respect to gate electrodes 242 and 262.
As shown in (c), lightly doped source regions 241b and 261b and lightly doped drain regions 241c and 261c are formed. On the other hand, channel formation regions 241a and 261a are formed in regions overlapping with gate electrodes 242 and 262, respectively. Thereafter, FIG.
As shown in FIG. 7, a first interlayer insulating film 283 is formed over the entire surface of the active matrix substrate 20, and the first interlayer insulating film 283 is formed using a photolithography method.
Is patterned to form contact holes at positions corresponding to the source and drain electrodes of each TFT. At this time, the first interlayer insulating film 283 is simultaneously formed.
The portion corresponding to each pad 221 is removed from the first
An opening 272a for contacting the conductive film 271 and the second conductive film 272 is formed.

Next, a conductive film 505 made of a metal such as aluminum, chromium, or tantalum is formed so as to cover the first interlayer insulating film 283. The thickness of this conductive film 505 is approximately 200 nm to 300 nm. After this,
A patterning mask 506 is formed so as to cover the regions of the conductive film 505 where the source and drain electrodes of the TFTs 24, 25 and 26 are to be formed, and the region where the second conductive film 272 is to be formed in the pad formation region 201a. At the same time, the conductive film 505 is patterned and the source electrodes 243, 253, and 26 shown in FIG.
3. The drain electrodes 244 and 254 and the second conductive film 272 are formed simultaneously.

Next, as shown in FIG. 6A, a second interlayer insulating film 284 covering the first interlayer insulating film 283 on which these are formed is formed of, for example, an acrylic resin material. The second interlayer insulating film 284 is desirably formed to a thickness of about 1 μm to 2 μm. Subsequently, as shown in FIG. 6B, the second interlayer insulating film 28 is formed.
4, a portion corresponding to the drain electrode 244 of the pixel TFT 24 is removed by etching or the like to form a contact hole 23a. At this time, the regions of the second interlayer insulating film 284 corresponding to the pad formation region 201a and the edge region 201b are also removed.

Thereafter, a thin film made of a transparent conductive material such as ITO is formed so as to cover the entire surface of the active matrix substrate 20. Then, by patterning the thin film, as shown in FIG. 6C, the pixel electrode 23 which is electrically connected to the drain electrode 244 through the contact hole 23a of the second interlayer insulating film 284 is formed,
The third insulating film 273 located on the upper surface of the second conductive film 272 is formed as a pad 221. Further, an alignment film is formed so as to cover the display area of the active matrix substrate 20, and a rubbing process is performed on the alignment film in a predetermined direction.

A photo-curable resin ink is drawn by a dispenser along an edge of a region of the active matrix substrate 20 on which the constituent elements are formed to face the opposing substrate 30, thereby forming an uncured sealing material 40. I do.
At this time, a liquid crystal injection port 41 is formed in a part of the sealing material 40.

On the other hand, aside from the active matrix substrate 20, a counter electrode and a light shielding layer 31 are formed on one surface of a counter substrate 30, which is a transparent insulating substrate, and an orientation film is applied in a predetermined direction. A rubbing treatment is performed.

Next, the active matrix substrate 20 and the counter substrate 30 obtained by the above steps are opposed to each other so that the alignment films formed on the respective substrates face inward.
The uncured sealing material 40 is cured and both substrates are bonded. Thereafter, by using a liquid crystal injection device, liquid crystal is injected between the active matrix substrate 20 and the counter substrate 30 through the liquid crystal injection port 41. And the liquid crystal injection port 4
1 is sealed with a sealant 42 to complete the liquid crystal device 101.

As described above, in the method of manufacturing the liquid crystal device 101 according to the present embodiment, the first conductive film 271 corresponding to the pad 221 and the gate electrode and the pad of the TFT (TFT for the pixel and TFT for the drive circuit) are provided. 221 corresponding to the second conductive film 272, the source electrode (and the drain electrode) of the TFT, and the third conductive film 27 forming the pad 221.
3 and the pixel electrode 23 are formed from the same layer in the same step. In addition, in the present embodiment, a contact hole 23a for connecting the pixel TFT 24 and the pixel electrode 23 is formed in the second interlayer insulating film 284, and at the same time, the second interlayer insulating film 28
4, the pad forming region 201a and the edge region 201
The region corresponding to b is removed. Therefore, the pad 221 is formed at the same time when the TFT is formed, and there is no need to add a special process for forming the pad 221. Therefore, it is possible to manufacture a liquid crystal device having a pad that is unlikely to cause conduction failure, while securing the same production efficiency as that of manufacturing a general liquid crystal device having a TFT.

<A-2: Second Embodiment> Next, a liquid crystal device according to a second embodiment of the present invention will be described with reference to FIG. As described above with reference to FIG. 1, in the liquid crystal device 101 according to the first embodiment, the second interlayer insulating film 284 is formed so as to avoid the edge region 201b in addition to the pad formation region 201a. The configuration was adopted. On the other hand, in the liquid crystal device 102 according to this embodiment, as shown in FIG.
01a are formed so as to avoid only the edge region 2a.
01b differs from the liquid crystal device 101 shown in the first embodiment in that it is formed.

Also in the liquid crystal device 102 according to the present embodiment, since the second interlayer insulating film 284 is formed so as to avoid the pad formation region 201a, the second interlayer insulating film 284 is formed between the second conductive film 272 and the third conductive film 273. The second interlayer insulating film 284 does not exist between the adjacent pads 221. Therefore, the third conductive film 2 is formed so as to cover the surface of the second conductive film 272.
73 is formed, and the depth of the concave inner surface of the third conductive film 273 is reduced by the thickness of the second interlayer insulating film 284. Therefore, the adhesive 932 of the ACF 93 can be sufficiently penetrated into the inner surface of the third conductive film 273, so that the area of the pad 221 in contact with the FPC 9 can be sufficiently secured, and the pad 221 and the FPC 9 An effect similar to that of the first embodiment is obtained in that the metal wire 91 can be reliably made conductive through the conductive particles 931.

<A-3: Third Embodiment> Next, a liquid crystal device according to a third embodiment of the present invention will be described. In the first or second embodiment, the second interlayer insulating film 28
4 illustrates a configuration including a single layer. On the other hand, the liquid crystal device according to the present embodiment employs a configuration in which the second interlayer insulating film 284 includes a plurality of layers.

FIG. 8 is a cross-sectional view showing a configuration near the TFT (for pixel) 24 formed in the display area of the active matrix substrate 20. As shown in the figure, in the liquid crystal device according to the present embodiment, the second interlayer insulating film 284
A reflection layer 29 made of a material having light reflectivity such as aluminum or silver is formed between the pixel electrode 23 and the pixel electrode 23. Under such a configuration, external light such as sunlight or room illumination light incident from the counter substrate 30 side is reflected on the surface of the reflective layer 29 and emitted to the counter substrate 30 side, thereby realizing a so-called reflective display. Is done. Further, in the present embodiment, the second interlayer insulating film 284 interposed between the first interlayer insulating film 283 and the pixel electrode 23 is
The lower insulating layer 284a is located on the third side, and the upper insulating layer 284b is located on the pixel electrode 23 side. The details are as follows.

In this embodiment, the second interlayer insulating film 2
Among 84, the surface in contact with the reflective layer 29 (that is, the surface of the upper insulating layer 284b) has a large number of fine irregularities (not shown).
Is formed on the rough surface. Therefore, on the surface of the reflective layer 29 formed in a thin film on the rough surface, irregularities (ie, a scattering structure) reflecting the rough surface are formed. As a result, the incident light from the counter substrate 30 side is appropriately scattered on the surface of the reflective layer 29 and then emitted to the counter substrate 30 side. It can be secured. In the present embodiment, the second
The following method is used to roughen the surface of the interlayer insulating film 284. That is, first, a resin layer is formed so as to cover the first interlayer insulating film 283 on which the source electrode 243 and the like are formed, and a large number of minute portions in the display region on the surface of the insulating layer are selectively etched. After removal, a lower insulating layer 284a having an uneven surface is formed. The unevenness formed by the etching as described above does not become a smooth rough surface but has a corner. Next, an upper insulating layer 284b is formed by applying a resin material to the surface of the lower insulating layer 284a. As a result,
The surface of the upper insulating layer 284b reflects the unevenness of the surface of the lower insulating layer 284a formed earlier and becomes a rough surface having a smooth uneven shape. The reflection layer 29 is provided on such a smooth rough surface.
Is formed, a scattering structure having good characteristics can be formed on the surface of the reflection layer 29. That is, in the present embodiment, a resin material is applied twice to form a reflective layer having good scattering characteristics. In each of these steps, the lower insulating layer 284a and the upper insulating layer 284b are It is formed.

Next, the configuration of the pad 221 of the liquid crystal device according to the present embodiment will be described. FIG. 9A shows each pad 22.
FIG. 9B is a schematic cross-sectional view illustrating a configuration of the active matrix substrate 1, and FIG. 9B is a cross-sectional view illustrating a state in which the active matrix substrate 20 and the FPC 9 are joined. Lower insulating layer 284a and upper insulating layer 2
The second interlayer insulating film 284 including two layers 84b is formed so as to reach not only the display region but also the overhang region 201. However, the upper insulating layer 284b among them is
Region where pad 221 is formed and pad 221
Are formed in a region excluding a pad forming region 201a including a peripheral region of the active matrix substrate 20 and an edge region 201b extending from the pad forming region 201a to the edge of the active matrix substrate 20. Therefore, the upper insulating layer 284b does not appear in FIGS. 9A and 9B. On the other hand, as shown in FIGS. 9A and 9B, the lower insulating layer 284a is formed so as to reach the pad forming region 201a and the peripheral region 201b. Then, the lower insulating layer 28
In the area corresponding to the pad 221 in the hole 4a,
3a are formed. Since the third conductive film 273 forming the pad 221 is formed so as to cover the lower insulating layer 284a, the second conductive film 27 is formed through the opening 273a.
Surface contact with 2.

As described above, in the liquid crystal device according to the present embodiment, the lower insulating layer 284 is provided between the adjacent pads 221 and between the second conductive film 272 and the third conductive film 273.
a is formed, and the upper insulating layer 284b is not formed. Therefore, the depth of the concave inner surface of the third conductive film 273 can be reduced by the thickness of the upper insulating layer 284b. As a result, as shown in FIG. 9B, the adhesive 932 can be sufficiently spread on the inner surface of the third conductive film 273, and the entire surface of the third conductive film 273 is covered with the FPC.
9 can be used. Thereby, also in the liquid crystal device according to the present embodiment, the first or second liquid crystal device can be used.
As in the liquid crystal device according to the embodiment, the area of the pad 221 in contact with the FPC 9 can be sufficiently ensured, and the pad 221 and the metal conducting wire 91 of the FPC 9 can be reliably conducted through the conducting particles 931. Is obtained.

<A-4: Fourth Embodiment> Next, referring to FIG. 10, a liquid crystal device 104 according to a fourth embodiment of the present invention will be described.
Will be described. In the first embodiment described above,
The liquid crystal device 101 in which the scanning line driving circuit 211 and the data line driving circuit 212 are directly formed on the active matrix substrate 20 is illustrated (see FIG. 1). On the other hand, in the liquid crystal device 104 according to the present embodiment, as shown in FIG. 10, the drive circuit is not formed on the active matrix substrate 20. That is, in the present embodiment, the circuit board is bonded to the edge of the FPC 9 opposite to the edge to be bonded to the active matrix substrate 20, and scanning is performed on this circuit board. An IC chip equipped with a line drive circuit and a data line drive circuit is mounted. As described above, in the present embodiment, since a drive signal is supplied to each scanning line and each data line from an externally provided driving circuit, the scanning lines and the The same number of pads 222 as the number of data lines are provided. Therefore, as shown in FIG.
The number of the pads 222 is larger than that of the pads 221 of the liquid crystal device 101 shown in FIG. 1, and the distance between the pads 222 is smaller. In the following, pads in a liquid crystal device in which a drive circuit is directly formed on the active matrix substrate 20 (that is, the pads 22 shown in FIG.
When distinguishing 1) from a pad in a liquid crystal device provided with a driving circuit externally (that is, a pad 222 shown in FIG. 4), the former is described as “large pad” and the latter is described as “small pad”. It shall be described.

FIG. 11A is a schematic sectional view showing the structure near the pad 222 of the liquid crystal device 104 according to the present embodiment, and FIG.
FIG. 3 is a cross-sectional view showing a state where the FPC 9 and the FPC 9 are connected. As shown in these figures, the pad 222 in the present embodiment
The layer structure in the vicinity is similar to that of the first embodiment. That is, the third conductive film 273 formed of the same layer as the pixel electrode 23 and forming the pad 222 is formed of the second conductive film 272 and the gate electrode 242 (or the same layer as the source electrode 243 (or 253 or 263)). 252 or 262) and the first conductive film 271 formed of the same layer. Then, the second interlayer insulating film 284 interposed between the source electrode 243 and the pixel electrode 23 in the display region is formed so as to avoid the pad formation region 201a and the edge region 201b. However, in the present embodiment, as described above, since the space between adjacent pads 222 and the width of each pad itself are narrow,
The opening 272a formed in the first interlayer insulating film 283 corresponding to each pad 222 also has a small area. Therefore, the surface of the second conductive film 272 that has entered the opening 272a is substantially flat. As a result, as apparent from comparison with the third conductive film 273 shown in FIG.
The surface of the third conductive film 273 formed so as to cover 2 is substantially flat. Therefore, when the active matrix substrate 20 and the FPC 9 are joined, as shown in FIG. 11B, the metal conductor 91 of the FPC 9 is connected to the third conductive film 2.
The contact 73 is brought into contact with the entire surface to conduct.

As described above, also in the present embodiment, as in the first embodiment, the second interlayer insulating film 284 is formed so as to avoid the pad forming region 201a and the edge region 201b. As shown in a), between the adjacent pads 222 or between the second conductive film 272 and the third conductive film 272.
There is no second interlayer insulating film 284 between the conductive film 273. As a result, the surface of the third conductive film 273 can be made substantially flat, so that the FPC 9 despite the narrow spacing between the pads 222 and the width of each pad 222 is small.
Conductive film 273 that can be used for contact with the metal conductive wire 91 of FIG.
Area can be sufficiently secured. Therefore, the conductive particles 93 are connected between the pad 222 and the metal conductor 91 of the FPC 9.
1 can be reliably conducted, and a conduction failure between the two can be effectively prevented. In addition, since the third conductive film 273 is formed so as to cover the surface of the second conductive film 272, conduction between the second conductive film 272 and the third conductive film 273 is further ensured.

<A-5: Fifth Embodiment> Next, FIG.
FIG. 14 is a plan view illustrating a configuration of a liquid crystal device 105 according to a fifth embodiment of the present invention. As shown in the figure, in the liquid crystal device 105, the second interlayer insulating film 284
The liquid crystal device 104 according to the fourth embodiment has a configuration in which the second interlayer insulating film 284 is removed over both the pad forming region 201a and the peripheral region 201b in that the liquid crystal device 104 is provided so as to avoid only the region 1a. (See FIG. 10)
Is different from

Also in this embodiment, the second interlayer insulating film 2
The second interlayer insulating film 284 does not exist between the second conductive film 272 and the third conductive film 273 or between the pads 222 because the layer 84 is formed so as to avoid the pad formation region 201a. As a result, the surface of the third conductive film 273 formed so as to cover the surface of the second conductive film 272 is
As shown in FIGS. 1 (a) and (b), the shape can be substantially flat. Therefore, the third conductive film 27
3 can be used for contact with the metal conductor 91 of the FPC 9, and the metal conductor 91 can be used despite the small spacing between the pads 222 and the width of each pad 222 itself.
The area of the third conductive film 273 that can be used for contact with the substrate can be sufficiently ensured. Therefore, the pads 222 and F
The conduction to the metal conductor 91 of the PC 9 via the conduction particles 931 can be ensured, and poor conduction between the two can be prevented.

<A-6: Sixth Embodiment> Next, a liquid crystal device according to a sixth embodiment of the present invention will be described. The liquid crystal device according to the present embodiment is common to the liquid crystal device according to the third embodiment in that the second interlayer insulating film 284 is composed of two layers, a lower insulating layer 284a and an upper insulating layer 284b. Since the scanning line driving circuit and the data line driving circuit are provided outside, the number of pads 222 is larger and the number of pads 222 is larger than that of the liquid crystal device shown in the third embodiment.
The interval between the two 22 is narrow.

FIG. 13A is a schematic sectional view showing the structure of the liquid crystal device according to the present embodiment, and FIG. 13B is a sectional view showing a state in which the active matrix substrate 20 and the FPC 9 are connected. It is. As shown in these drawings, the layer structure near the pad 222 in the present embodiment is the same as that shown in the third embodiment. That is, the second
The interlayer insulating film 284 is formed not only in the display area but also in the overhang area 201.
As shown in FIGS. 13A and 13B, the upper insulating layer 284b of the second interlayer insulating film 284 includes a region where the pad 222 is formed and the pad 222. And a peripheral region 29a extending from the pad forming region 201a to the peripheral edge of the active matrix substrate 20.
1b. On the other hand, the lower insulating layer 284a is formed so as to reach the pad forming region 201a and the edge region 201b, and the opening 273a provided in a region of the lower insulating layer 284a corresponding to the pad 222. Through the second conductive film 272
And the third conductive film 273 are in contact with each other. In this case, as shown in FIGS. 13A and 13B, the third conductive film 273 has a concave shape in cross section that widens in a tapered shape from the bottom side toward the opening side, and the lower insulating layer 284 a
Has a flange-shaped grounding surface 2731 located on the surface of.

As described above, in the present embodiment, the second
The space between the conductive film 272 and the third conductive film 273 or the pad 222
Only the lower insulating layer 284a is formed between them, and the upper insulating layer 284b is not formed. Therefore, the depth of the concave inner surface of the third conductive film 273 can be reduced by the thickness of the upper insulating layer 284b. For this reason, as shown in FIG.
32 can be sufficiently spread over the inner surface of the third conductive film 273, so that the entire surface of the third conductive film 273 is
9 can be used. Further, since the depth from the bottom side to the opening side of the third conductive film 273 is shallow, the difference between the inner diameter on the bottom side and the inner diameter on the opening side of the third conductive film 273 is small. As a result, the third conductive film 2 that can be used for contact with the FPC 9 even though the space between the pads 222 is small.
The area of the ground contact surface 2731 of the 73 can be sufficiently ensured. Therefore, also in this liquid crystal device, the pad 2
The area of the portion of the FPC 22 that contacts the FPC 9 can be sufficiently ensured, and the pad 222 and the metal conductive wire 91 of the FPC 9 can be reliably made conductive through the conductive particles 931. Can be prevented.

In the third or sixth embodiment, the upper insulating layer 28 of the second interlayer insulating film 284
4b is a pad forming region 201a and a peripheral region 201b.
It is assumed that the upper insulating layer 2 is formed so as to avoid these regions.
It need not be 84b. That is, contrary to the above example, the lower insulating layer 284a may be formed so as to avoid the pad forming region 201a and the peripheral region 201b, while the upper insulating layer 284b may be formed so as to reach both regions.
When the second interlayer insulating film 284 is formed of the lower insulating layer 284a and the upper insulating layer 284b in order to form the scattering structure of the reflective layer 29, the lower insulating layer 284a is formed in the pad forming region 201a and the lower insulating layer 284a. It can be said that it is rather desirable to form so as to avoid the edge region 201b. The reason is as follows. That is, the second interlayer insulating film 28
In the case where the surface of the fourth insulating layer 284b (the surface of the upper insulating layer 284b) is roughened, as exemplified in the third embodiment, the surface of the resin layer serving as the lower insulating layer 284a is selectively removed to obtain finer surfaces. It is conceivable to adopt a method of forming an upper insulating layer 284b on this surface after forming the rough irregularities. When such a method is adopted, the lower insulating layer 284a
Of the lower insulating layer 284a and at the same time, the regions corresponding to the pad forming region 201a and the peripheral region 201b are removed.
In comparison with the case where a part of the insulating layer 4b is removed, an independent step only for removing a part of the insulating layer corresponding to the pad forming region 201a and the peripheral region 201b is not required, and the manufacturing process can be simplified. You can.

Further, in the third or sixth embodiment, the case where the second interlayer insulating film 284 is formed of two layers is exemplified, but the number of layers constituting the second interlayer insulating film 284 is It is not limited to. In short, the second interlayer insulating film 284 is composed of a plurality of layers, and some of the layers are formed so as to avoid the pad formation region 201a (or both the pad formation region 201a and the edge region 201b). On the other hand, it is only necessary that another part of the layer is formed so as to reach the region.

<A-7: Seventh Embodiment> Next, the configuration of a liquid crystal device according to a seventh embodiment of the present invention will be described. In the third embodiment, of a part of the layer (lower insulating layer 284 a) of the second interlayer insulating film 284 formed so as to reach the pad forming region 201 a, it covers most of the region corresponding to the pad 221. An opening 273a is formed,
The conductive film 272 and the third conductive film 273 form the opening 273.
The configuration in which the contact is made through a is illustrated. On the other hand, in the liquid crystal device according to the present embodiment, while the upper insulating layer 284b of the second interlayer insulating film 284 is formed so as to reach the pad formation region 201a, the third conductive layer of the upper insulating layer 284b is formed. In the region corresponding to the film 273, a plurality of apertures 27 are provided.
3a is provided.

FIG. 14A is a plan view showing the configuration near the pad 221 of the liquid crystal device according to the present embodiment, and FIG. 14B is a sectional view taken along line BB ′ in FIG. As shown in FIG. 14A, in the present embodiment, the second
In the interlayer insulating film 284, the lower insulating layer 284a is formed so as to avoid the pad forming region 201a, while the upper insulating layer 284b is also formed in the pad forming region 201a to cover the second conductive film 272. Has become. In the region corresponding to the pad 221 in the upper insulating layer 284b, a plurality of (in the present embodiment, nine) openings 273a are provided. Since the third conductive film 273 forming the pad 221 is formed so as to cover the upper insulating layer 284b, a part of the third conductive film 273 enters the opening 273a and is connected to the second conductive film 272. Contact. Further, in the present embodiment, the plurality of openings 273a provided in the upper insulating layer 284b corresponding to one pad 221 are substantially evenly distributed over the region corresponding to the pad 221 (that is, within the region). (Without biasing on a part of).

In the present embodiment, the opening 273a provided in the upper insulating layer 284b corresponds to the diameter of the conductive particles 931 for conducting the third conductive film 273 and the metal conductor 91 of the FPC 9. Size is selected.
More specifically, as shown in FIG.
Each of the opening portions 2 is formed such that the conductive particles 931 are fitted into a depression formed on the surface of the third conductive film 273 corresponding to 3a.
The size of 73a is selected. Further, in the present embodiment, as shown in FIG. 14B, the whole of the conductive particles 931 does not completely enter the dent, but only a part thereof fits into the dent, that is, the conductive particles 931 The size of the opening 273a is selected so that a part of the hole protrudes from the surface of the third conductive film 273.

As described above, in the present embodiment, the region corresponding to the pad 221 in the upper insulating layer 284b is
Since the plurality of openings 273a that are separated from each other are formed, the surface of the pad 221 can be flattened over a wide range. Therefore, the adhesive 9
32 can be easily spread over the entire surface of the pad 221, so that the pad 221 and the metal conducting wire 91 of the FPC 9 can be more reliably conducted through the conducting particles 931.

Further, in this embodiment, the pad 2
The size of the opening 273a is selected such that conductive particles 931 for making the metal wire 21 of the FPC 9 conductive with the conductive particles 21 fit into the recesses of the third conductive film 273. Here, at the time of joining the active matrix substrate 20 and the FPC 9, the adhesive 932 softened by heating flows, and accordingly, the conductive particles 931 also easily move.
However, according to the present embodiment, as shown in FIG. 14B, the conductive particles 931 fitted into the depressions of the third conductive film 273 are not affected by the flow of the adhesive 932.
That position will be maintained. As a result, it is possible to avoid a situation in which the conductive particles 931 that are to be located between the pad 221 to be conductive and the metal conductive wire 91 move with the flow of the adhesive 932, so that the electrical connection between the two can be established. This can be achieved more reliably. Also,
In the present embodiment, since the whole of the conductive particles 931 is prevented from completely entering the recess of the third conductive film 273, the conduction between the both is reliably achieved from this viewpoint.

In the present embodiment, a liquid crystal device in which the scanning line driving circuit 211 and the data line driving circuit 212 are directly formed on the active matrix substrate 20 and have the large pads 221 has been exemplified. And a liquid crystal device having the small pad 222 can have the same configuration. That is, in this case, the configuration shown in FIGS. 15A and 15B may be used. In this case as well, it is desirable to select the size of the opening 273a according to the size of the conductive particles 931.

<A-8: Eighth Embodiment> Next, a liquid crystal device according to an eighth embodiment of the present invention will be described. FIG.
(A) is a plan view showing a configuration near a pad of the liquid crystal device according to the present embodiment, and (b) is a plan view of D in FIG.
FIG. 4 is a sectional view taken along line -D ′. Note that FIGS. 16A and 16B illustrate a liquid crystal device in which a scanning line driving circuit and a data line driving circuit are provided outside and provided with small pads.

In the seventh embodiment, the plurality of openings 273a formed in the upper insulating layer 284b are substantially uniformly distributed in the region corresponding to the pad 221. On the other hand, in the present embodiment, FIG.
As shown in (a) and (b), a plurality of openings 273 are provided.
a is unevenly distributed in a specific portion of the region corresponding to the pad 222. Specifically, the upper insulating layer 28
A plurality of apertures 273a are formed so as to be unevenly distributed in the vicinity of two opposing sides (short sides) of the substantially rectangular region corresponding to the pad 222 on the surface of the surface 4b. FIGS. 16A and 16B illustrate a case where four apertures 273a are formed in the vicinity of the two sides, respectively. In addition, in this embodiment, the opening 27 is also provided near the center of the region corresponding to the pad 222.
3a are formed. Even if such a configuration is adopted,
The same effects as in the seventh embodiment can be obtained. Also in the present embodiment, it is desirable to select the size of the opening 273a according to the size of the conductive particles 931.

<A-9: Ninth Embodiment> Next, FIG.
A liquid crystal device according to a ninth embodiment of the present invention will be described with reference to (a) and (b). In the liquid crystal device according to the third embodiment shown in FIG.
The configuration in which the first and second conductive films 272 are electrically connected to each other via the opening 272a formed in the first interlayer insulating film 283 has been illustrated. On the other hand, in the present embodiment, FIG.
As shown in (b), the opening 272a is not formed in the first interlayer insulating film 283. Therefore, the first
The first interlayer insulating film 283 is interposed between the conductive film 271 and the second conductive film 272, and the two conductive films are not conductive.

Further, the second interlayer insulating film 284 in the present embodiment comprises a lower insulating layer 284a and an upper insulating layer 284.
The lower insulating layer 284a is formed so as to avoid the pad forming region 201a, while the upper insulating layer 284b is also formed in the pad forming region 201a. However, in the region corresponding to each pad 222 in the upper insulating layer 284b, as shown in FIG. 17B, an opening 273a is formed over most of the region. The third conductive film 273 is formed of the second interlayer insulating film 28.
4 and is in surface contact with the second conductive film 272 through the opening 273a. Further, FIG.
As shown in (b), the opening 27 of the upper insulating layer 284b is formed.
3a is configured such that its inner peripheral edge is located inside the outer peripheral edge of the second conductive film 272. In other words, the outer peripheral edge of the second conductive film 272 is covered by the upper insulating layer 284b. In such a configuration, the second conductive film 272 forms the first interlayer insulating film 28 at the outer peripheral edge thereof.
3 can be suppressed. Therefore,
It is possible to prevent the second conductive film 272 from being corroded due to moisture or the like that has invaded from the separated portions.

In addition, in the present embodiment, the first conductive film 271 covered with the first interlayer insulating film 283 is formed in a region inside the inner peripheral edge of the opening 273a of the upper insulating layer 284b. I have. That is, when viewed from a direction perpendicular to the substrate surface of the active matrix substrate 20, the first conductive film 271 does not entirely overlap the upper insulating layer 284b. Here, the upper insulating layer 28
4b, the vicinity of the outer periphery of the first conductive film 271 overlaps with the vicinity of the outer periphery of the first conductive film 271.
The height of the surface near the inner peripheral edge of the first conductive film 271 b
Higher by the thickness of On the other hand, according to the present embodiment, since the upper insulating layer 284b does not overlap with the first conductive film 271, the height of the surface of the upper insulating layer 284b is smaller than that of the above case. The thickness can be reduced by the thickness of one conductive film 271. On the other hand, since the first conductive film 271 is formed below the third conductive film 273 (on the side of the active matrix substrate 20), the first conductive film 271 is formed as compared with the case where the first conductive film 271 is not formed. The height of the surface of the third conductive film 273 is increased by the thickness of the first conductive film 271. As described above, according to the present embodiment, while the height of the surface of the upper insulating layer 284b is kept low, the height of the surface of the third conductive film 273 is maintained high by the thickness of the first conductive film 271. Therefore, a step generated between both surfaces can be reduced. Therefore, when the active matrix substrate 20 and the FPC 9 are joined, the adhesive 932 of the FPC 9 can be spread over the entire surface of the third conductive film 273. As a result, the active matrix substrate 20 and the FPC can be more reliably bonded, and the pad 222 and the metal conductive wire 91 can be reliably made conductive through the conductive particles 931.

<A-10: Tenth Embodiment> Next, a liquid crystal device according to a tenth embodiment of the present invention will be described.
In the first and second embodiments, the configuration is adopted in which the second interlayer insulating film 284 in the pad formation region 201a is completely removed. In this case, as is apparent from FIG. 3, the outer peripheral edge of the second conductive film 272 reaching the surface of the first interlayer insulating film 283 is covered only by the third conductive film 273. For this reason, in some cases, when patterning the third conductive film 273 during the manufacturing process, a portion of the second conductive film 272 near the outer peripheral edge is simultaneously removed by an electrode or the second conductive film 272 is removed. At the outer peripheral edge, the second interlayer conductive film 272 may be separated from the first interlayer insulating film 283 and water may enter between the two to corrode the second conductive film 272. The present embodiment is based on the viewpoint of effectively suppressing such a situation.

FIG. 18A is a plan view showing the configuration near the pad 222 of the liquid crystal device according to the present embodiment, and FIG. 18B is a sectional view taken along line FF ′ in FIG. As shown in the figure, the liquid crystal device according to the present embodiment is common to the first or second embodiment in that the entire second interlayer insulating film 284 is formed so as to avoid the pad formation region 201a. However, the difference is that the outer peripheral edge of the second conductive film 272 located on the surface of the first interlayer insulating film 283 is covered by the protective insulating layer 285. This protective insulating layer 2
Reference numeral 85 is formed on the surface of the first interlayer insulating film 283 by using an insulating material such as SiN. As shown in FIG. 18B, the third conductive film 273 constituting the pad 222 has a region near the outer peripheral edge thereof located on the surface of the protective insulating layer 285. That is, the ninth data shown in FIG.
In the liquid crystal device according to the embodiment, the second interlayer insulating film 2
84, the second conductive film 27 is formed by the upper insulating layer 284b.
In this embodiment, a protective insulating layer 285 is used instead of the upper insulating layer 284b.
Are provided separately, thereby covering the outer peripheral edge of the second conductive film 272.

In the step shown in FIG. 6B, the protective insulating layer 285 is formed by removing a portion of the second interlayer insulating film 284 covering the entire surface of the active matrix substrate 20 within the pad forming region 201a. It is formed before the step of forming the third conductive film 273 covering the second conductive film 272 (the step shown in FIG. 6C). That is, after the step shown in FIG. 6B, a thin film made of SiN or the like is formed so as to cover the entire surface of the active matrix substrate 20, and this thin film is patterned by using photolithography and etching techniques. Protective insulating layer 2 having the above-mentioned shape
85 is formed. Note that this protective insulating layer 285
May be formed over the entire substrate surface of the active matrix substrate 20, but it is considered that it is desirable to be formed only in the pad formation region 201 a in consideration of a reduction in the thickness of the liquid crystal device.

As described above, according to this embodiment, the same effects as those of the second embodiment can be obtained. In addition, according to the present embodiment, since the protective insulating layer 285 is formed to cover the outer peripheral edge of the second conductive film 272 located on the surface of the first interlayer insulating film 283,
When patterning the conductive film 273, the second conductive film 272
Out of the outer peripheral edge is simultaneously removed by electrolytic corrosion, or the second conductive film 272 is peeled off from the first interlayer insulating film 283 at the outer peripheral edge to prevent water and the like from entering the gap. Therefore, the reliability of the liquid crystal device can be further improved.

<A-11: Eleventh Embodiment> Next, the structure of a liquid crystal device according to an eleventh embodiment of the present invention will be described.
This liquid crystal device includes a second conductive film 272 and a third conductive film 273.
Are the plurality of openings 2 provided in the first interlayer insulating film 283.
The liquid crystal device according to the tenth embodiment differs from the liquid crystal device according to the tenth embodiment in that the conduction is performed via the gate 72a.

Here, FIG. 19A is a plan view showing the configuration near the pad 222 of the liquid crystal device according to the present embodiment, and FIG. 19B is a sectional view taken along the line GG ′ in FIG. It is. In the tenth embodiment, the first conductive film 27
The first and second conductive films 272 are in surface contact with each other via an opening 272a provided over most of a region corresponding to the pad 222 in the first interlayer insulating film 283.
On the other hand, in the present embodiment, as shown in FIGS. 19A and 19B, the first conductive film 271 is largely covered by the first interlayer insulating film 283, while the first conductive film 271 is covered by the first interlayer insulating film 283. The first conductive film 271 and the second conductive film 272 are electrically connected through a plurality of openings 272a provided in a region of the interlayer insulating film 283 corresponding to the pad 222. 19A and 19B, one pad 22 of the first interlayer insulating film 283 is shown.
2 shows a case where two opening portions 272a are formed in the area corresponding to No. 2. Note that the point that the protective insulating layer 285 is formed so as to cover the outer peripheral edge of the second conductive film 272 located on the surface of the first interlayer insulating film 283 is the same as in the tenth embodiment.

In this embodiment employing such a configuration,
The same effects as in the tenth embodiment can be obtained. further,
In the present embodiment, the resistance can be suppressed low by making the first conductive film 271 and the second conductive film 272 conductive, and the first interlayer insulating film 283 is formed over most of the region corresponding to the pad 222. Since it is formed, the surface of the third conductive film 273 forming the pad 222 can be planarized. For example, FIG.
In the liquid crystal device according to the tenth embodiment, a step corresponding to the thickness of the first interlayer insulating film 283 is formed between the central portion and the peripheral portion of the third conductive film 273. According to the embodiment, such a step does not occur as shown in FIG. Therefore, most of the surface of the third conductive film 273 can be used for connection to the metal conductive wire 91, so that conduction failure between the two can be effectively suppressed.

<A-12: Twelfth Embodiment> Next, the structure of a liquid crystal device according to a twelfth embodiment of the present invention will be described.
The tenth or eleventh liquid crystal device is different from the tenth or eleventh embodiment in that a protective insulating layer 285 is provided so as to cover an outer peripheral edge of the second conductive film 272 located on the surface of the first interlayer insulating film 283.
Although it is common to the liquid crystal device described in the embodiment, the difference is that the opening 272a is not provided in the first interlayer insulating film 283.

FIG. 20A is a plan view showing the configuration near the pad 222 of the liquid crystal device according to the present embodiment, and FIG. 20B is a sectional view taken along line HH ′ in FIG. As shown in the figure, in the present embodiment, the first conductive film 2
71 is covered with the first interlayer insulating film 283 over its entire surface, and is not electrically connected to the second conductive film 272 provided on the surface of the first interlayer insulating film 283. Furthermore, the first
First conductive film 271 covered with interlayer insulating film 283
Are formed in a region inside the inner peripheral edge of the protective insulating layer 285 (that is, the edge along the outer peripheral edge of the second conductive film 272). Conversely, the protective insulating layer 285 is formed outside the outer peripheral edge of the first conductive film 271. That is, when viewed from a direction perpendicular to the substrate surface of the active matrix substrate 20, the first conductive film 271 is formed so as not to overlap the protective insulating layer 285 over the entirety.

When such a configuration is adopted, the protective insulating layer 28
In the vicinity of the periphery of the pad 222 on which 5 is formed,
The height of the surface of the protective insulating layer 285 can be suppressed by the amount of the first conductive film 281 not being formed. On the other hand,
In the vicinity of the center of the pad 222, the protective insulating layer 28
Although the layer 5 is not formed, the height of the surface of the third conductive film 273 can be maintained high by the amount of the first conductive film 281 formed. As described above, according to the present embodiment, it is possible to suppress the formation of a step between the peripheral portion and the central portion of the pad 222 and to planarize the region near the pad 222. In particular, as shown in FIG. 20B, when the thickness of the first conductive film 271 and the thickness of the protective insulating layer 285 are substantially the same, the region near the pad 222 is a flat region with almost no step. Can be.

As described above, according to the present embodiment, the region near the pad 222 can be flattened. As compared with (for example, the case shown in FIG. 3), the pad 222 and the metal conductor 91 can be more reliably connected. As mentioned above,
This effect depends on the thickness of the first conductive film 271 and the protection insulating layer 28.
5 is more noticeable when the thickness is substantially the same.

<B: Modifications> One embodiment of the present invention has been described above. However, the above embodiment is merely an example, and various modifications may be made to the above embodiment without departing from the spirit of the present invention. Can be added. For example, the following modifications can be considered.

<B-1: Modification 1> The seventh to first aspects described above.
In the second embodiment, the case where a part or the whole of the second interlayer insulating film 284 is formed so as to exclude only the pad formation region 201a has been described. However, as described in the first or fourth embodiment, Alternatively, part or all of the second interlayer insulating film 284 may be formed so as to avoid not only the pad formation region 201a but also the edge region 201b. Further, in the ninth to twelfth embodiments, the liquid crystal device in which the scanning line driving circuit and the data line driving circuit are provided externally and have small pads is exemplified.
As described in the third embodiment, the scanning line driving circuit and the data line driving circuit are
It goes without saying that the same configuration can be adopted even in a liquid crystal device directly formed on the top and having a large pad.

<B-2: Modification 2> In each of the above embodiments, each component near the pad 221 (or 222), that is, the first to third conductive films, and the first and second interlayer insulating films are used. The TFT was formed simultaneously with the TFT forming step. When such a manufacturing process is used, it is not necessary to independently execute the manufacturing process related to the pad 221 as described above, and thus there is an advantage that a decrease in productivity can be avoided. Alternatively, the components related to the pad 221 may be formed in a process separate from the TFT.

<B-3: Modification 3> In each of the above embodiments, the case where the present invention is applied to a liquid crystal device using liquid crystal as an electro-optical material has been exemplified. However, the electro-optical device to which the present invention can be applied is as follows. It is not limited to this. That is, the present invention is applied to various devices that perform display using the electro-optic effect of the electro-optic material, such as an EL display panel using an EL element as the electro-optic material and a plasma display panel using a gas as the electro-optic material. It is possible. As described above, the present invention can be applied to any electro-optical device having a configuration in which a pad for inputting a signal indicating a display image is provided on a substrate, regardless of the form of other components. Further, the present invention can be applied not only to an electro-optical device but also to a semiconductor device. Also in this case, it is possible to sufficiently secure the area of a portion of the pad that comes into contact with the FPC or the like used for connection to the outside,
The pad and the FPC can be reliably made conductive through the conductive particles.

<C: Electronic Equipment> Next, electronic equipment using the electro-optical device according to the present invention will be described.

<C-1: Mobile Computer> First, an example in which the electro-optical device according to the present invention is applied to a display section of a portable personal computer (so-called notebook computer) will be described. FIG. 21A is a perspective view showing the configuration of the personal computer. As shown in the figure, the personal computer 81 includes a main body 812 having a keyboard 811 and a display 813 to which the electro-optical device according to the invention is applied.

<C-2: Mobile Phone> Next, an example in which the electro-optical device according to the present invention is applied to a display unit of a mobile phone will be described. FIG. 21B is a perspective view showing the configuration of the mobile phone. As shown in the figure, the mobile phone 82 includes a plurality of operation buttons 821 and an earpiece 82.
2. A display unit 824 to which the electro-optical device according to the present invention is applied, in addition to the mouthpiece 823.

As the electronic apparatus to which the electro-optical device according to the present invention can be applied, in addition to the personal computer shown in FIG. 21A and the portable telephone shown in FIG. , Viewfinder type, monitor direct view type video tape recorder, car navigation system,
Examples include a pager, an electronic organizer, a calculator, a word processor, a workstation, a videophone, a POS terminal, a digital still camera, and a projector using the electro-optical device according to the present invention as a light valve.
As described above, according to the electro-optical device of the present invention,
Since poor conduction between the pads on the substrate and the wiring (terminals) of the mounted components can be suppressed, in an electronic device equipped with the same, problems that may occur due to such poor conduction can be prevented and high reliability can be achieved. Can be secured.

[0112]

As described above, according to the electro-optical device of the present invention, a part or the whole of the second interlayer insulating film includes the region where the pad is to be formed and the region around the pad. Since it is formed so as to avoid the pad formation region, it is possible to sufficiently secure an area that can be used for bonding when mounting components such as FPC to the substrate. Therefore, poor conduction between the wiring (terminal) of the mounted component and the pad can be suppressed.

According to the method of manufacturing an electro-optical device of the present invention, a pad and a thin film transistor can be formed simultaneously. Therefore, without increasing the number of special steps for forming the pad, while maintaining the same production efficiency as that of a manufacturing method for manufacturing a liquid crystal device having a general TFT, the TFT is provided, and the mounting component and the pad are not connected. It is possible to manufacture an electro-optical device in which poor conduction between the electro-optical devices hardly occurs.

[Brief description of the drawings]

FIG. 1 is a plan view illustrating an external configuration of a liquid crystal device according to a first embodiment of the present invention.

FIG. 2 shows a TFT formed in a display area of the liquid crystal device.
It is sectional drawing which shows the structure of a vicinity.

3A is a schematic cross-sectional view showing a configuration near a pad of the liquid crystal device, and FIG. 3B is a cross-sectional view showing a state where the pad and an FPC are connected.

FIGS. 4A to 4E are cross-sectional views showing a part of a manufacturing process of the liquid crystal device.

5 (a) to 5 (e) are cross-sectional views showing a step performed after the step shown in FIG. 4 in the manufacturing process of the liquid crystal device.

6 (a) to 6 (c) are cross-sectional views showing steps performed subsequent to the step shown in FIG. 5 in the manufacturing process of the liquid crystal device.

FIG. 7 is a plan view illustrating an external configuration of a liquid crystal device according to a second embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a configuration near a TFT formed in a display area of a liquid crystal device according to a third embodiment of the present invention.

9A is a cross-sectional view illustrating a configuration near a pad of a liquid crystal device according to a third embodiment of the present invention, and FIG. 9B is a cross-sectional view illustrating a state where the pad and an FPC are connected. .

FIG. 10 is a plan view illustrating an external configuration of a liquid crystal device according to a fourth embodiment of the present invention.

FIG. 11A is a cross-sectional view showing a configuration near a pad of the liquid crystal device, and FIG. 11B is a cross-sectional view showing a state where the pad and the FPC are connected.

FIG. 12 is a plan view illustrating an external configuration of a liquid crystal device according to a fifth embodiment of the present invention.

13A is a cross-sectional view illustrating a configuration near a pad of a liquid crystal device according to a sixth embodiment of the present invention, and FIG. 13B is a cross-sectional view illustrating a state where the pad and an FPC are connected. .

14A is a plan view illustrating a configuration near a pad of a liquid crystal device according to a seventh embodiment of the present invention, and FIG. 14B is a cross-sectional view taken along line BB ′ in FIG.

FIG. 15A is a plan view showing a configuration near a pad of a liquid crystal device according to another example of the seventh embodiment,
(B) is a sectional view taken along line CC 'in (a).

FIG. 16A is a plan view illustrating a configuration near a pad of a liquid crystal device according to an eighth embodiment of the present invention, and FIG. 16B is a cross-sectional view taken along line DD ′ in FIG.

FIG. 17A is a plan view illustrating a configuration near a pad of a liquid crystal device according to a ninth embodiment of the present invention, and FIG. 17B is a cross-sectional view taken along line EE ′ in FIG.

FIG. 18A is a plan view showing a configuration near a pad of a liquid crystal device according to a tenth embodiment of the present invention, and FIG.
FIG. 3 is a sectional view taken along line FF ′ in FIG.

FIG. 19A is a plan view showing a configuration near a pad of a liquid crystal device according to an eleventh embodiment of the present invention, and FIG.
FIG. 3 is a sectional view taken along line GG ′ in FIG.

FIG. 20A is a plan view showing a configuration near a pad of a liquid crystal device according to a twelfth embodiment of the present invention, and FIG.
FIG. 3 is a sectional view taken along line HH ′ in FIG.

21A is a perspective view illustrating a configuration of a personal computer as an example of an electronic apparatus to which the electro-optical device according to the invention is applied, and FIG. 21B is an electronic apparatus to which the electro-optical device according to the invention is applied; 1 is a perspective view illustrating a configuration of a mobile phone as an example of FIG.

FIG. 22 is a plan view showing an external configuration of a conventional liquid crystal device.

FIG. 23 is a cross-sectional view showing a structure near a pad of the liquid crystal device.

FIG. 24A shows a flexible printed circuit board (FP)
It is a perspective view which shows the external appearance structure of C), (b) is the said FP.
It is sectional drawing which shows the structure of C edge vicinity.

FIG. 25 shows a pad shown in FIG.
It is sectional drawing which shows the state which connected PC.

FIG. 26 is a plan view showing an external configuration of another conventional liquid crystal device.

FIG. 27 is a cross-sectional view showing a configuration near a pad of the liquid crystal device.

FIG. 28 shows the pad shown in FIG.
It is sectional drawing which shows the state which connected PC.

[Explanation of symbols]

101, 102, 104, 105 ... liquid crystal device (electro-optical device), 2 ... active matrix substrate (substrate),
201 ... overhang area, 201a ... pad formation area, 2
01b... Edge area, 221, 222... Pad, 23
…… Pixel electrode, 24, 25, 26… TFT, 242
252, 262: gate electrode, 243, 253, 26
3 ... source electrode, 244, 254 ... drain electrode,
271... First conductive film, 272.
a, 273a... apertures, 273... third conductive film, 28
2 ... gate insulating film, 283 ... first interlayer insulating film, 28
4 Second interlayer insulating film, 284a Lower insulating layer, 28
4b Upper insulating layer 29 Reflective layer 30 Counter substrate 9 FPC (mounting component) 91 Metal conductor 9
3 ACF, 931 conductive particles, 932 adhesive.

 ──────────────────────────────────────────────────続 き Continuing on the front page F term (reference) 2H092 GA48 GA50 NA15 5C094 AA21 AA42 BA43 DA15 DB03 FB12 FB15 HA08 5F110 AA30 BB02 BB04 CC02 DD01 DD02 DD03 DD13 EE03 EE04 EE05 EE09 FF02 FF23 FF30 GG02 GG13 GG02 GG02 HJ13 HL03 HL04 HM15 NN03 NN04 NN23 NN27 NN72 PP02 PP03 QQ11

Claims (32)

[Claims] 1. An electro-optical device for displaying an image in accordance with a signal input through a pad on a substrate, wherein the first conductive member is formed on a surface of the substrate and has a portion corresponding to the pad. A first film formed on a surface of the substrate and covering the first conductive film;
An interlayer insulating film, a second conductive film formed on the surface of the first interlayer insulating film and having a portion corresponding to the pad, and the pad formed on the surface of the first interlayer insulating film A second interlayer insulating film formed avoiding a pad formation region including a region and a region around the pad; and a third layer forming the pad by contacting the second conductive film.
An electro-optical device comprising a conductive film. 2. The semiconductor device according to claim 1, wherein the second interlayer insulating film is formed so as to avoid an edge region from the pad formation region to an edge of the substrate in addition to the pad formation region. Electro-optical device. 3. The electro-optical device according to claim 1, wherein the pad formation region includes a region between adjacent pads among the plurality of pads arranged in a row on the substrate. . 4. The electro-optical device according to claim 1, further comprising a protective insulating layer covering a peripheral portion of the second conductive film located in the pad formation region. 5. The device according to claim 4, wherein the first conductive film is formed inside an inner peripheral edge of the protective insulating layer along a peripheral portion of the second conductive film. Electro-optical device. 6. The electro-optical device according to claim 5, wherein the thickness of the protective insulating layer is substantially equal to the thickness of the first conductive film. 7. An electro-optical device for displaying an image in accordance with a signal input through a pad on a substrate, wherein the first conductive member is formed on a surface of the substrate and has a portion corresponding to the pad. A first film formed on a surface of the substrate and covering the first conductive film;
An interlayer insulating film, a second conductive film formed on the surface of the first interlayer insulating film and having a portion corresponding to the pad, and a plurality of insulating layers stacked on the surface of the first interlayer insulating film. A part of the plurality of insulating layers is formed so as to avoid a pad forming region including a region where the pad is formed and a region around the pad. On the other hand, the other insulating layer contacts the second conductive film via a second interlayer insulating layer formed over a region including the pad forming region and an opening formed in the other insulating layer, An electro-optical device, comprising: a third conductive film forming a pad. 8. The device according to claim 7, wherein the part of the insulating layer is formed so as to avoid an edge region from the pad formation region to an edge of the substrate in addition to the pad formation region. Electro-optical device. 9. The electro-optical device according to claim 7, wherein the pad formation region includes a region between adjacent pads among the plurality of pads arranged in a row on the substrate. . 10. The opening according to claim 7, wherein the opening is provided over a majority of a region of the other insulating layer corresponding to the third conductive film. Electro-optical device. 11. The electro-optical device according to claim 10, wherein the another insulating layer covers a peripheral portion of the second conductive film located in the pad formation region. 12. The electro-optical device according to claim 7, wherein the first conductive film is formed inside an inner peripheral edge of the opening. 13. The electro-optical device according to claim 7, wherein a plurality of the openings are provided in a region of the other insulating layer corresponding to the pad. . 14. An electro-optical device for displaying an image in accordance with a signal input through a pad on a substrate, wherein the first conductive member is formed on a surface of the substrate and has a portion corresponding to the pad. A first film formed on a surface of the substrate and covering the first conductive film;
A pad formed of an interlayer insulating film, a second conductive film formed on the surface of the first interlayer insulating film and having a portion corresponding to the pad, and a region corresponding to the pad and a peripheral region of the pad A second interlayer insulating film formed including a region and covering the second conductive film, and the second conductive film through a plurality of openings formed in the pad formation region in the second interlayer insulating film. Touches the membrane,
An electro-optical device, comprising: a third conductive film forming the pad. 15. The electro-optical device according to claim 13, wherein the plurality of openings are substantially uniformly distributed in a region covered by the third conductive film. 16. The method according to claim 16, wherein the plurality of openings are formed in a region covered by the third conductive film, and are unevenly distributed near two opposing sides of the substantially rectangular third conductive film. The electro-optical device according to claim 13 or 14, wherein 17. The electro-optical device according to claim 16, wherein the opening is further provided so as to correspond to a vicinity of a center of the third conductive film. 18. The third conductive film is connected to terminals of a mounted component via conductive particles, and the opening is formed in the third conductive film corresponding to the opening. 19. The electro-optical device according to claim 13, wherein a size of the conductive particle is selected so that the conductive particle fits into the formed recess. 19. The size of the opening is selected such that a part of the conductive particles fitted into the depression of the third conductive film protrudes from the surface of the third conductive film. The electro-optical device according to claim 18, wherein: 20. The first conductive film and the second conductive film via an opening provided in a region of the first interlayer insulating film where the first conductive film and the second conductive film face each other. 20. The electro-optical device according to any one of claims 1 to 19, wherein 21. The electro-optical device according to claim 20, wherein the opening portion is provided in the first interlayer insulating film over most of a region corresponding to the third conductive film. . 22. The electro-optical device according to claim 20, wherein the first interlayer insulating film is provided with a plurality of openings in a region corresponding to the third conductive film. . 23. A thin film transistor formed on a surface of the substrate, wherein the first conductive film is formed from the same layer as a gate electrode of the thin film transistor, and wherein the second conductive film is a source electrode of the thin film transistor. 2. The semiconductor device according to claim 1, wherein the first and second layers are formed from the same layer.
23. The electro-optical device according to any one of claims to 22. 24. connected to the thin film transistor,
The electro-optical device according to claim 23, further comprising a pixel electrode for applying a voltage to the electro-optical material, wherein the third conductive film is formed of the same layer as the pixel electrode. An electronic apparatus comprising the electro-optical device according to any one of claims 1 to 24. 26. A first conductive film formed on a surface of a substrate and having a portion corresponding to the pad, and a first conductive film formed on a surface of the substrate and covering the first conductive film.
An interlayer insulating film, formed on a surface of the first interlayer insulating film;
A second conductive film having a portion corresponding to the pad; and a pad forming region formed on a surface of the first interlayer insulating film, the pad forming region including a region where the pad is formed and a region around the pad. A third interlayer insulating film that has been contacted with the second conductive film to form a third pad that forms the pad.
A semiconductor device comprising a conductive film. 27. A first conductive film formed on a surface of a substrate and having a portion corresponding to the pad, and a first conductive film formed on the surface of the substrate and covering the first conductive film.
An interlayer insulating film, a second conductive film formed on a surface of the first interlayer insulating film and having a portion corresponding to the pad, and a second interlayer insulating layer including a plurality of stacked insulating layers, A part of the plurality of insulating layers is formed so as to avoid a pad forming region including a region where the pad is formed and a region around the pad, while another insulating layer is formed in the pad forming region. A second interlayer insulating layer formed over a region including the region and a third conductive film forming the pad by contacting the second conductive film through an opening formed in the other insulating layer; A semiconductor device, comprising: 28. A method of manufacturing an electro-optical device for displaying an image in accordance with a signal input through a pad on a substrate, comprising: forming a first conductive film having a portion corresponding to the pad on a surface of the substrate; A first step of forming a first interlayer insulating film covering the first conductive film on the surface of the substrate; and forming a second conductive film having a portion corresponding to the pad by the first step. Forming a third step on the surface of the first interlayer insulating film; and forming a second step on the surface of the first interlayer insulating film, avoiding a pad formation region including a region corresponding to the pad and a peripheral region of the pad. A method for manufacturing an electro-optical device, comprising: a fourth step of forming an interlayer insulating film; and a fifth step of forming a third conductive film that is in contact with the second conductive film as the pad. 29. A method of manufacturing an electro-optical device for displaying an image in accordance with a signal input via a pad on a substrate, comprising: forming a first conductive film having a portion corresponding to the pad on a surface of the substrate; A first step of forming a first interlayer insulating film covering the first conductive film on the surface of the substrate; and forming a second conductive film having a portion corresponding to the pad by the first step. A third step of forming a plurality of insulating layers on a surface of the first interlayer insulating film to form a second interlayer insulating film on the surface of the first interlayer insulating film; Some of the layers are formed so as to avoid a pad forming region including a region corresponding to the pad and a region around the pad, and another insulating layer is formed over a region including the pad forming region. A fourth step of forming the insulating layer formed on the other insulating layer. Method for producing an electro-optical device characterized by having a fifth step of forming a third conductive film in contact with said second conductive film through the section as the pad. 30. The electro-optical device includes a thin film transistor formed on the substrate, and the first step includes forming a gate electrode of the thin film transistor and forming the first conductive film from the same layer as the gate electrode. 29. The method according to claim 28, wherein the third step is a step of forming the second conductive film from the same layer as the source electrode together with the formation of the source electrode of the thin film transistor.
30. The method for manufacturing an electro-optical device according to 29. 31. The electro-optical device, further comprising a pixel electrode connected to the thin film transistor and applying a voltage to an electro-optical material, wherein the fifth step is the same as the formation of the pixel electrode. 31. The method according to claim 30, further comprising forming the third conductive film from a layer. 32. The method according to claim 34, wherein the fourth step includes: forming a region of the second interlayer insulating film formed on the substrate, the region corresponding to an opening for electrically connecting the thin film transistor and the pixel electrode. 32. The method according to claim 31, further comprising the step of simultaneously removing the pad formation region.