JP2002190618A - Optical semiconductor element and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical semiconductor element of small dimensions which has no possibility of short-circuiting between diffusion region connecting electrodes 16 and a semiconductor substrate 10, and to provide its manufacturing method. SOLUTION: A conductive film 22 is formed on the semiconductor substrate 10 of a first conductivity, and ohmic contact layers 11 and diffusion source films 12 are formed on the conductive film 22. The conductive film 22 is selectively oxidized, by using the ohmic contact layers 11 and the diffusion source films 12 as masks, and an insulation film 21 is obtained. Diffusion regions 15 are formed by diffusion from the diffusion source films 12, and the films 12 on the ohmic contact layers 11 are removed. The diffusion region connecting electrodes 16 are formed on the insulating film 21, and one side ends of the electrodes 16 are connected with the ohmic contact layers 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an optical semiconductor device such as an LED, and more particularly to an optical semiconductor device having a diffusion region formed by a solid phase diffusion method. The present invention also relates to a method for manufacturing such an optical semiconductor device.

[0002]

2. Description of the Related Art In the field of optical semiconductors, various application elements have been put into practical use. For example, an LED array in which a plurality of LEDs (light emitting diodes) are formed in a row on the same semiconductor substrate is a photosensitive element in an electrophotographic printer. It is used as an exposure light source for a drum.

In such an optical semiconductor device, a solid phase diffusion method is used as a method for forming a diffusion region by introducing an impurity into a semiconductor substrate and thereby forming a pn junction. In the solid phase diffusion method, after diffusing impurities from a diffusion source film containing impurities into a semiconductor substrate, the diffusion source film is generally removed to form a diffusion region connection electrode connected to the diffusion region. is there. Here, when the diffusion region connection electrode connected to the diffusion region comes into contact with a region other than the diffusion region, an electrical short circuit occurs. In order to avoid such a short circuit, conventionally, after removing the diffusion source film, an insulating film having a contact hole only in the diffusion region is formed, and the diffusion region and the diffusion region connection electrode are connected through the contact hole. .

FIG. 14 is a plan view of a conventional LED manufactured as described above, and FIG. 15 is a sectional view taken along line AA of FIG. 10 is a semiconductor substrate of the first conductivity type, 1
1 denotes an ohmic contact layer, 15 denotes a diffusion region of the second conductivity type, 16 denotes a diffusion region connection electrode (individual electrode), 17 denotes a substrate connection electrode (common electrode), 18 denotes a contact hole, and 19 denotes an insulating film. .

[0005]

The formation of the diffusion region and the formation of the contact hole on the surface of the insulating film are performed by independent photolithography processes. Therefore, FIG.
As shown in FIG. 15, the contact hole 18 formed in the insulating film 19 may be formed to be shifted from the diffusion region 15 (to the lower left in FIG. 14). When such a shift occurs, the diffusion region connection electrode 16 contacts the region other than the diffusion region 15, that is, the semiconductor substrate 10 in the portion of the contact hole 18 a, causing an electrical short circuit, and as a result, the light emission amount decreases. Will be.

Particularly, in a high-density LED array, the diffusion region becomes very fine, and the distance between adjacent LEDs becomes very small. In addition, since the contact hole becomes finer in accordance with this, the defect based on the positioning error of the mask,
The smaller the size of the LED, and thus the higher the density of the LEDs, the more likely they are to occur, which is a problem.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to prevent a short circuit between a diffusion region connecting electrode and a semiconductor substrate, thereby providing a high-density optical semiconductor device having no variation in light emission amount. To provide. Another object of the present invention is to provide a method for manufacturing such a semiconductor device.

Another object of the present invention is to provide an optical semiconductor device having an increased light emission amount.

Another object of the present invention is to provide a method for manufacturing an optical semiconductor device which can simplify the manufacturing process.

[0010]

According to the first aspect of the present invention, there is provided the following:
A conductive semiconductor substrate (10), and a diffusion region formed by diffusing a second conductive impurity into the semiconductor substrate.
(15), a conductive film (20) formed on the diffusion region (15)
An ohmic contact layer (1) formed on the conductive film (20), the contour of which is aligned with the contour of the diffusion region (15).
1), the diffusion region connection electrode (16) connected to the ohmic contact layer (11), and a portion of the semiconductor substrate (10) where the diffusion region (15) is not formed. A first insulating film (21) for insulating the diffusion region connecting electrode (15) from the semiconductor substrate (10), and the first insulating film (21) and the conductive film (20) The conductive film (22) of the same material as the conductive film (20) is formed on the diffusion region (15) and on the semiconductor substrate (10) other than the portion where the diffusion region (15) is formed. Formed on the portion, and then formed on the portion of the semiconductor substrate other than the portion where the diffusion region is formed, by selectively oxidizing the conductive film. It is intended to provide an optical semiconductor element having features.

According to a second aspect of the present invention, in the first aspect, the first insulating film (21) is also formed on a peripheral portion of the diffusion region (15), and Is the diffusion region
It is characterized in that it is formed on the part excluding the peripheral part of (15).

According to a third aspect of the present invention, in the first or second aspect, the second insulating film (25) formed between the first insulating film (21) and the diffusion region connecting electrode (16) is provided. ).

According to a fourth aspect of the present invention, in the third aspect of the present invention, the plurality of diffusion regions are arranged in a plurality of columns, and the second insulating film extends in the direction of the columns of the diffusion regions. It is characterized in that the rows of regions have a strip-shaped opening located therein.

According to a fifth aspect of the present invention, a second conductivity type impurity is diffused into a first conductivity type semiconductor substrate (10).
In the method for manufacturing an optical semiconductor device, forming (a) a semiconductor substrate (10), a conductive film (22), an ohmic contact layer (11), a diffusion source film (12), and oxidation prevention. Laminating a film (23) in this order, and (b) the antioxidant film (23)
And the diffusion source film (12) and the ohmic contact layer (11)
Patterning with the same contour as, and (c) selectively oxidizing the conductive film using the antioxidant film as a mask,
Forming a first film having an insulating film portion formed by oxidation and a conductive film portion not oxidized; (d)
Selectively diffusing impurities through the ohmic contact layer and the first film into the semiconductor substrate to form a diffusion region of a second conductivity type; and (e) connecting to the ohmic contact layer, Forming a diffusion region connecting electrode extending on the insulating film portion of the one film.

According to a sixth aspect of the present invention, in the fifth aspect of the invention, there is provided (f) a step of forming a diffusion cap film on the semiconductor substrate on which the conductive film is formed; after (d), further comprising the step of patterning the diffusion cap film into a predetermined shape to form a second insulating film on the insulating film portion of the first film, In the step (e), the diffusion region connecting electrode is formed on the second insulating film.

According to a seventh aspect of the present invention, in the invention of the fifth aspect, the step (c) of the selective oxidation and the step (d) of the diffusion are performed in parallel, and the heating temperature for the step is about 400 ° C. The temperature is in the range of about 650 ° C.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. In each embodiment, an example in which the optical semiconductor element of the present invention is an LED will be described. In each of the embodiments, the same reference numerals are used for the same components as those in the related art and those common to the embodiments.

Embodiment 1 FIG. 1 is a plan view showing the structure of the LED array element according to the first embodiment of the present invention.
FIG. 2 is a sectional view taken along line BB in FIG. As shown in FIG. 1, the LED array element 1 has a semiconductor substrate 10 and a plurality of diffusion regions 15 formed on the semiconductor substrate 10.

The semiconductor substrate 10 includes a lower layer 10a and an n-type (first conductivity type) upper layer 10b epitaxially grown thereon. The diffusion region 15 is the semiconductor substrate 10
Formed by selectively diffusing impurities into the upper layer 10b. The diffusion regions 15 are formed at a predetermined pitch. On the diffusion region 15, a conductive film 20
Is formed, and an insulating film 21 is formed on a portion of the upper layer 10b where the diffusion region 15 is not formed.
The contours of the conductive film 20 and the diffusion region 15 coincide with each other. That is, they are aligned.

An ohmic contact layer 11 is formed on the conductive film 20. Further, a diffusion region connecting electrode 16 is formed on the ohmic contact layer 11 and the insulating film 21. The diffusion region connection electrode 16 has a band 16a at one end. The band 16a is connected to the ohmic contact layer 11, and the other end is a bonding pad 16b.
Having. A diffusion region connecting electrode 17 is formed on the lower surface of the lower layer 10a of the substrate 10.

The LED 30 is formed by each diffusion region 15 and a portion of the upper layer 10a adjacent to each diffusion region 15. The diffusion regions 15 are formed so as to form a row. Among the above, the diffusion region 15 and the conductive film 20
The ohmic contact layer 11 and the diffusion region connection electrode 16 are individually formed for each LED. On the other hand, the substrate 10, the substrate connection electrode 17, and the insulating film 21 are commonly formed for all LEDs.

The substrate 10 is formed of, for example, an AlGa-based material. As an example, the lower layer 10a of the substrate 10 is GaAs
s, and the upper layer 10b is formed of an n-type GaAsP layer. The diffusion region 15 is formed by diffusing a p-type impurity such as Zn.

The conductive film 20 is formed of AlAs. The insulating film 21 is formed of Al ₂ O ₃ . The conductive film 20 and the insulating film 21 are continuous with each other. They are,
First, a film of the same material (AlAs) as the conductive film 20 is formed on the entire surface by, for example, epitaxial growth, and a portion other than a region where the diffusion region 15 is to be formed is selectively oxidized. It is formed by forming an Al ₂ O ₃ film and making the unoxidized portion the conductive film 20.

The ohmic contact layer 11 is made of, for example, G
It is formed of aAs. Ohmic contact layer 11
Is also formed by, for example, epitaxial growth.

The diffusion region connection electrode 16 is formed of, for example, Al. The diffusion region connecting electrode 16 is formed on the insulating film 21 and the ohmic contact layer 11, and is connected to the diffusion region 15 through the conductive film 20 at a portion in contact with the ohmic contact layer 11.

The substrate connecting electrode 17 is formed of, for example, an Au-based alloy. The substrate connection electrode 17 is connected to the semiconductor substrate 1.
0 is formed on the entire back surface.

Next, a manufacturing process of the LED array 1 will be described with reference to FIG. First, as shown in FIG. 3A, an n-type (first conductivity type) GaAs is formed on a GaAs substrate 10a.
By epitaxially growing the sP layer 10b,
A semiconductor substrate 10 is prepared. Next, a conductive film is formed on the entire surface of the upper layer 10a of the semiconductor substrate 10, and the ohmic contact layer 11, the diffusion source film 12, and the oxidation prevention film 23 are formed thereon.
Are formed in order.

The conductive film 22 is formed of, for example, AlAs. The ohmic contact layer 11 is formed of, for example, GaAs.

The conductive film 22 and the ohmic contact layer 11 are formed by epitaxial growth on the semiconductor substrate 10 in order. Suitable methods for epitaxial growth include metal organic vapor phase epitaxy (MOCVD) and molecular beam epitaxy (MBE).

As the diffusion source film 12, a p-type (second
Film for diffusing impurities of conductivity type, for example, Zn
An O film is used. The diffusion source film 12 is formed by, for example, sputtering.

As the anti-oxidation film 23, for example, a SiN film or a SiO ₂ film can be used.
The film is formed by the method D) or the like.

Next, as shown in FIG. 3B, a resist pattern 13 is formed in a desired region on the surface of the antioxidant film 23 by using a photolithography technique and an etching technique.

Next, as shown in FIG. 3C, the oxidation preventing film 23 is patterned by etching using the resist pattern 13 as a mask. For the etching of the oxidation preventing film 23, for example, a dry etching method using a mixed gas of CF ₄ and O ₂ can be used.

Next, the diffusion source film 1 is etched by using the resist pattern 13 and the oxidation preventing film 23 as a mask.
2 is patterned. For the etching of the diffusion source film 12, for example, a wet etching method using a hydrofluoric acid-based etchant can be used.

Next, as shown in FIG. 3D, the ohmic contact layer 11 is patterned using the resist pattern 13, the antioxidant film 23 and the diffusion source film 12 as a mask. For this patterning, for example, a wet etching method using a mixed solution of phosphoric acid and hydrogen peroxide or a mixed solution of citric acid and hydrogen peroxide as an etching solution can be used.

Next, the unnecessary mask layer 13 is removed using an organic solvent or the like.

Next, as shown in FIG. 3E, a portion of the conductive film (AlAs film) 22 that is not covered with the oxidation preventing film 23 is oxidized to form an insulating film (Al ₂ O _3). A film 21 is formed. The oxidation is performed, for example, by introducing steam in a vessel heated to about 400 ° C. At this time, the oxidation of the conductive film (AlAs film) 22 does not progress in the region covered with the oxidation preventing film 23, and the conductive film 20 is formed. That is, the conductive film 22 is selectively oxidized, and a composite film having a region that is not individually oxidized for each LED 30 (a non-oxidized region, that is, the conductive film portion 20), and an oxide film that is common to all LEDs, that is, the insulating film 21 Is formed.

Further, the presence of the oxidation preventing film 23 can prevent the ohmic contact layer 11 from being oxidized.

Next, as shown in FIG. 3F, the unnecessary oxidation preventing film 23 is removed. When a SiN film or a SiO ₂ film is used as the antioxidant film 23, it can be removed by, for example, a dry etching method using a mixed gas of CF ₄ and O ₂ . After removing the antioxidant film 23, the diffusion cap film 14 is formed. As the diffusion cap film 14, for example, a SiN film or Si
An O ₂ film can be used.

Next, as shown in FIG. 3 (g), impurities are diffused from the diffusion source film 12 into the semiconductor substrate 10 through the ohmic contact layer 11 and the conductive film 20, and the semiconductor substrate 1 is diffused.
Ohmic contact layer 11 of upper layer 10b
And a diffusion region 15 selectively in a portion corresponding to conductive film 20.
To form Diffusion is performed by performing a heat treatment.
For example, the lower layer 10a of the semiconductor substrate 10 is GaAs, the upper layer 10b is an n-type Al0.15Ga0.85As layer, the ohmic contact layer 11 is n-type GaAs, and the diffusion source film 1
When 2 is ZnO, Zn is diffused to a depth of about 1 μm by heating at about 650 ° C. for about 3 hours, and a p-type diffusion region 15 is formed.

Next, as shown in FIG. 3H, the unnecessary diffusion cap film 14 and diffusion source film 12 are removed by etching. The etching is performed by a method in which the ohmic contact layer 11 and the insulating film 21 are not etched. For example, when the diffusion cap film 14 is a SiN film, the removal of the diffusion cap layer 14 is performed by, for example, CF ₄ and O _2.
Can be used. When the diffusion source film 12 is a ZnO film, the diffusion source film 12 can be removed by, for example, a wet etching method using a hydrofluoric acid-based etchant.

Next, a diffusion region connecting electrode 16 is formed.
The diffusion region connecting electrode 16 is formed by forming a conductive film on the insulating film 21 and the ohmic contact film 11 and then patterning the conductive film using photolithography and etching.

The ohmic contact layer 1 is used as the conductive film.
1 that can make an ohmic contact with, for example, an Al film can be used. For the etching of the Al film, for example, a wet etching method using hot phosphoric acid can be used. At this time, if the temperature of the hot phosphoric acid is maintained at about 40 ° C., the underlying Al ₂ O ₃ film 21 is not etched, so that the insulating property is not impaired.

After the formation of the diffusion region connection electrode 16, annealing may be performed to ensure a good ohmic contact between the diffusion region connection electrode 16 and the ohmic contact layer 11.

The diffusion region connecting electrode 16 is not limited to the shape shown in FIG. 1, but may have another shape.

Next, as shown in FIG. 3I, a conductive film serving as the substrate connection electrode 17 is formed on the entire lower surface of the lower layer 10a of the semiconductor substrate 10. As the conductive film, a material that can make ohmic contact with the semiconductor substrate 10, for example, when the semiconductor substrate is n-type GaAs, an Au-based alloy can be used.

As described above, the LED array 1 is manufactured.

The operation of the LED will be described with reference to FIGS. By causing a current to flow between the diffusion region connection electrode 16 and the substrate connection electrode 17, light emission occurs at the interface (pn junction) 24 between the semiconductor substrate 10 and the diffusion region 15. The emitted light is emitted outside from a region 15 a of the diffusion region 15 that is not covered with the diffusion region connection electrode 16. On the other hand, the diffusion region 1 covered with the diffusion region connection electrode 16
In 5b, the emitted light is blocked by the electrode 16 and is not emitted to the outside. Note that the conductive film 20 and the ohmic contact layer 11 transmit emitted light.

As described above, according to the first embodiment, diffusion region 15 is formed by diffusion from diffusion source film 12, and oxidation preventing film 23 (diffusion source film 1) of conductive film 22 is formed.
2) are oxidized to form the insulating film 21. That is, the portion of the conductive film 22 located above the portion other than the diffusion region 15 in the semiconductor substrate 10 is oxidized to become the insulating film (Al ₂ O ₃ ) 21. As a result, it is possible to reliably prevent the diffusion region connecting electrode 16 formed on the insulating film (Al ₂ O ₃ ) 21 from contacting the semiconductor substrate 10 with a portion other than the portion where the diffusion region 15 is formed. Can be. That is, the diffusion region 1 that can occur in the prior art
5 and the opening of the insulating film 21 can be prevented from being short-circuited. Therefore, a manufacturing margin for preventing a short circuit due to the above-mentioned displacement becomes unnecessary, and it is possible to measure a high density of the element. Further, the manufacturing process can be simplified.

Although the n-type GaAsP layer is used as the upper layer in the first embodiment, the n-type AlGaAs is used instead.
An s layer may be used.

In the first embodiment, the diffusion cap film 14 is formed after removing the antioxidant film 23. However, as described above, the antioxidant film 23 and the diffusion cap film 14 are made of the same material. In this case, the diffusion cap film 14 is formed thereon without removing the antioxidant film 23 to perform diffusion (in that case, the antioxidant film 23 acts as a part of the diffusion cap film 14). After the completion of the above, it may be removed before the diffusion region connecting electrode 16 is formed.

Further, in the above example, the oxidation preventing film 2
After removing 3 and before the subsequent diffusion step, a diffusion cap film 14 is formed on the semiconductor substrate 10. In order to prevent the impurities to be diffused into the semiconductor substrate 10 from diffusing into the heating atmosphere and perform stable diffusion, it is preferable to provide the diffusion cap film 14 as described above. It is also possible to carry out diffusion without forming a film.

Embodiment 2 FIG. 4 shows the LE of the second embodiment.
FIG. 5 is a plan view showing the structure of the D array element, and FIG. 5 is a sectional view taken along the line CC in FIG.

The LED array elements shown in FIGS.
Is the same as the LED array element of the embodiment shown in FIG.

That is, of the portion located above the diffusion region 15, the insulating film 21a is also formed on the peripheral portion thereof, and the conductive film 20 is formed only in the central portion. Therefore, the area of the conductive film 20 becomes smaller. As a result, when the LED is driven at a constant current, the current density of the current flowing through the diffusion region 15 can be increased. The amount of light emission per unit area increases non-linearly with respect to the current density, and as the current density increases, the manner of increase in the amount of light emission per unit area increases. By increasing, the overall light emission of the LED can be increased.

Next, a manufacturing process of the LED array will be described with reference to FIG. First, the structure shown in FIG. 6A is obtained in the same manner as described with reference to FIGS.

Next, as shown in FIG. 6B, the conductive film (AlAs film) 22 is oxidized to form an insulating film (Al ₂ O).
_(Three films) 21 are formed. The oxidation is performed, for example, by introducing steam in a vessel heated to about 400 ° C. At this time, by making the oxidation time longer than that of the first embodiment, the oxidation layer 1
The peripheral portion 21a of the portion located above 5 is also oxidized.

Next, as shown in FIGS. 6 (c) to 6 (f), a diffusion cap film 14 is formed in the same manner as described with reference to FIGS. 3 (f) to 3 (i). Next, diffusion is performed to form a diffusion region 15, and then the diffusion cap film 14 and the diffusion source film 12 are removed to form a diffusion region connection electrode 16 and a substrate connection electrode 17. Thus, the LED array 2 is manufactured.

As described above, according to the second embodiment, the following effects can be obtained in addition to the effects obtained in the first embodiment. That is, a portion 2 of the conductive film (AlAs film) 22 located below the ohmic contact layer 11
Since 1a was also oxidized into an insulating film (Al ₂ O ₃ film),
The area of the conductive film 20 can be reduced to restrict the current path, and the current density of the diffusion region 15 as the light emitting portion can be locally increased. As a result, the luminous efficiency in the portion where the current density is increased can be increased, and the overall light emission amount of the LED 30 can be increased.

The same modifications as described in the first embodiment can be applied to the second embodiment.

Embodiment 3 FIG. 7 shows the LE of the third embodiment.
FIG. 8 is a plan view showing the structure of the D array, and FIG.
It is sectional drawing which follows the D line. As shown in these figures, the LED array element of this embodiment is the same as the LED array element of Embodiment 1 shown in FIGS.
They differ in the following points. That is, the insulating film (second insulating film) 25 is partially interposed between the insulating film 21 and the diffusion region connecting electrode 16. This insulating film 25 is formed so as to cover a part of the upper surface of the insulating film 21, and is not formed on the conductive film 20.

That is, the insulating film 25 has an opening 25a, and the opening 25a is arranged in the direction in which the conductive films 20 are arranged (the x direction in FIG. 7) so that a plurality of rows of the conductive films 20 are located inside the opening 25a. It has a band-like shape extending along. Insulating film 25
Is provided for the purpose of preventing short circuit between the diffusion region connecting electrode 16 and the semiconductor substrate 10 and securing insulation when a pinhole is generated in the insulating film 21 or the like.

Next, the manufacturing process of the LED array will be described with reference to FIG. First, the structure shown in FIG. 9A is obtained in the same manner as described with reference to FIGS.

Next, as shown in FIG. 9B, the unnecessary diffusion cap film 14 and diffusion source film 12 are removed, and an insulating film 25 having an opening 25a is formed. Insulating film 2
The opening 5 is formed by forming an insulating film on the entire surface and then patterning the film using photolithography and etching.
This is performed by forming a. The insulating film 25 may be any film that has an insulating property and can be patterned by etching, and for example, a SiN film, a SiO ₂ film, or the like can be used. These films can be formed by a CVD method, a sputtering method, or the like. In addition, it is necessary that etching does not damage the underlying insulating film 21 (Al ₂ O ₃ film). When the insulating film 25 is formed of SiN or SiO ₂ , a mixed gas of CF ₄ and O ₂ is used. Dry etching method or the like can be used.

The opening 25a is formed in the conductive film 20 as described above.
Are formed in a band along the arrangement direction (x direction). At this time, the dimension Dy in the direction perpendicular to the x direction (y direction) is set to be equal to the size of the conductive film 2 even when the mask is misaligned in the y direction in the photolithography process for forming the opening 25a.
A margin is provided so that 0 is completely located inside.

Next, as shown in FIGS. 9C and 9D,
The diffusion region connecting electrode 16 is formed in the same manner as described with reference to FIGS.
The substrate connecting electrode 17 is formed on the entire back surface of the substrate. Thus, the LED array 3 is manufactured.

As described above, according to the third embodiment, the following effects can be obtained in addition to the effects obtained in the first embodiment. That is, by providing the insulating film 25, even if a pinhole or the like occurs in the insulating film 21, the insulating property between the diffusion region connection electrode 16 and the semiconductor substrate 10 can be ensured. The opening 25 provided in the insulating film 25
Since a is formed in a band shape in the column direction (x direction) of the conductive film 20 in common with the conductive films 20 of the plurality of LEDs 30, the mask is formed in the x direction in the photolithography process for forming the opening 25a. The insulating film 25 will not be formed on the conductive film 20 even if it slightly deviates from the above. Therefore, the photolithography process does not require a high degree of mask alignment accuracy.

The same modifications as described in the first embodiment can be applied to the third embodiment.

Embodiment 4 FIG. 10 shows L of the fourth embodiment.
FIG. 11 is a plan view showing the structure of the ED array, and FIG.
It is sectional drawing which follows the EE line of FIG. LE of this embodiment
The D array element is substantially the same as the LED array element 1 shown in FIGS. 1 and 2, but differs in the following points. That is, the opening 14a is provided in the diffusion cap film 14 formed in the manufacturing process in the first embodiment without being removed. This diffusion cap film 14 is used as having a role similar to that of the insulating film 25 of the third embodiment. Opening 14a
Is formed in a strip shape extending in the direction of the row of conductive films (x direction) so that a plurality of conductive films are located inside (similar to the opening 25a).

Next, the manufacturing process of the LED array will be described with reference to FIG. First, the structure shown in FIG. 12A is obtained in the same manner as described with reference to FIGS.

Next, as shown in FIG. 12B, only the opening 14a is peeled off by using photolithography and etching without completely peeling off the diffusion cap film 14, and thereafter becomes unnecessary. The diffused source film 12 is removed. When a SiN film or a SiO ₂ film is used as the diffusion cap film 14, a dry etching method using a mixed gas of CF ₄ and O ₂ can be used. The diffusion source film 12
Is removed in the same manner as described with reference to FIG.

Here, for example, the opening 14a is formed in a strip shape along the column arrangement direction (x direction) of the conductive films 20 so that the columns of the plurality of conductive films 20 on the LED array 4 are completely located therein. Formed. At this time, the dimension Dy in the direction perpendicular to the x direction (y direction) is determined so that the conductive film is formed even when the mask is slightly displaced in the y direction in the photolithography process for forming the opening 14a. The value is set so that 20 is completely located inside.

Next, as shown in FIGS. 12C and 12D, a diffusion region connecting electrode 16 is formed in the same manner as described with reference to FIGS. The substrate connection electrode 17 is formed on the entire back surface of the substrate 10. From the above,
The LED array 4 is manufactured.

As described above, according to the fourth embodiment, in addition to the effects obtained in the first and third embodiments, the following effects can be further obtained. That is, the diffusion cap film 1
Since 4 is used as the second insulating film, there is no need to form a separate film for forming the second insulating film, and the number of manufacturing steps can be reduced.

The same modifications as described in the first embodiment can be applied to the fourth embodiment.

Embodiment 5 Embodiment 5 relates to another method for manufacturing the LED array element described in Embodiment 1. The feature of this embodiment is that the conductive film (A
In other words, selective oxidation of the (As layer) 22 and solid-phase diffusion are simultaneously performed.

The manufacturing process of the LED array 5 will be described with reference to FIG. First, the structure shown in FIG. 13A is obtained in the same manner as described with reference to FIGS. 3A to 3D.

Next, as shown in FIG.
The insulating film (Al ₂ O ₃ film) 21 is formed by oxidizing the s film 22. At this time, solid phase diffusion is also performed.

For this purpose, for example, steam is introduced into a vessel heated to a temperature between about 400 ° C., which is a standard condition for oxidation reaction, and about 650 ° C., which is a standard condition for solid phase diffusion. It is done by doing. Note that diffusion is difficult to occur at low temperatures, and selective oxidation is difficult at high temperatures.
Desirably, the temperature is between about 600C and about 600C. Here, since the diffusion source film 12 is patterned, even if diffusion is performed before the insulating film 21 is completely formed, the diffusion region is selectively formed in a portion corresponding to the ohmic contact layer 11 of the semiconductor substrate 10. 15 can be formed, and a portion corresponding to the diffusion region 15 becomes the conductive film 20. Further, since the antioxidant film 23 also functions as a diffusion cap film, it is possible to prevent impurities to be diffused into the semiconductor substrate 10 from being released into the heating atmosphere and to perform stable diffusion.

Next, as shown in FIG. 13C, the unnecessary portions of the antioxidant film 23 and the diffusion source film 12 are removed. When a SiN film or a SiO ₂ film is used as the oxidation preventing film 23, it can be removed by, for example, a dry etching method using a mixed gas of CF ₄ and O ₂ . Further, for the etching of the diffusion source film 12, for example, a wet etching method using a hydrofluoric acid-based etchant can be used. However, in any case, the underlying oxide layer 21
And the ohmic contact layer 11 must not be affected.

Next, as shown in FIGS. 13 (d) and 13 (e), the diffusion region connecting electrode 16 and the substrate connecting electrode 17 are formed in the same manner as described with reference to FIGS. 3 (h) and 3 (i). To form Thus, the LED array 5 is manufactured.

As described above, according to the fifth embodiment, in addition to the effects obtained in the first embodiment, the following effects can be further obtained. That is, by simultaneously oxidizing the AlAs layer and solid-phase diffusion of impurities, the manufacturing process can be simplified and the yield can be improved.

The same modifications as described in the first embodiment can be applied to the fifth embodiment.

Although the first to fifth embodiments have been described by taking the homojunction type LED as an example, the present invention is also applicable to a single heterojunction type and a double heterojunction type LED. In addition, not limited to these, p
Any optical semiconductor element that forms an n-junction and connects an electrode and a diffusion region via an ohmic contact layer may be used, and can be applied to, for example, a surface emitting laser.

[0085]

According to the first aspect of the present invention, the semiconductor substrate (1
Since the insulating film (21) is formed on the portion other than the portion where the diffusion region (15) is formed in (0), it is possible to prevent a short circuit between the semiconductor substrate (10) and the diffusion region connection electrode (16). And the diffusion region connecting electrode (16) is connected to the ohmic contact layer (1).
It can be reliably connected to the diffusion region via 1).

According to the second aspect, by reducing the area of the conductive film, the density of the current flowing through the interface between the diffusion region and the substrate can be locally increased. As a result, the luminous efficiency in the portion where the current density is increased is increased,
When the light emitting portion formed at the interface is driven at a constant current,
The overall light emission amount of the light emitting unit can be increased.

According to the third aspect, even when the first insulating film has a pin pole, the diffusion region connecting electrode can be reliably insulated from the substrate by the second insulating film.

According to the fourth aspect of the present invention, the position of the opening is
Even a slight shift in the direction of the diffusion region column does not hinder the connection of the diffusion region connection electrode to the ohmic contact layer. Therefore, it is not necessary to perform positioning of the mask for forming the opening with high accuracy.

According to the fifth aspect of the present invention, the diffusion region is formed by diffusion from the diffusion source film, and the conductive film is covered with the antioxidant film (aligned with the diffusion source film). Since the non-existing portion is oxidized, as a result, the portion of the first film located above the portion other than the diffusion region in the semiconductor substrate is oxidized to become an insulating film (first insulating film). For this reason, it is possible to reliably prevent the diffusion region connecting electrode formed on the insulating film portion from contacting a portion other than the diffusion region in the semiconductor substrate, and it is possible to prevent the diffusion that may occur when using the conventional technique. A short circuit due to a shift between the region and the opening of the insulating film portion can be prevented. Therefore, a manufacturing margin for preventing a short circuit due to the above-mentioned displacement becomes unnecessary, and it is possible to measure a high density of the element. Further, the manufacturing process can be simplified.

According to the sixth aspect, since the diffusion cap film is used for forming the second insulating film, a separate material and process are not required for forming the second insulating film. It is possible to prevent a short circuit between the diffusion region connecting electrode and the semiconductor substrate, which may occur due to the presence of a pinhole or the like in the insulating film portion of the first film.

According to the seventh aspect, the number of manufacturing steps can be reduced, and the manufacturing can be simplified.

[Brief description of the drawings]

FIG. 1 is a plan view of an LED array according to a first embodiment.

FIG. 2 is a sectional view taken along line BB of FIG.

FIG. 3 is a diagram illustrating a manufacturing process of the LED array according to the first embodiment;

FIG. 4 is a plan view of an LED array according to a second embodiment.

FIG. 5 is a sectional view taken along line CC of FIG. 4;

FIG. 6 is a diagram illustrating a manufacturing process of the LED array according to the second embodiment;

FIG. 7 is a plan view of an LED array according to a third embodiment.

FIG. 8 is a sectional view taken along line DD of FIG. 7;

FIG. 9 is a diagram illustrating a manufacturing process of the LED array according to the third embodiment;

FIG. 10 is a plan view of an LED array according to a fourth embodiment.

FIG. 11 is a sectional view taken along the line EE of FIG. 10;

FIG. 12 is a diagram illustrating a manufacturing process of the LED array according to the fourth embodiment;

FIG. 13 is a diagram illustrating a manufacturing process of the LED array according to the fifth embodiment.

FIG. 14 is a plan view showing an LED formed by a conventional technique.

FIG. 15 is a sectional view taken along the line AA in FIG. 14;

[Explanation of symbols]

Reference Signs List 1 LED array, 10 semiconductor substrate, 11 ohmic contact layer, 12 diffusion source film, 13 mask layer, 14 diffusion cap film, 15 diffusion region, 1
6 Diffusion area connection electrode, 17 Substrate connection electrode, 18
Contact hole, 19, 25 insulating film, 20 conductive film, 21 insulating film, 22 antioxidant film, 24 p
n-junction, 30 LEDs.

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Hiroyuki Fujiwara 550, Higashi-Asakawa-cho, Hachioji-shi, Tokyo, Japan One within Digital Imaging Offshore (72) Inventor Masumi Koizumi 550, Higashi-Asakawa-cho, Hachioji-shi, Tokyo, Japan 5F041 AA04 AA43 CA02 CA35 CA46 CA67 CB03 CB22

Claims (7)

[Claims] A first conductivity type semiconductor substrate; a diffusion region formed by diffusing a second conductivity type impurity into the semiconductor substrate; and a diffusion region formed on the semiconductor substrate. A conductive film (20) formed on the conductive film (20), and an ohmic contact layer (11) formed on the conductive film (20), the contour of which is aligned with the contour of the diffusion region (15).
The diffusion region connection electrode (16) connected to the ohmic contact layer (11), and formed on a portion of the semiconductor substrate (10) where the diffusion region (15) is not formed, Diffusion area connection electrode (1
A first insulating film (21) for insulating 5) from the semiconductor substrate (10);
The first insulating film (21) and the conductive film (20) are formed by forming a conductive film (22) of the same material as the conductive film (20) on the diffusion region (15).
And on the semiconductor substrate (10) other than the portion where the diffusion region (15) is formed, and then the semiconductor substrate (10) other than the portion where the diffusion region is formed An optical semiconductor element formed by selectively oxidizing the conductive film. 2. The method according to claim 1, wherein the first insulating film is formed in the diffusion region.
The method according to claim 1, wherein the conductive film (20) is also formed on a peripheral portion of the diffusion region (15) except for a peripheral portion of the diffusion region (15). The optical semiconductor device as described in the above. 3. The semiconductor device according to claim 1, further comprising a second insulating film formed between said first insulating film and said diffusion region connecting electrode. An optical semiconductor device according to item 1. 4. A band-shaped opening in which a plurality of diffusion regions are arranged in a plurality of rows, and wherein the second insulating film extends in the direction of the rows of the diffusion regions, and the rows of the diffusion regions are located therein. 4. The optical semiconductor device according to claim 3, comprising: 5. A method of manufacturing an optical semiconductor device in which a diffusion region is formed by diffusing an impurity of a second conductivity type into a semiconductor substrate of a first conductivity type. On top of it, a conductive film (22) and an ohmic contact layer (11)
Stacking a diffusion source film (12) and an antioxidant film (23) in this order; and (b) the antioxidant film (23) and the diffusion source film.
(12) and a step of patterning with the same contour as the ohmic contact layer (11), and (c) selectively oxidizing the conductive film using the antioxidant film as a mask, and an insulating film portion formed by oxidation. And (d) selectively diffusing impurities into the semiconductor substrate through the ohmic contact layer and the first film, Forming a diffusion region of conductivity type; and (e) forming a diffusion region connection electrode connected to the ohmic contact layer and extending on the insulating film portion of the first film. A method for manufacturing an optical semiconductor device, comprising: 6. (f) forming a diffusion cap film on the semiconductor substrate on which the conductive film is formed;
(g) after the diffusion step (d), patterning the diffusion cap film into a predetermined shape to form a second insulating film on the insulating film portion of the first film; 6. The method according to claim 5, further comprising: forming the diffusion region connection electrode in the step (e) on the second insulating film. 7. The method according to claim 1, wherein the step (c) of the selective oxidation and the step (d) of the diffusion are performed in parallel, and a heating temperature for the step is in a range of about 400 ° C. to about 650 ° C. The method for manufacturing an optical semiconductor device according to claim 5.