JP2002141510A - Thin-film transistor, array substrate, liquid crystal display, and organic el display and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that variation in electric characteristics is caused by variation in the thickness of an oxide film existing on a semiconductor surface before crystallization treatment in a thin-film transistor by a polycrystalline semiconductor that is subjected to laser crystallization. SOLUTION: Average roughness in a polycrystalline silicon film is controlled to 5 nm or more and 10 nm or less, thus stably obtaining a transistor having a sufficient driving current. Also, the thickness of a silicon oxide film on an amorphous silicon surface before laser annealing is set to 1 nm or more and 5 nm or less, thus controlling the average roughness in the polycrystalline silicon film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a polycrystalline semiconductor thin film transistor used for an active matrix type liquid crystal display or an organic EL display.

[0002]

2. Description of the Related Art In a liquid crystal display or an organic EL display, there is a technique of forming a switching element and a driving peripheral circuit on a glass substrate by forming a thin film transistor from polycrystalline silicon.

[0005] Polycrystalline silicon used for a thin film transistor is usually formed using a technique of crystallization by irradiating an amorphous silicon film with laser light. For example, when manufacturing a thin film transistor on a glass substrate, first, an amorphous silicon film is formed on a glass substrate by a plasma CVD method or the like, and the film is irradiated with an excimer laser beam that oscillates in an ultraviolet region in a pulse oscillation type. Thereby, a polycrystalline silicon thin film can be obtained.

However, a thin film transistor formed by using an excimer laser has a large problem in that a variation in crystallinity due to a variation in output characteristics of the excimer laser is large.

[0005]

In the case of manufacturing a thin film transistor by a method using an excimer laser, the crystal depends on the thickness of the silicon oxide film existing on the surface of the amorphous silicon film existing before crystallization. Gender changes greatly. That is, the thickness of the silicon oxide film existing on the surface of the amorphous silicon film before being crystallized fluctuates in the substrate surface, thereby causing the electrical characteristics of the thin film transistor to vary in the substrate surface.

Further, boron is present in the atmosphere in a large amount, and since a silicon oxide film is present on the surface of amorphous silicon, boron is easily taken into the silicon oxide film. The boron contained therein is taken into the polycrystalline silicon formed after laser annealing. As a result, it causes variation of the threshold voltage of the thin film transistor and variation of the resistance value in the low-concentration impurity implantation region.

Further, the thin film transistor used in the pixel portion does not require a drive current as much as the thin film transistor used in the circuit portion, while display unevenness occurs when the thin film transistor used in the pixel portion is not uniform. Uniform characteristics are required more than thin film transistors used in the circuit section. In a polycrystalline silicon film formed using an excimer laser, it is necessary to improve crystallinity in order to form a thin film transistor having a sufficient driving current. For this purpose, it is necessary to increase the laser energy. In that case, however, there is a tendency that crystallinity variation accompanying energy variation also increases.

[0008]

According to the invention disclosed in this specification, the thickness of the polycrystalline silicon film constituting the thin film transistor is 40 nm or more and 70 nm or less, and the average roughness of the polycrystalline silicon film surface is 5 nm or more and 10 nm or less. It is characterized by the following. The thickness of the polycrystalline silicon film forming the thin film transistor is determined by the required on-current and off-current of the transistor characteristics. FIG. 1 shows the dependence of the ON current of the transistor on the thickness of the polycrystalline silicon film and the dependence of the off current on the thickness of the polycrystalline silicon film. The ON current (gate voltage 20 V, source voltage 15 V) required for the transistor (gate length 6 μm, gate width 6 μm) is 100
A film thickness of 40 nm or more is required from the polycrystalline silicon film thickness obtained by μA, and the off-current (gate voltage −15 V, source voltage −15 V) needs to be reduced to 70 nm or less from the polycrystalline silicon film thickness of 1 pA or less. Becomes

FIG. 2 shows the surface roughness of polycrystalline silicon measured by an atomic force microscope obtained after laser annealing when the thickness of the silicon oxide film on the surface of the amorphous silicon film was changed before laser annealing. The figure is shown. It can be seen that by controlling the thickness of the silicon oxide film existing on the surface of the amorphous silicon film before laser annealing, the average roughness of the polycrystalline silicon film obtained after laser annealing changes. The average roughness of the polycrystalline silicon surface reflects the crystal grain size, and the electrical characteristics of the thin film transistor fluctuate as the surface roughness of the polycrystalline silicon changes.

Further, the present inventors have found through detailed experiments that when the thickness of the oxide film present on the surface of the amorphous silicon changes, the characteristic margin of the mobility of the thin film transistor with respect to the irradiation laser energy changes. FIG. 3 shows a graph of the mobility when the laser power is changed when the silicon oxide film thickness on the amorphous silicon surface before laser annealing is changed. It can be seen that the laser energy margin for obtaining high mobility is wide when the silicon oxide film existing on the amorphous silicon surface before laser annealing is 1 nm or more. This indicates that a silicon oxide film thickness of 1 nm or more on the amorphous silicon surface before laser annealing is required to obtain a high mobility transistor. Further, it was found that when the silicon oxide film thickness was 5 nm or more, the mobility characteristics of the thin film transistor deteriorated.

The experimental results show that the thickness of the silicon oxide film present on the surface of the amorphous silicon is 1 nm to 5 nm.
It has been found that good transistor characteristics can be obtained in the following regions. In addition, the average roughness of the polycrystalline silicon film obtained in this case measured by an atomic force microscope is 5 nm or more and 10 nm or less. For this reason, even when the energy of the excimer laser is unstable, the thickness of the polycrystalline silicon film is 40 nm or more and 70 nm or less, and the average roughness measured by an atomic force microscope is 5 nm or more and 10 nm or less. By using the thin film transistor, favorable transistor characteristics can be obtained stably even with respect to energy variation of an excimer laser.

In order to stabilize the characteristics of the thin film transistor, it is necessary to reduce the boron concentration in the polycrystalline silicon. If the boron concentration in the polycrystalline silicon is 5 × 10 ¹⁷ cm ^-3 or more. As a result of changing the threshold voltage of the transistor and the resistance value of the low-concentration impurity-implanted region, the transistor characteristics may be changed. For this reason, the boron concentration in the polycrystalline silicon film needs to be 5 × 10 ¹⁷ cm ⁻³ or less.

By setting the thickness of the polycrystalline silicon film, the average roughness of the polycrystalline silicon surface, and the concentration of boron contained in the polycrystalline silicon film to the above values, stable transistor characteristics can be obtained. Crystalline silicon can be formed.

According to the invention disclosed in this specification, the average roughness of the surface of polycrystalline silicon used for a pixel portion in a thin film transistor constituting a display device is 1 nm or less;
The average roughness of polycrystalline silicon used for other circuit portions is 5 nm or more and 10 nm or less.

Since the characteristics of the thin film transistor required in the pixel portion and the circuit portion in the display device are different,
By changing the oxide film thickness of the amorphous silicon surface before excimer laser annealing in the pixel portion and the circuit portion, a desired polycrystalline silicon film can be obtained. In a pixel portion, a transistor having uniform characteristics and a polycrystalline silicon film having a flat surface are required rather than high mobility, and higher mobility than necessary is not required.

As a method of changing the oxide film thickness on the amorphous silicon surface, a resist pattern is formed only on the circuit portion by photolithography technology, and the oxide film on the amorphous silicon surface in a portion to be a pixel portion is selectively etched. By removing the resist after removing the oxide film on the surface of the amorphous silicon, the oxide film thickness on the surface of the amorphous silicon can be controlled within the substrate surface.

According to the invention disclosed in this specification, when a polycrystalline silicon film is formed using a laser, the silicon oxide film on the surface of the amorphous silicon film is removed, and then the silicon oxide film having a constant thickness is formed. It is characterized by annealing. Further, after the silicon oxide film on the amorphous silicon surface is removed, the formation of the silicon oxide film and the laser annealing are continuously performed.

By using this technique, the thickness of the silicon oxide film on the surface of the amorphous silicon can be controlled to be constant, so that the variation in the average roughness of the surface of the polycrystalline silicon film obtained after laser annealing is reduced, and the average roughness is reduced. Can be made uniform. Since the average roughness of the surface of the polycrystalline silicon film reflects the size of the silicon crystal grain forming the polycrystalline silicon film, it is necessary to make the average roughness uniform to make the crystal grain size uniform. Becomes possible. By making the average roughness and the crystal grain size of the polycrystalline silicon uniform, the characteristics of the thin film transistor can be made uniform. In particular, the smaller the average roughness, the more uniform the characteristics of the thin film transistor. In addition, by performing laser annealing continuously after the oxide film is formed, it is possible to suppress the growth of the oxide film after the oxide film is formed, and it is possible to prevent boron from entering the silicon oxide film on the amorphous silicon surface from the air. It becomes possible to suppress. Boron taken into the polycrystalline silicon surface before the laser annealing causes a change in the resistance of the channel region or the low-concentration impurity-implanted region in the thin film transistor after the laser annealing. Therefore, by removing the silicon oxide film on the amorphous silicon surface, forming a silicon oxide film, and subsequently performing laser annealing continuously, by reducing the boron present on the amorphous silicon surface before laser annealing, The threshold voltage of the thin film transistor can be stabilized.

[0019]

4 (a) to 4 (h) show steps of obtaining a polycrystalline silicon film by laser annealing. First, a silicon oxide film 402 having a thickness of 400 nm to 700 nm and an amorphous silicon film 403 having a thickness of 40 nm to 70 nm are formed over a glass substrate 401 by a plasma CVD method. Preferably, the silicon oxide film is formed to have a thickness of 600 nm and the amorphous silicon film has a thickness of 50 nm.

After the formation of the amorphous silicon, 45
At a temperature of about 0 ° C., hydrogen in the amorphous silicon is removed in a nitrogen atmosphere.

After the formation of the amorphous silicon film 403,
A silicon oxide film is inevitably formed on the surface of the film.
The silicon oxide film formed at this time exists non-uniformly in the amorphous silicon surface, and the thickness of the silicon oxide film also varies on the amorphous silicon surface. Further, since boron exists in the clean room, impurities such as boron are taken into the silicon oxide film existing on the surface of the amorphous silicon. These impurities have a problem that they are activated after laser annealing and cause a change in electrical characteristics of the transistor.

Then, the silicon oxide film formed on the surface of the amorphous silicon film 403 is etched by using diluted hydrofluoric acid. Thereafter, a silicon oxide film is chemically formed on the surface of the amorphous silicon by performing ozone oxidation with ozone water at an ozone concentration of 20 ppm for 90 seconds at room temperature. The oxide film thickness of the silicon oxide film formed here can be controlled to 1 nm or more and 5 nm or less by controlling the treatment time of ozone oxidation, the ozone concentration and the temperature of ozone water.

Although the silicon oxide film formed on the surface of the amorphous silicon film is formed using ozone water, the silicon oxide film is formed by irradiating ultraviolet light in an atmosphere containing an oxidizing gas. You may. By using ultraviolet light, a silicon oxide film can be easily formed in a dry atmosphere.

Further, a silicon oxide film may be formed by oxidizing amorphous silicon by heating the substrate in an atmosphere containing an oxidizing gas. When the present technology is used, it is possible to greatly change the thickness of the formed silicon oxide film.

Further, a silicon oxide film may be formed in a plasma containing an oxidizing gas. When the present technology is used, a silicon oxide film can be formed at room temperature, so that the substrate can be quickly transferred. In addition, when a silicon oxide film is formed using plasma, it is also possible to introduce only excited species of oxygen excited by plasma to the amorphous silicon surface, and when the present technology is used, It has a feature that impurities are less likely to be contaminated than when a substrate is introduced into plasma.

After the formation of the silicon oxide film on the surface of the amorphous silicon by the above-described method, the substrate is immediately and continuously transferred to the laser annealing apparatus to perform the laser annealing.

At this time, the removal of the natural oxide film on the surface of the amorphous silicon, the formation of the oxide film, and the laser annealing treatment can be performed continuously by connecting the devices in series in a device having a filter for removing impurities such as boron. desirable.

Further, by partially removing the silicon oxide film present on the surface of the amorphous silicon film by the following method,
It is possible to control the characteristics of the polycrystalline silicon film obtained after laser annealing.

A pattern covering the thin film transistor portion other than the pixel portion with a resist is formed by photolithography. Subsequently, the oxide film is removed with dilute hydrofluoric acid having a concentration of about 1%. Thereafter, the resist on the substrate is removed using an alkaline resist removing solution. By performing these series of photolithography steps, it is possible to selectively remove only the silicon oxide film on the amorphous silicon forming the pixel portion. Using this technology, it is possible to change the thickness of the silicon oxide film present on the amorphous silicon surface in response to the case where the required transistor characteristics are different in the substrate plane, and to obtain the polycrystal obtained after laser annealing. The characteristics of the silicon film can be controlled.

By using this technique, the thickness of the silicon oxide film existing on the surface of the amorphous silicon before the laser annealing and the concentration of boron existing in the polycrystalline silicon formed after the laser annealing are reduced to 5 × 10 ¹⁷ cm ^−3. It is possible to reduce the following.

After the polycrystalline silicon is formed, the polysilicon film is patterned into a desired pattern by performing photolithography and etching. By this step, the island-shaped polycrystalline silicon 404 shown in FIG. 4C is formed. As shown in FIG. 4D, a silicon oxide film is formed to a thickness of about 100 nm by a plasma CVD method using a TEOS gas as a source gas to form a gate insulating film 405.

After a MoW alloy serving as a gate electrode is formed to a thickness of about 400 to 500 nm by a sputtering method, and then patterned by photolithography and etching, a gate electrode 406 shown in FIG. 4E is formed. In this embodiment, Mo is used as the gate electrode.
Although a W alloy is used, a stacked structure of Ta and MoW may be used.

After that, a photolithography process is performed, and a low concentration boron implantation of a dose of about 5 × 10 ¹² cm ⁻² is performed only in a desired region using a resist mask by ion doping, thereby forming a p− region. To form
The n − region 407 can be formed by performing low-concentration phosphorus implantation at a dose of about 5 × 10 ¹² cm ⁻² .

Thereafter, a silicon oxide film is formed to a thickness of about 500 nm by a plasma CVD method. Thereafter, the silicon oxide film is anisotropically etched by a dry etching method under conditions that a sufficient etching selectivity with respect to the polycrystalline silicon can be ensured, and the side wall 408 of the silicon oxide film is self-aligned with the side of the gate electrode. To form

In this embodiment, the side wall is formed of a silicon oxide film, but may be formed of a stacked film of a silicon oxide film and a silicon nitride film. When the insulating film side wall is a stacked film of a silicon oxide film and a silicon nitride film, processing variations in the width of the side wall can be reduced, and thus the LDD length can be controlled with high precision.

Thereafter, when forming the p + region, a photolithography step is performed, and a dose of 1 × 1 is applied only to a desired region by ion doping using a resist mask.
A p + region is formed by implanting boron at a high concentration of about 0 ¹⁴ cm ⁻² , and similarly, a photolithography process is performed when forming an n + region, and only a desired region is formed using a resist mask. An n + region can be formed by performing high-concentration phosphorus implantation at a dose of about 1 × 10 ¹⁴ cm ⁻² using an ion doping method.

In this embodiment, the P + and N + regions are formed in a self-aligned manner by forming sidewalls with a silicon oxide film.
It is also possible to form +, N + regions.

As shown in FIG. 4F, in this step, after forming a sidewall of a silicon oxide film formed in a self-aligned manner on the side of the gate electrode, a source and a drain are implanted by injecting a high concentration of dopant. The region 209 can be formed in a self-aligned manner.

Finally, an interlayer insulating film 410 is formed, and source and drain electrodes 411 are formed through contact holes provided in the source and drain regions.

The thin film transistor formed as described above
It can be used as an array substrate composed of thin film transistors, or it can be used as an active drive type liquid crystal display composed of thin film transistors. An active matrix drive having an organic EL element and a thin film transistor for use connected to the organic EL element can be used. It is also possible to use the organic EL display device of the type.

In the embodiment, the thin film transistor is formed using a polycrystalline silicon film. However, a compound such as polycrystalline silicon germanium or polycrystalline silicon germanium carbon may be used, or the thin film transistor may be formed only in the source / drain regions. Can also be used.

[0042]

As described above, by controlling the average roughness of the polycrystalline silicon film constituting the thin film transistor of the present invention and the concentration of boron contained in the polycrystalline silicon, a transistor having a sufficient driving current can be stabilized. Can be obtained. In the case where two types of thin film transistors, a circuit portion and a pixel portion, are formed over the same substrate, controlling the average roughness of the surface of the polycrystalline silicon film forming each of the thin film transistors enables the image quality characteristics and the circuit characteristics to be improved. An excellent thin film transistor can be formed over the same substrate. The average roughness of the polycrystalline silicon film can be controlled by changing the thickness of the silicon oxide film on the amorphous silicon surface before laser annealing.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the dependence of on-current and off-current of a thin film transistor on a polycrystalline silicon film thickness

FIG. 2 is a diagram illustrating laser power dependence of the surface roughness of a semiconductor film.

FIG. 3 illustrates the dependence of transistor mobility on laser power.

FIG. 4 is a diagram illustrating a process of forming a polycrystalline silicon thin film transistor.

[Explanation of symbols]

 Reference Signs List 401 Glass substrate 402 Silicon oxide film 403 Amorphous silicon film 404 Island-like polycrystalline silicon 405 Gate insulating film 406 Gate electrode 407 n-region 408 Sidewall 409 Source and drain region 410 Interlayer insulating film 411 Source and drain electrode

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/20 H01L 29/78 612B 618F 627G F term (Reference) 2H092 GA59 JA25 KA04 KA06 KA10 MA08 MA27 MA30 MA41 NA24 5C094 AA02 AA21 BA03 BA29 BA43 CA19 CA24 DA14 DA15 EA04 EA05 EA07 EB02 5F052 AA02 CA04 CA10 DA02 DB03 EA01 EA15 JA01 5F110 AA08 AA30 BB02 CC02 DD02 DD13 EE04 EE06 EE14 EE32 GG12 GG01 HGG PP35 QQ11

Claims (30)

[Claims] An average roughness of a polycrystalline semiconductor in a channel portion of a thin film transistor formed on an insulating substrate is 5n.
m and 10 nm or less. 2. The thin film transistor formed on an insulating substrate has a boron concentration of 5 in a channel portion of a polycrystalline semiconductor.
2. The thin film transistor according to claim 1, wherein the thickness is not more than × 10 ¹⁷ cm ⁻³ . 3. A thin film transistor formed of a polycrystalline semiconductor having two functions of a pixel portion and a circuit portion formed on an insulating substrate, wherein the thickness of the polycrystalline semiconductor is 40 nm or more and 60 nm or less. The average roughness of the polycrystalline semiconductor surface in the channel portion of the thin film transistor constituting the circuit portion is 4 nm or less, and the average roughness of the polycrystalline silicon in the channel portion of the thin film transistor constituting the circuit portion is 5 nm or less.
A thin film transistor having a thickness of 10 nm or more and 10 nm or less. 4. A thin film transistor formed on an insulating substrate, wherein the polycrystalline semiconductor channel portion has a boron concentration of 5
4. The thin film transistor according to claim 3, wherein the thickness is not more than × 10 ¹⁷ cm ⁻³ . 5. The thin film transistor according to claim 1, wherein said polycrystalline semiconductor is formed of polycrystalline silicon. 6. An array substrate having a thin film transistor, wherein the thickness of the polycrystalline semiconductor in the thin film transistor forming the array substrate is 40 nm or more and 60 nm or less, and the average roughness of the polycrystalline semiconductor in the channel portion is 5 nm or more and 10 nm or less. An array substrate having a thin film transistor, wherein: 7. The array substrate according to claim 6, further comprising a thin film transistor, wherein a boron concentration in a channel portion of the polycrystalline semiconductor is 5 × 10 ¹⁷ cm ⁻³ or less. 8. An array substrate having a thin film transistor, wherein the thin film transistor forming the array substrate is formed of a polycrystalline semiconductor having two functions of a pixel portion and a circuit portion, and the thickness of the polycrystalline semiconductor is 40 nm or more. 60 nm
The average roughness of the polycrystalline semiconductor surface of the channel portion of the thin film transistor constituting the pixel portion is 4 nm or less, and the average roughness of the polycrystalline silicon of the channel portion of the thin film transistor constituting the circuit portion is 5 nm or more.
An array substrate having a thin film transistor having a thickness of 0 nm or less. 9. The array substrate according to claim 8, further comprising a thin film transistor, wherein a boron concentration in a channel portion of the polycrystalline semiconductor is 5 × 10 ¹⁷ cm ⁻³ or less. 10. The thin film transistor according to claim 6, wherein said thin film transistor is formed of polycrystalline silicon.
An array substrate according to any one of the above. 11. An active matrix drive type liquid crystal display device having a thin film transistor, wherein the thickness of the polycrystalline semiconductor in the thin film transistor is 40 nm.
An active matrix driving type liquid crystal display device including a thin film transistor, wherein the average roughness of the polycrystalline semiconductor in the channel portion is 5 nm or more and 10 nm or less. 12. The boron in a channel portion of the polycrystalline semiconductor.
5 × 10 density¹⁷cm ^-3Characterized by the following
The active of claim 11, comprising a membrane transistor.
Matrix drive type liquid crystal display device. 13. An active matrix driving type liquid crystal display device having a thin film transistor, wherein the thin film transistor is formed by a transistor having two functions of a pixel portion and a circuit portion, and the thickness of the polycrystalline semiconductor is 40 nm or more and 60 nm or more. The average roughness of the polycrystalline semiconductor surface of the channel portion in the thin film transistor forming the pixel portion is 4 nm or less, and the average roughness of the polycrystalline silicon of the channel portion in the thin film transistor forming the circuit portion is 5 nm or more and 10 nm or less. An active matrix drive type liquid crystal display device having a thin film transistor. 14. The boron in a channel portion of the polycrystalline semiconductor.
5 × 10 density¹⁷cm ^-3Characterized by the following
14. The active of claim 13, comprising a membrane transistor.
Matrix drive type liquid crystal display device. 15. The thin film transistor according to claim 11, wherein said thin film transistor is formed of polycrystalline silicon.
5. The active matrix drive type liquid crystal display device according to any one of 4. 16. An active matrix drive type organic EL display device having an organic EL element and a thin film transistor connected to the organic EL element, wherein a thickness of a polycrystalline semiconductor in a channel portion of the thin film transistor is 40 nm or more and 60 nm or more. An organic EL display device having a thin film transistor, wherein the average roughness of the polycrystalline semiconductor is 5 nm or more and 10 nm or less. 17. The organic EL display device according to claim 16, further comprising a thin film transistor, wherein a boron concentration of a channel portion of the polycrystalline semiconductor in the thin film transistor is 5 × 10 ¹⁷ cm ⁻³ or less. 18. An active matrix drive type organic EL display device having an organic EL element and a thin film transistor connected to the organic EL element, wherein the thin film transistor is formed by a transistor having two functions of a pixel portion and a circuit portion. The thickness of the polycrystalline semiconductor is 40 nm or more and 60 nm or less, the average roughness of the polycrystalline semiconductor surface of the channel portion in the thin film transistor forming the pixel portion is 4 nm or less, and the channel in the thin film transistor forming the circuit portion is formed. An organic EL display device having a thin film transistor, wherein an average roughness of a portion of the polycrystalline silicon is 5 nm or more and 10 nm or less. 19. An active matrix drive type organic EL display device having an organic EL element and a thin film transistor connected to the organic EL element, wherein the thin film transistor has two functions of a pixel portion and a circuit portion. An organic EL display device having a thin film transistor, wherein the boron concentration in the channel portion of the polycrystalline semiconductor is 5 × 10 ¹⁷ cm ⁻³ or less. 20. The thin film transistor according to claim 16, wherein said thin film transistor is formed of polycrystalline silicon.
Organic E having the thin film transistor according to any one of the above items 9
L display device. 21. An active layer in a thin film transistor, wherein the active layer is formed of polycrystalline silicon, and the step of irradiating the amorphous silicon with excimer laser light to crystallize the amorphous silicon is performed before the crystallization. A method for manufacturing a thin film transistor, wherein a silicon oxide film having a thickness of 1 nm to 5 nm is formed on an amorphous silicon surface and crystallized. 22. An active layer of the thin film transistor is formed of polycrystalline silicon, and the thin film transistor is formed of a transistor having two functions of a pixel portion and a circuit portion. When forming polycrystalline silicon by the step of irradiating the silicon layer, a silicon oxide film having a thickness of 1 nm or less is formed on the surface of the amorphous silicon forming the pixel portion, and the surface of the amorphous silicon forming the circuit portion is formed. Film thickness of 1 nm or more and 5 nm
A method for manufacturing a thin film transistor, comprising forming and crystallizing the following silicon oxide film. 23. The method according to claim 21, wherein the silicon oxide film on the surface of the amorphous silicon is formed using active oxygen. 24. The method according to claim 21, wherein the silicon oxide film on the surface of the amorphous silicon is formed using ozone water. 25. The method according to claim 21, wherein the silicon oxide film on the surface of the amorphous silicon is formed using ultraviolet light. 26. The method according to claim 21, wherein the silicon oxide film on the surface of the amorphous silicon is formed in an oxidizing atmosphere. 27. The method according to claim 21, wherein the silicon oxide film on the surface of the amorphous silicon is formed in a plasma containing oxygen. 28. The thin film transistor according to claim 21, wherein a natural oxide film formed on the amorphous silicon is removed before forming a silicon oxide film on the surface of the amorphous silicon. Production method. 29. The method of manufacturing a thin film transistor according to claim 21, wherein said polycrystalline silicon has a thickness of 40 nm or more and 60 nm or less. 30. The thin film transistor according to claim 1, wherein the thickness of the polycrystalline semiconductor is 40 nm or more and 60 nm or less.