JP2002076356A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JP2002076356A
JP2002076356A JP2000264885A JP2000264885A JP2002076356A JP 2002076356 A JP2002076356 A JP 2002076356A JP 2000264885 A JP2000264885 A JP 2000264885A JP 2000264885 A JP2000264885 A JP 2000264885A JP 2002076356 A JP2002076356 A JP 2002076356A
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Japan
Prior art keywords
transparent
element
semiconductor
semiconductor device
doped
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000264885A
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Japanese (ja)
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JP4089858B2 (en
Inventor
Masashi Kawasaki
Hideomi Koinuma
Hideo Ono
英男 大野
雅司 川崎
秀臣 鯉沼
Original Assignee
Japan Science & Technology Corp
科学技術振興事業団
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Priority to JP2000264885A priority Critical patent/JP4089858B2/en
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Abstract

(57) [Problem] To provide a transparent transistor which does not require heat treatment by using a transparent channel layer such as zinc oxide doped with a 3d transition metal element. SOLUTION: The channel layer 11 is formed of a transparent semiconductor such as zinc oxide ZnO doped with a 3d transition metal element. Source 12, drain 13 or gate 14
, A transparent electrode is used for all or a part of each of them.
As the transparent electrode, for example, a transparent conductive material such as conductive ZnO doped with a group III element or the like is used. As the gate insulating layer 15, for example, a transparent insulating material such as insulating ZnO doped with a monovalent element, a group V element, or a 3d transition metal element is used. Substrate 16
A material that is relatively weak to heat treatment, such as plastic, polyethylene, or a polymer film, can be used.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a semiconductor device in which a transparent transistor and a transparent transistor are stacked, and a semiconductor in which the transparent transistor is applied for driving a light emitting element or reading / writing a memory. About the device. In the present invention, the concept of “transparent” includes the concept of “transparent or translucent” for the sake of simplicity.

[0002]

2. Description of the Related Art High performance thin film transistors on a substrate are:
The present invention can be used for a wide variety of applications in the field of optical devices, such as a driving device for a light emitting device such as a surface emitting laser and an electroluminescence device, a memory, and the like, mainly for application to a liquid crystal display device.

In general, a thin film transistor using amorphous silicon, polycrystalline silicon, or the like is used as a transistor for driving a liquid crystal display device or the like. Since these materials have photosensitivity in the visible light region, carriers are generated by light and the resistance is reduced. Therefore, when light is emitted, the transistor may be turned on although the transistor is supposed to be controlled to be turned off. Therefore, in order to keep the transistor in the off state, conventionally, a light blocking layer such as a metal film is used to prevent a decrease in carrier resistance due to light.

[0004] In general, liquid crystal display devices are widely used in node type personal computers and the like, and energy saving, high luminance, and miniaturization are required. To this end, it is effective to increase the ratio of the effective display area to the unit pixel. However, as described above, in a transistor for driving or the like, a light blocking layer such as a metal thin film is formed, so that the area ratio (aperture ratio) of a pixel decreases. Therefore, in order to develop a display element with a high luminance, it is necessary to reduce the transistor area by improving the performance of the transistor or to increase the luminance of the backlight. However, measures taken to improve the performance of transistors have a limit on yield and increase costs. In addition, energy consumption increases with measures taken to make the backlight brighter.

[0005] The present inventors have previously reported that zinc oxide (Zn
Research on transistors using O) as a semiconductor has revealed that transparent thin film transistors can be formed on glass substrates. Patent applications are pending for a transparent thin film transistor using zinc oxide as a channel (Japanese Patent Application Nos. 10-326889 and 11-0-0).
No. 82043).

The present inventors have previously reported that a transparent zinc oxide field effect transistor (ZnO-T
FT), an ON / OFF ratio of 4.5 × 10 5 , a threshold power of 1.3 V, and a field-effect mobility of 150 cm 2 / V 3
Was reported (Seven species et al., 2000.
3 Proceedings of the Japan Society of Applied Physics, 29P-YL-16).

[0007] As described above, since it is now possible to control the orientation and valence electrons of zinc oxide, which has been difficult in the past, the inventors of the present application have already filed a part or a part using a transparent channel layer of zinc oxide or the like. All provided transparent transistors. In other words, by using a material such as transparent zinc oxide for the channel layer (conductive layer), it is possible to prevent light sensitivity in the visible light region, eliminate the need for forming a light-shielding layer, and reduce the necessity of forming a display portion such as a liquid crystal display device. A transistor having an improved area ratio is provided.

[0008]

Generally, in a thin film transistor, not only the mobility but also the on / off ratio (the amount of o / o when the drain current is switched by the gate voltage).
The ratio of the n-state current to the off-state leakage current) is an important factor in utilizing the device. However, in order to obtain a sufficient on-off ratio, it is usually necessary to semi-insulate ZnO having n-type electrical conductivity. Therefore, conventionally, doping of ZnO with Li has been attempted. Also in this case, the desired on-off ratio (for example, 1
0 5 or more) and mobility (mobility) (for example, 100 cm
2 / Vs or more) requires annealing at a high temperature (for example, about 500 ° C.). Then, it is necessary to select various materials such as a substrate material for withstanding the annealing treatment.

In addition, as described in US Pat. No. 5,744,864, there has been an attempt to mix an impurity into a channel layer to make a degenerated semiconductor so that a current can easily flow. However, in this case, it was difficult to suppress the leak current in the off state.

In view of the above points, the present invention provides a transparent channel material such as ZnO by adding a 3d transition metal element such as Ni to increase or decrease the resistance to a relatively low temperature (for example, room temperature). The desired on
It is an object of the present invention to obtain a −off ratio and a mobility to form a very high performance thin film transistor that surpasses conventional performance. Another object of the present invention is to form a transparent electronic circuit using a material that cannot withstand conventional heat treatment, such as a plastic substrate or a polymer material substrate. It is also an object of the present invention to significantly improve semiconductor performance and process tolerances.

Another object of the present invention is to use a transparent transistor for various applications in the field of optical devices, such as for driving a light emitting element such as a surface emitting laser or an electroluminescent element, or for a memory. . Further, the present invention provides
It is an object of the present invention to provide a semiconductor device used as a transparent electronic element for various wide applications.

[0012]

According to a first solution of the present invention, zinc oxide ZnO, cadmium oxide CdO, Z
using any of compounds or mixtures of nO and IIB, IIA or VIB elements, 3d
A transparent channel layer doped with a transition metal element or a rare earth element or an impurity for increasing the resistance without losing the transparency of the transparent semiconductor, and any one of a Group III element, a Group VII element, a Group I element, or a Group V element. Alternatively, a transparent conductive material such as undoped conductive ZnO, a transparent conductor such as In 2 O 3, SnO 2, or (In—Sn) O x , or a non-transparent electrode material is used for all or part thereof. , A source, a drain, a gate, and an insulating substrate on which the transparent channel layer is formed.

[0013] The semiconductor device may further include a region continuous with the drain or source of the semiconductor device, or a region of another semiconductor connected to the drain or source, and a semiconductor layer bonded to the region. A light emitting unit to be formed may be provided. The semiconductor device may further include a region continuous with the drain or source of the semiconductor device, or a region of another semiconductor or conductor connected to the drain or source, and the gate insulating layer or another region on the region. A capacitor formed by an insulating layer and a semiconductor layer or a conductor layer on the gate insulating layer or the other insulating layer may be provided.

According to a second solution of the present invention, a group III element or a group VII element is doped, and a 3d transition metal element or a rare earth element or an impurity which increases the resistance without losing the transparency of the transparent semiconductor is doped. Emitter and collector formed of a transparent n-type semiconductor such as ZnO, or
A base and a transparent p-type semiconductor such as ZnO doped with a group I element or a group V element, and further doped with a 3d transition metal element or a rare earth element or an impurity which increases the resistance without losing the transparency of the transparent semiconductor. Base, or an emitter and a collector, and a transparent conductive material such as conductive ZnO doped with or not doped with any of a group III element, a group VII element, or a group I element, In 2 O 3, SnO 2, or (In -sn) O x transparent conductor such as, or a non-transparent electrode material, its use in whole or in part, the base, respectively formed on the emitter and collector, with a base electrode and an emitter electrode and a collector electrode Provide a semiconductor device.

The semiconductor device may further include a region continuous with the collector or the emitter of the semiconductor device, or a region of another semiconductor connected to the collector or the emitter, and a semiconductor layer bonded to the region. A light emitting unit to be formed may be provided. The semiconductor device further includes a region continuous with the collector or emitter of the semiconductor device, or a region of another semiconductor or conductor connected to the collector or emitter; an insulating layer on the region; and the insulating layer. A capacitor formed by the above semiconductor layer or conductor layer may be provided.

Further, a plurality of semiconductor devices as described above are provided, and all or a part of the wiring between the plurality of transistors is doped with any one of a group III element, a group VII element, a group I element, and a group V element. Alternatively, a transparent conductive material such as undoped conductive ZnO, a transparent conductor such as In 2 O 3, SnO 2, or (In—Sn) O x , or a non-transparent electrode material may be used.

The semiconductor device may further comprise a transparent conductive material such as conductive ZnO doped with or not doped with any of a group III element, a group VII element, a group I element, or a group V element, In 2 O 3 or SnO 2.
2 or (In-Sn) may be provided with an inductor which is formed of a transparent conductor such as O x.

A plurality of semiconductor devices may be arranged in a matrix, and each transistor may drive a capacitor or a light emitting unit. Further, the present invention provides a semiconductor device applied to a semiconductor device, a light-emitting element, a memory, and the like in which transparent transistors are stacked.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (1) A field effect transistor (Fi)
eld Effect Transistor (FET) FIG. 1 shows a cross-sectional view of a first embodiment of a transistor according to the present invention. As shown in FIG. 1A, the transistor according to the first embodiment relates to an FET, and includes a channel layer 11, a source 12, a drain 13, a gate 14, a gate insulating layer 15, and a substrate 16. Substrate 1
The channel layer 11 is formed on 6 via a gate 14 and a gate insulating layer 15. In the channel layer 11, a gate insulating layer 15, a source 12, and a drain 13 are formed.

FIG. 1B shows a modification of the first embodiment. This transistor is mounted on a substrate 16
The gate 14 and the gate insulating layer 15 are formed. further,
In the channel layer 11, a source 12 and a drain 13 are formed on the upper side by an ohmic junction, and a gate 14 is formed on a lower side by a Schottky junction. In this example, there is no gate insulating layer 15 between the channel layer and the gate 14 as compared with FIG.

The material of each component will be described below. First, the channel layer 11 is formed of a transparent semiconductor. As a material of the transparent channel layer, for example, zinc oxide ZnO, cadmium oxide CdO, and ZnO are used to adjust a lattice constant, a band gap, and the like.
d, Hg) or IIA element (Be, Mg, Ca, S
r, Ba, Ra) or VIB element (S, Se, T)
e, a compound or a mixture to which Po) is added, and doped with a 3d transition metal element, a rare earth element, or an impurity that increases the resistance without losing the transparency of the transparent semiconductor. Examples of the addition of the IIB element include cadmium zinc oxide Cd x Zn 1-x O, and examples of the addition of the IIA element include magnesium zinc oxide Mg.
x Zn 1-x O and the like. The resistivity of the channel layer can be increased by doping a 3d transition metal element, a rare earth element, or an impurity which increases the resistance without losing the transparency of the transparent semiconductor. As the 3d transition metal element,
For example, Sc, Ti, V, Cr, Mn, Fe, Co, N
i and Cu. As an example, Ni, Mn, cobalt, iron or the like in an appropriate amount (for example, about 2% of Ni),
Can be doped.

The channel layer 11 is doped with a plurality of types of 3d transition metal elements, rare earth elements, or impurities that increase the resistance without losing the transparency of the transparent semiconductor at a predetermined ratio or doping amount. Is also good. For example, Ni and Mn can be doped in appropriate amounts. Further, the channel layer 11 does not need to have a uniform distribution of the doping amount of the 3d transition metal element, the rare earth element, or the impurity that increases the resistance without losing the transparency of the transparent semiconductor. At this time, gradation may be applied to the substrate 16 in parallel, vertically, or in both directions. Furthermore, in addition to the gradation of uniformly increasing or decreasing the doping concentration, the region is appropriately increased or decreased, or the concentration is adjusted discretely or stepwise, or in a layer state having a plurality of different concentrations, An appropriate non-uniform concentration distribution can be obtained.

FIG. 2 is an explanatory diagram showing the relationship between the doping amount of the 3d transition metal element and the resistance value. In addition, the plot of black filling indicates that the doping element is completely (substantially completely) dissolved, and the plot of black filling does not indicate that the doping element is not completely dissolved. This is data without heat treatment. Compared to the resistance of undoped ZnO, Z doped with a 3d transition metal element
nO can exhibit a sufficiently high resistance without any heat treatment. For example, Mn, Sc, Cr and the like can have a relatively high resistance value even at a low addition concentration.

Second, a transparent electrode is used for all or a part of each of the source 12, the drain 13 and the gate 14. As the transparent electrode, for example, a group III element (B,
Al, Ga, In, Tl), Group VII elements (F, Cl, B)
r, I), Group I elements (Li, Na, K, Rb, Cs),
A transparent conductive material such as conductive ZnO doped with any of group V elements (N, P, As, Sb, Bi) or conductive ZnO not doped with various elements is used. here,
When doping these elements, the doping amount can be appropriately set (for example, n-type highly doped n-type).
++ -ZnO or the like can be used, but is not limited to this). Further, as the source 12, the drain 13, or the gate 14, In 2 O 3 , SnO 2 ,
It can be used transparent conductor, such as (In-Sn) O x. Further, other than the transparent material, a metal such as Al and Cu, or a non-transparent electrode material such as highly doped semiconductor polysilicon may be used. Further, a partially transparent material may be used, and a partially non-transparent material may be used.

Third, as the gate insulating layer 15, for example,
For example, a monovalent element or a group V element or 3d
Insulating ZnO, SiN, Si doped with transition metal element
O2And other transparent insulating materials. Take a single valence
Examples of possible elements include, for example, Group I elements (Li, Na,
K, Rb, Cs), Cu, Ag, Au and the like. V-group
Elements include N, P, As, Sb, Bi and the like. Game
In addition, as the insulating layer 15,2O3, Mg
O, CeO2, ScAlMgO4, SiO2, Etc transparent
An insulating oxide can be used. In addition, polymers
Transparent insulator such as film, vinyl, plastic, etc.
May be used. Note that the gate insulating layer 15 is
The material of the layer 11 and the high insulating material with good lattice matching
preferable. When zinc oxide is used as the channel layer, for example,
ScAlMgO4Are used. These are all aspects
Lattice constants within 1% are consistent with each other.
Xial growth is possible. Also, the gate insulating layer 15
By using a ferroelectric material, the transistor
It may itself have a memory function. strength
As a dielectric material, for example, Zn1-xLixO, Z
n1-x(LiyMg xy) O etc. can be used
You.

The SiN is, for example, a plasma CV
D, it can be created by a process such as sputtering.
SiO 2 can be formed, for example, by processes such as plasma CVD, sputtering, spin-on-glass, and the like.

Fourth, the substrate 16 is mainly made of an insulating material. In particular, a material relatively weak to heating can be used. For example, polyethylene, polyethylene terephthalate (PET), plastics, polymer films, various types of polymer materials glass, sapphire, papers, and flexible and transparent insulating substrates can be used. For example, a transparent substrate may be used for applications requiring transparency, such as a liquid crystal display screen. Also, the substrate is
Depending on the application, a non-transparent material may be used.

(2) Characteristics First, an example of a method for manufacturing a transistor according to the present invention used in an experiment will be described. Here, description will be made according to the configuration of FIG. Glass on which ITO (indium-doped tin oxide) (eg, 120 nm) is formed as the gate electrode 14;
Substrate 16 of plastic, polymer, etc. (eg, 0.7n
m). The gate insulating layer 15 having an appropriate thickness (for example, 400 to 500 nm) is formed on the ITO substrate by, for example, a plasma CV such as amorphous SiN x or SiO x.
D, Al 2 O 3 , MgO or the like is formed by vapor deposition or sputtering. As described above, by forming the gate insulating layer 15 by a method in which the baking step is omitted, a semiconductor device can be manufactured at a low temperature such as room temperature. Thereafter, Z added with Ni, for example, as a 3d transition metal element by a pulse laser deposition CVD method, a sputter link method, or the like.
A channel layer 11 of nO was deposited at a temperature of 50 to 150 nm at room temperature. The growth condition is, for example, an oxygen partial pressure of 1 × 10 −1 to
rr, the substrate temperature is about 10 to 30 ° C. Further, after processing the channel layer 11 by wet etching or dry etching, each electrode of the Al source 12 and the drain 13 as an ohmic electrode is deposited, and the channel length and the channel width are set to, for example, 30 μm and 150 μm, respectively.
Was manufactured. In addition,
The gate insulating layer 15 can also be formed by spin-coating SOG and performing low-temperature baking. In this case, the highest temperature in the production is in the low temperature baking step, and can be kept low. The above manufacturing method is an example, and each material, various parameters, and steps can be appropriately changed.

Here, as a comparison for explaining the remarkable effect of the present invention, FIG. 3 shows an explanatory diagram of the conventional transistor characteristics. FIG. 3A shows voltage-current characteristics between the source and the drain when the gate voltage Vg is varied from -5 to 5V. In this diagram, the carrier is depleted
The current has flowed even with the negative gate voltage that should have been. Originally, it sticks to the horizontal axis (drain current I
(d approaches 0). FIG.
(B) shows that the drain current Id flowing when the source-drain voltage Vds is fixed at 10 V is changed to the gate voltage Vg.
Is displayed as a function of. In this figure, the drain current Id is modulated at most twice even when the gate voltage Vg is changed. This is because donors that emit current such as oxygen vacancies or interstitial Zn are present, and a large number of electrons are injected into the channel ZnO, so that they cannot be completely depleted even when an electric field is applied. It is believed that there is. Generally, Li is a monovalent cation and Zn
It is known as an additive for compensating electrons in O. Even in a transistor actually made by adding Li, the drain current Id may not be turned off even if the gate voltage Vg is turned off or minus if the annealing treatment is not performed. Note that, for example, when annealing is performed at about 600 ° C., good transistor characteristics are exhibited.

As described above, conventionally, since the resistance of the channel layer cannot be sufficiently increased, a drain current of the same order as in the on state flows even in the off state. Such characteristics of a transistor appear when pure ZnO is used for a channel layer, or when heat treatment (annealing at 600 ° C.) is not performed even when Li is added to increase the resistivity.

Next, FIG. 4 shows a characteristic diagram (1) of the transistor of the present invention. This shows the drain current Id when the drain-source voltage Vds is changed at each gate voltage Vg. As shown, the gate voltage V
With respect to the change in g, the drain current Id is amplified,
It can be confirmed that pinch-off occurs when the drain-source voltage Vds is around 4 to 6 V. As described above, in the transistor of the present invention, favorable on-off characteristics and pinch-off can be observed without annealing in a channel layer forming step or the like.

FIG. 5 shows a characteristic diagram (2) of the transistor of the present invention. FIGS. 5A and 5B show a certain drain
When the source voltage Vds (eg, 10 V), the gate voltage V
The drain current Id and its square root Id when g is changed are shown. FIG. 5 (A), obtained by the easily visible shape of the on / off ratio, in the off state 10 -10 A,
In the ON state, an on / off ratio (eg, 2 × 10 5 ) of 10 −5 A and 5 digits or more is realized. FIG. 5B is a graph for calculating a threshold value at which the transistor is turned on. In this example, a threshold value of 1.4 V was obtained. In addition, the transistor of the present invention was confirmed to have improved field-effect mobility as compared with Li-doped ZnO.

(3) FET of Another Embodiment FIG. 6 is a sectional view of a transistor according to a second embodiment of the present invention. As shown in FIG. 6A, the transistor according to the first embodiment relates to an FET, and includes a channel layer 11, a source 12, a drain 13, a gate 14, a gate insulating layer 15, and a substrate 16. Substrate 1
A channel layer 11 is formed on 6. In the channel layer 11, a gate insulating layer 15, a source 12, and a drain 13 are formed. The gate 14 is formed on the gate insulating layer 15.

FIG. 6B shows a modification of the first embodiment. This transistor is mounted on a substrate 16
A channel layer 11 is formed. Further, the channel layer 11
The source 12 and the drain 13 are formed by an ohmic junction, and the gate 14 is formed by a Schottky junction. In this example, an appropriate gap is provided between the gate 14 and the source 12 and the drain 13 because there is no gate insulating layer 15 as compared with FIG.

FIG. 7 shows a third embodiment of the transistor according to the present invention.
1 shows a cross-sectional view of the embodiment. The transistor according to the third embodiment shown in FIG. 7A relates to an FET, and includes a channel layer 21, a source 22, a drain 23, a gate 24, a gate insulating layer 25, and a substrate 26. Substrate 2
6, a source 22 and a drain 23 are formed. A channel layer 21 is formed so as to cover these. A gate insulating layer 25 is further formed on the channel layer 21. The gate 24 is formed on the gate insulating layer 25. Here, the gate 24, the gate insulating layer 25, and the channel layer 21 have a MIS structure.

FIG. 7B is a sectional view showing a modification of the third embodiment of the transistor according to the present invention. This transistor is a modification of the second embodiment and is different from the transistor in the second embodiment in FIG.
In the transistor shown in FIG. 1, the gate insulating layer 25 is not formed, and the gate 24 and the channel layer 21 have a Schottky junction structure. In the case where the gate insulating layer 25 is provided as shown in FIG. On the other hand, when the gate insulating layer 25 is not provided as shown in FIG. 7B, the withstand voltage between the gate and the source and between the gate and the drain are low. In this case, the manufacturing process is simplified.

FIG. 8 shows a fourth example of the transistor according to the present invention.
1 shows a cross-sectional view of the embodiment. The transistor according to the fourth embodiment relates to an FET, and includes a channel layer 3
1, a source 32, a drain 33, a gate 34, a gate insulating layer 35, and a substrate 36. The channel layer 31 is formed on the substrate 36. A gate insulating layer 35 is formed on the channel layer 31, and a gate 34 is formed on the gate insulating layer 35. The source 32 and the drain 33 can be formed by, for example, diffusion or ion implantation using the gate insulating layer 35 as a mask. Further, as a modification of this embodiment, the gate insulating layer 35 can be omitted by appropriately setting the size of the gate 34.

In the above-described second to fourth embodiments, the materials of the components are the same as those described in the first embodiment.

(4) Bipolar Transistor FIG. 9 is a sectional view of a transistor according to a fifth embodiment of the present invention. The transistor according to the fifth embodiment includes:
It relates to a bipolar transistor and has a base 41,
An emitter 42 and a collector 43, a base electrode 44, an emitter electrode 45 and a collector electrode 46, and a substrate 47 are provided.

In an npn transistor, the emitter 42
And the collector 43 is formed of an n-type transparent semiconductor,
The base 41 is formed of a p-type transparent semiconductor. The base electrode 44, the emitter electrode 45, and the collector electrode 46
They are formed on the base 41, the emitter 42 and the collector 43, respectively. Similarly, in a pnp transistor, as shown in parentheses, the emitter 42 and the collector 43
Is formed of a p-type transparent semiconductor, and the base 41 is formed of n
It is formed of a transparent semiconductor. Since a bipolar transistor can pass a large current as compared with an FET, it is particularly advantageous when a large current is required for driving a laser or the like.

Hereinafter, the material of each component will be described. As the n-type transparent semiconductor, for example, n-type ZnO is used. The n-type ZnO is, for example, a group III element (B, A
1, Ga, In, Tl), Group VII elements (F, Cl, B
r, I), and ZnO doped with a 3d transition metal element. As a p-type transparent semiconductor, for example,
Form ZnO is used. The p-type ZnO is, for example, a group I element (Li, Na, K, Rb, Cs) or a group V element (N,
ZnO doped with P, As, Sb, Bi) and further doped with a 3d transition metal element. The doping amount of each of these elements can be set to an appropriate amount according to the dimensions, thickness, integration degree, performance and the like of the device.

The materials of the base electrode 44, the emitter electrode 45, and the collector electrode 46 are the same as those of the source 12, drain 13, or gate 14 described in the first embodiment. That is, as the transparent electrode, for example, a group III element (B, Al, Ga, In, Tl), a group VII element (F, Cl, Br, I), a group I element (Li, Na, K,
A transparent conductive material such as conductive ZnO doped with any one of Rb and Cs) or conductive ZnO not doped with various elements is used. Here, when doping these elements, the doping amount can be appropriately set (for example,
High-concentration n-type doped n ++ -ZnO or the like can be used, but is not limited thereto. Further, as the base electrode 44, the emitter electrode 45, and the collector electrode 46, In 2 O 3 , SnO 2 , (In-S
transparent conductor such as n) O x can be used. Further, other than the transparent material, a metal such as Al and Cu, or a non-transparent electrode material such as highly doped semiconductor polysilicon may be used. Further, a transparent or non-transparent material can be appropriately selected and used for all or a part of these electrodes.

As described above, in another embodiment of the present invention, when the gate voltage is applied to a large negative value, the channel of the hole is inverted, and p-type zinc oxide is generated by the electric field. The p-type ZnO can be used not only for a pn junction such as a light emitting diode or a laser, but also for a C-MOS transistor, so that it can be used for circuit design and application.

(5) Stacked Semiconductor Device FIG. 10 is a sectional view of a stacked semiconductor device. this is,
As an example, a case where the transistors of the first embodiment are stacked is described. That is, the channel layer 11 and the source 1
2. A second transistor is further formed on the transistor including the drain 13, the gate 14, the gate insulating layer 15, and the substrate 16. At that time, an insulating layer 57 and a conductive shielding layer 58 are formed between the first transistor and the second transistor. The conductive shielding layer 58 electrically shields the first and second transistors. Second
In the transistor (1), an insulating layer 59 serving as a substrate is formed, and a second source 52 and a second drain 5 are formed thereon.
3 is formed. Further, a second channel layer 51 is formed so as to cover them, and a second gate insulating layer 55 and a second gate 54 are formed thereon.

The material of the insulating layers 57 and 59 may be the same as that of the gate insulating layer 15 or another insulating material similar to that of the transparent substrate 16. The material of the conductive shielding layer 58 is
The same material as the source 12, the drain 13, the gate 14, and the like can be used. Note that the insulating layer 57 (or 5
By making 9) sufficiently thicker than the thickness of the channel layer 11 (or the channel layer 11 and the gate insulating layer 15), the conductive shielding layer 58 and the insulating layer 59 (or 57) can be omitted.

When the transistors are stacked, the channel layer 11, the second channel layer 51, the insulating layer 57, and the like are preferably planarized as needed. Since the cost may increase if the planarization process is added, only an appropriate layer may be planarized. Further, the number of transistors to be stacked can be appropriately stacked as needed. Further, the transistors of the above-described first to fifth embodiments can be appropriately selected and stacked. Further, a plurality of types of transistors may be selected, mixed, and stacked.

(6) Application to Light-Emitting Element FIGS. 11A and 11B are a cross-sectional view and a circuit diagram of a semiconductor device in which the FET according to the present invention is applied to drive a light-emitting element. 11A, 11B, and 11C are sectional views of FIG.
This corresponds to a, b, and c in the circuit diagram of FIG. In this device, a channel layer 61, a source 62, a drain 63,
The gate 64, the gate insulating layer 65, and the substrate 66 form a transistor. Further, by forming the semiconductor layer 67 on the region of the drain 63, a light emitting portion is formed by the drain 63 and the semiconductor layer 67. Further, a source electrode 68, a gate electrode 69, and a light emitting unit electrode 60 are provided. In the case where an n-type semiconductor is used as the drain 63 of the light emitting unit, the semiconductor layer 67 uses a p-type semiconductor. On the other hand, when a p-type semiconductor is used as the drain 63, the semiconductor layer 67 uses an n-type semiconductor.

By using a transparent semiconductor material similar to that of the gate 64 for the semiconductor layer 67 and a transparent electrode material for the light emitting unit electrode 60, the light emitting unit can emit light in the upward direction in the drawing. Further, by using a transparent material for the substrate 66, the light emitting section can emit surface light in the downward direction in the figure. Furthermore, if the light emitting region is an ultraviolet region or the like,
By arranging the phosphor above or below the light emitting portion (that is, above the semiconductor layer 67 or the light emitting portion electrode 60 or below the substrate 66), the phosphor can be converted into visible light.

FIGS. 12A and 12B are a cross-sectional view and a circuit diagram of a semiconductor device in which the bipolar transistor according to the present invention is applied for driving a light emitting element. A, b, and c in the cross-sectional view of FIG. 12A correspond to a, b, and b in the circuit diagram of FIG.
And c. In this device, a transistor is formed by the base 71, the emitter 72 and the collector 73, the base electrode 74 and the collector electrode 76, and the substrate 77. Further, on the region of the emitter 72, the semiconductor layer 7
8, the emic 72 and the semiconductor layer 7 are formed.
At 8, a light emitting portion is formed. The light emitting unit electrode 79 is formed on the semiconductor layer 78. When an n-type semiconductor is used as the emitter 72, the semiconductor layer 78 uses a p-type semiconductor. On the other hand, when a p-type semiconductor is used as the emitter 72, the semiconductor layer 78 uses an n-type semiconductor.

By using a transparent semiconductor material similar to that of the base 71 for the semiconductor layer 78 and a transparent electrode material for the light emitting portion electrode 79, the light emitting portion can emit light in the upward direction in the drawing. Further, when the substrate 77 and the like are made of a transparent material, the light emitting section can emit surface light in the downward direction in the figure. Further, when the light emitting region is an ultraviolet region or the like, the phosphor is placed above or below the light emitting portion (that is, the semiconductor layer 7).
8 or on the light emitting unit electrode 79 or under the substrate 77), it is possible to convert the light into visible light.

The transistors of the first to third embodiments can be similarly combined for driving by forming a light emitting portion. Also, in the above description,
Although a region continuous with a source or a drain (collector or emitter) is used as a part of the light emitting portion, the present invention is not limited to this. Another semiconductor region connected to the source or drain (collector or emitter) is formed. This may be used as a part of the light emitting unit. The light emitting unit may be a light emitting diode or a laser diode, and an appropriate light emitting device can be formed. Further, when the present invention is applied, the transparent transistor makes the transparent Z
By driving the nO light emitting element, an all-transparent semiconductor device can also be manufactured. Moreover, a part can be made transparent.

Further, as the light emitting portion, a multilayer reflective film,
Appropriate configurations such as a double hetero structure and a surface emitting laser structure can be adopted and combined. In addition, by arranging a plurality of light-emitting portions and transistors in a matrix and driving each light-emitting portion by a transparent transistor, the light-emitting portion can be appropriately applied to a display, a lighting panel, a partially dimming lighting panel, and the like.

(7) Application to Memory FIGS. 13A and 13B are a sectional view and a circuit diagram of a device in which the FET according to the present invention is applied to control of a memory element. 13A, 13B, and 13C are sectional views of FIG.
This corresponds to a, b, and c in the circuit diagram of FIG. In this device, a channel layer 81, a source 82, a drain 83,
The gate 84, the gate insulating layer 85, and the substrate 86 form a transistor. A conductive layer 88 of the same transparent conductive material is formed on source 82. Further, a semiconductor layer or a conductor layer 87 is formed on the region of the drain 83 via the gate insulating layer 85, and these components form a capacitor. Here, the gate insulating layer 85 is used as an inter-electrode insulator of the capacitor, but another insulating layer may be formed and used.
Further, as the electrode of the capacitor, a region continuous with the drain or source may be used, or another semiconductor region or conductor region connected to the drain or source may be used. As the electrode material for forming the capacitor, a transparent material or a non-transparent material may be used, or a partially transparent material may be used. By using a transparent material as appropriate for each of these layers or regions, a memory that is entirely or partially transparent can be created.

Also, when the bipolar transistor according to the present invention is used, it can be applied to a memory by appropriately forming a capacitor on a substrate. That is, for example, in the bipolar transistor as in the above-described embodiment, a region continuous with the collector or the emitter, or a region of another semiconductor or conductor connected to the collector or the emitter, and an insulating layer on this region, A capacitor can be formed using the semiconductor layer or the conductor layer over the insulating layer.

When applied to a memory, a memory device can be realized by arranging transistors and capacitors in a matrix and driving each capacitor by each transistor.

(8) Surface acoustic wave device SAW (Surface Ac)
FIG. 14 shows a configuration diagram applied to a SAW of the semiconductor device according to the present invention. FIG. 14A is a perspective view of the SAW, and FIG. 14B is a cross-sectional view taken along the line BB ′.

The SAW is composed of a substrate 111, a semiconductor layer 112,
An input electrode 113 and an output electrode 114 are provided. SAW
When a high frequency signal is input from the input electrode 113,
Depending on the filter characteristics of the SAW, an appropriate signal
14 is a semiconductor device. Semiconductor layer 1
Reference numeral 12 denotes an insulating semiconductor, and as a base, any of the materials described in the first embodiment can be used as appropriate. As the semiconductor layer 112, for example, a transparent insulating semiconductor such as insulating ZnO, SiN, or SiO 2 doped with a monovalent element, a group V element, or a 3d transition metal element can be used.

(9) Other Applications The transistor of the present invention can be formed on the same substrate as other elements such as a light emitting element and a capacitor. Alternatively, a plurality of transistors of the present invention may be formed of the same type or different types, and a transparent material may be used for wiring between the transistors. A part or the whole of a transistor or an element driven by the transistor can be made transparent as appropriate. The size, thickness, size, and the like of the transistor can be appropriately designed depending on the application, the process, and the like. The doping amount can be appropriately set as necessary, such as a manufacturing process and device performance.

Further, a transparent n-type semiconductor, a transparent p-type semiconductor,
As a transparent conductive material and a transparent insulating material, the semiconductor is Z
Although the example of doping each element based on nO has been described,
However, it is not limited to this. For example, zinc oxide ZnO
Besides, magnesium zinc oxide Mg x Zn 1-x O,
Each element may be doped based on a suitable transparent material such as cadmium zinc oxide Cd x Zn 1-x O and cadmium oxide CdO.

In addition to the above, the present invention provides an ultraviolet light
A transistor that drives a detector in the line region and performs signal processing;
Oxygen sensor, sound wave, SAW (Surface Acousti
c Wave) and a device combining piezoelectricity can realize a semiconductor device that is partially or entirely transparent. Further, according to the present invention, an electronic circuit can be formed on a window glass of a car or a house, a transparent plastic plate, or the like. The present invention can also be made transparent to computer peripherals, such as keyboards, touch panels, and pointing devices. By being transparent, it can be made secretly, made so that it is hard to see from others, and can provide something new in terms of design. In addition, the scope of application of the present invention is:
Very extensive.

[0061]

According to the present invention, as described above, ZnO
By adding a 3d transition metal element such as Ni to a transparent channel material such as Ni, a desired on-off ratio and mobility can be obtained even by forming a thin film at a relatively low temperature (for example, room temperature). A very high-performance thin film transistor that surpasses performance can be formed. Further, according to the present invention, a transparent electronic circuit can be formed using a material that cannot withstand conventional heat treatment, such as a plastic substrate or a polymer material substrate. Further, according to the present invention, the performance of the semiconductor and the tolerance of the process can be significantly improved.

Further, according to the present invention, the transparent transistor can be used for various applications in the field of optical devices, such as for driving a light emitting element such as a surface emitting laser or an electroluminescent element, or for a memory. Further, according to the present invention, it is possible to provide a semiconductor device used as a transparent electronic element for various wide applications.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a first embodiment of a transistor according to the present invention.

FIG. 2 is an explanatory diagram illustrating a relationship between a doping amount of a 3d transition metal element and a resistance value.

FIG. 3 is an explanatory diagram of characteristics of a conventional transistor.

FIG. 4 is an explanatory diagram of conventional transistor characteristics.

FIG. 5 is a characteristic diagram (2) of the transistor of the present invention.

FIG. 6 is a cross-sectional view of a transistor according to a second embodiment of the present invention.

FIG. 7 is a cross-sectional view of a transistor according to a third embodiment of the present invention.

FIG. 8 is a sectional view of a transistor according to a fourth embodiment of the present invention.

FIG. 9 is a sectional view of a transistor according to a fifth embodiment of the present invention.

FIG. 10 is a cross-sectional view of a stacked semiconductor device.

FIG. 11 is a cross-sectional view and a circuit of a semiconductor device in which an FET according to the present invention is applied to driving a light-emitting element.

12A and 12B are a cross-sectional view and a circuit diagram of a semiconductor device in which a bipolar transistor according to the present invention is applied to driving a light-emitting element.

FIG. 13 is a cross-sectional view and a circuit diagram of a semiconductor device in which a bipolar transistor according to the present invention is applied to driving a light-emitting element.

FIG. 14 is a configuration diagram applied to a SAW of a semiconductor device according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Channel layer 12 Source 13 Drain 14 Gate 15 Gate insulating layer 16 Substrate

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H01L 27/108 H01L 27/10 331 5F083 21/8242 615 5F110 21/331 651 29/73 671Z 33/00 29 / 72 41/08 41/08 D H01S 5/026 F term (reference) 2H090 JB02 JB03 2H092 JA28 JA37 JA41 KA10 KA12 KA13 KA19 KB14 MA26 MA27 NA22 PA01 5F003 BA92 BH05 BM04 BP08 BP23 5F041 BB26 CA02 CA04 CA41 CA46 CB88 FF01 FF11 5F073 AB14 AB16 BA09 CA22 CB05 GA38 5F083 AD14 AD70 HA06 JA02 JA19 JA31 5F110 AA06 BB01 BB05 CC07 DD01 DD02 DD04 EE07 FF01 FF02 FF03 FF07 FF27 FF28 FF30 GG01 GG24 GG28 GG29 GG28 GG29 GG29 GG29 GG29 GG28

Claims (11)

[Claims]
1. Zinc oxide ZnO, cadmium oxide CdO,
IIB element or IIA element or VIB in ZnO
Using any of compounds or mixtures to which elements have been added,
a transparent channel layer doped with an impurity which increases the resistance without losing the transparency of the d transition metal element or the rare earth or the transparent semiconductor; and a group III element, a group VII element, a group I element or a group V element. A transparent conductive material such as doped or undoped conductive ZnO, a transparent conductor such as In 2 O 3 or SnO 2 or (In—Sn) O x , or a non-transparent electrode material is used for all or part thereof. A semiconductor device comprising: a source, a drain, and a gate; and an insulating substrate on which the transparent channel layer is formed.
2. The insulating substrate according to claim 1, wherein the insulating substrate is any one of polyethylene, polyethylene terephthalate, plastic, glass, various polymers, papers, and a flexible and transparent insulating substrate. Semiconductor devices.
3. The method according to claim 1, wherein the 3d transition metal element is nickel, manganese, cobalt or iron.
A semiconductor device according to claim 1.
4. The transparent channel layer is doped with a plurality of kinds of 3d transition metal elements or rare earth elements or impurities for increasing the resistance without losing the transparency of the transparent semiconductor at a predetermined ratio or doping amount. 2. The semiconductor device according to claim 1, wherein:
5. The transparent channel layer according to claim 1, wherein the doping amount of an impurity for increasing the resistance without losing the transparency of the 3d transition metal element, rare earth element or transparent semiconductor is not uniform. Semiconductor device.
6. An insulating ZnO, Si doped with a monovalent element, a group V element or a 3d transition metal element between the transparent channel layer and the gate.
N, a transparent insulating material such as SiO 2 , a transparent insulating oxide,
2. The semiconductor device according to claim 1, further comprising a gate insulating layer using a transparent insulator such as a plastic or a polymer film.
7. A method according to claim 1, wherein Zn 1-x Li x O or Zn 1- x (Li y Mg) is provided between the transparent channel layer and the gate.
2. The semiconductor device according to claim 1, further comprising a gate insulating layer using a ferroelectric transparent insulating material such as xy ) O, wherein the gate insulating layer has a memory function.
8. A light-emitting portion further comprising a region continuous with the drain or source, or a region of another semiconductor connected to the drain or source, and a semiconductor layer joined to the region. The semiconductor device according to claim 1.
9. Doping with a group III element or a group VII element,
Further, Zn doped with an impurity that increases the resistance without losing the transparency of the 3d transition metal element or rare earth or transparent semiconductor
An emitter and a collector or a base formed by a transparent n-type semiconductor such as O, and a group I element or a group V element, and furthermore, do not lose the transparency of a 3d transition metal element or a rare earth element or a transparent semiconductor; A base or an emitter and a collector formed of a transparent p-type semiconductor such as ZnO doped with an impurity to make a resistance, and a conductive ZnO doped or not doped with any of Group III element, Group VII element or Group I element A transparent conductive material such as In 2 O 3 or SnO 2 or (In—Sn) O x , or a non-transparent electrode material for the whole or a part thereof,
A semiconductor device comprising a base electrode, an emitter electrode, and a collector electrode formed on an emitter and a collector, respectively.
10. A light-emitting portion formed by a region continuous with the collector or the emitter, or a region of another semiconductor connected to the collector or the emitter, and a semiconductor layer joined to the region. Claim 9
A semiconductor device according to claim 1.
11. The semiconductor device according to claim 1, wherein said element is an insulating ZnO or Si doped with a monovalent element, a group V element or a 3d transition metal element.
N, a transparent insulating material such as SiO 2 , a transparent insulating oxide,
Alternatively, a semiconductor device comprising a plurality of layers stacked via an insulating layer using a transparent insulator such as a plastic or a polymer film.
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