JP2002076327A - Charge transfer device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the sensitivity of charge detection and the linearity of output. SOLUTION: A charge transfer device is provided with a transfer part and a charge detection part. The transfer part has channel areas 2 and 3 which are formed on a first conduction-type semiconductor substrate 1 for transferring signal charges, and are constituted of second conduction-type semiconductor areas; and transfer electrodes 4b and 4c which are formed on the channel areas through an insulating film, and transfer the signal charges. The charge detection part has a detection electrode 5 which is adjacent to the ends of the channel areas and is formed on the area of the semiconductor substrate through the insulating film, and which converts the signal charges transferred from the transfer part into voltage by the detection electrode so as to detect it. The area of the semiconductor substrate below the detection electrode is the first conduction type. The junction face of the area of the semiconductor substrate below the detection electrode and the channel area is positioned on the same face as the end of the detection electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a charge transfer device.

[0002]

2. Description of the Related Art Generally, a CCD (Charge) is used as a charge transfer device.
ge Coupled Device). Conventional embedded channel type CCD (hereinafter referred to as BCCD (Buried Charge
FIG. 9 shows the configuration of the second embodiment. This BCCD has a structure in which signal charges are detected by a floating electrode (hereinafter, referred to as a "charge").
FGA (Floating Gate Amplifier). The BCCD includes an N-type semiconductor region 2 for a buried channel formed on a P-type semiconductor substrate 1 and a low-concentration N-type semiconductor layer 2 provided in the N-type semiconductor region 2 to form a potential barrier for preventing backflow of charges. Type semiconductor region 3, a reset gate 4a and charge transfer electrodes 4b and 4c provided on the N-type semiconductor region 2 and the low-concentration N-type semiconductor region 3 via an insulating film (not shown), and a reset gate 4a. A charge detection electrode 5 provided on the N-type semiconductor region 2 between the electrode and the electrode 4b via an insulating film (not shown); and a source follower for outputting a potential proportional to the charge detected by the charge detection electrode. And a reset gate 7 for setting the potential of the charge detection electrode 5.

Next, the operation of the BCCD will be described with reference to FIGS. 10 and 11. FIG. 10 is a potential distribution diagram of the charge transfer channel, and FIG. 11 is a reset gate 4a, 7
FIG. 7 is a waveform diagram of applied pulses applied to electrodes 4b, 4c, and 5.

At time T1, the signal charge below the detection electrode 5 moves to below the reset gate 4a, and the next signal charge is transferred below the transfer electrode 4c. Next, at time T2,
The reset gate 7 turns on, and the potential of the detection electrode 5 is set to the initial potential. At time T3, the signal charge moves from below the transfer electrode 4c to below the transfer electrode 4b. At time T4, the signal charge moves from below the transfer electrode 4b to below the detection electrode 5, and the potential of the detection electrode 5 in a floating state changes according to the amount of the signal charge. This changed potential is output via the output circuit 6. Output to the outside.

[0005]

In such a conventional charge transfer device, a channel portion in which charges are stored is located inside the substrate deeper than the interface because the buried channel structure is provided below the detection electrode 5. This causes a problem that the capacitance between the channel portion and the detection electrode 5 is reduced, the charge detection sensitivity is reduced, and the change in potential according to the charge amount becomes non-linear.

Japanese Patent Application Laid-Open No. 2-9-1139 discloses that an N-type region of a buried channel is provided other than a detection electrode to improve detection sensitivity and linearity. Neither the contact transfer nor the specific method is disclosed, and since a potential pocket is formed between the electrode transfer portion and the detection electrode, the charge is not completely transferred and nondestructive reading cannot be performed. was there.
In addition, there is a possibility that the capacity is increased due to the N region around the detection electrode, and the sensitivity is lowered.

The present invention has been made in view of the above circumstances, and has as its object to provide a charge transfer device capable of improving the sensitivity of charge detection and the linearity of output.

[0008]

A charge transfer device according to the present invention comprises a channel region formed on a semiconductor substrate of a first conductivity type for transferring a signal charge and comprising a semiconductor region of a second conductivity type; A transfer portion formed on a channel region via an insulating film and having a transfer electrode for transferring the signal charge; and a transfer region adjacent to an end of the channel region, on a region of the semiconductor substrate via an insulating film. A charge detection unit having a detection electrode formed, and converting the signal charge transferred from the transfer unit to a voltage by the detection electrode and detecting the voltage, wherein a region of the semiconductor substrate below the detection electrode is 1
It is of a conductivity type, and is characterized in that a junction surface between the region of the semiconductor substrate below the detection electrode and the channel region is located substantially on the same plane as an end of the detection electrode.

A reset gate transistor for setting the potential of the detection electrode is provided. The drain potential of the reset gate transistor is such that the potential of the region below the detection electrode is equal to the potential of the transfer electrode adjacent to the detection electrode. It is preferable that the potential is set to be deeper than the potential of the lower channel region.

It is preferable that the apparatus further comprises a charge discharging unit for discharging the signal charges detected by the charge detecting unit.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 shows the configuration of a first embodiment of a charge transfer device according to the present invention. The charge transfer device according to this embodiment has a structure in which a signal charge is detected by the floating electrode 5. This charge transfer device is used to form an N-type semiconductor region 2 for a buried channel formed on a P-type semiconductor substrate 1 and a potential barrier provided in the N-type semiconductor region 2 for preventing backflow of charges. A low-concentration N-type semiconductor region 3, a reset gate 4a and a charge transfer electrode 4b provided on the N-type semiconductor region 2 and the low-concentration N-type semiconductor region 3 via an insulating film (not shown).
4c, a charge detection electrode 5 provided on an area of the semiconductor substrate 1 between the reset gate 4a and the electrode 4b via an insulating film (not shown), and the charge detection electrode 5 is proportional to the charge detected by the charge detection electrode. An output circuit 6 of a source follower for outputting a potential and a reset gate 7 for setting the potential of the charge detection electrode 5 are provided.

As can be seen from FIG. 1, the charge transfer device of this embodiment has the same configuration as the conventional charge transfer device shown in FIG. 9 except that the region below the charge detection electrode 5 is a P-type semiconductor substrate. It has become.

With such a configuration, in the present embodiment, the region below the charge detection electrode 5 is of a surface channel type, so that the sensitivity of charge detection and the linearity of output are lower than in the conventional case. Can be improved.

When the charge transfer device of the present embodiment is formed, the semiconductor region 2 and the electrodes 4a, 4b, 4c
Before the formation of the semiconductor device, the charge detection electrode 5 is formed, and the semiconductor region (channel region) 2 may be formed by ion implantation using the charge detection electrode 5 as a mask. When the semiconductor region 2 is formed, it is necessary to mask the semiconductor region 3.

(Second Embodiment) FIG. 2 shows a configuration of a second embodiment of the charge transfer device according to the present invention. The charge transfer device according to the second embodiment is similar to the charge transfer device shown in FIG.
In the charge transfer device according to the embodiment, the charge detection electrode 5
A P-type semiconductor region 8 is provided below. It goes without saying that this embodiment also has the same effects as the first embodiment.

Note that the method of manufacturing the charge transfer device according to the second embodiment uses the electrodes 4a, 4b,
4c, ion implantation is performed using these electrodes 4a, 4b, 4c as a mask to form the P-type semiconductor region 8, and then the charge detection electrode 5 may be provided.

In the first embodiment, the joint surface between the region of the P-type semiconductor substrate 1 under the detection electrode 5 and the N-type semiconductor region 2 serving as a channel is flush with the end of the detection electrode 5. In the second embodiment, it is preferable that the junction surface between the P-type semiconductor region 8 and the N-type semiconductor region 2 is located on the same plane as the end of the detection electrode 5. It is preferable to configure so that With this configuration, non-destructive readout of signal charges becomes possible.

Further, in the first and second embodiments, the potential of the drain of the reset gate 7 is
The lower region (the semiconductor substrate 1 in the first embodiment,
In the second embodiment, the potential of the P-type semiconductor region 8) is changed to the level of the channel 2 below the transfer electrode 4b adjacent to the detection electrode 5.
Is preferably set to be deeper than the potential.

Next, FIG. 3 is a plan view of the charge transfer device according to the first and second embodiments. As shown in FIG. 3, in the charge transfer devices of the first and second embodiments,
Charge detection electrode 5, output circuit 6, and reset gate 7
Is provided for the charge transfer section including the channel region 2, the reset gate 4a, and the charge transfer electrodes 4b and 4c. However, as shown in FIG. 4, a plurality of charge detection units (three in FIG. 4) may be provided. In FIG. 4, the upper, middle, and lower charge transfer sections are connected to form one charge transfer section. In FIG. 4, 3
The outputs of the output circuits 6a, 6b, 6c are averaged in the averaging circuit 8 and output to the outside. Therefore, the output circuit 6 corresponding to the same signal charge
By averaging the outputs of a, 6b and 6c, S /
The N ratio can be reduced. This reduction in S / N ratio is generally inversely proportional to the square root of the number of output circuits.

FIG. 5 shows a specific configuration of the averaging circuit 8 described above.
FIG. 6 shows the driving timing chart. In FIG. 5, the output of each output circuit 6a, 6b, 6c is held by a sample and hold circuit, and the held values are averaged by capacitive coupling. For example, in FIG. 5, a capacitor C is used to average the output of the output circuit 6a and the output of the output circuit 6b.
3 is set to C3 = C1, and the capacitance C4 is set to C4 = 1/2 × C2 in order to further add the output of the output circuit 6c.

In the averaging circuit 8 shown in FIG. 5, the outputs of the output circuits 6a, 6b and 6c are averaged by capacitive coupling. However, as shown in FIG. 7, the outputs of the output circuits 6a, 6b and 6c are temporarily It may be configured such that the charges are converted into charges, the charges are combined, detected by one detection circuit FG, and averaged. FIG. 8 shows a drive timing chart of the averaging circuit shown in FIG.

[0023]

As described above, according to the present invention, the charge detection sensitivity and output linearity can be improved.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a configuration of a first embodiment of a charge transfer device according to the present invention.

FIG. 2 is a sectional view showing the configuration of a second embodiment of the charge transfer device according to the present invention.

FIG. 3 is a plan view showing a configuration of a charge transfer device according to the present invention.

FIG. 4 is a circuit diagram showing a modification of the charge transfer device according to the present invention.

FIG. 5 is a circuit diagram showing a configuration of an averaging circuit according to the charge transfer device shown in FIG.

FIG. 6 is a drive timing chart of the averaging circuit shown in FIG. 5;

FIG. 7 is a circuit diagram showing another configuration of the averaging circuit.

FIG. 8 is a drive timing chart of the averaging circuit shown in FIG. 7;

FIG. 9 is a cross-sectional view illustrating a configuration of a conventional charge transfer device.

FIG. 10 is a potential distribution diagram of the charge transfer device shown in FIG.

FIG. 11 is a drive timing chart of the charge transfer device shown in FIG.

[Explanation of symbols]

 Reference Signs List 1 P-type semiconductor substrate 2 Buried channel (N-type semiconductor region) 3 Low-concentration N-type semiconductor region 4 a Reset gate 4 b, 4 c Charge transfer electrode 5 Charge detection electrode 6 Output circuit 7 Reset gate

Claims (3)

[Claims] 1. A channel region formed on a semiconductor substrate of a first conductivity type for transferring a signal charge, comprising a semiconductor region of a second conductivity type, and formed on the channel region via an insulating film. A transfer section having a transfer electrode for transferring the signal charge, and a detection electrode formed via an insulating film on a region of the semiconductor substrate adjacent to an end of the channel region, wherein the transfer section And a charge detection unit that converts the signal charge transferred from the detection electrode into a voltage by the detection electrode and detects the voltage, wherein a region of the semiconductor substrate under the detection electrode is of a first conductivity type, and a semiconductor under the detection electrode is provided. The charge transfer device according to claim 1, wherein a junction surface between the region of the substrate and the channel region is located on substantially the same plane as an end of the detection electrode. 2. The transfer electrode according to claim 1, further comprising a reset gate transistor for setting a potential of said detection electrode, wherein a drain potential of said reset gate transistor is such that a potential of said region below said detection electrode is adjacent to said detection electrode. 2. The charge transfer device according to claim 1, wherein the potential is set to be deeper than a potential of the lower channel region. 3. The charge transfer device according to claim 1, further comprising a charge discharging unit configured to discharge a signal charge detected by the charge detecting unit.