JP2002075781A - Thin film capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin film capacitor, having a small mounting area, a large capacity and a low inductance. SOLUTION: The thin-film capacitor 10 comprises an insulating board 1, having a first via hole conductor 2 formed to penetrate into a thickness direction of a substrate near an outer periphery and a second via hole conductor 3, formed on a region surrounded by the first via hole conductor, and thin film capacitor elements each having a first capacity electrode (lower electrode) a thin-film dielectric layer, a second capacity electrode (upper electrode) and an insulation protective layer and disposed on front and rear surfaces of the board 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin-film capacitor, for example, a large-capacity, low-inductance thin-film capacitor provided in an electric circuit operating at high speed and used for bypassing high-frequency noise or preventing fluctuations in power supply voltage. It relates to a thin film capacitor.

[0002]

2. Description of the Related Art In recent years, as electronic devices have become smaller and more sophisticated, there has been a growing demand for electronic components installed in the electronic devices to be smaller, thinner, and compatible with high frequencies.

In particular, in a high-speed digital circuit of a computer which needs to process a large amount of information at high speed, the clock frequency in the CPU chip is from 100 MHz to several hundred MHz, and the clock frequency of the bus between chips is also from 30 MHz, even at the personal computer level. The high-speed operation is remarkable at 75 MHz.

As the degree of integration of IC circuits increases and the number of elements in a chip increases, the power supply voltage tends to decrease in order to suppress power consumption. As the speed, density, and voltage of these IC circuits increase, passive components such as thin-film capacitors must also exhibit excellent characteristics with respect to high-frequency or high-speed pulses, as well as miniaturization and large capacity. ing.

[0005] In order to make a thin film capacitor compact and high capacity, it is most effective to make the dielectric sandwiched between a pair of electrodes thin and thin. The thinning also conforms to the above-mentioned tendency of voltage drop.

On the other hand, various problems associated with the high-speed operation of the IC circuit are more serious than miniaturization of each element. Of these, the most important in the function of removing high-frequency noise, which is the role of the thin film capacitor, is that the instantaneous drop in the power supply voltage that occurs when simultaneous switching of logic circuits occurs at the same time is the energy stored in the thin film capacitor. Is a function to reduce by supplying instantaneously. This is a so-called decoupling thin film capacitor.

The performance required of the decoupling thin film capacitor is how to supply the current quickly with respect to the current fluctuation of the load faster than the clock frequency.
Therefore, it must function reliably as a thin film capacitor in the frequency range from 100 MHz to 1 GHz.

However, an actual thin film capacitor has a resistance component and an inductance component in addition to a capacitance component. The impedance of the capacitance component decreases with increasing frequency, and the inductance component increases with increasing frequency. For this reason, as the operating frequency increases, the inductance of the element limits the transient current to be supplied, and the power supply voltage on the logic circuit side drops instantaneously or new voltage noise is generated. As a result, an error occurs in the logic circuit.

Particularly, in recent IC circuits, the power supply voltage has been reduced in order to suppress an increase in power consumption due to an increase in the total number of elements, and the allowable fluctuation range of the power supply voltage has been reduced. Therefore, it is very important to reduce the inductance of the decoupling thin film capacitor element itself in order to minimize the voltage fluctuation width during high-speed operation.

There are three ways to reduce inductance. The first is a method for minimizing the length of the current path, the second is a method for minimizing the loop cross-sectional area by forming the current path into a loop structure, and the third is a method of distributing the current path into n pieces to reduce the effective inductance by one. / N.

As these methods, a thin film capacitor as shown in FIG. 6 has been proposed.

This thin film capacitor includes an insulating substrate 101,
Lower electrode 102, thin film dielectric layer 103, upper electrode 10
4, an insulating protective layer 105 and an external terminal electrode 106.

A substantially rectangular lower electrode 102 is formed on the main surface of the insulating substrate 101, and a thin film dielectric layer 103 is formed except for the outer periphery of the lower electrode 102. The lower electrode 1 is formed on the thin film dielectric layer 103.
02 without being short-circuited to the upper electrode 104 having a substantially rectangular shape.
Are formed. Thus, the capacitor element 100 is formed by the lower electrode 102, the thin film dielectric layer 103, and the upper electrode layer 104.

Further, in order to protect the capacitor element 100 on the insulating substrate 101, an insulating protective layer is formed. The insulating protective layer 105 has an upper electrode 1 at its center.
An exposed portion is formed in which a part of the reference numeral 04 is scattered.

Further, external terminal electrodes 106 and 107 are arranged in the scattered exposed portions 105. The external terminal electrode 106 is electrically connected to the lower electrode 102.
Further, the external terminal electrode 107 is electrically connected to the upper electrode 104.

The external terminal electrodes 106 and 107 are set so that a current path is minimized when extracting a capacitance component. For example, the external terminal electrode 106 is formed in a rectangular shape on the outer peripheral portion of the capacitor element 100. Are arranged,
The external terminal electrodes 107 are arranged in a rectangular shape at the center of the capacitor element 100.

Thus, between the external terminal electrode 106 connected to the lower electrode 102 and the external terminal electrode 107 connected to the upper electrode 104, the direction of the current flowing therethrough can be expressed in all directions as vectors. Spreads or flows from all directions. For this reason, it is considered geometrically that the mutual inductance cancels the self-inductance, and the total inductance can be greatly reduced.

Further, since the current path is divided into a plurality of parts, the effective inductance can be reduced.

[0019]

Here, the switching noise is caused by a current (charge / discharge current) flowing through the power supply line of the system due to the switching of the logic circuit, and is proportional to the inductance of the current path. is there.

At this time, the thin film capacitor functions as a charge / discharge current supply source. At present, switching noise in this logic circuit is becoming a serious problem with the speeding up of electronic circuits. To suppress the switching noise, it is desired to increase the capacity of the thin film capacitor element 100. That is, the power to compensate for the insufficient supply of the charging / discharging current is increased, and it is necessary to increase the capacity of the thin film capacitor in order to prevent the delay of the rising waveform of the high-speed digital circuit.

In order to increase the capacity of the thin film capacitor shown in FIG. 6, a structure in which a capacitor element including a lower electrode layer, a thin film dielectric layer, and an upper electrode is laminated with a plurality of capacitor elements can be considered. However, the insulating substrate 101
The lower electrode 102, the thin film dielectric layer 103, and the upper electrode 104 (intermediate electrode) are formed thereon, and the thin film dielectric layer and the upper electrode are formed on the upper surface. With such a structure, stress is generated inside the lower capacitor element due to a difference in heat shrinkage rate during heat treatment (gradual cooling).

Although this internal stress does not cause any problem in the case of one capacitor element, it becomes too large to be neglected when two or three elements are stacked.
03 causes peeling from the upper electrode 104 and the lower electrode 102 and causes cracks.

Further, in another conventional technique, a capacitor in which two capacitor elements are arranged on both surfaces of an insulating substrate is disclosed in, for example, JP-A-10-214722 and JP-A-8-8141.
And JP-A-5-13254 and JP-A-5-13269. However, in such a structure, the capacitor elements formed on both main surfaces of the substrate are connected by using the end surfaces of the substrate. In such a case, the current path between the two elements tends to increase, and it has been difficult to reduce the inductance.

Still another prior art discloses a structure in which a through-hole conductor is formed inside a substrate to connect elements on the front and back surfaces of the substrate, for example, in Japanese Patent Application Laid-Open No. Hei 10-214722. However, in such a structure, only the inductor element is connected, and not the connection between the capacitors. Further, assuming that the through-hole conductor formed in the center of the substrate is used, the through-hole conductor is merely used in combination with a capacitor element formed on both main surfaces of the substrate using the end surfaces of the substrate.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a thin film capacitor having a large capacity and a low inductance structure.

[0026]

The thin film capacitor of the present invention is formed in a first via-hole conductor formed in the vicinity of the outer periphery so as to penetrate in the thickness direction of the substrate, and in a region surrounded by the first via-hole conductor. A first capacitor electrode connected to the first via hole conductor and a second capacitor electrode connected to the second via hole conductor are formed on one main surface of the insulating substrate having the second via hole conductor by a thin film dielectric. A thin film capacitor element on one main surface side with the layer interposed is disposed, and an insulating protective layer is formed on the capacitor element by exposing a first capacitor electrode and a second capacitor electrode, each of which is exposed. A ball-shaped external terminal electrode is formed on the exposed portion, and a second capacitor electrode connected to the first via hole conductor and a second capacitor electrode connected to the second via hole conductor are formed on the other main surface of the insulating substrate. Capacitance electrode In a thin film capacitor at the capacitor element which sandwiches a thin film dielectric layer.

[0027] In the thin film capacitor element on the one principal surface side, the second capacitor electrode is a lower electrode exposing a first via-hole conductor on an outer peripheral portion, and the thin film dielectric layer is a lower electrode on a central portion. Is a thin-film dielectric layer that exposes a part of the first via-hole conductor at an outer peripheral portion thereof,
The first capacitor electrode is an upper electrode that exposes a part of the lower electrode at a central portion.

Further, in the above-mentioned thin film capacitor element on the one principal surface side, the first capacitance electrode has the second capacitance at the center.
The thin film dielectric layer is a thin film dielectric layer that exposes a second via hole conductor at a central portion and exposes a lower electrode at an outer peripheral portion; The electrode is an upper electrode that exposes the lower electrode on the outer periphery.

In the thin film capacitor element on the other main surface side, the second capacitor electrode is a lower electrode exposing the first via-hole conductor on the outer peripheral portion, and the thin film dielectric layer is formed on the outer peripheral portion by the first electrode. The first capacitor electrode is an upper electrode which is formed on the thin film dielectric layer and exposes the via-hole conductor and is opposed to the lower electrode. Further, in the other main surface side thin film capacitor element, the lower surface side first capacitance electrode is a lower electrode exposing a second via hole conductor in a central portion, and the thin film dielectric layer is provided in a central portion with a second via hole. The second capacitor electrode is a thin film dielectric layer that exposes a conductor, and the second capacitor electrode is an upper electrode that is formed on the thin film dielectric layer and faces the lower electrode.

In the thin-film capacitor of the present invention, a capacitor element including a lower electrode, a thin-film dielectric layer, and an upper electrode is disposed on both sides of the insulating substrate. Since the capacitor element is formed by a thin film method, the total of the lower capacitor electrode, the dielectric layer, and the upper capacitor electrode is, for example, 0.5 to 2.0.
0 μm, which makes it possible to make the device extremely thin.

The capacitor elements are respectively connected by two types of via-hole conductors penetrating the insulating substrate. This facilitates connection between the capacitor element on the one main surface side and the capacitor element on the other main surface side, thereby increasing the capacitance component of the capacitor element on the one main surface side of the substrate and the capacitor on the other main surface side of the substrate. Since the capacitance components of the elements are added, a large capacity can be realized without changing the mounting area.

Even when the capacitor portions are formed on both surfaces of the insulating substrate and fired integrally, almost no peeling or cracking due to internal stress occurs.

[0032]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A thin film capacitor according to the present invention will be described in detail with reference to the drawings.

FIG. 1 is a sectional view of the thin film capacitor of the present invention, FIG. 2 is a plan view of an insulating substrate used for the thin film capacitor of the present invention, and FIG. 3 is an exploded perspective view of the thin film capacitor of the present invention. is there.

As shown in FIG. 1, a thin-film capacitor 10 of the present invention has a capacitor element (hereinafter simply referred to as a front-side element) 1a on the front side and a capacitor element (simply, a back side) on the rear side centering on the insulating substrate 1. 1b).

As shown in FIG. 2, the insulating substrate 1 is made of, for example, a ceramic material such as alumina. The insulating substrate 1 has two types of via-hole conductors 2, 3 penetrating in the thickness direction.
Are formed. Specifically, it is formed by performing punching in a state of a green sheet to be the insulating substrate 1, filling a conductive paste in the through-hole, and firing.

The two types of via-hole conductors 2 and 3 are as follows.
A first via-hole conductor 2 arranged, for example, in a substantially rectangular annular shape near the outer peripheral portion of the insulating substrate 1 and a second via-hole conductor surrounded by the first via-hole conductor 2 near the central portion of the insulating substrate 1 3

On one principal surface of the insulating substrate 1, for example, near the center of the surface, a substantially rectangular surface-side element 1 a is formed so as to cover the second via-hole conductor 3.
First capacitor electrode (hereinafter, referred to as a lower electrode on the surface side) 1
1 is formed. The lower electrode 11 on the front side is formed so as to cover the second via-hole conductor 3 and expose the first via-hole conductor 2 formed near the outer peripheral portion of the insulating substrate 1.

The lower electrode 11 on the front side of the insulating substrate 1
On the top, a thin film dielectric layer 12 on the front side is formed. The thin film dielectric layer 12 on the front side has a substantially ring shape, and is formed so that the center of the lower electrode 11 on the front side is exposed at the center.

The outer edge of the thin-film dielectric layer 12 extends between the lower electrode 11 on the front surface side and the first via-hole conductor 2 so as to expose the first via-hole conductor 2.

Further, a second capacitor electrode (hereinafter, referred to as a front side upper electrode) 13 of the front side element 1a is formed on the thin film dielectric layer 12 on the front side. The upper electrode 13 has a substantially ring shape, and is formed so as to expose the center of the lower electrode 11 and the inner edge of the thin film dielectric layer 12 at the center. The outer edge of the upper electrode 13 on the front side is formed so as to cover the first via-hole conductor 2.

An insulating protective layer 14 is formed on the surface of the insulating substrate 1 so as to cover the entire upper electrode 13 on the front side, the thin film dielectric layer 12 on the front side, and the lower electrode 11 on the front side. ing. The insulating protective layer 14 has a plurality of openings. The projecting electrodes 15 and 16 are formed in the plurality of openings.

The protruding electrode 15 is connected to a part of the upper electrode 13 of the front-side element 1a via the opening of the holding layer 14.
The protruding electrodes 15 are formed on the outer peripheral portion of the front surface side element 1a so as to be dotted in a substantially rectangular ring shape.

The protruding electrode 16 is connected to a part of the lower electrode 11 of the front-side element 1a via the opening of the holding layer 14.
The protruding electrode 16 utilizes the ring-shaped upper electrode 13 and the opening area at the center of the ring-shaped thin film dielectric layer 12,
It is connected to the central region of the lower electrode 11. The protruding electrodes 16 are also scattered in a substantially annular shape in the central region of the front-side element 1a. The above is the structure of the capacitor element 1a on the substrate surface side shown in FIG. 1, and the predetermined capacitance component (capacitance component on the upper side) between the lower electrode 11 and the upper electrode 13.
Will occur.

On the back side of the insulating substrate 1, a capacitor element 1b on the back side is arranged. For example, the lower electrode 21 on the back surface of the insulating substrate 1 covers the second via-hole conductor 3 near the center of the substrate 1 and exposes the first via-hole conductor 2 formed near the outer peripheral portion of the insulating substrate 1. It is formed as follows. The lower electrode 21 has a substantially rectangular shape.

The lower electrode 21 on the back side of the insulating substrate 1
On the upper surface, a thin film dielectric layer 22 on the back side is formed. The thin film dielectric layer 22 on the back side has a substantially rectangular shape, and is formed so as to completely cover the lower electrode 21 on the back side. The outer edge of the thin film dielectric layer 22 is
The first via-hole conductor 2 extends so as to extend between the lower electrode 21 on the rear surface side and the first via-hole conductor 2.

Further, a second capacitor electrode (hereinafter, referred to as a back-side upper electrode) 23 of the back-side element 1b is formed on the thin-film dielectric layer 22 on the back side. The upper electrode 13 has a substantially rectangular shape. The outer edge of the upper electrode 23 on the back side is formed so as to cover the first via-hole conductor 2.

An insulating protection layer 24 is formed on the back surface of the insulating substrate 1 so as to cover the entire upper electrode 23 on the back surface, the thin film dielectric layer 22 on the back surface, and the lower electrode 21 on the back surface. ing.

The structure of the capacitor element 1b on the substrate surface side shown in FIG.
A predetermined capacitance component (lower-side capacitance component) is generated.

With such a structure, the front-side element 1a is connected via the second via-hole conductor 3 at the center of the insulating substrate 1.
Of the lower electrode 11 on the back side element 1b. At the same time, the upper electrode 13 of the front-side element 1a and the upper electrode 23 of the back-side element 1b conduct through the first via-hole conductor 2 near the outer peripheral portion of the insulating substrate 1.

As a result, the capacitance component of the front-side element 1a and the capacitance component of the back-side element 1a are combined, and the entire capacitance is connected to the protruding electrode 15 connected to the upper electrode 13 and the lower electrode 11. It can be obtained from between the protruding electrodes 16.

The diameter of the first and second via-hole conductors 2 and 3 of the insulating substrate 1 is desirably 300 μm or more. If this diameter is less than 300 μm,
When filling the through hole with conductive paste by suction,
It becomes difficult to fill stably. Although the upper limit of the diameter depends on the size of the thin film capacitor, the practical range is 500 μm in diameter.

The thickness of the insulating substrate 1 is 50 to 250 μm.
m is desirable. This is because when the thickness of the insulating substrate 1 is reduced, the strength is reduced, and when the thickness is increased, the effect of reducing the thickness of the thin film capacitor 10 is lost.

The capacitor element portion (lower electrode 11,
The thickness of the thin film dielectric layers 12, 22, and the upper electrodes 13, 23 is desirably 0.5 to 2.0 μm. Further, the thickness of the insulating protective layers 14 and 24 is desirably 2 to 10 μm. Furthermore, it is desirable that the protruding electrodes 15 and 16 are formed so as to protrude from the insulating protective layer 14 by about 5 to 15 μm.

As the thickness of each of the electrodes 11, 21, 13, 23 and the thin film dielectric layers 12, 22 increases, the deposition of the electrodes and the thin film dielectric layer becomes unstable. Also, each of the electrodes 11, 21, 13, 23, the thin film dielectric layers 12, 22
When the thickness is increased, the overall thickness is naturally increased, and the action as a thin film capacitor is reduced.

Further, in order to increase the efficiency of the manufacturing process, it is desirable that the insulating substrate 1 is formed of, for example, a large-sized insulating substrate. That is, formation of via-hole conductors 2 and 3, lower electrodes 11 and 21, thin-film dielectric layers 12 and 22, upper electrode 1
3, 23, and furthermore, the insulating protective layers 14, 24 can be formed over a plurality of element regions. In the final step, the large substrate can be cut or divided according to each element region.

The insulating substrate 1 is formed by forming a through-hole serving as a first via-hole conductor 2 and a second via-hole conductor 3 in a portion to be each element region of a large ceramic green sheet by punching, laser or the like. Thereafter, the conductive paste can be formed by filling the conductive paste while sucking it, and baking it together with the green sheet.

As the above-mentioned insulating substrate 1, alumina, sapphire, MgO single crystal, SrTiO ₃ single crystal or the like is used.

In particular, alumina and sapphire are desirable from the viewpoints of low reactivity with the thin film, low cost, high strength, and crystallinity of the metal thin film.

The lower electrodes 11 and 21 and the upper electrode 1
Reference numerals 3 and 23 include platinum (Pt), gold (Au), palladium (Pd), and copper (Cu) thin films, among which platinum (Pt) and gold (Au) thin films and low-resistance copper (Cu) ) Thin films are optimal. This is because Pt and Au have low reactivity with the dielectric and are hardly oxidized, so that a low dielectric constant phase is hardly formed at the interface with the dielectric.

Further, the thin film dielectric layers 12 and 22 have a high dielectric constant in a high frequency range. The thin film dielectric layers 12 and 22 are made of, for example, P as a metal element.
A dielectric thin film made of a perovskite-type composite oxide crystal containing b, Mg, and Nb, and having a measurement frequency of 300 MHz
A dielectric thin film having a relative dielectric constant (at room temperature) of 1,000 or more is desirable.

In the present invention, other than a dielectric thin film composed of a perovskite-type composite oxide crystal containing Pb, Mg and Nb, for example, a perovskite-type composite oxide crystal containing Ba and Ti, PZT, PLZT, SrTiO ₃ , T
a ₂ O ₅ or the like may be used. Such thin film dielectric layers 12, 22
Is manufactured by a known method such as a PVD method, a CVD method, and a sol-gel method.

The pair of protruding electrodes 15 and 16 are formed by filling and printing a conductive paste such as silver in each opening of the insulating protective layer 14, and then heating and curing the paste. Further, the surface may be plated with nickel or solder, if necessary. The protruding electrodes 15 and 16 may be made of a material other than a silver-based material, such as palladium alloy, copper, nickel, gold, and solder. In addition to the filling of the conductive paste and the heat treatment, the projecting electrodes 15 and 16 may be formed by arranging spherical bumps of these materials and performing heat treatment.

The thin film capacitor elements 1a and 1b are formed on both the front and back surfaces of the insulating substrate 1 configured as described above. That is, since a plurality of capacitor elements are not stacked only on one surface side of the substrate, cracking of the elements, which is likely to occur when a plurality of capacitor elements are stacked, can be effectively prevented.

In addition, since the capacitances of the two capacitor elements are combined, a high-capacity capacitor can be obtained without increasing the mounting area (insulating substrate 1).

In electrically connecting the upper and lower capacitor elements 1a and 1b, the first and second capacitor elements formed near the outer periphery and the center of the insulating substrate 1 are connected.
Since the via-hole conductors 2 and 3 are used, there is no need to form a connecting means on the end face of the insulating substrate 1, and the manufacturing method is simplified, and the end face connecting means such as external impact does not need to be peeled off. , Stable connection can be maintained.

Next, the schematic steps of the manufacturing method of the present invention will be described.

First, a large-sized insulating substrate from which a large number of insulating substrates 1 including the first and second via-hole conductors 2 and 3 can be extracted at predetermined positions is prepared. A lower electrode 21, a thin-film dielectric layer 22, and an upper electrode 23 of the back-side device 1b are respectively formed in a predetermined shape on each of the device regions on the back surface region of the insulating substrate 1, and further, an insulating protective layer 24 is formed. I do.

Thereafter, the lower electrode 11, the thin film dielectric layer 12, and the upper electrode 13 of the front-side device 1a are formed in a predetermined shape on each of the device regions in the surface region of the insulating substrate 1, respectively. The protection layer 14 is formed. Then, a protruding electrode 15 is formed in an opening of the insulating protective layer 14 where the upper electrode 13 is exposed, and a protruding electrode 16 is formed in an opening of the insulating protective layer 14 where the lower electrode 11 is exposed.

Thereafter, the large-sized insulating substrate is divided and cut for each predetermined element region. Thereby, the thin film capacitor shown in FIG. 1 is achieved.

In another manufacturing process, the front-side element 1a and the back-side element 1b are formed simultaneously and in parallel. For example,
A lower electrode 11 of a front-side element is provided on both front and back surfaces of the insulating substrate 1.
The lower electrode 21 of the back side element is formed, followed by the thin film dielectric layer 12 of the front side element and the thin film dielectric layer 2 of the back side element.
2 is formed, the upper electrode 13 of the front-side element and the upper electrode 23 of the back-side element are formed, and the insulating protective layers 14 and 24 are further formed. After that, projecting electrodes 15 and 16 are formed in the openings of the insulating protection layer 24.

Thereafter, the large-sized insulating substrate is divided and cut for each predetermined element region. Thereby, the thin film capacitor shown in FIG. 1 is achieved.

In the embodiment shown in FIG. 1, the element 1a on the front side is
The lower electrode 11 has a substantially rectangular shape, and is connected to the second via-hole conductor 3. The upper electrode 13 of the element 1a on the front side has a ring shape, and the first via-hole conductor 2
Connected to

The structure of the surface side capacitor element 1a is
The structure shown in FIG. 4 may be replaced. The shape of the capacitor element shown in FIG. 4 is such that the lower electrode 41 has a ring shape, is connected to the first via-hole conductor 2, and is formed at the center of the lower electrode 41 so as to expose the second via-hole conductor 3. ing.

The thin-film dielectric layer 42 has a ring shape. The outer peripheral portion of the thin-film dielectric layer 42 is exposed on the lower electrode 41, and the outer peripheral portion of the lower electrode 41 is exposed. The second via-hole conductor 3 is formed so as to be exposed.

Further, the upper electrode 43 has a rectangular shape, and is formed on the thin film dielectric layer 42 so as to expose the outer peripheral portion of the thin film dielectric layer 42 at its outer edge and to the center thereof. The portion is formed so as to be connected to the second via-hole conductor 3.

Thereafter, an insulating protection layer 44 is formed. In the insulating protection layer 44, an opening exposing the lower electrode 41 is formed near the outer peripheral portion, and an opening exposing the upper electrode 43 is formed near the central portion.

Further, a protruding electrode 45 is formed in the opening connected to the lower electrode 41, and a protruding electrode 46 is formed in the opening connected to the upper electrode 43.

That is, even when the above-described front-side capacitor element 4a shown in FIG. 4 and the back-side capacitor element 1b shown in FIG. 1 are combined, the capacitance of the front-side capacitor element 4a and the capacity of the back-side capacitor element 1b are reduced. Can be synthesized, so that a thin film capacitor having a high capacitance component can be achieved.

Further, in the embodiment shown in FIG. 1, the lower electrode 21 to the upper electrode 23 of the backside element 1b are all substantially rectangular, and the lower electrode 21 is connected to the second via-hole conductor 3. The upper electrode 23 is connected to the first via-hole conductor 2.

The structure of the back side capacitor element 1b is
The structure of the capacitor element 1b shown in FIG. 5 may be replaced.

The lower-side capacitor element 5b shown in FIG. 5 is such that the lower electrode 51 has a ring shape and is connected to the first via-hole conductor 2;
Is formed so as to expose the via-hole conductor 3.

The thin-film dielectric layer 52 has a ring shape and is formed so as to cover the lower electrode 41 and expose the second via-hole conductor 3 at the center thereof.

Further, the upper electrode 53 has a substantially rectangular shape, is formed so as to cover the thin-film dielectric layer 52, and to be connected to the second via-hole conductor 3 at the center thereof.

After that, an insulating protective layer 54 is formed. The insulating protection layer 54 is formed so as to cover the entire upper electrode 53.

That is, even when the back side capacitor element 5b shown in FIG. 5 and the front side capacitor element 1a shown in FIG. 1 are combined, the capacitance of the front side capacitor element 1a and the capacity of the back side capacitor element 5b are reduced. Can be synthesized, so that a thin film capacitor having a high capacitance component can be achieved.

The structure of the front side capacitor element 1a in FIG. 1, the front side capacitor element 4a in FIG. 4, the back side capacitor element 1b in FIG. 1, and the back side capacitor element 5b in FIG. 5 are shown. May be combined.

In the above-described structure, the 2
Although the two capacitor elements are connected to each other via the via-hole conductor, the relationship between the first via-hole conductor 2 and the second via-hole conductor 3 is the relationship between the outer peripheral side and the inner side of the substrate. Protruding electrode 1 in FIG.
The area between 5 and 16 is also the outer side and the inner side.

Therefore, the distance between the first via-hole conductor 2 and the second via-hole conductor 3 closest to each other and the distance between the first and second protruding electrodes 15 and 16 closest to each other are changed in all relations. , Can be almost the same, and
That distance can be shortened. Furthermore, the direction of the current flowing from the lower electrode to the upper electrode is radial, and
Since the flow is divided, the inductance value can be reduced.

The first protruding electrode 15 and the lower electrode 1
In order to increase the effective area while preventing conduction between the first or second protruding electrode 16 and the upper electrode 13, the shape of the non-connection region around the protruding electrodes 15 and 16 is changed.
The shape may be substantially the same as 5 and 16.

[0090]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present inventor has proposed that a 2 mm × 2
mm thin film capacitor was formed and its characteristics were determined.

The lower electrodes 11, 21 and the upper electrodes 13, 2
3 is formed by a sputtering method. At this time, the substrate 1 is heated so that the temperature of the substrate 1 during sputtering film formation becomes constant. The target (electrode material) is the lower electrodes 11 and 21 and Au
In practice, a three-layer structure of Ti / Pt / Au may be used from the viewpoint of adhesion to the insulating substrate 1 and prevention of solder erosion. In addition, Pt was used for the upper electrodes 13 and 23.

The thin film dielectric layers 12 and 22 are made of acetic acid M
g and Nb ethoxide in a molar ratio of 1: 2, and refluxed in 2-methoxyethanol (24 hours at 124 ° C.)
To obtain a MgNb composite alkoxide solution (Mg = 4.7).
15 mmol, Nb10.05 mmol / 2-methoxyethanol 150 mmol) were synthesized, 15 mmol of lead acetate (anhydride) and 150 mmol of 2-methoxyethanol were mixed, and the Pb precursor solution was distilled at 120 ° C. And the MgNb precursor solution and the Pb precursor solution are mixed at a molar ratio of Pb: (Mg + Nb) = 1: 1, sufficiently stirred at room temperature, and mixed with Pb (Mg _1/3 Nb _2/3 ).
An O ₃ (PMN) precursor solution was synthesized. Then, the concentration of this solution is diluted about 3-fold with 2-methoxyethanol,
It was a coating solution.

Then, the coating solution is applied on the lower electrode layers 11 and 21 by a spin coater and dried.
Heat treatment was performed at 00 ° C. for 1 minute to produce a gel film. After repeating the operation of coating and heat treatment of the coating solution, baking is performed at 850 ° C. for 1 minute (in the air) to obtain a thin film dielectric layer 1 on the surface.
2, 22 were formed.

If a single thin film dielectric layer does not have a predetermined thickness in order to obtain a predetermined capacitance, this step may be repeated a plurality of times, for example, ten times, by applying and drying the dielectric coating solution. Repeat to obtain the required thickness.

The insulating protective layers 14 and 24 were formed by applying photosensitive polyimide or the like by spin coating.

Further, the protruding electrodes 15 and 16 were formed by filling and printing a silver-based conductive paste.

The thin film capacitor thus manufactured was
From 1.6 MHz to 1.61 GHz.
The measurement was performed using an impedance analyzer (HP42711A manufactured by Hewlett-Packard Company). as a result,
The thin film capacitor had a capacitance component of 1 μF and an inductance component of 50 pH.

After the above measurement, the cross section S
According to EM observation, the thickness of each thin film dielectric layer was 0.5 μm.
m.

Further, it is possible to arbitrarily change the inductance component at 1 μF of the capacitance component from 30 pH to 100 pH depending on the distance and the material of each of the protruding electrodes 15 and 16.

Conventionally, when a capacitor element having two layers is stacked on the surface of the insulating substrate 101, cracks close to 100% are formed on the lower capacitor element side in the heat treatment step. Occurred in

[0101]

As described above, in the thin film capacitor of the present invention, the capacitor element including the lower electrode, the thin film dielectric layer, and the upper electrode is formed on the front and back surfaces of the insulating substrate. Then, the capacitor element on the front side and the capacitor element on the back side are electrically connected via the first via-hole conductor and the second via-hole conductor. For this reason, since the capacitance component of the front-side capacitor element and the capacitance component of the rear-side capacitor element can be combined, a small-sized and large-capacity thin-film capacitor can be realized without increasing the mounting area.

Since the capacitor element is not laminated on the surface of the insulating substrate, peeling or cracking due to internal stress in the capacitor element hardly occurs in the manufacturing process.

[Brief description of the drawings]

FIG. 1 is a sectional view of a thin film capacitor of the present invention.

FIG. 2 is a plan view of an insulating substrate used for the thin film capacitor of the present invention.

FIG. 3 is an exploded perspective view of the thin film capacitor of the present invention.

FIG. 4 is a cross-sectional view showing another structure of the surface-side capacitor element of the present invention.

FIG. 5 is a sectional view showing another structure of the backside capacitor element of the present invention.

FIG. 6 is a third view showing a conventional thin film capacitor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 1st via-hole conductor 3 2nd via-hole conductor 11, 41 Lower electrode 12 of a surface side capacitor element Thin film dielectric layer 13 of a surface side capacitor element 13, 43 Upper electrode 14 of a surface side capacitor element 14, 44 Insulating protective layer of front side capacitor element 15, 16 Projecting electrode 21, 51 Lower electrode of rear side capacitor element 22, 52 Thin film dielectric layer of rear side capacitor element 23, 53 Upper electrode of rear side capacitor element 24, 54 Back side Insulation protection layer for capacitor element

Continued from the front page F-term (reference) 5E001 AB06 AC04 AC09 AC10 AE00 AE01 AE02 AE03 AG01 AH01 AH03 AH06 AH09 AJ01 AJ02 AZ01 5E082 AA01 AB03 BB02 BC33 CC05 EE05 EE18 EE23 EE26 EE37 FG26 FG03 FG04 GG04 FG03 FG04 FG26 JJ15 JJ23 KK01 KK07 LL03 MM23 MM24

Claims (5)

[Claims] An insulating substrate having a first via-hole conductor formed in the vicinity of the outer periphery so as to penetrate in a thickness direction of the substrate and a second via-hole conductor formed in a region surrounded by the first via-hole conductor; On one main surface, a first capacitor electrode connected to the first via-hole conductor and a second capacitor electrode connected to the second via-hole conductor sandwiching a thin-film dielectric layer on the one main surface, The element is arranged, and an insulating protective layer that is exposed by scattering the first capacitance electrode and the second capacitance electrode on the capacitor element is formed, and a protruding electrode is formed on the exposed portion. A capacitor element having a thin-film dielectric layer sandwiched between a first capacitor electrode connected to the first via-hole conductor and a second capacitor electrode connected to the second via-hole conductor on the other main surface of the insulating substrate Placed thin Capacitor. 2. The thin film capacitor element according to claim 1, wherein the second capacitor electrode is a lower electrode exposing a first via-hole conductor at an outer peripheral portion, and the thin film dielectric layer is a lower electrode at a central portion. And a thin film dielectric layer exposing a first via-hole conductor at an outer peripheral portion, and wherein the first capacitor electrode is an upper electrode exposing a part of a lower electrode at a central portion. The thin film capacitor according to claim 1, wherein 3. The thin film capacitor element according to claim 1, wherein the first capacitor electrode is a lower electrode exposing a second via-hole conductor at a central portion, and the thin film dielectric layer is a lower electrode at a central portion. 2. A thin-film dielectric layer exposing the second via-hole conductor and exposing a lower electrode in an outer peripheral portion, wherein the second capacitor electrode is an upper electrode exposing a lower electrode in an outer peripheral portion. 2. The thin film capacitor according to 1. 4. In the thin film capacitor element on the other main surface side, the second capacitor electrode is a lower electrode exposing a first via-hole conductor on an outer peripheral portion, and the thin film dielectric layer is a first electrode on an outer peripheral portion. 2. The thin film dielectric layer exposing a via hole conductor, wherein the first capacitor electrode is formed on the thin film dielectric layer and is an upper electrode facing the lower electrode. Thin film capacitors. 5. In the thin film capacitor element on the other main surface side, the first capacitor electrode on the lower surface is a lower electrode exposing a second via-hole conductor at a central portion, and the thin film dielectric layer is formed at a central portion. 2. A thin film dielectric layer exposing two via hole conductors, wherein the second capacitor electrode is formed on the thin film dielectric layer and is an upper electrode facing the lower electrode. 2. The thin film capacitor according to 1.