JP2002026858A  Transmission device adopting orthogonal frequency division multiplex modulation system  Google Patents
Transmission device adopting orthogonal frequency division multiplex modulation systemInfo
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 JP2002026858A JP2002026858A JP2000200692A JP2000200692A JP2002026858A JP 2002026858 A JP2002026858 A JP 2002026858A JP 2000200692 A JP2000200692 A JP 2000200692A JP 2000200692 A JP2000200692 A JP 2000200692A JP 2002026858 A JP2002026858 A JP 2002026858A
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 correlation value
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 230000001276 controlling effects Effects 0.000 claims abstract description 8
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Classifications

 H—ELECTRICITY
 H04—ELECTRIC COMMUNICATION TECHNIQUE
 H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
 H04L27/00—Modulatedcarrier systems
 H04L27/26—Systems using multifrequency codes
 H04L27/2601—Multicarrier modulation systems
 H04L27/2647—Arrangements specific to the receiver
 H04L27/2655—Synchronisation arrangements
 H04L27/2657—Carrier synchronisation

 H—ELECTRICITY
 H04—ELECTRIC COMMUNICATION TECHNIQUE
 H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
 H04L27/00—Modulatedcarrier systems
 H04L27/26—Systems using multifrequency codes
 H04L27/2601—Multicarrier modulation systems
 H04L27/2647—Arrangements specific to the receiver
 H04L27/2655—Synchronisation arrangements
 H04L27/2668—Details of algorithms
 H04L27/2673—Details of algorithms characterised by synchronisation parameters
 H04L27/2675—Pilot or known symbols

 H—ELECTRICITY
 H04—ELECTRIC COMMUNICATION TECHNIQUE
 H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
 H04L27/00—Modulatedcarrier systems
 H04L27/0014—Carrier regulation
 H04L2027/0016—Stabilisation of local oscillators

 H—ELECTRICITY
 H04—ELECTRIC COMMUNICATION TECHNIQUE
 H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
 H04L27/00—Modulatedcarrier systems
 H04L27/0014—Carrier regulation
 H04L2027/0083—Signalling arrangements
 H04L2027/0087—Outofband signals, (e.g. pilots)
Abstract
(CP) In a transmission device having a carrier structure in which a signal is inserted, a reception device is provided with the CP signal inserted in the carrier direction with the symbol of the signal being received and one symbol before the symbol of the signal being received. A means for calculating a correlation value between the CP signal at the same carrier position and a means for detecting the phase component of the calculated correlation value as an error in the local oscillation frequency of the receiving apparatus and controlling the local oscillation frequency; Configuration.
Description
[0001]
TECHNICAL FIELD The present invention relates to a transmission system,
Orthogonal frequency division multiplexing (Orthogonal frequency division multiplexing), which transmits information codes on a plurality of orthogonal carriers
A transmission device using quency division multiplexing (hereinafter, referred to as an OFDM system), and in particular, an OFDM system that modulates a plurality of carriers of the OFDM system with a modulation system using synchronous detection (hereinafter, referred to as a synchronous modulation system) And a method for synchronously reproducing a local oscillation frequency (Lo frequency) of the transmission apparatus.
[0002]
2. Description of the Related Art In recent years, in the field of wireless devices, the OFDM system has attracted attention as a modulation system resistant to multipath fading. ), And many applied researches are being conducted in fields such as wireless LAN. UH
For development trends and systems of Fband digital terrestrial broadcasting, see “Journal of the Institute of Image Information and Television Engineers” 1998 Vol. 5
2, No. 11 is disclosed in detail. As a conventional example, a system configuration of a UHF band terrestrial digital broadcasting system in Japan will be described. However, since this system has a very complicated configuration, the range necessary for understanding the present invention will be described in a simplified manner. FIG.
FIG. 2 is a diagram illustrating a carrier structure of the broadcasting system. The OFDM system is a system in which a large number of hundreds of carriers having a constant frequency fs interval are digitally modulated at a symbol frequency fs '(= 1 / Ts') and transmitted. Here, Ts' is the symbol period of the digital signal. In the case of the Japanese terrestrial digital broadcasting system, the number of carriers is about 1400, and these carriers are divided into 13 segment sections. As a signal to be transmitted, up to three channels (three layers) of information codes can be simultaneously transmitted, and the number of segments used by each layer and the modulation method can be freely selected. Within this selection mode,
All segments are converted to 64ary quadrature amplitude modulation (64 QAM: 64
The mode that modulates with the same synchronous modulation method such as Quadrature Amplitude Modulation is used as it is in FPU (Field Pickup
Unit) can be applied to other transmission devices. Here, as a conventional example of an OFDM transmission apparatus that modulates by a synchronous modulation method, a case where all segments are modulated by the same 64QAM and an information code of one layer is transmitted will be described in further detail.
FIG. 19 is a diagram for explaining the carrier structure of a segment modulated by the synchronous modulation method in more detail.
Here, in the case of a mode in which all segments are used for transmission of a onelayer information code, it may be considered that a similar structure is repeated over the band. In FIG. 19, the horizontal direction represents the frequency, the vertical direction represents the passage of time, and the squares “□” arranged in the horizontal and vertical directions each represent one carrier. Therefore, one column of square marks “□” arranged in the vertical direction is O
Represents one symbol that makes up the FDM signal. A square mark “□” written as “SP” indicates a position of a pilot signal used for reproducing a reference signal at the time of demodulation.
In addition, “□” in which nothing is written indicates a signal position modulated by 64QAM. Here, since the pilot signals are arranged in a frequency direction and a time direction, they are called SP (Scattered Pilot). However, FIG. 19 only schematically shows the arrangement of the SPs, and a TMCC (Transmission and Multiplexing Configurator) for control signal transmission, which should be described originally.
ation Control) carrier, additional information AC (Auxiliary Cha)
nnel) The carrier is omitted. In an actual digital terrestrial broadcasting system, twophase differential phase shift keying (DBPSK: Dif
A plurality of carriers that have been subjected to ferential binary phase shift keying) and are continuous in the time direction are randomly inserted between the carrier structures in FIG. 19 and transmitted. Further, in the terrestrial digital broadcasting system, the horizontal interval of carriers having SPs in the time direction is three intervals, whereas in FIG. 19, the interval is changed to five intervals. This is modified so as to facilitate the description of the present invention described later, and the essential contents are not changed. In other words, FIG.
It can be considered as one variation.
FIG. 20 shows a basic block configuration of an OFDM transmission apparatus. In the transmitting apparatus shown in the upper part of the figure, the information code to be transmitted is
The signal is modulated into a complex vector signal of the QAM system (hereinafter, referred to as 64QAM signal). The 64QAM signal obtained by the modulation is distributed to each carrier by the distribution circuit 2. At the same time, after a pilot (SP) signal, a TMCC code, an AC code, etc. are inserted, the IFFT circuit 3 performs an inverse discrete Fourier transform (IFFF).
T: Inverse Fast Fourier Transform). By this conversion, the 64QAM signal is converted into a baseband OFDM signal multiplexed by the OFDM method including about 1400 carriers that are orthogonal to each other and spaced apart from each other by the frequency interval fs, with the symbol interval being the time interval Ts ′. . Thereafter, as shown in FIG. 21, the guard interval insertion circuit 4 copies the end portion of each symbol of the OFDM signal to the previous symbol portion indicated by oblique lines to add a guard interval. This guard interval is inserted in order to increase the resistance to multipath fading, but has no direct relation to the object of the present invention, and a detailed description thereof will be omitted. The OFDM signal to which the guard interval is added is further input to the mixer 5 and after being frequencyconverted into a highfrequency band signal by the transmittingside local signal Lo ′ generated by the highfrequency transmittingside local (Lo) oscillator 6. The power is amplified and transmitted from the transmission antenna 7.
On the other hand, in the receiving device shown in the lower part of the figure, a received signal received by a receiving antenna 8 is amplified and then input to a mixer 9. The amplified reception signal is frequencyconverted by the receptionside local oscillator (Lo) generated by the receptionside local (Lo) oscillator 10 in the mixer 9, and the multiplexed baseband OFDM signal is reproduced. This OFDM signal is further subjected to a discrete Fourier transform (FFT) by the FFT circuit 11, and a baseband complex vector signal Z of each carrier is obtained.
(ns, nc). Here, ns represents the symbol number of the received signal, and nc represents the carrier number of the separated carrier. Complex vector signal Z of each separated carrier
(ns, nc) are rearranged in the original time order by the reverse procedure of the distribution circuit 2 in the coupling circuit 12, and the temporally continuous 6
It is returned to a 4QAM signal. Then, it is demodulated into an information code by the 64QAM demodulation circuit 13 and output. Although omitted in the above description of the circuit, to demodulate the received signal, the FF
In order to drive the T circuit 11, the synchronization of the clock frequency and symbol period generated in the receiving device and the local oscillation frequency (Lo frequency) for downconverting the carrier frequency to the baseband frequency is received. It is necessary to pull in to each same synchronization that the signal itself has. For this purpose, it is necessary to accurately detect the amount of deviation of each of these synchronizations and correct the frequency deviation. Therefore, in the receiving apparatus, detection of the amount of deviation of each synchronization is a very important factor. The synchronization detection circuit 14 is a circuit that detects this synchronization. Although there is no particular provision for this synchronization pullin method in the terrestrial digital broadcasting system,
"Journal of the Institute of Image Information and Television Engineers" Technical Report Vol. 23,
No. 28 discloses an example of the synchronization pullin method.
[0006] In the disclosed method, the frequency shift amount in units of the number of carriers of the local oscillation frequency is determined by TMCC, AC,
Utilizing high randomness regarding the position of a carrier inserted for transmitting an SP, a correlation value for a carrier position between a predetermined carrier position and a carrier position such as a TMCC of a received and demodulated signal is obtained. Detected. Further, the small frequency shift amount within one carrier interval of the local oscillation frequency is calculated by calculating the correlation (guard correlation) between the guard interval signal and the copy source signal in FIG. , The error is detected. Here, the former is referred to as coarse adjustment error detection in the sense of detecting a coarse adjustment error in units of the number of carriers, and the latter is referred to as fine adjustment error detection in the sense of a fine adjustment error detection. .
[0007]
However, in the abovedescribed conventional synchronization pullin method, a large number of special carriers having a highly random arrangement are required for detecting a coarse adjustment error. Therefore, when it is applied to a transmission device other than the terrestrial digital broadcasting system such as the FPU, a problem occurs that the carrier structure is greatly restricted. In this method, the local oscillation (Lo) frequency is, for example, 1.
If there is a shift of six lines, it is impossible to detect a shift of the number of lines unless the frequency of the line is exactly shifted by two lines so as to be able to demodulate a signal of a carrier such as TMCC. Therefore, there is a disadvantage that the pullin time of the initial synchronization becomes long. In the abovedescribed conventional synchronization pullin method, the fine adjustment error detection uses a guard correlation vector obtained by guard correlation. However, the guard correlation is for obtaining a correlation between OFDM signals having a waveform close to noise. Therefore, the guard correlation vector becomes a very noisy signal, reflecting a waveform close to the noise of the OFDM signal. FIG. 22 is a schematic diagram showing a state in which a plurality of guard correlation vector amplitude waveforms when the guard interval length is 64 clocks are displayed in a superimposed manner. The ratio is not very good. On the other hand, noise mixed into the control signal of the Lo frequency appears as fluctuation of the Lo frequency as it is. Furthermore, the noise is mixed with the demodulated signal of 64QAM, causing a problem of deteriorating the noise performance of the demodulated signal. Therefore, a detection method with small noise is required for the fine adjustment error detection which is always driven during the demodulation of 64QAM. In order to reduce the noise of the guard correlation vector, it is necessary to make the guard interval length as long as possible. However, if it is applied to a transmission apparatus other than the terrestrial digital broadcasting system such as the FPU, the guard interval length is greatly restricted. Problems arise. SUMMARY OF THE INVENTION It is an object of the present invention to provide a synchronous reproduction method capable of performing a coarse adjustment error detection without using a large number of special carriers having arrangements with high randomness.
Also, there is no restriction on guard interval length,
An object of the present invention is to provide a synchronous reproduction method capable of performing a fine adjustment error detection at a high SN ratio.
[0008]
According to the present invention, there is provided a transmission apparatus of an orthogonal frequency division multiplex modulation system for transmitting an information code using a plurality of orthogonal carrier waves (carriers). However, in a transmission apparatus having a carrier structure in which a pilot signal (CP signal) used for demodulation of a received signal is inserted at a predetermined carrier interval Mc in the carrier direction and continuously in the time direction, the transmission The correlation value between the CP signal inserted in the carrier direction with the symbol of the signal being received and the CP signal at the same carrier position one symbol before the symbol of the signal being received is set in the receiving device of the device. Calculating means, and a transmission device having means for detecting the phase component of the calculated correlation value as an error of the local oscillation frequency of the receiving device and controlling the local oscillation frequency. It was done. Further, in this transmission device, a correlation value signal ΣCP _{0} of a complex vector output from a means for calculating a correlation operation value of the CP signal is input, and an error signal representing an error of a local oscillation frequency of the reception device is calculated. And an error signal calculating means for outputting the error signal. Further, in this transmission device, a CP signal correlation operation circuit for calculating a correlation operation value of the CP signal, and a carrier in which the CP is inserted in a symbol of a signal being received.
A correlation value between a signal of at least one lower carrier adjacent to the (CP carrier) (lower adjacent carrier) and a signal of the same lower adjacent carrier one symbol before the symbol of the signal being received is calculated and calculated. Complex vector correlation value signal ΣC
A lower adjacent signal correlation operation circuit for outputting P _{1} , a signal of a carrier (upper adjacent carrier) adjacent at least one above the CP carrier of the symbol of the signal being received, and one symbol before the symbol being received An upper adjacent signal correlation operation circuit for calculating a correlation value between signals of the same upper adjacent carrier and outputting a calculated complex vector correlation value signal ΣCP _{+ 1,} and a correlation value output from the CP signal correlation operation circuit A signal ΣCP _{0} , a correlation value signal ΣCP _{1} output from the lower adjacent signal correlation operation circuit, and a correlation value signal ΣCP _{+1} output from the upper adjacent signal correlation operation circuit, This configuration has an error signal calculation circuit that calculates and outputs an error signal indicating a frequency error.
[0009] An orthogonal frequency division multiplex modulation transmission apparatus for transmitting an information code by a plurality of orthogonal carrier waves (carriers), wherein the carriers are arranged at a predetermined symbol interval Mt in the time direction and in the carrier direction. At a predetermined carrier interval Mc × Mt, a pilot signal (SP signal) used at the time of demodulation of a received signal is inserted, and the position where the SP signal is inserted is shifted Mc carrier for each symbol in the carrier direction. In the transmission device having the carrier structure described above, the signal of the carrier of the SP signal (SP carrier) inserted in the carrier direction with the symbol of the signal being received in the reception device of the transmission device, and the same carrier before the Mt symbol Means for calculating a correlation value between a signal of an SP carrier at a position and a phase component of the calculated correlation value, It is obtained by the transmission device comprising means for controlling the local oscillation frequency is detected as a frequency error. Further, in this transmission device, a correlation value signal ΣSP _{0} of a complex vector output from a means for calculating a correlation operation value of the SP signal is input, and the correlation value signal ΣS
An error signal calculation circuit that calculates and outputs an error signal representing an error in the local frequency of the receiving apparatus by using the plurality of correlation value signals 値 SP _{0} calculated using P _{0} or further consecutive symbols in the past. Have Further, in this transmission device, an SP signal correlation operation circuit that calculates a correlation operation value of the SP signal is adjacent to at least one carrier lower than a carrier (SP carrier) in which the SP is inserted in a symbol of a signal being received. Carrier (lower adjacent carrier)
And a lower adjacent signal correlation operation circuit that calculates a correlation value between the signal of the same signal and a signal of the same lower adjacent carrier one symbol before the symbol of the signal being received, and outputs a calculated complex vector correlation value signal ΣSP _{1.} , The symbol S of the signal being received
At least one carrier above P carrier
An upper adjacent signal that calculates a correlation value between a signal of the (upper adjacent carrier) and a signal of the same upper adjacent carrier one symbol before the symbol being received, and outputs a calculated complex vector correlation value signal ΣSP _{+ 1.} A correlation operation circuit, a correlation value signal ΣSP _{0} output from the SP signal correlation operation circuit, and a correlation value signal ΣSP _{1} output from the lower adjacent signal correlation operation circuit
And a plurality of sets of correlation value signals ΣSP _{0} , ΣSP calculated using the correlation value signal ΣSP _{+1} output from the upper adjacent signal correlation operation circuit, or further using consecutive symbols in the past.
An error signal calculation circuit for calculating and outputting an error signal representing an error in the local frequency of the receiving device using _{−1} and ΣSP _{+ 1} is provided.
Further, in this transmission apparatus, for each of Mt SP arrangements in which the SP carrier positions are different, the signal between the SP carrier signal of the SP arrangement and the SP carrier signal at the same carrier position before the Mt symbol is arranged. Mt which calculates the correlation value of the complex vector and outputs the correlation value signal ΣSP _{0} of the complex vector
SP signal correlation operation circuits and Mt correlation value signals ΣSP _{0} output from the Mt SP signal correlation operation circuits, and SP indicating the arrangement of SP carriers inserted in the symbol being received. S for calculating and outputting the arrangement number signal
It has a P arrangement calculation circuit. Further, in this transmission apparatus, for each of Mt SP arrangements having different SP carrier positions, the signal of the SP carrier of the SP arrangement and the signal of the SP carrier at the same carrier position Mt symbols before the symbol being received are compared. Mt SPs that calculate a correlation value between them and output a correlation value signal ΣSP _{0} of a complex vector
A signal correlation operation circuit, and for each of the Mt SP arrangements,
A correlation value between a signal of a carrier (lower adjacent carrier) at least one adjacent to the lower side of the arranged SP carrier and a signal of the same lower adjacent carrier Mt symbols before the symbol being received is calculated and calculated. Mt lower adjacent signal correlation operation circuits that output the complex vector correlation value signal ΣSP _{−1} , and, for each of the Mt SP arrangements, at least one upper carrier adjacent to the SP carrier of the SP arrangement (upper adjacent) ) And a signal of the same upper adjacent carrier Mt symbols before the symbol being received and a signal of the same upper adjacent carrier, and outputs the calculated complex vector correlation value signal ΣSP _{+1.} a signal correlation calculating circuit, the the Mt number of Mt number of correlation value signals .SIGMA.SP _{0} output from the pilot signal correlation calculating circuit, Mt number of phases that is output from the Mt number of lower adjacent signal correlation calculating circuit Value signal .SIGMA.SP _{1,} the Mt
Mt correlation value signals ΣSP _{+ 1} output from the upper adjacent signal correlation calculation circuits are input, and an SP arrangement number signal indicating the arrangement of SP carriers inserted in the symbol being received is calculated and output. It has an SP arrangement calculation circuit.
Further, in this transmission device, the S
An SP signal correlation operation circuit having a structure in which a P signal correlation operation circuit calculates and outputs the correlation value signal ΣSP _{0} of a signal of an SP carrier having the same SP arrangement for at least a period of Mt symbols or more. enter the correlation value signal .SIGMA.SP _{0} outputted from the correlation calculation circuit, SP carrier from the correlation value signal .SIGMA.SP _{0} past Mt symbols, which are inserted into the symbol being received, including a correlation value signal .SIGMA.SP _{0} symbols in reception Has an SP arrangement number calculating circuit for calculating and outputting an SP arrangement number signal representing the arrangement of. Further, in this transmission device, the SP signal correlation operation circuit, the lower adjacent signal correlation operation circuit, and the upper adjacent signal correlation operation circuit are configured to determine the correlation value of the SP carrier signal of the same SP arrangement for at least Mt symbols or more. An SP having a structure for calculating and outputting the signal ΣSP _{0} , the correlation value signal ΣSP _{1} of the lower adjacent carrier, and the correlation value signal ΣSP _{+1} of the upper adjacent carrier
A signal correlation operation circuit, a lower adjacent signal correlation operation circuit, and an upper adjacent signal correlation operation circuit, wherein each of the correlation value signals ΣSP output from the SP signal correlation operation circuit, the lower adjacent signal correlation operation circuit, and the upper adjacent signal correlation operation circuit _{0} , ΣSP _{1} and ΣSP _{+} _{1} are input, and the correlation value signals ΣSP _{0} and ΣS of the symbol being received are input.
P _{1} and {correlation value signal of past Mt symbols including SP _{+1} }
The configuration includes an SP arrangement calculation circuit that calculates and outputs an SP arrangement number signal indicating the arrangement of the SP carriers inserted in the symbol being received from SP _{0} , ΣSP _{−1} and ΣSP _{+1} .
An OFDM system using a synchronous modulation system corresponding to synchronous detection usually uses a carrier structure in which a pilot signal is inserted. In the present invention, a local
Both the (Lo) frequency error detection and the fine adjustment Lo frequency error detection are performed using this pilot signal. Therefore, there is no need for a large number of special carriers having arrangements with high randomness as in the related art. As a result, when examining the carrier structure according to the use, there is an effect that the carrier structure suitable for the use can be freely set without concern for the restriction on the arrangement and the number of special carriers.
In addition, since the guard interval is not used in the error detection processing of the present invention, the effect that the guard interval length can be set freely without any great restriction is obtained. Further, in the conventional coarse adjustment error detection, the frequency shift cannot be detected unless the signal of the carrier such as TMCC is demodulated once by pulling in the frequency shifted by the number unit. Therefore, there is a disadvantage that the pullin time of the initial synchronization becomes long. However, in the present invention, regardless of the amount of the Lo frequency shift at that time, L
o The shift of the frequency can be detected. Therefore, the effect of shortening the pullin time of the initial synchronization can be obtained. In the abovedescribed conventional synchronization pullin processing, the fine adjustment error detection uses a guard correlation vector obtained by guard correlation.
Since a large number of carriers having different frequencies are mixed in the OFDM signal, the time waveform has a waveform close to noise. On the other hand, according to the present invention, each signal included in the OFDM signal is separated, and a pilot signal is extracted from the signal to obtain a correlation value. That is, unlike an OFDM signal in which a large number of carriers are mixed, one by one
The S / N ratio of the pilot signal is a signal having the same good S / N ratio as the signal of the carrier modulated by 64QAM. Therefore, the calculated correlation value also has a higher SN ratio than the guard correlation vector. Also, in the finetuning error detection, detection with less noise can be performed. Thus, using the present invention, without using a large number of special carriers having a highly random arrangement,
The coarse adjustment error detection can be performed. Further, there is no restriction on the guard interval length, and the fine adjustment error detection can be performed at a high SN ratio.
[0013]
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of a circuit for detecting Lo frequency deviation according to the present invention will be described with reference to FIG.
In the present embodiment, unlike the conventional carrier structure of FIG. 19, a carrier structure in which pilot signals are continuously inserted in the time direction as shown in FIG. 2 is used. In order to clarify the difference from the SP in which pilot signals are sparsely inserted as shown in FIG. 19, in FIG. 2, symbols indicating pilot signal insertion positions are denoted by CP (Continual Pillar) emphasizing continuity.
ot). Although the order of the synchronization pullin procedure is reversed, a method of detecting a fine adjustment error will be described first for convenience of explanation. Pilot signal (CP) correlation operation circuit 110 and fine adjustment error signal calculation circuit 150 in FIG.
Are circuits related to the fine adjustment error detection. In FIG. 1, the output signal of the FFT circuit 11 expanded to the signal of each carrier is input to the CP correlation operation circuit 110. C
In the P correlation operation circuit 110, the signal CP (ns, 1 + m × Mc) of the receiving symbol ns of the carrier (CP carrier) into which the CP of FIG. 2 is inserted, and the symbol one symbol before the receiving symbol A correlation value between the signal (ns−1, 1 + m × Mc) at the same carrier position of (ns−1) is calculated and output. More specifically, according to the following equation, the correlation value signal ΣCP _{0} (n
s) is calculated and output. {CP _{0} (ns) = { _{m} {CP (ns, 1 + m × Mc) × CP ^{*} (ns−1, 1 + m × Mc)} (1) where Mc is a carrier interval for inserting the pilot signal CP in the carrier direction, m is an integer 0, 1, ..., H1,
H is the number of pilot signal carriers in one symbol,
(1 + m × Mc) represents the number of the carrier into which the CP carrier is inserted. In the case of FIG. 2, Mc = 5. Also,
CP ^{*} () represents the complex conjugate of CP (), and Σ _{m}
Represents summation with respect to the integer m.
The correlation value signal ΣCP _{0} (ns) output from the CP correlation operation circuit 110 is used as an error signal calculation circuit 1 for fine adjustment.
An error signal representing the amount of deviation of the Lo frequency is calculated by inputting the error signal to an input signal 50. Before starting the description, the meaning of the above equation (1) will be described in more detail. Generally, the phase of the complex vector signal CP (ns, 1 + m × Mc) greatly changes depending on the carrier position due to the influence of multipath fading or the like. However, the phase of the signal CP (ns1,1 + m × Mc) of the same carrier one symbol before is almost equal, and the direction of the complex vector obtained by complex multiplication in {} of the above equation (1) is The CP signal at the carrier position is also a complex vector oriented substantially in the direction of the real axis (I axis). The shift amount from the Iaxis direction of the phase angle of the complex vector obtained by the complex multiplication indicates the rotation speed of the phase of the CP signal during one symbol, and is proportional to the shift amount of the Lo frequency.
FIG. 3 schematically shows the operation of the above equation (1). Each solid line arrow in the figure represents a complex vector obtained by complex multiplication within {} of Expression (1). The circle at the end of each arrow represents the noise of the complex vector. The direction of each complex vector changes greatly one by one due to noise, but the phase angle of the complex vector after addition is the complex vector of A complex vector having a phase angle substantially equal to the average value of the phase angles, that is, the phase angle representing the shift amount of the Lo frequency. At this time, the amplitude of the complex vector after the addition increases by H times, which is the number of CP carriers, while the noise component increases only by ΔH times. Therefore, the complex vector after the addition becomes a signal having a very high SN ratio. If the CN ratio of the received OFDM signal is 64
Even if the code error rate is 10 ^{−2 in} QAM and the value is 22 dB, which is a noise level that cannot be used, for example, 80%
When adding the CP carriers, the SN ratio of the complex vector after the addition is 22 dB−3 dB + 19 dB = 38 dB.
Becomes Here, 3 dB is the amount of increase in noise due to complex multiplication, and 19 dB is the amount of noise reduction by addition 10 × l.
og (80). This result is obtained by calculating C in equation (1).
This shows that the noise component of the correlation value signal of the P signal can be almost ignored. Moreover, according to the present method, when the level of some CP signals is abnormally lowered due to the selective fading, the effect of automatically reducing the effect is obtained. That is, in the above equation (1), CP is calculated by complex multiplication.
Since the amplitude of the signal is squared, the amplitude of the signal after complex multiplication of the CP signal whose level has decreased due to the selective fading is further reduced, and hardly contributes to the addition result of the above equation. Therefore, it is possible to minimize the influence of noise mixed in the CP signal whose level has decreased. Conversely, the contribution of the CP signal whose level is increased and the SN ratio is high becomes very large, and the effect of greatly increasing the SN ratio of the correlation value signal obtained by addition is obtained.
Based on the above knowledge, a method of detecting a fine adjustment error will be described again. In FIG. 1, a correlation value signal ΣCP _{0} (ns) of a complex vector having a very high SN ratio output from the CP correlation operation circuit 110 is input to a fine adjustment error signal calculation circuit 150 for fine adjustment of Lo frequency. calculates and outputs error signal df _{d} used. As described above, the amount of shift θ の_{cp} of the phase angle of the calculated correlation value signal {CP _{0} (ns) from the I axis is proportional to the amount of shift of the Lo frequency. Therefore, the most accurate method is to use the correlation value signal {CP
_{0} (ns) is directly calculated, and an error signal df for fine adjustment is obtained.
Output as _{d} . However, a circuit for calculating an accurate phase angle of a complex vector generally has a disadvantage that the circuit scale becomes large. Incidentally, the signal for controlling the Lo frequency does not necessarily need to be a value that is accurately proportional to the deviation amount of the Lo frequency. Long as the direction of decreasing or increasing trend of the value match, it can be used as an error signal df _{d.}
An example of a method of calculating an error signal which satisfies this condition and can be realized by a relatively smallscale circuit will be described below. In this calculation method, the sufficiently small range phase angle Shitashiguma _{cp} is the correlation value signal ΣCP _{0} (ns), utilizes the following approximate equation holds. _{θΣ cp ≒ QΣ cp /  IΣ} cp  (2) where, describing the imaginary part of the correlation value signal ΣCP _{0} (ns) QΣ _{cp,} the real part and IΣ _{cp.} However, in this approximation formula, it exceeds Shitashiguma _{cp} 45 degrees, the value of the right side increases rapidly, as the curve shown by the broken line in FIG. 4, diverges to infinity at 90 °. Therefore, in practice, this approximate expression cannot be used near 90 degrees. In addition, in the above equation (2) only, 90
It is not possible to detect a large shift in Lo frequency such that a phase error of more than degree occurs. Therefore, the above equation (2)
Is improved to the following inequality. That is, first,  Q
The value of Σ _{cp}  /  IΣ _{cp}  is determined in advance. In this case, it referred to as the value and absqΣ _{cp.} When 0 ≦ absqΣ _{cp} <1, when the _{df d = sing (QΣ cp)} · absqΣ cp 1 ≦ absqΣ cp , when the _{df d = sing (QΣ cp)} · 1 IΣ cp ≦ 0 is df _{d} = and _{sing (QΣ cp) · 1 (} 3). Here, sing (QΣ _{cp)} represents the polarity of QΣ _{cp.}
[0018] indicates the value of the error signal df _{d} in FIG. 4,
It becomes a curve like a solid line. Here, the amount of deviation of the Lo frequency usually becomes an error amount of several degrees or less in a state where the synchronization is drawn. Therefore, df obtained by the above inequality
_{d} is a very good approximation, to match the radian value of the phase angle θΣ _{cp.} Therefore, the gain of the loop for controlling the Lo frequency can be easily set, and a stable loop system can be formed. Meanwhile, when the Shitashiguma _{cp} is shifted 45 degrees or more, the value of df _{d} when the shift particularly 90 degrees or more is made a small value in comparison with the radian value commensurate with that angle. Therefore, if the loop gain is adjusted to an optimum value in a normal pullin state, there is a disadvantage that the pullin time constant at this time becomes long. However, such a large frequency shift rarely occurs once the synchronization is pulled in. Moreover, even if it happens, the synchronization can be surely drawn. As breakpoints of FIG. 4, it chose that becomes a absqΣ _{cp} = 1, can be selected to any value. However, due to circuit fabrication, absq @ _{cp}
It is advantageous to choose a value of a power of two, such as = 2. As described above, using the CP correlation operation circuit 110 and the error signal calculation circuit 150 for fine adjustment shown in FIG. In addition, highly accurate fine adjustment error detection can be performed.
Although the order is reversed, a method of detecting a coarse adjustment error in the circuit of FIG. 1 will now be described. In FIG. 1, the detection of the error amount for the coarse adjustment is performed by detecting the correlation value signal Σ of the complex vector output from the CP correlation operation circuit 110.
In addition to CP _{0} (ns), the lower adjacent signal correlation operation circuit 1
20 and the correlation value signals ΣCP _{−1} (ns) and ΣCP _{+1} (ns) output from the upper adjacent signal correlation operation circuit 130. Among them, the lower adjacent signal correlation operation circuit 120 includes:
Similarly to the CP correlation operation circuit 110, the output signal of the FFT circuit 11 is input, and the same operation as that of the CP correlation operation circuit 110 is performed. However, instead of calculating the correlation value of the CP carrier, the correlation value of the carrier immediately below the CP carrier is calculated. More specifically, the symbol ns being received
Signal Z (ns, (1 + m
× Mc) 1) and the signal Z (ns−) at the same carrier position as the symbol (ns−1) one symbol before the symbol being received.
A correlation value signal ΣCP _{−1} (ns), which is a correlation value between 1, (1 + m × Mc) −1), is calculated and output. In exactly the same way, the output signal of the FFT circuit 11 is also input to the upper adjacent signal correlation operation circuit 130 and the same operation as that of the CP correlation operation circuit 110 is performed. However, the upper adjacent signal correlation operation circuit 130 is
Contrary to the lower adjacent signal correlation operation circuit 120, a correlation value is calculated for a carrier that is one line higher than the CP carrier. More specifically, a signal Z (ns, (1 + m × Mc) +1) of a carrier adjacent to the CP carrier of the symbol ns being received.
And the symbol (n
s1) at the same carrier position as the signal Z (ns1, (1+
m × Mc) +1) which is a correlation value signal ΣCP _{+1}
(ns) is calculated and output.
The operations performed by these circuits are exactly the same as the operations performed by the CP correlation operation circuit 110.
The correlation value signals ΣCP _{−1} (ns) and CP _{+1} (ns) have very high SN ratios, similarly to the correlation value signal ΣCP _{0} (ns). Actually, these three circuits can use circuits having exactly the same circuit configuration except that the carriers used for the calculation are shifted by one carrier from each other. The correlation value signals ΣCP _{0} (ns), ΣCP _{−1} (ns), and ΣCP _{+1} (ns) output from the CP correlation operation circuit 110, the lower adjacent signal correlation operation circuit 120, and the upper adjacent signal correlation operation circuit 130.
It is input to the error signal calculation circuit 140 for rough tuning, and outputs where it calculates an error signal df _{r} for rough adjustment. Before explaining the calculation method performed by this circuit, the correlation value signals ΣCP _{0} (ns) and ΣCP _{−1} (n
s) and ΣCP _{+1} (ns) will be briefly described.
FIG. 5 is an explanatory diagram showing a state where the Lo frequency of the receiving apparatus is shifted from the carrier frequency of the CP carrier of the received signal by 0.7 lines. The horizontal axis is the frequency axis, and the carrier position is marked with a bold line scale. 0 on this scale
Indicates the position of the CP carrier indicated by the carrier counter of the receiving device. Thick arrows indicate the frequency position of the CP of the received signal and the magnitude thereof. FFT circuit 1 converts a received signal having a thick arrow CP signal
When the signal is expanded to each carrier at 1, a signal indicated by a thin arrow is obtained as a signal of each carrier. Here, the broken line curve is a curve of the sine function. The correlation value signal of the complex vector is obtained by complexly multiplying the signal of the thin arrow and adding H signals in accordance with the equation (1), and has substantially the same relationship as FIG. By the way, in addition to the CP signal,
Signals of adjacent carriers indicated by thick broken arrows are also included.
Therefore, in each carrier developed by the FFT circuit 11, in addition to the component of the CP signal indicated by the thin arrow, the component of the signal indicated by the thick broken arrow is mixed. However, since the adjacent carrier indicated by the thick broken arrow is modulated by 64QAM, it is a carrier whose phase changes randomly, and the phase of the mixed component is also randomly distributed. for that reason,
The phase of the complex vector obtained by complex multiplication of the CP signal is
All CPs are almost the same, and are multiplied by H by the addition at the time of obtaining the correlation value, whereas the components mixed from the adjacent carriers indicated by the thick broken arrows are canceled out and become smaller. As a result, the correlation value signal ΣCP _{0} (ns), ΣCP
_{1} (ns) and ΣCP _{+1} (ns) can be approximated to consist of only the components of the CP signal indicated by the thin arrow.
[0022] Based on above facts, the method of calculating the error signal df _{r} for coarse adjustment in the error signal calculation circuit 140 for rough tuning is described. First, the three correlation value signals ΣCP _{0} (ns), ΣCP _{−1} input to the error signal calculation circuit 140
The magnitudes of the amplitudes of (ns) and 振幅 CP _{+1} (ns) are compared, and the carrier having the maximum amplitude value is determined. When the amplitude value of the correlation value signal ΣCP _{0} (ns) is the maximum, df _{r} = 0 radians (for zero lines), and when the amplitude value of the correlation value signal ΣCP _{1} (ns) is the maximum, df _{r} = −2π radians (−1), and when the amplitude value of the correlation value signal ΣCP _{+1} (ns) is the maximum, df
_{Let r} = + 2π radians (+1). By this calculation, the deviation amount of the Lo frequency can be calculated with an accuracy of ± 0.5 lines. For example, in the case of FIG. 5, the amplitude value of the correlation value signal ΔCP _{+1} (ns) at the carrier position closest to the frequency of the CP signal indicated by the thick arrow is the largest. Therefore, df _{r} = + 2π radians, and it is possible to detect that the Lo frequency is shifted by +1 with an accuracy of ± 0.5.
The method using the amplitude of the correlation value signal can further increase the detection accuracy. This method applies the Lo frequency shift amount calculation method using a CW signal described in JPA114209 to three correlation value signals. One of the calculation methods will be described, and an example of application to the present invention will be described. In FIG. 5, when the carrier number of the correlation value signal giving the maximum amplitude value Rmax is nmax, and the carrier number of the correlation value signal giving the next largest amplitude value Rnext is nnext in FIG.
The position of the CP signal represented by the thick arrow is approximately represented by the following equation. df _{r} = 2π × [(Rmax × nmax + Rnext × next) / (Rm
ax + Rnext)] Here, in the case of FIG. 5, nmax = + 1 and nnext = 0. However, to further reduce the amount of calculation, an approximation calculation by the following inequality, calculates an error signal df _{r.} Rmax / 2>
When Rnext when the df _{r} = 2π × nmax + 0 radian Rmax / 2 ≦ Rnext, due _{df r = 2π × (nmax +} nnext) / 2 radians this operation, at about ± 1/4 duty precision, the Lo Frequency A shift can be detected. In order to obtain a finer value, a division value with a smaller bit shift such as Rmax / 4 or a comparison with an addition / subtraction value therebetween may be performed. As described above, by using the CP correlation operation circuit 110, the lower adjacent signal correlation operation circuit 120, the upper adjacent signal correlation operation circuit 130, and the coarse adjustment error signal calculation circuit 140 of FIG. Without using a large number of special carriers having an arrangement, L in units of the number of carriers is used.
o The shift amount of the frequency can be detected. In addition, once the frequency is shifted by the number of lines, the amount of deviation of the number of units, and in some cases, the amount of deviation of the number of lines or less, is eliminated without performing unnecessary operations such as detecting the amount of deviation of the number of lines. Can also be detected.
The Lo control signal calculation circuit 160 in FIG. 1 calculates the final Lo frequency from the error signals df _{r} and df _{d} output from the coarse adjustment error signal calculation circuit 140 and the fine adjustment error signal calculation circuit 150. This is a circuit for calculating the control signal of FIG. 6 shows a configuration example of this circuit. Error signal df _{r} for rough tuning, after being 1 / A _{r} times, the error signal selecting circuit 1
Input to 61. Similarly, an error signal df for fine adjustment
_{d is} also multiplied by 1 / A _{d} and then input to the error signal selection circuit 161. Here, _{Ar} and _{Ad} are constants defining the loop gain of the control system for coarse adjustment and constants respectively defining the loop gain of the control system for fine adjustment. Where A _{r}
<Is set to a value that the A _{d,} the time constant of the rough adjustment shorter than the time constant of the fine adjustment, it is possible to shorten the initial pullin time. On the other hand, the error signal df _{r} for rough tuning,
At the same time, it is also input to the coarse adjustment protection circuit 162. When df _{r} = 0, the coarse adjustment protection circuit 162 outputs a coarse adjustment protection signal H indicating that the Lo frequency is within the accuracy of the coarse adjustment detection and that the synchronization in the coarse adjustment is drawn in. . Conversely, when df _{r} ≠ 0 for a certain number of symbols continuously, the state in which the coarse adjustment is drawn is released, and the coarse adjustment protection indicates that the coarse adjustment needs to be performed again. Signal L
Is output. The error signal selection circuit 161 has an error signal d
f _{r} / A _{r} and df _{d} / A _{d} , and further input a coarse adjustment protection signal,
One of the two error signals is selected and output as a control error signal dF. That is, when the coarse adjustment protection signal is a signal L indicating that df _{r} ≠ 0 continuously, df _{r} /
Output as dF Select A _{r,} performed rough adjustment of the Lo frequency.
On the other hand, when the coarse protection signal of the signal H indicating that the df _{r} = 0 is output as dF Select df _{d} / A _{d,} implementing fine adjustment of Lo frequency. The error signal dF output from the error signal selection circuit 161 is
The control signal Vco obtained by integration by being input to
nt is output as an output signal of the Lo control signal calculation circuit 160 in FIG. In this way, it is obtained from the correlation value of CP,
Control signal V output from Lo control signal calculation circuit 160
When cont is input to the VCO 170, when a large deviation of the number of carriers is generated in the Lo frequency, a control signal subjected to coarse correction for coarse adjustment is added, and when a small deviation of less than the number of carriers is generated. , A control signal subjected to fine correction for fine adjustment is added. Accordingly, the Lo frequency can be quickly and smoothly synchronized with the carrier frequency of the received signal regardless of the magnitude of the frequency shift. As described above, when the present embodiment is used, in the OFDM system using the synchronous modulation system, it is possible to perform both the error detection for the coarse adjustment of the Lo frequency and the error detection for the fine adjustment using the pilot signal normally inserted. For this reason, an effect is obtained in which a carrier structure suitable for the application can be freely set without regard to restrictions on the arrangement and the number of special carriers as in the related art. Similarly, there is an effect that the structure of the signal can be examined without concern for a large restriction on the guard interval length. In addition, regardless of the magnitude of the shift of the Lo frequency, it is possible to swiftly and smoothly synchronize with the carrier frequency of the received signal, and obtain the effect of shortening the pullin time of the initial synchronization. Further, there is an effect that the error detection for fine adjustment can be performed at a high SN ratio.
Next, a second embodiment of a circuit for detecting a shift in Lo frequency according to the present invention is shown in FIG. 7 and will be described below. In the present embodiment, the concept of the first embodiment is shown in FIG.
This is applied to the case where the pilot signal SP has a dispersed carrier structure as shown in FIG. That is,
In the present embodiment, instead of obtaining the correlation value of the CP signal, S
A correlation value of the P signal is obtained, and an error signal is calculated using the phase angle and the amplitude of the correlation value. However, in the carrier structure of FIG. 19, pilot signal SP is intermittently inserted in the time direction. At the same time, the carrier position where the SP is inserted is the SP position (SP arrangement 0) of the symbol indicated by the alternate long and short dash line 15 in FIG.
P position (SP arrangement 1),... SP of the fourth symbol
The SP arrangement from SP arrangement 0 to SP arrangement 3 is repeated, such as position (SP arrangement 3).
Is significantly different from the first embodiment in that the carrier position moves. In order to cope with this situation, in the circuit of FIG. 7, the same four pilot signal (SP) correlation operation circuits 210 to 210 as the number of types of arrangement of SPs in the carrier direction shown in FIG.
213 are provided. Furthermore, a modification is made so as to calculate a correlation value between the carrier of the symbol ns being received and the carrier (nsMt) before the Mt symbol, which is the same as the SP interval in the time direction. That is, SP
In pilot signal correlation operation circuit 210 in arrangement 0, signal Z at the SP position of symbol ns (SP arrangement 0) being received is
(ns, 1 + m * Mc * Mt) and the signal Z (nsMt, 1 + m * Mc * Mt) at the same carrier position with the symbol (nsMt) preceding the symbol being received by Mt symbols.
A calculation similar to the above equation (1) is performed between the above and the correlation value signal ΣSP ^{(0)} _{0} (ns) of the SP arrangement 0 is calculated and output. Here, Mc is the number of intervals between carriers (pilot carriers) in which SPs are inserted in the time direction. In FIG. 19, Mt = 4 and Mc = 3. The reason why Z () is used instead of SP () in the above description is that the (1 + m × Mc × Mt) carrier is not always SP depending on the symbol number being received. .
Similarly, in pilot arrangement correlation operation circuit 211 of SP arrangement 1, signal Z (ns, (1 + m × Mc × Mt) + Mc) located at the SP position of SP arrangement 1 is Mt symbols before the symbol being received. The signal Z (nsMt, (1 + m * Mc * Mt) + M at the same carrier position at (nsMt)
The correlation value signal ΣSP ^{(1)} _{0} (ns) of the SP arrangement 1 between c and c) is calculated and output. Similarly, in pilot signal correlation operation circuit 212 of SP arrangement 2 and pilot signal correlation operation circuit 213 of SP arrangement 3, SP arrangement 2 and S
A correlation value signal ΣSP ^{(2)} _{0} (ns) of SP arrangement 2 and a correlation value signal ΣSP ^{(3)} _{0} (ns) of SP arrangement 3 which are correlation value signals for the SP arrangement of P arrangement 3 are calculated and output. Exactly in the same way, the lower adjacent signal correlation operation circuits 220 to 223 corresponding to the pilot signal correlation operation circuits of SP arrangement 0 to SP arrangement 3 are also used for the lower adjacent signal correlation operation circuit and the upper adjacent signal correlation operation circuit. And the upper adjacent signal correlation operation circuit 2
30 to 233 are provided. Then, from each of the lower adjacent signal correlation calculation circuits 220 to 223, the correlation value signal Σ
From CP ^{(0)} _{1} (ns), the correlation value signal ＳＰCP of SP arrangement 3
^{(3)} Output four correlation value signals up to _{1} (ns). Also, from each of the upper adjacent signal correlation operation circuits 230 to 233,
From the correlation value signal ΣCP ^{(0)} _{+1} (ns) of SP arrangement 0, SP
Four correlation value signals up to the correlation value signal ΣCP ^{(3)} _{+1} (ns) in arrangement 3 are output.
Further, in FIG. 7, similarly, S
In order to cope with the situation where the carrier position of P moves, S
A P arrangement calculation circuit 280 is newly provided. The SP arrangement calculation circuit 280 is a circuit that detects and outputs the SP arrangement number of the symbol being received using the input 4 × 3 = 12 correlation value signals. This SP arrangement detection circuit 280
8 shows the internal circuit configuration. SP placement detection circuit 2
The SP arrangement detection circuit 281 constituting the circuit 80 detects the SP arrangement number Nt 'of the symbol being received, the symbol counter 282 is a counter for counting up the SP arrangement number Nt, and the SP arrangement protection circuit. 283
Is a protection circuit against the synchronization of the cycle of the SP arrangement. S
The twelve correlation value signals input to the P allocation calculation circuit 280 are input directly to the SP allocation detection circuit 281. Here, a set of three correlation value signals ΣCP ^{(n)} _{1} (ns), ΣCP ^{(n)} _{0} (ns), and ΣCP ^{(n)} _{+1} for SP arrangements n = 0 to 3
The flow of (ns) is indicated by one thick line.
The SP arrangement detection circuit 281 compares the amplitude values of the twelve input correlation value signals and selects the number of the SP arrangement including the correlation value signal having the largest amplitude value. Then, the number Nt 'of the selected SP arrangement is output. At this time, the symbol counter 282 counts up and outputs the number Nt of the SP arrangement. Then, the signal is output from the SP arrangement calculation circuit 280 to the outside. At the same time, the number Nt of this SP arrangement is S
Along with the SP arrangement number Nt ′ detected and output by the P arrangement detection circuit 281, it is input to the SP arrangement protection circuit 283.
Then, it is detected whether or not the period of the SP arrangement is out of synchronization.
The procedure of the protection process using this circuit is shown in FIG.
This will be described with reference to the timing chart of FIG. FIG. 9A shows a signal of a symbol cycle output from the FFT circuit 11 of FIG. Each frame represents one symbol, and the number in the frame is the number Nt 'of the SP arrangement. On the other hand, FIG. 9C shows the SP arrangement number value Nt output from the symbol counter 282. The protection process described below is performed during a period during which there is no valid signal in each symbol period, for example, during a guard interval period. During a period during which a valid signal is present, the state of the symbol counter 282 is held. When the synchronization of the SP arrangement numbers is correctly performed, as shown in the left part of FIG. 9, the SP arrangement number value of the output signal of the FFT circuit in (a) and the output from the symbol counter 282 in (c). SP arrangement number values match. On the other hand, when the numbers of the SPs are out of synchronization, as shown in the center of FIG.
The SP arrangement number value of the T circuit output signal and the SP arrangement number value output from the symbol counter 282 are shifted from each other and do not match. In the SP arrangement protection circuit 283, the outofsynchronization of the SP arrangement number is determined by the SP arrangement detection circuit 28.
1 and the SP arrangement number Nt obtained by the symbol counter 282 is detected.
That is, when the input SP arrangement number values do not match, the number values in (a) and (c) of FIG. 9 deviate, indicating that the SP arrangement is out of synchronization. Therefore,
The relationship between these values is N continuously for a fixed number of symbols.
It is determined that t ≠ Nt ′, and it is detected that the SP arrangement is out of synchronization. Then, an SP shift signal H indicating that the SP arrangement is out of synchronization is output. This SP
The waveform of the outlier signal is shown in FIG.
In FIG. 8, the SP outofSP signal output from the SP arrangement protection circuit 283 is
Input to the load trigger terminal. Then, a value (Nt '+ 1) obtained by adding 1 to the number value Nt' of the SP arrangement output from the symbol counter 282 is loaded into the symbol counter 282, and the operation in the next symbol period is prepared. Here, +1 which is added extra is a countup amount of the counter, and the symbol counter 282 may count up. Normally, this onetime protection processing can complete the pullin of the SP arrangement number. However, if synchronization is still lost, the same operation is repeated until the synchronization is pulled in. By the above protection processing, the SP arrangement number N of the signal being received is determined by the SP arrangement calculation circuit 280 in FIG.
Continue to output the signal of t. If the synchronization is lost, it is automatically detected, corrected, and synchronized again.
In FIG. 7, the rough adjustment is performed in the following procedure. First, the output signal of the FFT circuit 11 is input to all of four pilot signal (SP) correlation operation circuits, four lower adjacent signal correlation operation circuits, and four upper adjacent signal correlation operation circuits. . Then, all of the 4 × 3 = 12 correlation value signals output from these circuits are input to the SP arrangement calculation circuit 280 and the coarse adjustment error signal calculation circuit 240. In the SP arrangement calculation circuit 280, the SP arrangement is synchronized by the above procedure, and the S
The numbers Nt = 0 to 3 of the P arrangement are calculated and output. on the other hand,
The coarse adjustment error signal calculation circuit 240 for, at the same time as entering the 12 correlation value signals, enter the number Nt of SP arrangement outputted from the SP location calculation circuit 280 calculates an error signal df _{r} for coarse adjustment Output. Here, FIG. 10 shows an example of the internal circuit configuration of the coarse adjustment error signal calculation circuit 240.
In FIG. 10, the correlation value signal selection circuit 241 calculates the SP allocation N of the symbol being received from the input 12 correlation value signals in accordance with the simultaneously input SP allocation number value Nt.
This is a circuit for selecting and outputting a set of three correlation value signals corresponding to t. Also in FIG. 10, the flow of a set of three correlation value signals for each SP arrangement is indicated by one thick line. The correlation value signal output from the SP correlation operation circuit of the SP arrangement Nt selected by the correlation value signal selection circuit 241, the correlation value signal output from the lower adjacent signal correlation operation circuit of the SP arrangement Nt, and the SP arrangement Nt Of the correlation value signals output from the upper adjacent signal correlation calculation circuit are input to the error calculation circuit 242. Then, the same operation as the error signal calculation circuit for coarse adjustment of the first embodiment was performed to calculate an error signal df _{r} for coarse adjustment,
Output. As the error calculation circuit 242, a circuit having the same configuration as the coarse adjustment error signal calculation circuit 140 of the first embodiment can be used.
As described above, in the case of the carrier structure of FIG. 19 in which pilot signals SP are scattered, as in the case of the first embodiment, a large number of special arrangements such as TMCC having a high randomness are arranged. It is possible to detect the shift amount of the Lo frequency in the unit of the number of carriers without using a suitable carrier. In addition, it is possible to immediately detect the amount of deviation in units of lines, and in some cases, the amount of deviation in units of lines or less, without having to perform unnecessary operations such as detecting the deviation in units of lines once the frequency is shifted to the frequency shifted in units of lines. can do. Also, the synchronization of the period of the SP arrangement in the carrier structure of FIG. 19 can be reproduced.
Next, the fine adjustment in FIG.
It is carried out in. First, the four SP correlation calculation circuits
All four input correlation value signals are converted to an error signal for fine adjustment.
Input to the calculation circuit 250. At the same time,
The SP arrangement number Nt output from the path 280 is input.
FIG. 11 shows the inside of the error signal calculating circuit 250 for fine adjustment.
3 is a circuit configuration example. Correlation value signal input and selected
Is the correlation output from the SP correlation calculation circuit of each SP arrangement.
Value signal ΣCP^{(n)} _{0}(ns), except for the point of FIG.
The road configuration and the circuit configuration in FIG. 10 are the same. That is,
In the correlation value signal selection circuit 251, the input four correlation value signals are output.
No. CP^{ } ^{(n)} _{0}(ns), the SP
In accordance with the value Nt of the number of the
Value signal ΣCP corresponding to the position^{(Nt)} _{0}Select (ns)
You. Then, the signal is selected by the correlation value signal selection circuit 251.
Correlation value signal of SP arrangement NtΣCP^{(Nt)} _{0}(ns) is the error
Input to the calculation circuit 252. Then, the fine adjustment of the first embodiment is performed.
In the same way as the adjustment error signal calculation circuit, the error signal for fine adjustment
df_{d}Is calculated and output. Error calculation circuit 252
The error signal calculation circuit 150 for fine adjustment of the first embodiment
A circuit having the same configuration as described above can be used. In this way,
The carrier structure shown in FIG. 19 in which the pilot signal SP is scattered.
In the case of fabrication, as in the first embodiment,
Guard phase independent of the interval length
Using a correlation value with an SN ratio sufficiently higher than Seki,
Adjustment error detection can be performed.
The Lo control signal calculation circuit 260 shown in FIG. 7 calculates the final Lo frequency from the error signals df _{r} and df _{d} output from the coarse adjustment error signal calculation circuit 240 and the fine adjustment error signal calculation circuit 250. Is a circuit for calculating the control signal Vcont. In the Lo control signal calculation circuit 260, the first
In the same manner as in the Lo control signal calculation circuit 160 of the embodiment,
The control signal Vcont of the final Lo frequency is calculated and output. As the Lo control signal calculation circuit 260, a circuit having the same configuration as the Lo control signal calculation circuit 160 can be used. The details of this processing are omitted because they are duplicated. Thus, the Lo control signal calculating circuit 26 is obtained from the SP correlation value.
When the control signal Vcont output from 0 is input to the VCO 170, as in the first embodiment, when a large deviation of the number of carriers is generated in the Lo frequency, the control with coarse correction for coarse adjustment is performed. When a signal is added and a small deviation equal to or less than the number is generated, a control signal subjected to fine correction for fine adjustment is added. Accordingly, the Lo frequency can be quickly and smoothly synchronized with the carrier frequency of the received signal regardless of the magnitude of the frequency shift.
As described above, when the present embodiment is used, even in the case of a carrier structure using SP as shown in FIG. 19, a pilot signal which is normally inserted in OFDM system using synchronous modulation system is used to obtain Lo frequency coarse. Both adjustment error detection and fine adjustment error detection can be performed. Therefore, similarly to the first embodiment, the effect that the carrier structure suitable for the application can be freely set without worrying about the restriction on the arrangement and the number of special carriers as in the related art can be obtained. Can be Further, there is an effect that the structure of the signal can be examined without concern for a large restriction on the guard interval length. Also, regardless of the magnitude of the Lo frequency shift, it is possible to swiftly and smoothly synchronize with the carrier frequency of the received signal, and obtain the effect of shortening the initial synchronization pullin time. In addition, error detection for fine adjustment is performed at high S
The effect which can be implemented by N ratio is acquired. Further, in this embodiment, the synchronization in the time direction with respect to the SP arrangement can also be reproduced.
FIG. 12 shows a third embodiment of the circuit for detecting a shift in Lo frequency according to the present invention. This embodiment is intended to reduce the circuit scale of the second embodiment. That is, in FIG. 7 of the second embodiment, although there are four pilot signal (SP) correlation operation circuits, four lower adjacent signal correlation operation circuits, and four upper adjacent signal correlation operation circuits,
In this embodiment, the number is one each. Accordingly, the circuit configuration of the SP arrangement calculation circuit 480 is changed, and an SP position generation circuit 490 for calculating and outputting the SP carrier position corresponding to the SP arrangement Nt of the symbol being received is newly provided. FIG. 13 shows an example of a circuit configuration inside the SP arrangement calculation circuit 480 used in this embodiment.
The symbol counter 482 is a counter that counts up the SP arrangement number Nt. Symbol counter 4
The count value Nt output from 82 is temporarily latched by the symbol hold circuit 484, and the output SP arrangement number value Nt is held while the valid signal is output from the FFT circuit 11. Symbol hold circuit 48
The SP arrangement number value Nt output from 4 is output outside the SP arrangement calculation circuit 480 as the SP arrangement number of the symbol being received.
The SP arrangement protection circuit 483 is a protection circuit for synchronizing the period of the SP arrangement. The procedure of the protection process using this circuit will be described with reference to the timing chart of FIG. FIG. 14A shows a signal having a symbol period output from the FFT circuit 11. Each frame represents one symbol, and the number in the frame is the number Nt 'of the SP arrangement. On the other hand, FIG. 14D shows the SP arrangement number value Nt output from the symbol hold circuit 484. The protection processing described below is performed during a period when there is no valid signal of each symbol.
For example, this is performed during the guard interval period, and during the period when there is a valid signal, the SP arrangement number value Nt output from the symbol hold circuit 484 is held. SP
When the arrangement numbers are correctly synchronized, as shown in the left part of FIG. 14, the SP arrangement number value of the output signal of the FFT circuit of FIG. 14A and the symbol hold circuit 48 of FIG.
The number of the SP arrangement output from No. 4 matches. on the other hand,
When the number of the SP arrangement is out of synchronization, the number of the SP arrangement output signal of the FFT circuit and the number of the SP arrangement output from the symbol hold circuit 484 are shifted from each other, as shown in the center of FIG. Will not match.
The SP arrangement protection circuit 483 detects the outofsynchronization of the SP arrangement number using the SP arrangement deviation signal dNt output from the SP arrangement detection circuit 481.
The procedure for calculating the SP dislocation signal dNt will be described later. The SP dislocation signal dNt input to the SP disposition protection circuit 483 indicates the difference between the number value of (a) and the number value of (c) in FIG. 14. While the value is a constant number of symbols, dNt ≠
It is detected by judging that it becomes 0. Then, an SP shift signal H indicating that the SP arrangement is out of synchronization is output. The waveform of this SP deviation signal is shown in FIG.
Shown in In FIG. 13, the SP deviation signal output from the SP arrangement protection circuit 483 is the SP arrangement calculation circuit 480.
Of the symbol hold circuit 4
Enter 84. The symbol hold circuit 484 having received the SP deviation signal H holds the S which is being held at that time.
As shown in (d) of FIG. 14, the P arrangement number is controlled so as to continue to hold the symbol period subsequent thereto. At the same time, the symbol hold circuit 484 outputs (c) of FIG.
And outputs a load pulse delayed by (Mt1) symbols from the SP loss signal H, and inputs the load pulse to the load trigger terminal of the symbol counter 482. Then, the added value (Nt + d) of the SP arrangement number value Nt held and output by the symbol hold circuit 484 and the SP arrangement deviation signal dNt is output.
Nt + 1) is loaded into the symbol counter 482. Here, +1 which is added extra is a countup amount of the counter.
On the other hand, in the symbol hold circuit 484, S stored in the symbol hold circuit 484
Immediately after outputting the load pulse, the P arrangement number Nt is set to the load value (Nt +
dNt + 1) to prepare for the operation in the next symbol period. Normally, this onetime protection processing can complete the pullin of the SP arrangement number. However, if synchronization is still lost, the same operation is repeated until the synchronization is pulled in. With the above protection processing, the SP arrangement calculation circuit 480 of FIG. 12 continuously outputs the SP carrier position signal corresponding to the SP arrangement number of the signal being received during the normal period in which the synchronization of the SP arrangement number is performed. . Also,
When synchronization is lost, this can be automatically detected and corrected, and the synchronization can be complemented again.
The SP arrangement displacement signal dNt used in the above protection processing is detected and output by the SP arrangement detection circuit 481. FIG. 15 shows an example of a circuit configuration inside the SP arrangement detection circuit 481. The SP arrangement calculation circuit 480 of FIG.
P correlation operation circuit 410 and lower adjacent signal correlation operation circuit 420
And the three correlation value signals output from the upper adjacent signal correlation operation circuit 430, and input them as they are to the SP arrangement detection circuit 481 in FIG. 15, the three correlation value signals input to the SP arrangement detection circuit 481 are sequentially input to a shift register including flipflops 610 to 613 in symbol units. Here, three
The flow of a set of correlation value signals is indicated by one thick line. One frame of the flipflop is a flipflop that stores three correlation value signals as one set. Therefore, the shift register always stores a total of 3 × 4 = 12 correlation value signals calculated using the past four symbols.
On the other hand, the SP arrangement selection circuit 620 is a circuit for calculating the SP arrangement displacement signal dNt for synchronizing the SP arrangement number described above. Here, 12 correlation value signals stored in a shift register composed of four flipflops are input, and a symbol including the correlation value signal having the largest amplitude value is selected. Then, the value dNt corresponding to the selected symbol is set to the SP dislocation signal dN.
Output as t. The value dNt is, for example, dNt = 0 when the correlation value signal of the flipflop 610 is selected, dNt = 1 or −3 when the correlation value signal of the flipflop 613 is selected, and the flipflop 612. D is selected when the correlation value signal of
Nt = 2 or −2, and when the correlation value signal of the flipflop 611 is selected, dNt = 3 or −1
And it is sufficient. When the values of dNt correspond to each other in this manner, S
The value of dNt when the synchronization of the P arrangement number is out of synchronization is such that the SP arrangement number Nt used when calculating the correlation value of the symbol being received is the same as the SP arrangement number Nt 'of the symbol being received. It indicates that it is out of alignment. The abovedescribed synchronization of the SP arrangement number may be performed using the SP arrangement deviation signal dNt. Note that the value dNt
If the value (dNt + 1) obtained by adding +1 in advance to the SP misalignment signal, the symbol counter 4 in FIG.
It is possible to omit the addition of +1 at the time of loading to 82.
FIG. 1 having the SP arrangement calculation circuit 480
In the circuit 2, the coarse adjustment is performed in the following procedure.
However, it is assumed that the SP arrangement numbers have already been synchronized. First, the SP arrangement number value Nt output from the SP arrangement calculation circuit 480 is input to the SP position generation circuit 490. Then, the SP position generation circuit 490 generates a symbol S corresponding to the input SP arrangement number value Nt.
A P carrier position is calculated and output as an SP carrier position signal. On the other hand, the output signal of the FFT circuit 11 is input to the SP correlation operation circuit 410, the lower adjacent signal correlation operation circuit 420, and the upper adjacent signal correlation operation circuit 430. Then, three correlation value signals of the symbol being received are calculated and output. Then, the three output correlation value signals are input to an error signal calculation circuit 440 for coarse adjustment. The error signal calculation circuit 440 for the coarse adjustment, in the same manner as the error signal calculation circuit 140 for the coarse adjustment the first embodiment calculates and outputs an error signal df _{r} for rough adjustment. Error calculation circuit 44
As 0, a circuit having the same configuration as the coarse adjustment error signal calculation circuit 140 can be used as it is. The details of this processing are omitted because they are duplicated. In this way, the same effect as in the second embodiment can be obtained for detecting the amount of deviation of the Lo frequency in units of the number of carriers. In the case of the circuit of FIG.
Since the arrangement number can be synchronized only in the Mt symbol period, there is a disadvantage that the synchronization pullin time is longer than in the second embodiment. Further, if the reception level largely changes before and after four consecutive symbols, an error occurs in the detected SP arrangement number, and the SP arrangement number cannot be synchronized. However, the number of correlation operation circuits shown in FIG. 7 can be greatly reduced, and a large effect that the circuit scale can be significantly reduced can be obtained.
In FIG. 12, the fine adjustment is performed in the following procedure. In the present embodiment, the same circuit as the fine adjustment error signal calculation circuit 150 in FIG. 1 is used as the fine adjustment error signal calculation circuit. That is, for each symbol, the correlation value signal output from the pilot signal correlation operation circuit 410 is input to the fine adjustment error signal calculation circuit 150, and the fine adjustment error signal df _{d} is input as in the first embodiment. Is calculated and output. The details of this processing are omitted because they are duplicated. In this way, the circuit of FIG. 12 can obtain the same effect as that of the first embodiment with respect to the detection of the error for fine adjustment despite the carrier structure of FIG. 19 in which the pilot signal SP is dispersed. Finally, FIG. 12 summarizes the processing procedure for controlling the Lo frequency. FIG. 16 shows a circuit configuration example of the Lo control signal calculation circuit 460 used in this embodiment.
In the circuit shown in FIG.
6 is different from the circuit of FIG. That is, after the selection of df _{r} and df _{d} is performed, if the SP arrangement shift signal output from the SP arrangement calculation circuit 480 is H and the SP arrangement number is out of synchronization, the control error signal dF Is set to 0, and control is performed so that the Lo frequency does not change. Except for the above points, the operation method of the circuit in FIG. 16 is the same as the operation method of the circuit in FIG. When the control signal Vcont output from the Lo control signal calculation circuit 460 is input to the VCO 170 in the same manner as in the first embodiment, a large shift of the Lo frequency in units of the number of carriers occurs as in the first embodiment. Control signal that has been subjected to a coarse correction for coarse adjustment is added, and a control signal that has been subjected to a fine correction for fine adjustment is added when there is a slight deviation less than the number of lines. . Thus, the Lo frequency can be quickly and smoothly synchronized with the carrier frequency of the received signal regardless of the magnitude of the frequency shift.
As described above, also in the present embodiment, the same effect as that of the second embodiment can be obtained for detecting the shift amount of the Lo frequency in units of the number of carriers. In the present embodiment, since the synchronization of the SP arrangement number can be performed only in the Mt symbol period, there is a disadvantage that the synchronization pullin time is longer than in the second embodiment. Further, when the reception level largely changes before and after four consecutive symbols, an error occurs in the detection of the SP arrangement number, and the SP arrangement number cannot be synchronized. However, the number of the correlation operation circuits of the second embodiment shown in FIG. It should be noted that each of the embodiments described above is merely an example using a circuit configuration that can easily explain the basic concept, and it goes without saying that various circuit configurations having equivalent functions can be considered. For example, in the first embodiment, FIG.
The circuit scale can be reduced by sharing the complex multiplication circuit and the delay circuit. In the circuit of FIG. 1 according to the first embodiment, the pilot signal correlation operation circuit, the upper adjacent signal correlation operation circuit, and the lower adjacent signal correlation operation circuit are merely separated for ease of explanation. Also in the circuit of FIG. 7 or FIG. 12, there are many more variations, such as sharing of the adder circuit.
In the description of each of the above embodiments, the case where the error signal is calculated by the error signal calculation circuit immediately from the correlation value signal calculated from the pilot signal of the symbol being received has been described. . However, in order to further increase the SN ratio of the correlation value signal, it is apparent that the same operation may be performed after averaging the complex vectors of the correlation value signals of a plurality of symbols that are continuously input. . In particular, in the case of a carrier structure using SP, S
Since the number of P carriers is reduced, not only the correlation value signal of the input symbol being received but also a plurality of correlation value signals calculated in the past consecutive symbols is added to calculate the error signal, which results in a large SN. The effect of improving the ratio is obtained. Further, in the error signal calculation circuit for coarse adjustment, the same effect can be obtained by calculating the amplitude of the correlation value signal of consecutive symbols and then performing the averaging instead of the averaging of complex vectors of the correlation value signal. Obtainable. In each of the above embodiments, the variable range of the Lo frequency is ±
The description has been made assuming that the number is 1.5 or less. However, when the variable range is ± 1.5 or more, the number of the upper adjacent signal correlation operation circuits and the number of the lower adjacent signal correlation operation circuits are increased in accordance with the width of the variable range. Then, a correlation value signal for a carrier two carriers below the CP carrier or the SP carrier and a correlation value signal for a carrier only two carriers above the CP carrier or the SP carrier are calculated, and the amplitude values of the correlation value signals are also compared. Obviously, the carrier having the maximum value should be selected.
Further, in order to calculate the amplitude value of each correlation value signal, it is preferable to obtain the amplitude value accurately by the following √ [ I  ^{2} +  Q  ^{2} ]. However, in order to reduce the circuit scale, a simple absolute value may be calculated by the following equation ( I  +  Q ) and used instead. Further, in addition of sigma _{m} of the above equation implemented in the correlation calculation circuit (1), the upper end or lower end of the CP carrier or SP carrier,
In the lower adjacent signal correlation operation circuit or the upper adjacent signal correlation operation circuit, there occurs a symbol in which no carrier signal is to be added. Therefore, it is preferable to so except for CP carrier or SP carrier at both ends out the addition of sigma _{m} of formula (1). In the second embodiment and the third embodiment, it is needless to say that the number of carriers to be deleted is preferably the same in all the correlation operation circuits, and the level of the correlation value signal is preferably the same. Further, the case where the correlation value of CP or SP is used so that the effect of the present invention is clearly shown has been described above. However, TM
A similar correlation operation can be performed on CC and AC to control the Lo frequency. In particular, in the case of a carrier structure using SP, unlike SP, since a signal such as TMCC has a signal for each symbol, there is an advantage that there is no problem that it is necessary to wait for four symbols in synchronization with the SP arrangement number. However, usually, the number of carriers of a signal such as TMCC is smaller than the number of carriers of SP or CP. Therefore, not only does the SN ratio of the obtained error signal not increase so much, but it also has a disadvantage that it is easily affected by selective fading, which is not preferable. When using TMCC or the like, it is necessary to configure a circuit in consideration of the fact that a phase error exceeding 90 degrees cannot be detected because TMCC or the like is modulated by DBPSK. In particular, care must be taken in the design of the correlation operation circuit for coarse adjustment. In the above description, the description of the protection circuit has been minimized. Since there are many variations in the method of inserting the protection circuit and it cannot be written, the description is omitted.
[0048]
As described above, the present invention eliminates the need for a large number of special carriers having a highly random arrangement. Therefore, when examining the carrier structure according to the application, an effect is obtained in which the carrier structure suitable for the application can be freely set without regard to restrictions on the arrangement and the number of special carriers. In addition, since the guard interval is not used in this detection method, an effect that the guard interval length can be set freely without any great restriction is obtained.
FIG. 1 is a block diagram showing the configuration of a first embodiment of a Lo frequency deviation detection circuit according to the present invention;
FIG. 2 is a schematic view showing a carrier structure used in the first embodiment of the present invention.
FIG. 3 is a diagram illustrating a correlation operation according to the first embodiment of the present invention.
FIG. 4 is a characteristic diagram showing an error signal for fine adjustment according to the first embodiment of the present invention.
FIG. 5 is a characteristic diagram showing an error signal for coarse adjustment according to the first embodiment of the present invention.
FIG. 6 is a block diagram showing a Lo control signal calculation circuit according to the first embodiment of the present invention;
FIG. 7 is a block diagram showing the configuration of a second embodiment of the Lo frequency deviation detection circuit according to the present invention;
FIG. 8 is a block diagram showing a circuit configuration of an SP arrangement calculation circuit according to a second embodiment of the present invention;
FIG. 9 is a time chart for explaining the operation of the SP arrangement protection processing according to the second embodiment of the present invention;
FIG. 10 is a block diagram showing a configuration of a coarse adjustment error signal calculation circuit according to a second embodiment of the present invention;
FIG. 11 is a block diagram illustrating a configuration of an error signal calculation circuit for fine adjustment according to a second embodiment of the present invention.
FIG. 12 is a block diagram showing the configuration of a third embodiment of the Lo frequency deviation detection circuit according to the present invention;
FIG. 13 is a block diagram illustrating a circuit configuration example of an SP arrangement calculation circuit according to a third embodiment of the present invention;
FIG. 14 is a time chart for explaining the operation of the SP arrangement protection processing according to the third embodiment of the present invention;
FIG. 15 is a block diagram showing a configuration of an SP arrangement detection circuit according to a third embodiment of the present invention;
FIG. 16 is a block diagram showing a configuration of a Lo control signal calculation circuit according to a third embodiment of the present invention.
FIG. 17 is a block diagram showing the configuration of another circuit of the correlation operation circuit according to the first embodiment of the present invention;
FIG. 18 is a schematic diagram illustrating a carrier structure in a digital terrestrial broadcasting system in Japan.
FIG. 19 is a detailed explanatory diagram of a carrier structure in a digital terrestrial broadcasting system in Japan.
FIG. 20 is a block diagram showing a configuration of a basic block circuit of an OFDM transmission apparatus.
FIG. 21 is a schematic diagram for explaining a time waveform of an OFDM signal.
FIG. 22 is a diagram for explaining a waveform of a guard correlation vector.
1: 64QAM modulation circuit, 2: distribution circuit, 3: IFFT
Circuit, 4: guard interval insertion circuit, 5, 9: mixer, 7, 8: antenna, 10: receiving side Lo oscillator, 1
1: FFT circuit, 12: coupling circuit, 1364 QAM demodulation circuit, 14: synchronization detection circuit, 110, 210, 211,
212, 213, 410: Pilot signal correlation operation circuit, 120, 220, 221, 222, 223, 42
0: lower adjacent signal correlation operation circuit, 130, 230, 23
1,232,233,430: upper adjacent signal correlation operation circuit, 140,240,440: error signal calculation circuit for coarse adjustment, 150,250: error signal calculation circuit for fine adjustment, 16
0, 260, 460: Lo control signal calculation circuit, 17
0: VCO, 161: error signal selection circuit, 162: coarse adjustment protection circuit, 163: integration circuit, 280, 480: S
P arrangement calculation circuit, 281, 481: SP arrangement detection circuit, 282, 482: symbol counter, 283, 48
3: SP arrangement protection circuit, 241, 251: correlation value signal selection circuit, 242, 252: error calculation circuit, 484: symbol hold circuit, 490: SP position generation circuit, 61
0, 611, 612, 613: flipflop, 62
0: SP arrangement selection circuit.
Claims (10)
A transmission apparatus, comprising: an error signal calculation circuit that calculates and outputs an error signal representing an error in a local frequency of the reception apparatus.
Mt SP signal correlation operation circuits that output _{0} ,
SP arrangement which receives Mt correlation value signals ΣSP _{0} output from the SP signal correlation operation circuits, calculates and outputs an SP arrangement number signal indicating an arrangement of SP carriers inserted in a symbol being received. A transmission device comprising a calculation circuit.
Mt SP signal correlation operation circuits for calculating a correlation value between the carrier signal and a complex vector correlation value signal ΣSP _{0} , and for each of the Mt SP arrangements, the SP carrier of the SP arrangement A correlation value between a signal of at least one lower adjacent carrier (lower adjacent carrier) and a signal of the same lower adjacent carrier Mt symbols before the symbol being received is calculated, and the correlation of the calculated complex vector is calculated. Value signal ΣS
Mt lower adjacent signal correlation operation circuits that output P _{−1} , and for each of the Mt SP arrangements, a signal of a carrier (upper adjacent carrier) adjacent at least one higher than the SP carrier of the SP arrangement; M that calculates a correlation value between signals of the same upper adjacent carrier Mt symbols before the symbol being received and outputs a calculated complex vector correlation value signal ΣSP _{+1}
t upper adjacent signal correlation operation circuits, Mt number of correlation value signals 0SP _{0} output from the Mt pilot signal correlation operation circuits, and Mt number of output signals from the Mt lower adjacent signal correlation operation circuits相関 SP _{−1} and Mt correlation value signals 出力 SP _{+1} output from the Mt upper adjacent signal correlation calculation circuits, and the arrangement of SP carriers inserted in the symbol being received is determined. A transmission apparatus comprising: an SP arrangement calculation circuit that calculates and outputs an SP arrangement number signal to be represented.
An SP signal correlation operation circuit, a lower adjacent signal correlation operation circuit, and an upper adjacent signal correlation operation circuit having a structure for calculating and outputting _{+1} ; the SP signal correlation operation circuit, the lower adjacent signal correlation operation circuit, and the upper adjacent signal The correlation value signals ΣSP _{0} , ΣSP _{1} and ΣSP _{+1} output from the correlation operation circuit are input, and the correlation value signals ΣSP _{0} , ΣSP _{1} and ΣS of the symbol being received are input.
Correlation value signals of past Mt symbols including P _{+1} {SP _{0} and
A transmission apparatus comprising: an SP arrangement calculation circuit that calculates and outputs an SP arrangement number signal indicating an arrangement of SP carriers inserted in a symbol being received from SP _{1} and ΣSP _{+1} .
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