JP2002026024A - Method of forming semiconductor layer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely reduce the resistance value of a p-type III-V compound semiconductor layer. SOLUTION: The method comprises a step for growing a low-temperature buffer layer 11, a GaN layer 12 and a p-type Al0.07Ga0.93N layer 13 on a sapphire substrate 10, a step for heating a tray mounting the substrate 10 quickly at a temperature rise rate of more than 0.3 deg.C/s from room temperature (25 deg.C) to 750 deg.C, a step for holding it at 750 deg.C for one hour, and a step for cooling it at a temperature fall rate of 10 deg.C/s to room temperature, thereby heat treating the p-type Al0.07Ga0.93N layer 13. This causes a temperature gradient in the p-type Al0.07Ga0.93N layer 13 in the vertical direction to the substrate, thereby discharging hydrogen atoms inactivating an n-type impurity.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a group III-V compound semiconductor layer used in a light emitting device that emits light in a short wavelength range from blue-violet light to ultraviolet light.

[0002]

2. Description of the Related Art In recent years, as a light source for next-generation high-density optical disks, there has been a growing demand for a light-emitting element that emits light in a short wavelength range from blue-violet to ultraviolet light. Research and development of III-V group compound semiconductor layers as main components have been actively carried out.

By the way, metal organic chemical vapor deposition (MOVP)
E) Mainly composed of gallium nitride grown by method III)
In the group V compound semiconductor layer, a p-type impurity is introduced to reduce the resistance. However, hydrogen atoms are bonded to the p-type impurity by the passivation of hydrogen.
The mold impurities are inactivated. For this reason, the p-type II
It is difficult to reduce the resistance of the IV compound semiconductor layer.

In Japanese Patent Application Laid-Open No. Hei 5-183189, after growing a p-type gallium nitride semiconductor layer on a substrate, the gallium nitride semiconductor layer is exposed to an atmosphere substantially free of hydrogen. A technique for evacuating hydrogen from a p-type gallium nitride semiconductor layer to activate p-type impurities by performing a heat treatment at a temperature of 500 ° C. or higher, thereby lowering the resistance of the p-type gallium nitride semiconductor layer Has been proposed.

Japanese Patent Application Laid-Open No. Hei 5-183189 discloses that when the above-mentioned heat treatment is applied to a p-type gallium nitride semiconductor layer, the resistivity of the p-type gallium nitride semiconductor layer becomes 1 ×.
It is described that it can be reduced to about 10 ⁶ Ω · cm to several Ω · cm.

[0006]

However, the present inventors have found that even if the p-type gallium nitride semiconductor layer is subjected to a heat treatment at a temperature of 500 ° C. or more in an atmosphere containing substantially no hydrogen, The fact that the resistivity of the type gallium nitride semiconductor layer cannot be reliably reduced to about 1 × 10 ⁶ Ω · cm to several Ω · cm has been encountered.

In view of the foregoing, it is an object of the present invention to ensure that the resistance of a p-type III-V compound semiconductor layer can be reduced.

[0008]

Means for Solving the Problems The present inventors have made various studies on measures to achieve the above object, and as a result, in the heating process of the heat treatment step, a compound semiconductor layer is caused to have a temperature gradient or a compound gradient. The atoms that inactivate the p-type impurities can be removed from the compound semiconductor layer by relaxing the stress of the semiconductor layer, and the p-type impurities can be rapidly cooled in the cooling process after heating. It has been found that the penetration of atoms into the compound semiconductor layer can be suppressed. The present invention has been made based on the above findings, and is specifically realized by the first to third semiconductor layer forming methods.

A first method for forming a semiconductor layer according to the present invention comprises the steps of forming a group III-V compound semiconductor layer into which a p-type impurity is introduced on a substrate, and performing a heat treatment on the compound semiconductor layer. The heat treatment step includes a step of generating a temperature gradient in the compound semiconductor layer in a process of heating the compound semiconductor layer, thereby removing an atom inactivating the p-type impurity from the compound semiconductor layer. Including.

[0010] According to the first method for forming a semiconductor layer, a temperature gradient is generated in the compound semiconductor layer when the compound semiconductor layer is heated, so that the p-type impurity is inactivated from the compound semiconductor layer. Can be eliminated, so that the resistance value of the compound semiconductor layer can be reliably reduced.

In the first method for forming a semiconductor layer, the temperature gradient is preferably formed in a direction perpendicular to the substrate.

With this configuration, the atoms inactivating the p-type impurities can be discharged from the entire surface of the compound semiconductor layer to the outside, so that the resistance value of the compound semiconductor layer can be reliably reduced.

[0013] In the first method for forming a semiconductor layer, the step of heating the compound semiconductor layer includes heating the compound semiconductor layer at a rate of temperature rise higher than 0.3 ° C./s, so that the compound semiconductor layer is bonded to the substrate. Preferably, the method includes a step of generating a temperature gradient in a vertical direction.

This ensures that a temperature gradient is generated in the compound semiconductor layer such that the substrate side is high and the surface side is low, so that the atoms inactivating the p-type impurities are formed in the compound semiconductor layer. It can be reliably discharged from the surface to the outside.

In the first method for forming a semiconductor layer, the step of heating the compound semiconductor layer is performed by heating the compound semiconductor layer at a temperature rising rate higher than 10 ° C./s, so that the compound semiconductor layer is perpendicular to the substrate. Preferably, a step of generating a directional temperature gradient is included.

In this way, an abrupt temperature gradient in which the substrate side is high and the surface side is low is reliably generated inside the compound semiconductor layer, and the atoms inactivating the p-type impurities are removed from the compound semiconductor layer. It can be more reliably discharged from the surface to the outside.

In the first method for forming a semiconductor layer, the step of heating the compound semiconductor layer includes the step of supplying a cooling gas to the surface of the compound semiconductor layer in a pulsed manner so that the temperature of the compound semiconductor layer in a direction perpendicular to the substrate is increased. Preferably, a step of generating a gradient is included.

In this way, a temperature gradient such that the substrate side is high and the surface side is low is reliably generated inside the compound semiconductor layer, and the atoms inactivating the p-type impurities are removed from the compound semiconductor layer. It can be reliably discharged from the surface to the outside.

In this case, the step of heating the compound semiconductor layer is performed in a nitrogen gas atmosphere, and the cooling gas is preferably hydrogen gas.

In this manner, in a heat treatment process usually performed, a hydrogen gas having a higher thermal conductivity than a nitrogen gas is used, so that the substrate side is high and the surface side is low inside the compound semiconductor layer. A temperature gradient can be reliably generated.

In the first method for forming a semiconductor layer, the temperature gradient is preferably formed in a direction parallel to the substrate.

With this configuration, the atoms inactivating the p-type impurities can be discharged to the outside from the surface of the low temperature portion of the compound semiconductor layer, so that the resistance value of the compound semiconductor layer can be reliably reduced. it can.

In the method of forming the first semiconductor layer, the step of heating the compound semiconductor layer includes heating the substrate on a first tray set to a first temperature, and then, bonding the substrate to the first tray. A step of causing the compound semiconductor layer to generate a temperature gradient in a direction parallel to the substrate by placing the compound semiconductor layer on a second tray set at a second temperature lower than the first temperature. preferable.

With this configuration, a temperature gradient in a direction parallel to the substrate can be reliably generated inside the compound semiconductor layer.

In the method of forming the first semiconductor layer, the step of heating the compound semiconductor layer includes heating the substrate on a first tray set at a first temperature, and then heating the substrate with the first tray. By placing the second tray set at a second temperature lower than the first temperature and a third tray set at a third temperature lower than the second temperature, the tray is placed over the second tray.
It is preferable to include a step of causing a temperature gradient in a direction parallel to the substrate in the compound semiconductor layer.

With this configuration, a temperature gradient in a direction parallel to the substrate can be more reliably generated inside the compound semiconductor layer.

In the first method for forming a semiconductor layer, the step of performing a heat treatment includes a step of performing a plurality of times of heating and cooling the compound semiconductor layer to generate a plurality of temperature gradients in the compound semiconductor layer. Is preferred.

With this configuration, the efficiency of discharging the atoms inactivating the p-type impurities from the compound semiconductor layer to the outside is improved, so that the resistance value of the compound semiconductor layer can be more reliably reduced. .

In the first method for forming a semiconductor layer, the compound semiconductor layer preferably contains nitrogen as a group III element.

By doing so, the light emitting element used in a light emitting element that emits light in a short wavelength range from blue-violet light to ultraviolet light can be used.
The resistance value of the group V nitride semiconductor layer can be reduced.

In this case, the compound semiconductor layer containing nitrogen is
It is preferably a clad layer, a contact layer or a light guide layer of a light emitting device.

With this configuration, the operating voltage of the light emitting element is reduced to reduce the power consumption, thereby suppressing the heat generation of the light emitting element and improving the reliability.

In a second method for forming a semiconductor layer according to the present invention, a step of forming a group III-V compound semiconductor layer into which a p-type impurity is introduced on a substrate, and a step of performing a heat treatment on the compound semiconductor layer The step of performing a heat treatment is a step of cooling the compound semiconductor layer after heating the compound semiconductor layer, whereby the atoms for inactivating the p-type impurities penetrate into the compound semiconductor layer by rapidly cooling the compound semiconductor layer. And a step of suppressing such a situation.

According to the second method for forming a semiconductor device, in the cooling step after the heating in the heat treatment step, the situation in which atoms for inactivating the p-type impurities enter the compound semiconductor layer can be suppressed. The resistance value can be reduced.

In the second method for forming a semiconductor layer, the step of cooling the compound semiconductor layer preferably includes a step of cooling the compound semiconductor layer at a temperature lowering rate higher than 0.3 ° C./s.

In this manner, in the cooling step of the heat treatment step, the situation where atoms for inactivating the p-type impurities enter the compound semiconductor layer can be reliably suppressed, so that the resistance value of the compound semiconductor layer is reliably reduced. be able to.

In the second method of forming a semiconductor layer, the step of cooling the compound semiconductor layer preferably includes a step of cooling the compound semiconductor layer at a temperature lowering rate higher than 10 ° C./s.

In this manner, in the cooling step of the heat treatment step, the situation in which atoms for inactivating the p-type impurities penetrate into the compound semiconductor layer can be suppressed more reliably, so that the resistance value of the compound semiconductor layer can be further increased. Can be reduced.

In the second method for forming a semiconductor layer, the step of cooling the compound semiconductor layer preferably includes a step of supplying a cooling gas to the surface of the compound semiconductor layer.

In this way, in the cooling step of the heat treatment step, the situation in which atoms for inactivating the p-type impurities enter the compound semiconductor layer can be reliably suppressed, so that the resistance value of the compound semiconductor layer is reliably reduced. be able to.

When the compound semiconductor layer is rapidly cooled by supplying a cooling gas to the surface of the compound semiconductor layer, the process of cooling the compound semiconductor layer is performed in a nitrogen gas atmosphere, and the cooling gas may be hydrogen gas. preferable.

In this way, in a normal heat treatment process, the case where atoms inactivating p-type impurities enter the compound semiconductor layer by using hydrogen gas having a higher thermal conductivity than nitrogen gas. Can be reliably suppressed.

In this case, the partial pressure of the hydrogen gas is preferably 33% or more.

This makes it possible to more reliably suppress the situation where atoms for inactivating the p-type impurities enter the compound semiconductor layer.

In the case of rapidly cooling the compound semiconductor layer by supplying a cooling gas to the surface of the compound semiconductor layer, the step of cooling the compound semiconductor layer is a step of supplying a cooling gas when the temperature of the substrate is 500 ° C. or less. It is preferable to include

This makes it possible to more reliably suppress the situation where atoms for inactivating the p-type impurities enter the compound semiconductor layer.

In the second method for forming a semiconductor layer, the compound semiconductor layer preferably contains nitrogen as a group III element.

In this way, the light emitting element used for emitting light in a short wavelength range from blue-violet light to ultraviolet light can be used as a light emitting element.
The resistance value of the group V nitride semiconductor layer can be reduced.

In this case, the compound semiconductor layer containing nitrogen is
It is preferably a clad layer, a contact layer or a light guide layer of a light emitting device.

By doing so, the operating voltage of the light emitting element is reduced to reduce power consumption, thereby suppressing heat generation of the light emitting element and improving reliability.

In a third method of forming a semiconductor layer according to the present invention, a step of forming a group III-V compound semiconductor layer into which a p-type impurity is introduced on a substrate, and a step of performing heat treatment on the compound semiconductor layer. The step of performing a heat treatment comprises removing, in the process of heating the compound semiconductor layer, atoms inactivating the p-type impurity from the compound semiconductor layer by relaxing internal stress of the compound semiconductor layer. Process.

According to the third method for forming a semiconductor layer, when the compound semiconductor layer is heated, the internal stress of the compound semiconductor layer is relaxed, so that the p-type impurity is inactivated from the compound semiconductor layer. Can be eliminated, so that the resistance value of the compound semiconductor layer can be reliably reduced.

In the third method for forming a semiconductor layer, the step of heating the compound semiconductor layer includes a step of relaxing the internal stress of the compound semiconductor layer by changing the pressure of the atmosphere in which the substrate is placed. Is preferred.

In this manner, in the ordinary heat treatment process, by changing the pressure of the annealing furnace, the situation in which atoms for inactivating the p-type impurities enter the compound semiconductor layer can be easily and reliably suppressed. can do.

In the case where the internal stress of the compound semiconductor layer is relaxed by changing the pressure of the atmosphere in which the substrate is placed, the step of heating the compound semiconductor layer includes a step of changing the pressure of the atmosphere higher than the atmospheric pressure. Is preferred.

This makes it possible to more reliably suppress the situation where atoms for inactivating the p-type impurities enter the compound semiconductor layer.

When the internal stress of the compound semiconductor layer is relaxed by changing the pressure of the atmosphere in which the substrate is placed, the process of heating the compound semiconductor layer is performed when the temperature of the substrate is 500 ° C. or less. It is preferable to include a step of changing.

This makes it possible to more reliably suppress the situation where atoms for inactivating the p-type impurities enter the compound semiconductor layer.

In the third method for forming a semiconductor layer, the compound semiconductor layer preferably contains nitrogen as a group III element.

In this manner, the light emitting element used in a light emitting device that emits light in a short wavelength range from blue-violet light to ultraviolet light is used.
The resistance value of the group V nitride semiconductor layer can be reduced.

In this case, the compound semiconductor layer containing nitrogen is
It is preferably a clad layer, a contact layer or a light guide layer of a light emitting device.

In this way, the operating voltage of the light emitting element is reduced to reduce the power consumption, thereby suppressing the heat generation of the light emitting element and improving the reliability.

[0063]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) Hereinafter, a method for forming a semiconductor layer according to a first embodiment of the present invention will be described.
This will be described with reference to FIGS.

In the first embodiment, a p-type compound semiconductor layer containing gallium nitride as a main component, for example, a p-type Al _x G, mainly used for a light emitting element (semiconductor laser element) having a short wavelength.
This is a method capable of realizing a reduction in the resistance of the a _1-x N semiconductor layer (0 ≦ x ≦ 1). However, the first embodiment is directed to another group III-V compound semiconductor layer into which a p-type impurity is introduced. Can be similarly applied.

First, after cleaning the surface of the sapphire substrate 10 using an acidic solution, the sapphire substrate 10 is
It is held on a susceptor in a reaction furnace (not shown) of the E apparatus, and then the inside of the reaction furnace is evacuated. Next, after the inside of the reaction furnace is set to a hydrogen atmosphere having a pressure of 40 kPa, the temperature of the reaction furnace is raised to about 1100 ° C. and the sapphire substrate 10 is heated, so that the surface of the sapphire substrate 10 Perform a minute of thermal cleaning.

Next, after the temperature of the reactor was lowered to about 500 ° C., trimethyl gallium (TMG) at a flow rate of 6 mL / min (standard state) and 7.5 mL / min were introduced into the reactor.
By supplying ammonia (NH ₃ ) gas at a flow rate of (standard state) and hydrogen as a carrier gas at the same time, a low-temperature buffer layer 11 made of a GaN layer having a thickness of 20 nm is formed on the sapphire substrate 10. Let it grow.

Next, the temperature of the reaction furnace is raised to about 1000 ° C., and a GaN layer 12 having a thickness of 0.5 μm is grown on the low-temperature buffer layer 11.

Next, 1.7 mL / min was introduced into the reactor.
(Standard state) trimethylaluminum (TMA);
Biscyclopentadienyl magnesium (Cp ₂ Mg: p-type impurity) of 30 mL / min (standard state) is additionally supplied, and p-type Al having a thickness of 0.7 μm is formed on the GaN layer 12. _{A 0.07} Ga _0.93 N layer 13 is grown.

Next, the sapphire substrate 10 is transferred from the reaction furnace of the MOVPE apparatus to the annealing furnace, and
0 is placed on a tray in the annealing furnace, the inside of the annealing furnace is once evacuated, and then nitrogen gas is introduced into the annealing furnace at a flow rate of 3 L / min (standard state) so that the inside of the furnace is at atmospheric pressure. To

Next, the tray on which the sapphire substrate 10 is placed is moved from room temperature (25 ° C.) to 750 ° C., from 0.15 ° C./s (0.15 ° C./s) to 150 ° C./s (150 ° C./s).
° C / s), hold at a temperature of 750 ° C for 1 hour, then 10 ° C / sec (10 ° C /
The p-type Al _0.07 Ga _0.93 N layer 13 is subjected to a heat treatment by cooling to room temperature at the temperature lowering rate of s).
In this heat treatment step, nitrogen gas is continuously introduced into the annealing furnace at a flow rate of 3 mL / min (standard state) to keep the inside of the furnace at atmospheric pressure.

When the heat treatment step is completed, the sapphire substrate 10 is taken out of the annealing furnace, and then the p-type Al _0.07
After a mask having openings of 2 mm in diameter at four corners of a square having a side of 5 mm is formed on the upper surface of the Ga _0.93 N layer 13, the sapphire substrate 10 is transferred to a vacuum evaporation apparatus.

Next, resistance heating is performed in a vacuum evaporation apparatus.
P-type Al_0.07Ga_0.93Approximately 5
nm-thick magnesium (Mg) film through a mask
After deposition, magnesium film by electron beam (EB)
A gold (Au) electrode having a thickness of about 200 nm
And p-type Al_0.07Ga_0.932 mm in diameter on the N layer 13
(Electrode for test) is formed. In addition, Magnesium
Film is p-type Al_0.07Ga _0.93Au between the N layer 13 and the gold electrode
It is provided to make it easy to make a mic contact.

Next, after taking out the sapphire substrate 10 from the vacuum evaporation apparatus, the sapphire substrate 10 is cut into a chip of 5 mm square so that the circular electrodes are located at the four corners, and thereafter, p-type Al _0.07 Ga _0.93 N In order to evaluate the electrical characteristics of the layer 13, a hole measurement is performed at room temperature.

FIG. 2 shows the relationship between the rate of temperature rise in the heat treatment step and the resistivity of the p-type Al _0.07 Ga _0.93 N layer 13. As is clear from FIG.
When the temperature is not more than 5 ° C./s, the resistivity is about 5Ω · cm.
When the temperature rise rate is higher than 0.3 ° C./s, the resistivity sharply decreases. When the rate of temperature rise is higher than 10 ° C./s, the resistivity becomes constant at about 4 Ω · cm. That is, when the rate of temperature rise is higher than 10 ° C./s, the decrease in resistivity is saturated.

The reason why the resistivity sharply decreases when the heating rate is higher than 0.3 ° C./s is considered as follows. That is, since the temperature rise rate is high, a temperature difference occurs between the sapphire substrate 10 and the p-type Al _0.07 Ga _0.93 N layer 13, and accordingly, the p-type Al _0.07 Ga _0.93
A sharp temperature gradient occurs in the laminating direction (the direction perpendicular to the substrate) inside the N layer 13. Hydrogen atoms that inactivate the p-type impurity (Mg) move from a high-temperature portion (substrate-side portion) to a low-temperature portion (front-side portion) in the p-type Al _0.07 Ga _0.93 N layer 13. Therefore, a p-type impurity (M
The hydrogen atom that inactivates g) is p-type Al _0.07 G
To move from the high temperature portion (portion on the substrate side) to the low temperature portion (portion on the surface side) of a _0.93 N layer 13, since the surface of the p-type Al _0.07 Ga _0.93 N layer 13 is efficiently discharged is there.

Therefore, the heating process in the heat treatment step is performed for 0.3
When the heating is performed at a heating rate higher than 10 ° C./s, the hydrogen atoms inactivating the p-type impurities can be efficiently discharged. In particular, when the heating is performed at a heating rate higher than 10 ° C./s, the discharging of the hydrogen atoms is performed. The efficiency is further improved.

The above experiment was performed on the p-type Al _0.07 Ga _0.93 N layer 13 having an Al composition of 7%.
For a p-type Al _x Ga ₁ -xN layer (0.07 <x ≦ 1) in which the Al composition is higher than 7%, the p-type impurity is heated at a heating rate higher than 10 ° C./s. Hydrogen atoms that inactivate hydrogen can be efficiently discharged.
Heating at a heating rate of 50 ° C./s or more further improves the efficiency of discharging hydrogen atoms.

(Modification of First Embodiment) In the heat treatment step in the first embodiment, the tray on which the sapphire substrate 10 is placed is moved from room temperature (25 ° C.) to 750 ° C.
After heating at a rate of 10 ° C. (10 ° C./s) per second until heating at a temperature of 750 ° C., p-type Al
_0. The hydrogen gas was introduced in pulses as ₀₇ Ga _0.93 cooling gas to the surface of the N layer 13 (and the step of introducing 10 seconds hydrogen gas performs repeated and non-introduction step of 10 seconds hydrogen gas), then, An experiment was also conducted in which the temperature of the tray was cooled to room temperature. In this case, 3 L /
Introducing only nitrogen gas at a flow rate of min (standard state), and in the step of introducing hydrogen gas, a mixed gas of nitrogen gas at a flow rate of 2 L / min (standard state) and hydrogen gas at a flow rate of 1 L / min (standard state) (Partial pressure of hydrogen gas: 33.3%).

In this way, p-type Al_0.07Ga_0.93
Abrupt in the lamination direction (direction perpendicular to the substrate) inside the N layer 13
Inactive p-type impurity (Mg)
Hydrogen atom is converted to p-type Al_0.07Ga_0.93N layer 1
From the high temperature part (substrate side part) in 3
To move to a lower site (surface side site), p-type Al
_0.07Ga_0.93It is efficiently discharged from the surface of the N layer 13.

By the way, in the first embodiment and its modified example, the heat treatment step is performed once, but instead, the heat treatment step (heating step and cooling step) is preferably performed a plurality of times. By doing so, p-type Al _0.07 G
Since a rapid temperature gradient in the stacking direction occurs a plurality of times inside the a _0.93 N layer 13, hydrogen atoms inactivating the p-type impurity (Mg) are _removed from the surface of the p-type Al _0.07 Ga _0.93 N layer 13. It is discharged more efficiently.

(Second Embodiment) Hereinafter, a method for forming a semiconductor layer according to a second embodiment of the present invention will be described with reference to FIGS.

In the second embodiment, a p-type compound semiconductor layer containing gallium nitride as a main component, for example, a p-type Al _x G, mainly used for a light emitting element (semiconductor laser element) having a short wavelength.
This is a method capable of realizing low resistance of the a _1-x N semiconductor layer (0 ≦ x ≦ 1). The second embodiment is directed to another III-V compound semiconductor layer into which a p-type impurity is introduced. Can be similarly applied.

First, as in the first embodiment, the MO
A p-type Al _0.07 Ga _0.93 N layer 13 having a thickness of 0.7 μm is grown on the sapphire substrate 10 via the low-temperature buffer layer 11 and the GaN layer 12 by the VPE method.

Next, the sapphire substrate 10 is transferred from the reaction furnace of the MOVPE apparatus to the annealing furnace,
0 is placed on a tray in the annealing furnace, the inside of the annealing furnace is once evacuated, and then nitrogen gas is introduced into the annealing furnace at a flow rate of 3 L / min (standard state) so that the inside of the furnace is at atmospheric pressure. To

Next, the tray on which the sapphire substrate 10 is placed is moved from room temperature (25 ° C.) to 750 ° C. for one second per second.
After heating at a heating rate of 0 ° C. (10 ° C./s), 750
℃ 1 hour, then 0.15 ℃ per second
The p-type Al _0.07 Ga _0.93 N layer 13 is subjected to a heat treatment step (heating step and cooling step) by cooling to room temperature at various cooling rates of (0.15 ° C./s) to 150 ° C. (150 ° C./s) per second. Process). In this heat treatment step, nitrogen gas is continuously introduced into the annealing furnace at a flow rate of 3 mL / min (standard state) to keep the inside of the furnace at atmospheric pressure.

When the heat treatment step is completed, the sapphire substrate 10 is taken out of the annealing furnace, and then the p-type Al _0.07
After a mask having openings of 2 mm in diameter at four corners of a square having a side of 5 mm is formed on the upper surface of the Ga _0.93 N layer 13, the sapphire substrate 10 is transferred to a vacuum evaporation apparatus.

Next, in a vacuum evaporation apparatus, about 5 μm is formed on the upper surface of the p-type Al _0.07 Ga _0.93 N layer 13 by a resistance heating method.
After depositing a magnesium (Mg) film having a thickness of nm through a mask, a gold (Au) electrode having a thickness of about 200 nm is deposited on the magnesium film by electron beam (EB), and p-type Al _0.07 2 mm in diameter on the Ga _0.93 N layer 13
(Electrode for test) is formed.

Next, after taking out the sapphire substrate 10 from the vacuum evaporation apparatus, the sapphire substrate 10 is cut into chips of 5 mm square so that the circular electrodes are located at the four corners, and then p-type Al _0.07 Ga _0.93 N Hall measurements were made at room temperature to evaluate the electrical properties of layer 13.

FIG. 3 shows the relationship between the temperature drop rate and the resistivity of the p-type Al _0.07 Ga _0.93 N layer 13 in the cooling step after heating in the heat treatment step. As is clear from FIG.
When the cooling rate is 0.3 ° C./s or less, the resistivity is about 5
Although the resistivity is Ω · cm, when the cooling rate is higher than 0.3 ° C./s, the resistivity sharply decreases. When the temperature drop rate is higher than 10 ° C./s, the resistivity becomes about 4 Ω · cm.
Becomes constant. That is, when the temperature drop rate is higher than 10 ° C./s, the decrease in the resistivity is saturated.

The reason why the resistivity sharply decreases when the cooling rate is higher than 0.3 ° C./s is considered as follows. That is, since the sapphire substrate 10 and thus the p-type Al _0.07 Ga _0.93 N layer 13 are rapidly cooled due to the high temperature drop rate, hydrogen atoms that inactivate the p-type impurities (Mg) are converted into p-type Al in the cooling process. _0.07 Ga
_0.93 N layer 13 situation in which the penetration is suppressed, thereby, it can greatly reduce the resistivity of the p-type Al _0.07 Ga _{0. 93} N layer 13.

Therefore, if the cooling step after heating in the heat treatment step is performed at a temperature lowering rate higher than 0.3 ° C./s, the penetration of hydrogen atoms for inactivating the p-type impurities can be suppressed, and in particular, 10 ° C./s When cooling is performed at a temperature lowering rate higher than s, penetration of hydrogen atoms can be further suppressed.

The above experiment was performed on the p-type Al _0.07 Ga _0.93 N layer 13 having an Al composition of 7%.
For a p-type Al _x Ga ₁ -xN layer (0.07 <x ≦ 1) in which the composition of Al is higher than 7%, p-type impurities are reduced by cooling at a temperature lowering rate higher than 10 ° C./s. Hydrogen atoms to be deactivated can be efficiently discharged.
The cooling effect at a temperature lowering rate of not less than ° C./s further enhances the effect of suppressing the entry of hydrogen atoms.

(Third Embodiment) A method for forming a semiconductor layer according to a third embodiment of the present invention will be described below with reference to FIGS.

In the third embodiment, a p-type compound semiconductor layer containing gallium nitride as a main component, for example, a p-type Al _x G, mainly used for a light emitting element (semiconductor laser element) having a short wavelength.
This is a method capable of realizing a reduction in the resistance of the a _1-x N semiconductor layer (0 ≦ x ≦ 1). The third embodiment relates to another III-V group compound semiconductor layer into which a p-type impurity is introduced. Can be similarly applied.

First, as in the first embodiment, the MO
A p-type Al _0.07 Ga _0.93 N layer 13 having a thickness of 0.7 μm is grown on the sapphire substrate 10 via the low-temperature buffer layer 11 and the GaN layer 12 by the VPE method.

Next, the sapphire substrate 10 is transferred from the reaction furnace of the MOVPE apparatus to the annealing furnace,
0 is placed on a tray in the annealing furnace, the inside of the annealing furnace is once evacuated, and then nitrogen gas is introduced into the annealing furnace at a flow rate of 3 L / min (standard state) so that the inside of the furnace is at atmospheric pressure. To

Next, the tray on which the sapphire substrate 10 is placed is moved from room temperature (25 ° C.) to 750 ° C. for one second per second.
After heating at a heating rate of 0 ° C. (10 ° C./s), 750
C. for 1 hour, and then the temperature of the tray is cooled to room temperature, whereby the p-type Al _0.07 Ga _0.93 N layer 1
3 is subjected to heat treatment.

As a feature of the third embodiment, in a cooling process after heating in a heat treatment process,
Mixed gas of nitrogen gas and hydrogen gas, for example, 2 L / min
A mixed gas of nitrogen gas at a flow rate of (standard state) and hydrogen gas at a flow rate of 1 L / min (standard state) (partial pressure of hydrogen gas:
33%) or a mixture gas of nitrogen gas at a flow rate of 1 L / min (standard state) and hydrogen gas at a flow rate of 2 L / min (standard state) (partial pressure of hydrogen gas: 67%). Keep the inside at atmospheric pressure.

As described above, when hydrogen gas is introduced into the annealing furnace during the cooling process after heating, the thermal conductivity of hydrogen gas is higher than the thermal conductivity of nitrogen gas.
_Since the surface of the _0.07 Ga _0.93 N layer 13 is rapidly cooled,
Hydrogen atoms that inactivate p-type impurities (Mg) are p-type A
The situation of intrusion into the l _0.07 Ga _0.93 N layer 13 is suppressed, whereby the resistivity of the p-type Al _0.07 Ga _0.93 N layer 13 can be greatly reduced.

When the heat treatment step is completed, the sapphire substrate 10 is taken out of the annealing furnace, and the p-type Al _0.07
After a mask having openings of 2 mm in diameter at four corners of a square having a side of 5 mm is formed on the upper surface of the Ga _0.93 N layer 13, the sapphire substrate 10 is transferred to a vacuum evaporation apparatus.

Next, in a vacuum evaporation apparatus, about 5 μm is formed on the upper surface of the p-type Al _0.07 Ga _0.93 N layer 13 by a resistance heating method.
After depositing a magnesium (Mg) film having a thickness of nm through a mask, a gold (Au) electrode having a thickness of about 200 nm is deposited on the magnesium film by electron beam (EB), and p-type Al _0.07 2 mm in diameter on the Ga _0.93 N layer 13
Of a circular electrode (test electrode).

Next, after taking out the sapphire substrate 10 from the vacuum evaporation apparatus, the sapphire substrate 10 is cut into chips of 5 mm square so that the circular electrodes are located at the four corners, and thereafter, p-type Al _0.07 Ga _0.93 N Hall measurements were made at room temperature to evaluate the electrical properties of layer 13.

FIG. 4 shows the relationship between the partial pressure of hydrogen gas in the mixed gas introduced into the annealing furnace and the p-type Al in the cooling process after heating.
The relationship with the resistivity of the _0.07 Ga _0.93 N layer 13 is shown.
As is clear from FIG. 4, when the partial pressure of the hydrogen gas increases, that is, when the amount of the introduced hydrogen gas increases, the effect of the rapid cooling is promoted and the resistivity decreases. When the partial pressure of hydrogen gas is 0%, about 4 Ω · cm
It can also be understood that the resistivity can be reduced to about 3.5 Ω · cm by setting the partial pressure of the hydrogen gas to 33%. However, even if the partial pressure of the hydrogen gas becomes 67% or more, the resistivity is constant at about 3.5 Ω · cm, and it is considered that the cooling effect by the introduction of the hydrogen gas is saturated.

By the way, in the cooling process after heating, 7
From 50 ° C. to 500 ° C., only nitrogen gas at a flow rate of 3 L / min (standard state) is introduced. From 500 ° C. to room temperature, nitrogen gas at a flow rate of 2 L / min (standard state) and 1 L / m
An experiment was also conducted in which a mixed gas (partial pressure of hydrogen gas: 33%) with hydrogen gas at a flow rate of in (standard state) was introduced. That is, an experiment was conducted in which a cooling gas (hydrogen gas) was introduced when the substrate temperature was 500 ° C. or lower to rapidly cool the p-type Al _0.07 Ga _0.93 N layer 13.

In this case, it was found that the resistivity of the p-type Al _0.07 Ga _0.93 N layer 13 could be reduced to about 3 Ω · cm. This is because, by setting the temperature at the time of introducing hydrogen gas to 500 ° C. or lower, the situation where hydrogen atoms enter the p-type Al _0.07 Ga _0.93 N layer 13 is further suppressed, and the inactivation of the p-type impurities is further suppressed. It is thought that it is possible.

(Fourth Embodiment) Hereinafter, a method for forming a semiconductor layer according to a fourth embodiment of the present invention will be described with reference to FIGS.

In the fourth embodiment, a p-type compound semiconductor layer containing gallium nitride as a main component, for example, a p-type Al _x G, mainly used for a light emitting element (semiconductor laser element) having a short wavelength.
This is a method capable of realizing low resistance of the a _1-x N semiconductor layer (0 ≦ x ≦ 1). The fourth embodiment is directed to another III-V compound semiconductor layer into which a p-type impurity is introduced. Can be similarly applied.

First, as in the first embodiment, the MO
A p-type Al _0.07 Ga _0.93 N layer 13 having a thickness of 0.7 μm is grown on the sapphire substrate 10 via the low-temperature buffer layer 11 and the GaN layer 12 by the VPE method.

Next, the sapphire substrate 10 is transferred from the reaction furnace of the MOVPE apparatus to the annealing furnace,
0 is placed on a tray in the annealing furnace, the inside of the annealing furnace is once evacuated, and then nitrogen gas is introduced into the annealing furnace at a flow rate of 3 L / min (standard state) so that the inside of the furnace is at atmospheric pressure. To

Next, a first heat treatment step for sapphire substrate 10 is performed. That is, the sapphire substrate 1
0 from the room temperature (25 ° C.) to 75
After heating to 0 ° C. at a rate of 10 ° C. (10 ° C./s) per second, the temperature is maintained at 750 ° C. for 1 hour, and then the temperature of the tray is cooled to room temperature. In the first heat treatment step, nitrogen gas is continuously introduced into the furnace at a flow rate of 3 mL / min (standard state) to keep the inside of the furnace at atmospheric pressure.

Next, a second heat treatment step for sapphire substrate 10 is performed. That is, similarly to the first heat treatment step, the tray on which the sapphire substrate 10 is placed is moved from room temperature to 750 ° C. at 10 ° C./sec (10 ° C./sec.).
After heating at the heating rate of s), the temperature is maintained at 750 ° C. for 1 hour, and then the temperature of the tray is cooled to room temperature.
In the second heat treatment step, nitrogen gas is continuously introduced into the furnace at a flow rate of 3 mL / min (standard state) to keep the inside of the furnace at atmospheric pressure.

Thereafter, heat treatment steps similar to the first and second heat treatment steps are performed, for example, four times. That is, for example, a total of six heat treatment steps are performed.

When the six heat treatment steps are completed, the sapphire substrate 10 is taken out of the annealing furnace, and the p-type A
After a mask having openings of 2 mm in diameter at four corners of a square having a side of 5 mm is formed on the upper surface of the l _0.07 Ga _0.93 N layer 13, the sapphire substrate 10 is transferred to a vacuum evaporation apparatus.

Next, in a vacuum evaporation apparatus, about 5 μm is formed on the upper surface of the p-type Al _0.07 Ga _0.93 N layer 13 by a resistance heating method.
A magnesium (Mg) film having a thickness of about 200 nm is deposited through a mask, and a gold (Au) electrode having a thickness of about 200 nm is deposited on the magnesium film by electron beam (EB).
A circular electrode (test electrode) having a diameter of 2 mm is formed on the mold Al _0.07 Ga _0.93 N layer 13.

Next, after taking out the sapphire substrate 10 from the vacuum evaporation apparatus, the sapphire substrate 10 is cut into a 5 mm square chip so that the circular electrodes are located at the four corners, and thereafter, p-type Al _0.07 Ga _0.93 N Hall measurements were made at room temperature to evaluate the electrical properties of layer 13.

FIG. 5 shows the number of heat treatment steps and p-type Al _0.07
The relationship with the resistivity of the Ga _0.93 N layer 13 is shown. FIG.
From that the resistivity decreases from about 4.0 Ω · cm to about 3.5 Ω · cm as the number of heat treatment steps increases,
It can be seen that when the number of heat treatment steps is four or more, the decrease in resistivity is saturated.

By the way, in each heat treatment step, 75%
An experiment was also performed in which the holding time at a temperature of 0 ° C. was changed from 1 hour to 6 hours.
The resistivity was the same as when the holding time was 1 hour.

Therefore, a heat treatment step involving rapid heating at a temperature rise rate higher than 0.3 ° C./s is performed a plurality of times to generate a plurality of temperature gradients inside the p-type Al _0.07 Ga _0.93 N layer 13. Thereby, the discharge of the hydrogen gas is promoted, and the resistivity of the p-type Al _0.07 Ga _0.93 N layer 13 can be further reduced.

(Fifth Embodiment) Hereinafter, a method of forming a semiconductor layer according to a fifth embodiment of the present invention will be described with reference to FIGS.

In the fifth embodiment, a p-type compound semiconductor layer containing gallium nitride as a main component, for example, a p-type Al _x G, mainly used for a light emitting element (semiconductor laser element) having a short wavelength.
This is a method capable of realizing a low resistance of the a _1-x N semiconductor layer (0 ≦ x ≦ 1). The fifth embodiment relates to another III-V compound semiconductor layer into which a p-type impurity is introduced. Can be similarly applied.

First, as in the first embodiment, the MO
A p-type Al _0.07 Ga _0.93 N layer 13 having a thickness of 0.7 μm is grown on the sapphire substrate 10 via the low-temperature buffer layer 11 and the GaN layer 12 by the VPE method.

Next, the sapphire substrate 10 is transferred from the reaction furnace of the MOVPE apparatus to the annealing furnace,
0 is placed on a tray in the annealing furnace, the inside of the annealing furnace is once evacuated, and then nitrogen gas is introduced into the annealing furnace at a flow rate of 3 L / min (standard state) so that the inside of the furnace is at atmospheric pressure. To

Next, the tray on which the sapphire substrate 10 is placed is moved from room temperature (25.degree. C.) to 750.degree.
After heating at a heating rate of 0 ° C. (10 ° C./s), 750
C. for 1 hour, and then at 10 ° C. per second (10 ° C.
/ S) to room temperature at a rate of temperature decrease.

As a feature of the fifth embodiment, in the heating step of the heat treatment step, nitrogen gas is introduced into the annealing furnace for 3 m.
The pressure in the annealing furnace is controlled by adjusting a flow control valve provided in a discharge path for discharging gas in the annealing furnace while continuously introducing the gas at a flow rate of L / min (standard state).

In this manner, the compressive stress of the p-type Al _0.07 Ga _0.93 N layer 13 is reduced in the heating process, so that the hydrogen atoms that inactivate the p-type impurity (Mg) become p-type Al _0.07 Ga _0.93 Exhausted from the N layer 13 to the outside.

When the heat treatment step is completed, the sapphire substrate 10 is taken out of the annealing furnace, and then the p-type Al _0.07
After a mask having openings of 2 mm in diameter at four corners of a square having a side of 5 mm is formed on the upper surface of the Ga _0.93 N layer 13, the sapphire substrate 10 is transferred to a vacuum evaporation apparatus.

Next, in a vacuum deposition apparatus, about 5 μm is formed on the upper surface of the p-type Al _0.07 Ga _0.93 N layer 13 by a resistance heating method.
After depositing a magnesium (Mg) film having a thickness of nm through a mask, a gold (Au) electrode having a thickness of about 200 nm is deposited on the magnesium film by electron beam (EB), and p-type Al _0.07 2 mm in diameter on the Ga _0.93 N layer 13
Of a circular electrode (test electrode).

Next, after taking out the sapphire substrate 10 from the vacuum evaporation apparatus, the sapphire substrate 10 is cut into a 5 mm square chip shape so that the circular electrodes are located at the four corners, and thereafter, p-type Al _0.07 Ga _0.93 N Hall measurements were made at room temperature to evaluate the electrical properties of layer 13.

FIG. 6 shows a heat treatment at a temperature of 750 ° C.
When the atmospheric pressure is formed on the sapphire substrate 10
The relationship with the cross-sectional shape of the laminated film
When the pressure becomes higher than the atmospheric pressure, for example, 1.5 atmospheres or more
Becomes p-type Al_0.07Ga _0.93The compressive stress of the N layer 13 is
Deactivates p-type impurity (Mg) because it is greatly relaxed
The hydrogen atom is p-type Al_0.07Ga_0.93N layer 13
From the p-type Al_0.07Ga
_0.93The resistivity of the N layer 13 decreases.

By the way, the sapphire substrate 10 is moved from room temperature.
In the process of heating to 750 ° C., the sapphire substrate 10
Has a coefficient of thermal expansion of p-type Al_0.07Ga_0.93Thermal expansion coefficient of N layer 13
Therefore, as shown in FIG.
At 1.0 atm, p-type Al _0.07Ga_0.93N layer 13
Indicates that a compressive stress (indicated by an arrow) is generated
Becomes 1.5 atm, the compressive stress is relaxed. This stress
Relaxes the hydrogen atoms that inactivate the p-type impurity
p-type Al_0.07Ga_0.93A drive to be discharged from the N layer 13 to the outside
Because it becomes power, p-type Al_0.07Ga_0.93Resistance of N layer 13
The rate decreases.

In this case, if the atmospheric pressure is kept at 1.0 atm, the resistivity of the p-type Al _0.07 Ga _0.93 N layer 13 is about 4.0 Ω · cm, but the atmospheric pressure is 1.5. It was confirmed that the resistivity became about 3.5 Ω · cm.

In the process of heating the sapphire substrate 10, even if the atmospheric pressure is lower than the atmospheric pressure, the p-type Al
_Although the compressive stress of the _0.07 Ga _0.93 N layer 13 is relieved, when the atmospheric pressure is higher than the atmospheric pressure, the effect of relieving the stress is promoted and the resistivity is greatly reduced.

Further, in this embodiment, the temperature of the heat treatment step is set to 750 ° C. However, when the atmospheric pressure in the heating process is higher than the atmospheric pressure, it is generally considered that it is difficult to lower the resistance. It was confirmed that the effect of relaxing the compressive stress of the p-type Al _0.07 Ga _0.93 N layer 13 was obtained even at a heat treatment temperature of 500 ° C. or less.

[0134] In the present embodiment, since the thermal expansion coefficient of the sapphire substrate 10 is smaller than the thermal expansion coefficient of the p-type Al _0.07 Ga _0.93 N layer 13, compressive stress in the p-type Al _0.07 Ga _0.93 N layer 13 However, when the thermal expansion force of the substrate is larger than that of the compound semiconductor layer, a tensile stress is generated in the compound semiconductor layer. Also in this case, when the atmospheric pressure is set higher or lower than the atmospheric pressure, the tensile stress generated in the compound semiconductor layer is reduced.

(Sixth Embodiment) Hereinafter, a method for forming a semiconductor layer according to a sixth embodiment of the present invention will be described with reference to FIGS.

In the sixth embodiment, a p-type compound semiconductor layer containing gallium nitride as a main component, for example, a p-type Al _x G, mainly used for a light emitting element (semiconductor laser element) having a short wavelength.
This is a method capable of realizing a low resistance of the a _1-x N semiconductor layer (0 ≦ x ≦ 1). The sixth embodiment is directed to another III-V group compound semiconductor layer into which a p-type impurity is introduced. Can be similarly applied.

First, as in the first embodiment, the MO
A p-type Al _0.07 Ga _0.93 N layer 13 having a thickness of 0.7 μm is grown on the sapphire substrate 10 via the low-temperature buffer layer 11 and the GaN layer 12 by the VPE method.

Next, the sapphire substrate 10 on which the laminated film has been formed is transferred from the reaction furnace of the MOVPE apparatus to the annealing furnace, and nitrogen gas is introduced at a flow rate of 3 L / min (standard state) to reach atmospheric pressure. In the kept annealing furnace, the sapphire substrate 10 and thus p-type Al _0.07 G
The heat treatment is performed on the a _0.93 N layer 13 as follows.

First, as shown in FIG. 7, a first heater 2 is placed on a radiator 20 located in an annealing furnace.
First tray 2 heated to, for example, 750 ° C. by 1a
1, a second tray 22 heated to, for example, 570 ° C. by the second heater 22a, and a third tray 23 heated to, for example, 375 ° C. by the third heater 23a, Transferred to the substrate 24 (on the sapphire substrate 10, the low-temperature buffer layer 11, the GaN
A laminated body in which the layer 12 and the p-type Al _0.07 Ga _0.93 N layer 13 are sequentially laminated is referred to as a substrate 24. ) Is placed on the first tray 21, and then the first tray 21 is cooled to room temperature (25 ° C.).
C) to 750 ° C. at a rate of 10 ° C. (10 ° C./s) per second, and the substrate 24 is heated at a temperature of 750 ° C. for 1 hour.

Next, the substrate 24 is moved in parallel by the substrate transfer tool 25 so that the substrate 24 straddles the first tray 21 set at 750 ° C. and the second tray 22 set at 570 ° C. As shown. In this way, p
The type Al _0.07 Ga _0.93 N layer 13 has a sharp temperature gradient in a direction parallel to the substrate. Therefore, the p-type impurity (M
The hydrogen atom that inactivates g) is p-type Al _0.07 G
Since the a _0.93 N layer 13 moves from a high-temperature portion (the portion on the first tray side) to a low-temperature portion (the portion on the second tray side), the p-type Al _0.07 Ga _0.93 N layer 13 is efficiently moved. The resistance value of the p-type Al _0.07 Ga _0.93 N layer 13 is reduced.

When the heat treatment step is completed, the sapphire substrate 10 is taken out of the annealing furnace, and the p-type Al _0.07
After a mask having openings of 2 mm in diameter at four corners of a square having a side of 5 mm is formed on the upper surface of the Ga _0.93 N layer 13, the sapphire substrate 10 is transferred to a vacuum evaporation apparatus.

Next, in a vacuum evaporation apparatus, about 5 μm is formed on the upper surface of the p-type Al _0.07 Ga _0.93 N layer 13 by a resistance heating method.
After depositing a magnesium (Mg) film having a thickness of nm through a mask, a gold (Au) electrode having a thickness of about 200 nm is deposited on the magnesium film by electron beam (EB), and p-type Al _0.07 2 mm in diameter on the Ga _0.93 N layer 13
(Electrode for test) is formed.

Next, after taking out the sapphire substrate 10 from the vacuum evaporation apparatus, the sapphire substrate 10 is cut into a chip of 5 mm square so that the circular electrodes are located at the four corners, and thereafter, p-type Al _0.07 Ga _0.93 N Hall measurements were made at room temperature to evaluate the electrical properties of layer 13. As a result, the resistance value of the p-type Al _0.07 Ga _0.93 N layer 13 was about 3.5 Ω · cm.

Note that in the sixth embodiment, the substrate 20 is
Was placed so as to straddle the first tray 21 and the second tray 22, and a temperature gradient was generated in the p-type Al _0.07 Ga _0.93 N layer 13 in a direction parallel to the substrate. To the first tray 21, the second tray 22, and the third tray 2.
3 so that a temperature gradient may be generated in the p-type Al _0.07 Ga _0.93 N layer 13 in a direction parallel to the substrate. When the substrate 20 is placed so as to straddle three trays having different temperatures, the p-type Al _0.07 Ga _0.93 N layer 13
Since the temperature gradient generated in the p-type Al _0.07
The resistance value of the Ga _0.93 N layer 13 is further reduced.

(Seventh Embodiment) Hereinafter, a method for forming a semiconductor layer according to a seventh embodiment of the present invention will be described with reference to FIGS.

In the seventh embodiment, the operating current of the light emitting device is reduced by reducing the resistance of the p-type compound semiconductor layer used for the cladding layer, contact layer or light guide layer of the light emitting device (laser device). This is a method for reducing the number of light emitting elements and thereby improving the reliability of the light emitting element.

First, as shown in FIG.
cm of sapphire substrate 30 is held on a susceptor in a reaction furnace (not shown) of the MOVPE apparatus, and then the reaction furnace is evacuated. Next, after the inside of the reaction furnace is set to a hydrogen atmosphere having a pressure of 40 kPa, the temperature of the reaction furnace is raised to about 1100 ° C. and the sapphire substrate 20 is heated, whereby about 1
Perform thermal cleaning for 0 minutes.

Next, after lowering the temperature of the reaction furnace to about 500 ° C., trimethylgallium (TMG) at a flow rate of 6 mL / min (standard state) and 7.5 L / m
By supplying ammonia (NH ₃ ) gas at a flow rate of in (standard state) and hydrogen as a carrier gas at the same time, a low-temperature buffer layer (GaN) having a thickness of 20 nm on the sapphire substrate 20 is formed. (Not shown) is grown.

Next, after raising the temperature of the reaction furnace to about 1000 ° C., silane containing n-type impurities (S
iH ₄ ) gas is supplied, and an n-type GaN layer having an impurity concentration of silicon of about 1 × 10 ¹⁸ cm ⁻³ and a thickness of about 4 μm is formed on the low-temperature buffer layer. The layer 31 is grown.

Next, trimethylaluminum (TMA) at a flow rate of 1.7 mL / min is additionally supplied into the reaction furnace, so that the concentration of the impurity made of silicon becomes 5 on the n-type contact layer 31. N-type Al _0.07 Ga _0.93 N of × 10 ¹⁷ cm ^-3 and a thickness of about 0.7 μm
An n-type cladding layer 32 composed of a layer is grown.

Next, trimethyl aluminum (TMA)
Is stopped, and the n-type GaN layer having an impurity concentration of silicon of about 1 × 10 ¹⁸ cm ⁻³ and a thickness of about 100 nm is formed on the n-type cladding layer 32. Is grown.

Next, after the temperature of the reactor was lowered to about 800 ° C., the carrier gas was changed from hydrogen gas to ammonia gas, and trimethylindium (TMI) and trimethylgallium (TMG) were introduced into the reactor. By supplying them alternately, a quantum well layer (three layers) made of an In _0.1 Ga _0.9 N layer having a thickness of about 3 nm and a GaN layer having a thickness of about 9 nm are formed on the first optical guide layer 33. An active layer having a multiple quantum well structure composed of two barrier layers is formed.

Next, after the temperature of the reaction furnace was raised again to about 1000 ° C., the carrier gas was changed from nitrogen gas to hydrogen gas, and trimethylgallium (TMG), ammonia (NH ₃ ) By supplying biscyclopentadienylmagnesium (Cp ₂ Mg) gas, which is a p-type impurity, together with the gas and trimethylaluminum (TMA), the concentration of the impurity made of magnesium is 5 × 10 ^A cap layer 35 made of a p-type Al _0.15 Ga _0.85 N layer of ¹⁷ cm ⁻³ and a thickness of about 20 nm is grown.

Next, the magnesium layer was placed on the cap layer 35.
1 × 10 ¹⁸cm^-3And
Growing a second light guide layer 36 having a thickness of about 150 nm
After that, the magnesium light is applied on the second light guide layer 36.
5 × 10¹⁷cm^-3And
P-type Al with a thickness of about 0.7 μm_0.07Ga_0.93N layer
A p-type cladding layer 37 is grown.
On the lad layer 37, an impurity concentration of magnesium is formed.
Degree 1 × 10¹⁸cm^-3And the thickness is about 0.1μm
Growing a p-type contact layer 38 consisting of a certain p-type GaN layer
Let it.

Next, heat treatment is performed on the group III-V compound semiconductor layer into which the p-type impurity has been introduced, for example, the second light guide layer 36, the p-type cladding layer 37, and the p-type contact layer 38. As a method of heat-treating these p-type III-V compound semiconductor layers, the method of forming a semiconductor layer according to the first to sixth embodiments can be applied. Here, the fourth embodiment is applied. The case will be described.

The sapphire substrate 30 is transferred from the reaction furnace of the MOVPE apparatus to the annealing furnace, and the sapphire substrate 30 is placed on a tray in the annealing furnace. 3 L of nitrogen gas
/ Min (standard state) to bring the inside of the furnace to atmospheric pressure.

Next, the tray on which the sapphire substrate 30 is placed is moved from room temperature (25 ° C.) to 750 ° C. for one second per second.
After heating at a heating rate of 0 ° C. (10 ° C./s), 750
The temperature is kept at 1 ° C. for 1 hour, and then the first heat treatment is performed by cooling the tray to room temperature.
In the first heat treatment step, nitrogen gas is continuously introduced into the furnace at a flow rate of 3 mL / min (standard state) to keep the inside of the furnace at atmospheric pressure.

Next, the tray on which the sapphire substrate 30 is placed is moved from room temperature (25 ° C.) to 750 ° C. for one second per second.
After heating at a heating rate of 0 ° C. (10 ° C./s), 750
The temperature is maintained at a temperature of 1 ° C. for 1 hour, and then the temperature of the tray is cooled to room temperature, whereby a second heat treatment is performed.
In the second heat treatment step, nitrogen gas is continuously introduced into the furnace at a flow rate of 3 mL / min (standard state) to keep the inside of the furnace at atmospheric pressure.

When the first and second heat treatment steps are completed, the n-type contact layer 31 is exposed by a selective dry etching method, and then a titanium film and an aluminum film are formed on the upper surface of the n-type contact layer 31. Consisting of a laminated film of
The side electrode 39 is formed.

Next, the p-type contact layer 38 is formed to a thickness of about 2 μm.
Then, a stripe-shaped p-side electrode 40 made of a laminated film of a nickel film and a gold film is formed on the p-type contact layer 38. in this case,
The n-side electrode 39 and the p-side electrode 40 are made of silicon dioxide (SiO
It is insulated by the insulating film 41 made of ₂ ).

Next, a light emitting device (semiconductor laser device) having a cavity length of 750 μm is formed by cleaving the laminate, and then silicon dioxide and titanium dioxide ( A light-emitting device (semiconductor laser device) is obtained by forming a high-reflection coating layer made of TiO ₂ ) having a reflectance of 90%.

According to the seventh embodiment, a group III-V compound semiconductor layer into which a p-type impurity is introduced, for example, the second light guide layer 36, the p-type cladding layer 37 or the p-type contact layer 38 The second heat treatment is performed,
Atoms that inactivate the impurities in the light guide layer 36, the p-type cladding layer 37, or the p-type contact layer 38 can be eliminated, whereby the resistance of these compound semiconductor layers can be reliably reduced. .

The laser device characteristics of the light emitting device obtained by performing twice the heat treatment of heating from room temperature to 750 ° C. at a rate of 10 ° C./s (corresponding to the fourth embodiment) were measured. The resistivity of the p-type cladding layer 37 made of a p-type Al _0.07 Ga _0.93 N layer is about 3.5 Ω · cm, and heat treatment is performed from room temperature to 750 ° C. at a rate of 0.3 ° C./s. When the laser device characteristics of the light emitting device obtained by performing the process once (corresponding to the first embodiment) were measured, the resistivity of the p-type cladding layer 37 composed of the p-type Al _0.07 Ga _0.93 N layer was about 5 Ω · cm. Met.

FIG. 9 shows the relationship between the operating voltage of the light emitting element and the threshold current when the resistivity of the p-type cladding layer 37 is about 3.5 Ω · cm and about 5 Ω · cm. When the resistivity of the p-type cladding layer 37 is low,
It can be seen that the operating current when the threshold current is constant is reduced. For example, when the resistivity of the p-type cladding layer 37 is about 3.5 Ω · cm, the operation current when the threshold current is 50 mA is 5 V, the power consumption is about 0.25 W, and the p-type cladding layer 37 When the resistivity of the 37 is about 5 Ω · cm, the operating current is 6 V and the power consumption is about 0.36 W when the threshold current is 60 mA.

From these facts, when the method of forming a semiconductor layer according to the first to sixth embodiments is applied to a group III-V compound semiconductor layer into which a p-type impurity has been introduced, the resulting light emitting device The operating voltage can be reduced and power consumption can be reduced, whereby heat generation of the light-emitting element can be suppressed and reliability can be improved.

Although the sapphire substrate is used as the substrate in the first to sixth embodiments, a silicon carbide substrate may be used instead.

[0167]

According to the first method for forming a semiconductor layer according to the present invention, a temperature gradient is generated in the compound semiconductor layer when the compound semiconductor layer is heated, so that p-type impurities are not removed from the compound semiconductor layer. Since the activated atoms can be eliminated, the resistance value of the compound semiconductor layer can be reliably reduced.

According to the second method for forming a semiconductor device of the present invention, in the cooling step of the heat treatment step, the situation in which atoms for inactivating p-type impurities enter the compound semiconductor layer can be suppressed. Can be reduced.

According to the third method for forming a semiconductor layer of the present invention, the internal stress of the compound semiconductor layer is relaxed when the compound semiconductor layer is heated, so that the p-type impurities are inactivated from the compound semiconductor layer. Since it is possible to eliminate the atoms that are being caused, the resistance value of the compound semiconductor layer can be reliably reduced.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a laminated structure to be subjected to a method of forming a semiconductor layer according to first to sixth embodiments.

FIG. 2 is a graph showing a _relationship between a temperature rise rate and p-type Al _0.07 Ga _0.93 in a heat treatment step of the semiconductor layer forming method according to the first embodiment;
FIG. 4 is a characteristic diagram showing a relationship with the resistivity of an N layer.

FIG. 3 is a graph showing a relationship between a temperature drop rate and p in a cooling process after heating in a heat treatment process in a method for forming a semiconductor layer according to a second embodiment;
It is a characteristic view which shows the relationship with the resistivity of type _| mold _{Al0.07Ga0.93N} layer.

FIG. 4 is a view showing heat of a method for forming a semiconductor layer according to a third embodiment;
In the cooling process after heating in the treatment process,
Partial pressure of hydrogen gas in mixed gas and p-type Al_0.07Ga
_0.93FIG. 4 is a characteristic diagram showing a relationship with the resistivity of an N layer.

FIG. 5 is a characteristic diagram showing a relationship between the number of heat treatment steps and the resistivity of a p-type Al _0.07 Ga _0.93 N layer in the method for forming a semiconductor layer according to the fourth embodiment.

FIG. 6 is a cross-sectional view illustrating a relationship between an atmospheric pressure during heat treatment and a cross-sectional shape of a laminated film formed on a sapphire substrate in a method for forming a semiconductor layer according to a fifth embodiment.

FIG. 7 is a cross-sectional view showing a method of generating a temperature gradient parallel to a substrate in a p-type Al _0.07 Ga _0.93 N layer in a method of forming a semiconductor layer according to a sixth embodiment.

FIG. 8 is a cross-sectional view of a light-emitting element that is an object of a method for forming a semiconductor layer according to a seventh embodiment.

FIG. 9 is a characteristic diagram showing a relationship between an operating voltage and a threshold current of a light emitting element obtained by a method for forming a semiconductor layer according to a seventh embodiment.

[Explanation of symbols]

_REFERENCE SIGNS _LIST 10 sapphire substrate 11 low-temperature buffer layer 12 GaN layer 13 p-type Al _0.07 Ga _0.93 N layer 20 heat sink 21 first tray 21 a first heater 22 second tray 22 a second heater 23 second tray 23 a third Heater 24 substrate 25 substrate carrier 30 sapphire substrate 31 n-type contact layer 32 n-type clad layer 33 first light guide layer 34 active layer 35 cap layer 36 second light guide layer 37 p-type clad layer 38 p-type contact Layer 39 n-side electrode 40 p-side electrode

Continuing on the front page (72) Inventor Isao Kidoguchi 1006 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. ) 4K030 AA11 AA13 AA17 BA02 BA08 BA38 CA05 DA03 FA10 LA14 5F045 AA04 AB14 AB17 AC08 AC12 AD09 AD14 AF09 BB04 CA10 DA53 EJ02 HA06 HA16 5F073 AA13 AA45 AA74 AA83 CA07 CB05 CB07 CB19 CB20 DA05 DA16

Claims (27)

[Claims] A step of forming a group III-V compound semiconductor layer into which a p-type impurity is introduced on a substrate; and a step of performing a heat treatment on the compound semiconductor layer. A step of generating a temperature gradient in the compound semiconductor layer in the step of heating the compound semiconductor layer, thereby removing an atom that inactivates the p-type impurity from the compound semiconductor layer. Forming a semiconductor layer. 2. The method according to claim 1, wherein the temperature gradient is formed in a direction perpendicular to the substrate. 3. The step of heating the compound semiconductor layer,
Heating the compound semiconductor layer at a heating rate higher than 0.3 ° C./s to cause the compound semiconductor layer to generate the temperature gradient in a direction perpendicular to the substrate. Item 3. A method for forming a semiconductor layer according to Item 2. 4. The step of heating the compound semiconductor layer,
3. The method according to claim 2, further comprising the step of heating the compound semiconductor layer at a temperature raising rate higher than 10 ° C./s to cause the compound semiconductor layer to generate the temperature gradient in a direction perpendicular to the substrate. 3. The method for forming a semiconductor layer according to item 1. 5. The step of heating the compound semiconductor layer,
3. The method according to claim 2, further comprising a step of supplying the cooling gas to the surface of the compound semiconductor layer in a pulsed manner to generate the temperature gradient in a direction perpendicular to the substrate in the compound semiconductor layer. A method for forming a semiconductor layer. 6. The step of heating the compound semiconductor layer,
The method according to claim 5, wherein the method is performed in a nitrogen gas atmosphere, and the cooling gas is a hydrogen gas. 7. The method according to claim 1, wherein the temperature gradient is formed in a direction parallel to the substrate. 8. The step of heating the compound semiconductor layer,
After heating the substrate on a first tray set at a first temperature, the substrate is moved to the first tray at a second temperature set at a second temperature lower than the first temperature. The method for forming a semiconductor layer according to claim 7, further comprising a step of causing the compound semiconductor layer to generate the temperature gradient in a direction parallel to the substrate by placing the compound semiconductor layer on a tray. 9. The step of heating the compound semiconductor layer,
After heating the substrate on a first tray set at a first temperature, the substrate is moved to the first tray at a second temperature set at a second temperature lower than the first temperature. Tray and a third set at a third temperature lower than the second temperature
8. The method for forming a semiconductor layer according to claim 7, further comprising a step of causing the compound semiconductor layer to generate the temperature gradient in a direction parallel to the substrate by placing the compound semiconductor layer on a tray. . 10. The step of performing the heat treatment includes heating and cooling the compound semiconductor layer a plurality of times,
The method according to claim 1, further comprising a step of generating a plurality of temperature gradients in the compound semiconductor layer. 11. The method according to claim 1, wherein the compound semiconductor layer contains nitrogen as a group III element. 12. The method according to claim 11, wherein the compound semiconductor layer is a clad layer, a contact layer, or a light guide layer of a light emitting device. 13. A method comprising: forming a group III-V compound semiconductor layer into which a p-type impurity is introduced on a substrate; and performing a heat treatment on the compound semiconductor layer. A step of cooling the compound semiconductor layer after heating the compound semiconductor layer, thereby rapidly cooling the compound semiconductor layer to thereby prevent atoms for inactivating the p-type impurities from entering the compound semiconductor layer. A method for forming a semiconductor layer, comprising: 14. The method according to claim 1, wherein the step of cooling the compound semiconductor layer includes a step of cooling the compound semiconductor layer at a temperature lowering rate higher than 0.3 ° C./s.
4. The method for forming a semiconductor layer according to 3. 15. The method according to claim 13, wherein the step of cooling the compound semiconductor layer includes a step of cooling the compound semiconductor layer at a temperature lowering rate higher than 10 ° C./s.
3. The method for forming a semiconductor layer according to item 1. 16. The method according to claim 13, wherein the step of cooling the compound semiconductor layer includes a step of supplying a cooling gas to a surface of the compound semiconductor layer. 17. The method according to claim 16, wherein the step of cooling the compound semiconductor layer is performed in a nitrogen gas atmosphere, and the cooling gas is a hydrogen gas. 18. The method according to claim 17, wherein the partial pressure of the hydrogen gas is 33% or more. 19. The method according to claim 16, wherein cooling the compound semiconductor layer includes supplying the cooling gas when the temperature of the substrate is 500 ° C. or less. Method. 20. The method according to claim 13, wherein the compound semiconductor layer contains nitrogen as a group III element. 21. The method according to claim 20, wherein the compound semiconductor layer is a clad layer, a contact layer, or a light guide layer of a light emitting device. 22. A method comprising the steps of: forming a group III-V compound semiconductor layer into which a p-type impurity is introduced on a substrate; and performing a heat treatment on the compound semiconductor layer. And heating the compound semiconductor layer to reduce an internal stress of the compound semiconductor layer, thereby removing an atom that inactivates the p-type impurity from the compound semiconductor layer. Forming a semiconductor layer. 23. The step of heating the compound semiconductor layer includes a step of relaxing internal stress of the compound semiconductor layer by changing a pressure of an atmosphere in which the substrate is placed. Item 23. The method for forming a semiconductor layer according to Item 22. 24. The method according to claim 23, wherein the step of heating the compound semiconductor layer includes a step of changing the pressure of the atmosphere to be higher than the atmospheric pressure. 25. The method according to claim 23, wherein the step of heating the compound semiconductor layer includes a step of changing the pressure of the atmosphere when the temperature of the substrate is 500 ° C. or less. Forming method. 26. The method according to claim 22, wherein the compound semiconductor layer contains nitrogen as a group III element. 27. The method according to claim 26, wherein the compound semiconductor layer is a clad layer, a contact layer, or a light guide layer of a light emitting device.