JP2001514449A - 熱伝導性エポキシプリフォームによるシリコンセグメントの垂直相互接続方法 - Google Patents
熱伝導性エポキシプリフォームによるシリコンセグメントの垂直相互接続方法Info
- Publication number
- JP2001514449A JP2001514449A JP2000508139A JP2000508139A JP2001514449A JP 2001514449 A JP2001514449 A JP 2001514449A JP 2000508139 A JP2000508139 A JP 2000508139A JP 2000508139 A JP2000508139 A JP 2000508139A JP 2001514449 A JP2001514449 A JP 2001514449A
- Authority
- JP
- Japan
- Prior art keywords
- stack
- segments
- dies
- segment
- functional
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004593 Epoxy Substances 0.000 title claims abstract description 63
- 238000000034 method Methods 0.000 title claims description 105
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title abstract description 10
- 239000010703 silicon Substances 0.000 title abstract description 10
- 229910052710 silicon Inorganic materials 0.000 title abstract description 10
- 229910052751 metal Inorganic materials 0.000 claims abstract description 82
- 239000002184 metal Substances 0.000 claims abstract description 82
- QXJJQWWVWRCVQT-UHFFFAOYSA-K calcium;sodium;phosphate Chemical compound [Na+].[Ca+2].[O-]P([O-])([O-])=O QXJJQWWVWRCVQT-UHFFFAOYSA-K 0.000 claims abstract description 14
- 239000003822 epoxy resin Substances 0.000 claims description 43
- 229920000647 polyepoxide Polymers 0.000 claims description 43
- 239000011521 glass Substances 0.000 claims description 13
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 11
- 229910052737 gold Inorganic materials 0.000 claims description 11
- 239000010931 gold Substances 0.000 claims description 11
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 6
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 claims description 6
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- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 12
- 239000004020 conductor Substances 0.000 description 11
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
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- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3737—Organic materials with or without a thermoconductive filler
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- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
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- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
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- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
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- H01L2225/06593—Mounting aids permanently on device; arrangements for alignment
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01021—Scandium [Sc]
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- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/918,501 | 1997-08-22 | ||
| US08/918,502 | 1997-08-22 | ||
| US08/918,502 US5891761A (en) | 1994-06-23 | 1997-08-22 | Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform |
| US08/918,501 US6124633A (en) | 1994-06-23 | 1997-08-22 | Vertical interconnect process for silicon segments with thermally conductive epoxy preform |
| PCT/US1998/016901 WO1999010925A1 (fr) | 1997-08-22 | 1998-08-14 | Processus d'interconnexion verticale de segments de silicium et d'une preforme de colle epoxy thermoconductrice |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001514449A true JP2001514449A (ja) | 2001-09-11 |
Family
ID=27129754
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000508139A Pending JP2001514449A (ja) | 1997-08-22 | 1998-08-14 | 熱伝導性エポキシプリフォームによるシリコンセグメントの垂直相互接続方法 |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP1029346A4 (fr) |
| JP (1) | JP2001514449A (fr) |
| KR (1) | KR100536823B1 (fr) |
| AU (1) | AU9105298A (fr) |
| WO (1) | WO1999010925A1 (fr) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007523482A (ja) * | 2004-02-18 | 2007-08-16 | インフィネオン テクノロジーズ アクチエンゲゼルシャフト | 半導体チップの積層を備えた半導体素子、および、その製造方法 |
| JP2009027039A (ja) * | 2007-07-20 | 2009-02-05 | Shinko Electric Ind Co Ltd | 積層型半導体装置及びその製造方法 |
| JP2009027041A (ja) * | 2007-07-20 | 2009-02-05 | Shinko Electric Ind Co Ltd | 側面配線の形成方法 |
| JP2010182904A (ja) * | 2009-02-06 | 2010-08-19 | Fujitsu Ltd | 半導体装置の製造方法 |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6693358B2 (en) | 2000-10-23 | 2004-02-17 | Matsushita Electric Industrial Co., Ltd. | Semiconductor chip, wiring board and manufacturing process thereof as well as semiconductor device |
| US20030161105A1 (en) * | 2001-10-04 | 2003-08-28 | Vijay Kataria | Thermal dissipation assembly for electronic components |
| US20030160311A1 (en) * | 2002-02-28 | 2003-08-28 | Aminuddin Ismail | Stacked die semiconductor device |
| KR101096142B1 (ko) | 2008-01-24 | 2011-12-19 | 브레우어 사이언스 인코포레이션 | 캐리어 기판에 디바이스 웨이퍼를 가역적으로 장착하는 방법 |
| US8852391B2 (en) | 2010-06-21 | 2014-10-07 | Brewer Science Inc. | Method and apparatus for removing a reversibly mounted device wafer from a carrier substrate |
| US9263314B2 (en) | 2010-08-06 | 2016-02-16 | Brewer Science Inc. | Multiple bonding layers for thin-wafer handling |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4706166A (en) * | 1986-04-25 | 1987-11-10 | Irvine Sensors Corporation | High-density electronic modules--process and product |
| US4954875A (en) * | 1986-07-17 | 1990-09-04 | Laser Dynamics, Inc. | Semiconductor wafer array with electrically conductive compliant material |
| US4764846A (en) * | 1987-01-05 | 1988-08-16 | Irvine Sensors Corporation | High density electronic package comprising stacked sub-modules |
| JPH01238148A (ja) * | 1988-03-18 | 1989-09-22 | Fuji Electric Co Ltd | 半導体装置 |
| JPH02133936A (ja) * | 1988-11-15 | 1990-05-23 | Seiko Epson Corp | 半導体装置 |
| US4956695A (en) * | 1989-05-12 | 1990-09-11 | Rockwell International Corporation | Three-dimensional packaging of focal plane assemblies using ceramic spacers |
| US5019943A (en) * | 1990-02-14 | 1991-05-28 | Unisys Corporation | High density chip stack having a zigzag-shaped face which accommodates connections between chips |
| US5135556A (en) * | 1991-04-08 | 1992-08-04 | Grumman Aerospace Corporation | Method for making fused high density multi-layer integrated circuit module |
| AU4242693A (en) * | 1992-05-11 | 1993-12-13 | Nchip, Inc. | Stacked devices for multichip modules |
| US5675180A (en) * | 1994-06-23 | 1997-10-07 | Cubic Memory, Inc. | Vertical interconnect process for silicon segments |
| US5657206A (en) * | 1994-06-23 | 1997-08-12 | Cubic Memory, Inc. | Conductive epoxy flip-chip package and method |
| EP1029360A4 (fr) * | 1997-08-21 | 2006-04-12 | Vertical Circuits Inc | Procede d'interconnexion verticale pour segments en silicium avec isolation dielectrique |
-
1998
- 1998-08-14 KR KR10-2000-7001499A patent/KR100536823B1/ko not_active IP Right Cessation
- 1998-08-14 JP JP2000508139A patent/JP2001514449A/ja active Pending
- 1998-08-14 AU AU91052/98A patent/AU9105298A/en not_active Abandoned
- 1998-08-14 WO PCT/US1998/016901 patent/WO1999010925A1/fr active IP Right Grant
- 1998-08-14 EP EP98943211A patent/EP1029346A4/fr not_active Withdrawn
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007523482A (ja) * | 2004-02-18 | 2007-08-16 | インフィネオン テクノロジーズ アクチエンゲゼルシャフト | 半導体チップの積層を備えた半導体素子、および、その製造方法 |
| JP2009027039A (ja) * | 2007-07-20 | 2009-02-05 | Shinko Electric Ind Co Ltd | 積層型半導体装置及びその製造方法 |
| JP2009027041A (ja) * | 2007-07-20 | 2009-02-05 | Shinko Electric Ind Co Ltd | 側面配線の形成方法 |
| US7807561B2 (en) | 2007-07-20 | 2010-10-05 | Shinko Electric Industries Co., Ltd. | Method for forming side wirings |
| JP2010182904A (ja) * | 2009-02-06 | 2010-08-19 | Fujitsu Ltd | 半導体装置の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100536823B1 (ko) | 2005-12-16 |
| KR20010022895A (ko) | 2001-03-26 |
| EP1029346A1 (fr) | 2000-08-23 |
| WO1999010925A1 (fr) | 1999-03-04 |
| AU9105298A (en) | 1999-03-16 |
| EP1029346A4 (fr) | 2006-01-18 |
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