JP2001284157A - Laminated ceramic electronic component - Google Patents

Laminated ceramic electronic component

Info

Publication number
JP2001284157A
JP2001284157A JP2000091808A JP2000091808A JP2001284157A JP 2001284157 A JP2001284157 A JP 2001284157A JP 2000091808 A JP2000091808 A JP 2000091808A JP 2000091808 A JP2000091808 A JP 2000091808A JP 2001284157 A JP2001284157 A JP 2001284157A
Authority
JP
Japan
Prior art keywords
sintered body
ceramic sintered
conductive paste
curvature
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000091808A
Other languages
Japanese (ja)
Other versions
JP3460669B2 (en
Inventor
Yuji Ukuma
裕司 宇熊
Yasunobu Yoneda
康信 米田
Shinichiro Kuroiwa
慎一郎 黒岩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2000091808A priority Critical patent/JP3460669B2/en
Publication of JP2001284157A publication Critical patent/JP2001284157A/en
Application granted granted Critical
Publication of JP3460669B2 publication Critical patent/JP3460669B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide highly reliable laminated ceramic electronic components, on which the continuity of external electrodes is secured in the edge sections formed of the end faces and the upper surface, lower surface face, and paired side faces of a ceramic sintered body. SOLUTION: Internal electrodes 3a-3f are formed in the ceramic sintered body 2, and the external electrodes 4 and 5 are formed by applying conductive paste to the end faces 2a and 2b to the upper surface 2c, lower surface 2d, and side faces of the body 2 and baking the paste. The mean particle diameter of the glass frits contained in the conductive paste is adjusted to <5.7% of the radii of curvature of the rounded portions of the edge sections 2e formed of the end faces 2a and 2b and the upper surface 2c, lower surface 2d, and the side faces.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、積層コンデンサな
どの積層セラミック電子部品に関し、特に、導電ペース
トの塗布・焼付けにより形成された外部電極を有する積
層セラミック電子部品に関する。
The present invention relates to a multilayer ceramic electronic component such as a multilayer capacitor, and more particularly to a multilayer ceramic electronic component having external electrodes formed by applying and baking a conductive paste.

【0002】[0002]

【従来の技術】従来、積層コンデンサなどのセラミック
電子部品では、セラミック焼結体の外表面に金属粉末及
びガラスフリットを含有する導電ペーストを塗布し、焼
き付けることにより外部電極が形成されている。このセ
ラミック焼結体は、通常、直方体状の形状を有する。他
方、プリント回路基板などに表面実装するために、上記
外部電極は、セラミック焼結体の端面だけでなく、上
面、下面及び一対の側面に至るように形成される。とこ
ろが、導電ペーストを塗布した場合、端面と、上面、下
面及び一対の側面とのなすエッジ部において、導電ペー
ストの厚みが薄くなり、プリント回路基板に実装される
部分、すなわち下面上の導電ペーストと、端面上に付与
されている導電ペーストとの間で断線が生じがちである
という問題があった。
2. Description of the Related Art Conventionally, in a ceramic electronic component such as a multilayer capacitor, an external electrode is formed by applying a conductive paste containing a metal powder and a glass frit to an outer surface of a ceramic sintered body and baking. This ceramic sintered body usually has a rectangular parallelepiped shape. On the other hand, for surface mounting on a printed circuit board or the like, the external electrodes are formed not only on the end face of the ceramic sintered body but also on the upper face, the lower face, and a pair of side faces. However, when the conductive paste is applied, the thickness of the conductive paste is reduced at the edges formed by the end face, the upper surface, the lower surface, and the pair of side surfaces, and the portion to be mounted on the printed circuit board, that is, the conductive paste on the lower surface. In addition, there is a problem that disconnection tends to occur between the conductive paste applied to the end face and the conductive paste.

【0003】そして、外部電極の断線を防止するため
に、従来、導電ペーストを、セラミック焼結体の端面か
ら付与するに際し、端面上に付与される導電ペーストの
膜厚を制御することにより、コーナー部分にも確実に導
電ペーストが付与され、断線を防止するように試みられ
ていた。しかしながら、端面上の導電ペーストの膜厚を
制御するだけでは、断線を確実に防止することはできな
かった。
[0003] Conventionally, in order to prevent disconnection of the external electrode, when a conductive paste is applied from the end face of the ceramic sintered body, the thickness of the conductive paste applied on the end face is controlled, so that a corner is formed. Attempts have been made to reliably apply the conductive paste to the portions and prevent disconnection. However, disconnection could not be reliably prevented only by controlling the thickness of the conductive paste on the end face.

【0004】そこで、従来、図2に示すように、積層コ
ンデンサ51のセラミック焼結体52において、端面5
2aと、上面52b及び下面52cとのなすエッジ部を
丸めるように加工が施されていた。なお、この加工は、
セラミック焼結体52をバレル研磨することにより行わ
れている。
Therefore, conventionally, as shown in FIG. 2, an end face 5 of a ceramic sintered body 52 of a multilayer capacitor 51 is formed.
Processing was performed so as to round the edge formed by the upper surface 52b and the upper surface 52b and the lower surface 52c. In addition, this processing
This is performed by barrel-polishing the ceramic sintered body 52.

【0005】上記のように、セラミック焼結体52の端
面52aのエッジ部が丸められることにより、導電ペー
ストを塗布し、焼き付けてなる外部電極53の断線が抑
制される。すなわち、外部電極53の端面52a上の部
分と、下面52c上の電極延長部53aとの間の断線が
生じ難くされている。
As described above, the edge of the end face 52a of the ceramic sintered body 52 is rounded, so that disconnection of the external electrode 53 formed by applying and baking a conductive paste is suppressed. That is, disconnection between the portion on the end surface 52a of the external electrode 53 and the electrode extension 53a on the lower surface 52c is less likely to occur.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、近年、
積層コンデンサなどの積層セラミック電子部品では小型
化が進んでいる。小型化が進むにつれて、溶融半田等に
よりプリント回路基板に実装される場合、半田の表面張
力によりセラミック電子部品が立ち上がるという現象、
すなわちツームストーン現象が生じがちとなっている。
However, in recent years,
The miniaturization of multilayer ceramic electronic components such as multilayer capacitors is progressing. As miniaturization progresses, when mounted on a printed circuit board by molten solder, etc., the phenomenon that ceramic electronic components rise due to the surface tension of solder,
That is, the tombstone phenomenon tends to occur.

【0007】他方、外部電極の連続性を確保するため
に、上記のようにエッジ部を丸めた場合、外部電極53
の外表面もセラミック焼結体52のエッジ部で丸みを帯
びるため、ツームストーン現象がより一層生じ易くなる
という問題があった。
On the other hand, in order to ensure the continuity of the external electrode, when the edge is rounded as described above, the external electrode 53
Is also rounded at the edge of the ceramic sintered body 52, so that the tombstone phenomenon is more likely to occur.

【0008】また、上記のように、端面の導電ペースト
の膜厚を制御することにより、エッジ部における外部電
極の連続性を確保する方法では、エッジ部における断線
を防止することは困難であった。
Further, as described above, it is difficult to prevent disconnection at the edge portion by controlling the thickness of the conductive paste on the end surface to ensure continuity of the external electrode at the edge portion. .

【0009】本発明の目的は、従来技術の欠点を解消
し、導電ペーストを塗布し、焼き付けてなる外部電極を
有する積層セラミック電子部品において、外部電極のエ
ッジ部における断線をより確実に防止し、かつツームス
トーン現象の発生を抑制し得る、信頼性に優れた積層セ
ラミック電子部品を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the disadvantages of the prior art, and to more reliably prevent a disconnection at an edge of an external electrode in a multilayer ceramic electronic component having an external electrode formed by applying and baking a conductive paste. It is another object of the present invention to provide a highly reliable multilayer ceramic electronic component capable of suppressing the occurrence of the tombstone phenomenon.

【0010】[0010]

【課題を解決するための手段】本発明に係る積層セラミ
ック電子部品は、上面、下面、一対の側面及び一対の端
面を有するセラミック焼結体と、前記セラミック焼結体
内に形成されており、前記セラミック焼結体の一方の端
面に引き出された内部電極と、導電ペーストの塗布・焼
付けにより形成されており、かつセラミック焼結体の一
方の端面を覆い、かつ上面、一対の側面及び下面に至る
電極延長部を有する外部電極とを備え、前記セラミック
焼結体の端面の外周のエッジ部が曲率半径Rとなるよう
に丸められており、前記外部電極を構成している導電ペ
ースト中のガラスフリットの平均粒径が、前記曲率半径
の5.7%未満であることを特徴とする。
According to the present invention, there is provided a multilayer ceramic electronic component comprising: a ceramic sintered body having an upper surface, a lower surface, a pair of side surfaces, and a pair of end surfaces; An internal electrode drawn out on one end face of the ceramic sintered body, formed by applying and baking a conductive paste, and covering one end face of the ceramic sintered body, and reaching the upper surface, a pair of side surfaces and the lower surface. An external electrode having an electrode extension, wherein an outer peripheral edge of an end face of the ceramic sintered body is rounded so as to have a radius of curvature R, and a glass frit in a conductive paste forming the external electrode is provided. Has an average particle size of less than 5.7% of the radius of curvature.

【0011】好ましくは、上記エッジ部の曲率半径は7
0μm以下とされる。本発明の特定の局面では、前記セ
ラミック焼結体内に、複数の内部電極がセラミック焼結
体層を介して重なり合うように配置されており、前記複
数の内部電極がセラミック焼結体のいずれかの端面に引
き出されており、前記一対の端面のそれぞれを覆うよう
に第1,第2の外部電極がそれぞれ形成されており、そ
れによって積層コンデンサが構成されている。
Preferably, the radius of curvature of the edge portion is 7
0 μm or less. In a specific aspect of the present invention, in the ceramic sintered body, a plurality of internal electrodes are arranged so as to overlap via a ceramic sintered body layer, and the plurality of internal electrodes are any of the ceramic sintered bodies. First and second external electrodes are formed on the end faces so as to cover each of the pair of end faces, thereby forming a multilayer capacitor.

【0012】[0012]

【発明の実施の形態】以下、図面を参照しつつ、本発明
に係る積層セラミック電子部品の具体的な実施例を説明
する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of a multilayer ceramic electronic component according to the present invention will be described with reference to the drawings.

【0013】本実施例では、図1に示す積層コンデンサ
1を作製した。積層コンデンサ1は、直方体状のセラミ
ック焼結体2と、セラミック焼結体2内に形成された内
部電極3a〜3fと、外部電極4,5とを有する。セラ
ミック焼結体2は、適宜の誘電体セラミックスにより構
成されるが、本実施例では、チタン酸バリウムにより構
成されている。
In this embodiment, the multilayer capacitor 1 shown in FIG. 1 was manufactured. The multilayer capacitor 1 has a rectangular parallelepiped ceramic sintered body 2, internal electrodes 3 a to 3 f formed in the ceramic sintered body 2, and external electrodes 4 and 5. The ceramic sintered body 2 is made of an appropriate dielectric ceramic, but in this embodiment, it is made of barium titanate.

【0014】内部電極3a〜3fは、セラミック焼結体
2内において、セラミック焼結体層を介して厚み方向に
重なり合うように配置されている。また、内部電極3a
〜3fは、厚み方向において、交互に、セラミック焼結
体2の第1の端面2aと、第2の端面2bとに引き出さ
れている。
The internal electrodes 3a to 3f are arranged in the ceramic sintered body 2 so as to overlap in the thickness direction via a ceramic sintered body layer. In addition, the internal electrode 3a
3f are alternately drawn to the first end face 2a and the second end face 2b of the ceramic sintered body 2 in the thickness direction.

【0015】本実施例では、内部電極積層数が約30で
あり、セラミック焼結体の外寸が、1.6×0.8×
0.8mmのものを用意した。そして、上記のようにし
て用意されたセラミック焼結体2をバレル研磨し、エッ
ジ部2e、すなわち端面2aと上面2c、下面2d及び
一対の側面とのなす端縁を研磨した。この研磨量を種々
異ならせ、複数種のセラミック焼結体を用意した。
In this embodiment, the number of laminated internal electrodes is about 30, and the outer size of the ceramic sintered body is 1.6 × 0.8 ×
0.8 mm one was prepared. Then, the ceramic sintered body 2 prepared as described above was barrel-polished, and the edge portion 2e, that is, the edge formed by the end face 2a, the upper face 2c, the lower face 2d, and the pair of side faces was polished. The amount of polishing was varied to prepare a plurality of types of ceramic sintered bodies.

【0016】そして、エッジ部2eが丸められた各セラ
ミック焼結体に、平均粒径1μmのCu粉末と、B−S
i−Zn系ガラスフリット(ガラス転移点500℃)
と、アクリル系樹脂を有機溶剤に溶解させた有機ビヒク
ルとを、重量比で95:5:25の割合で混練してな
り、固形分75重量%である導電ペーストを、端面2a
上における膜厚が50μmとなるように塗布し、800
℃の温度で60分間焼き付け、外部電極3,4を形成し
た。
Then, a Cu powder having an average particle size of 1 μm, a B—S
i-Zn glass frit (glass transition temperature 500 ° C)
And an organic vehicle in which an acrylic resin is dissolved in an organic solvent is kneaded at a weight ratio of 95: 5: 25, and a conductive paste having a solid content of 75% by weight is mixed with the end face 2a.
It is applied so that the film thickness on the top is 50 μm, and 800
It baked at the temperature of 60 degreeC for 60 minutes, and formed the external electrodes 3 and 4.

【0017】なお、使用した導電ペーストにおいて、ガ
ラス粉末の平均粒径を、0.5μm、1.0μm、1.
5μm、2.0μm、3.0μm、4.0μm及び5.
0μmと変化させ、種々の積層コンデンサを作製した。
In the conductive paste used, the average particle size of the glass powder was 0.5 μm, 1.0 μm, 1.
5 μm, 2.0 μm, 3.0 μm, 4.0 μm and 5.
The thickness was changed to 0 μm to produce various multilayer capacitors.

【0018】上記のようにして得られた各積層コンデン
サを、セラミック焼結体2の厚み方向と平行な方向に切
断し、断面を顕微鏡により観察した。より具体的には、
外部電極4,5がエッジ部、特に端面と上面及び下面と
のエッジ部で断線しているか否か、すなわちエッジ部で
セラミック焼結体2が露出しているか否かを確認した。
また、外部電極45が断線し、セラミック焼結体がエッ
ジ部で露出しているものを不良品と判定した。各積層コ
ンデンサ500個につきこの連続性評価を行い、500
個あたりの連続性不良品の発生割合を求めた。結果を下
記の表1〜表3に示す。
Each of the multilayer capacitors obtained as described above was cut in a direction parallel to the thickness direction of the ceramic sintered body 2, and the cross section was observed with a microscope. More specifically,
It was confirmed whether or not the external electrodes 4 and 5 were disconnected at the edge portions, particularly at the edge portions between the end surface and the upper and lower surfaces, that is, whether or not the ceramic sintered body 2 was exposed at the edge portions.
In addition, those in which the external electrode 45 was disconnected and the ceramic sintered body was exposed at the edge portion were determined to be defective. This continuity evaluation was performed for 500 pieces of each multilayer capacitor.
The rate of occurrence of continuity defects per piece was determined. The results are shown in Tables 1 to 3 below.

【0019】また、導電ペーストの塗布・焼き付けて外
部電極4,5を形成した後に、外部電極3,4の表面
に、第一層がNi、第二層がSnからなるメッキ膜を湿
式メッキ法により形成し、メッキ前後の絶縁抵抗を測定
した。メッキ後に絶縁抵抗が10%以上低下しているも
のを不良品と判断した。そして、各積層コンデンサ50
0個につきメッキによる上記特性劣化評価を行い、50
0個あたりの不良品発生割合を求めた。結果を下記の表
1〜表3に示す。
After the external electrodes 4 and 5 are formed by applying and baking a conductive paste, a plating film made of Ni as the first layer and Sn as the second layer is formed on the surfaces of the external electrodes 3 and 4 by wet plating. And the insulation resistance before and after plating was measured. Those whose insulation resistance was reduced by 10% or more after plating were judged as defective. Then, each multilayer capacitor 50
The above-mentioned property deterioration evaluation by plating was performed for 0 pieces, and 50 pieces were evaluated.
The defective generation rate per 0 pieces was determined. The results are shown in Tables 1 to 3 below.

【0020】[0020]

【表1】 [Table 1]

【0021】[0021]

【表2】 [Table 2]

【0022】[0022]

【表3】 [Table 3]

【0023】表1〜表3から明らかなように、セラミッ
ク焼結体のエッジ部の研磨量としての曲率半径が30μ
m、50μm及び70μmのいずれの場合でも、導電ペ
ースト中のガラスフリットの粒径の上記曲率半径に対す
る比が0.057未満では、外部電極の連続性不良及び
メッキ後の特性劣化不良が皆無であったのに対し、0.
057以上の場合には、外部電極の連続性不良やメッキ
後の絶縁抵抗不良が生じた。従って、表1〜表3の結果
から、導電ペーストに用いるガラスフリットの平均粒径
のセラミック焼結体のエッジ部の研磨量である曲率半径
Rに対する比を5.7%未満とすれば、外部電極の連続
性を確実に確保し得ることがわかる。
As is clear from Tables 1 to 3, the radius of curvature as the polishing amount of the edge portion of the ceramic sintered body is 30 μm.
In any of the cases of m, 50 μm and 70 μm, when the ratio of the particle size of the glass frit in the conductive paste to the radius of curvature is less than 0.057, there is no poor continuity of the external electrode and no characteristic deterioration after plating. Whereas 0.
In the case of 057 or more, poor continuity of the external electrode and poor insulation resistance after plating occurred. Therefore, from the results in Tables 1 to 3, if the ratio of the average particle size of the glass frit used for the conductive paste to the radius of curvature R, which is the polishing amount of the edge portion of the ceramic sintered body, is set to less than 5.7%, It can be seen that the continuity of the electrodes can be ensured.

【0024】なお、上記エッジ部の曲率半径が70μm
を超えると、エッジ部における外部電極の連続性不良
は、導電ペースト中のガラスフリットの粒径にあまり依
存しなくなる。これは、エッジ部における外部電極の厚
みが十分となり、エッジ部に金属粉末が確実に存在する
ことになるための思われる。従って、本発明は、エッジ
部の曲率半径Rが70μmの場合に、好適に利用され
る。
The radius of curvature of the edge portion is 70 μm.
Is exceeded, the poor continuity of the external electrode at the edge portion does not depend much on the particle size of the glass frit in the conductive paste. This seems to be because the thickness of the external electrode at the edge becomes sufficient and the metal powder is surely present at the edge. Therefore, the present invention is suitably used when the radius of curvature R of the edge portion is 70 μm.

【0025】なお、上記実験例では、ガラスフリットと
して上記B−Si−Zn系ガラス粉末を用いたが、これ
に限定されず、例えばBa−Si−B系ガラス(ガラス
転移点640℃)等を用いた場合も同様の効果が得られ
た。すなわち、本発明の効果は、上記のようにガラスフ
リットの粒径とセラミック焼結体のエッジ部の研磨の程
度との関係で得られるものであるため、導電ペーストを
構成するガラスフリットの種類については特に限定され
ない。
In the above experimental example, the B-Si-Zn-based glass powder was used as the glass frit. However, the present invention is not limited to this. For example, Ba-Si-B-based glass (glass transition point 640 ° C.) or the like may be used. Similar effects were obtained when used. That is, since the effect of the present invention is obtained in the relationship between the particle size of the glass frit and the degree of polishing of the edge portion of the ceramic sintered body as described above, the type of the glass frit constituting the conductive paste is Is not particularly limited.

【0026】また、導電ペーストを構成する金属粉末に
ついても、Cuに限定されず、Agなど他の適宜の金属
を用い得る。さらに、上記実験例では、積層コンデンサ
に適用した例を示したが、本発明は、内部電極を有し、
セラミック焼結体の外表面に内部電極と電気的に接続さ
れる外部電極を有する適宜の積層セラミック電子部品に
適用することができる。
The metal powder constituting the conductive paste is not limited to Cu, but may be other appropriate metal such as Ag. Further, in the above experimental example, an example in which the present invention is applied to a multilayer capacitor is shown, but the present invention has an internal electrode,
The present invention can be applied to an appropriate multilayer ceramic electronic component having an external electrode electrically connected to an internal electrode on an outer surface of a ceramic sintered body.

【0027】[0027]

【発明の効果】本発明に係る積層セラミック電子部品で
は、セラミック焼結体の端面のエッジ部が曲率半径Rと
なるように丸められており、外部電極を構成している導
電ペースト中のガラスフリットの平均粒径が上記曲率半
径の5.7%未満とされているので、セラミック焼結体
のエッジ部における外部電極の連続性が確保され、積層
セラミック電子部品の信頼性を高めることができる。特
に、積層セラミック電子部品の小型化を進め、ツームス
トーン現象が生じ易くなった場合であっても、上記曲率
半径Rを小さくし、しかも、本発明に従って外部電極を
形成することにより、ツームストーン現象の抑制と、外
部電極の連続性の確保を両立することが可能となる。
In the multilayer ceramic electronic component according to the present invention, the edge of the end face of the ceramic sintered body is rounded to have a radius of curvature R, and the glass frit in the conductive paste constituting the external electrode is formed. Is less than 5.7% of the radius of curvature, the continuity of the external electrode at the edge of the ceramic sintered body is secured, and the reliability of the multilayer ceramic electronic component can be improved. In particular, even if the multilayer ceramic electronic component is miniaturized and the tombstone phenomenon is likely to occur, it is possible to reduce the radius of curvature R and to form the external electrode according to the present invention. And the continuity of the external electrodes can be ensured at the same time.

【0028】また、エッジ部の曲率半径が70μm以下
の場合には、本発明に従って外部電極を形成することに
より、エッジ部上における外部電極の連続性を確実に維
持することができる。
When the radius of curvature of the edge portion is 70 μm or less, the continuity of the external electrode on the edge portion can be reliably maintained by forming the external electrode according to the present invention.

【0029】また、本発明の特定の局面では、セラミッ
ク焼結体内に複数の内部電極が形成されており、複数の
内部電極がセラミック焼結体の厚み方向において交互に
第1,第2の端面に引き出されており、第1,第2の端
面を覆うように第1,第2の外部電極が形成されて積層
コンデンサが構成される。従って、本発明により、外部
電極のセラミック焼結体のエッジ部における連続性が確
保された、信頼性に優れた積層コンデンサを提供するこ
とができる。
In a specific aspect of the present invention, a plurality of internal electrodes are formed in the ceramic sintered body, and the plurality of internal electrodes are alternately arranged in the thickness direction of the ceramic sintered body in the first and second end faces. The first and second external electrodes are formed so as to cover the first and second end faces, thereby forming a multilayer capacitor. Therefore, according to the present invention, it is possible to provide a highly reliable multilayer capacitor in which continuity at the edge of the ceramic sintered body of the external electrode is ensured.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例に係る積層セラミック電子部
品としての積層コンデンサを示す断面図。
FIG. 1 is a sectional view showing a multilayer capacitor as a multilayer ceramic electronic component according to one embodiment of the present invention.

【図2】従来の積層コンデンサの問題点を説明するため
の部分切欠拡大断面図。
FIG. 2 is a partially cutaway enlarged sectional view for explaining a problem of the conventional multilayer capacitor.

【符号の説明】[Explanation of symbols]

1…積層コンデンサ 2…セラミック焼結体 2a,2b…第1,第2の端面 2c…上面 2d…下面 2e…エッジ部 3a〜3f…内部電極 4,5…外部電極 DESCRIPTION OF SYMBOLS 1 ... Multilayer capacitor 2 ... Ceramic sintered body 2a, 2b ... 1st, 2nd end surface 2c ... Upper surface 2d ... Lower surface 2e ... Edge part 3a-3f ... Internal electrode 4, 5 ... External electrode

───────────────────────────────────────────────────── フロントページの続き (72)発明者 黒岩 慎一郎 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 Fターム(参考) 5E001 AB03 AD03 AF06 AH01 AJ03 5E082 AA01 AB03 BC38 BC40 FG26 GG10 GG12 GG28 JJ03 JJ13 JJ15 JJ23 PP09  ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Shinichiro Kuroiwa 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto F-term in Murata Manufacturing Co., Ltd. (Reference) 5E001 AB03 AD03 AF06 AH01 AJ03 5E082 AA01 AB03 BC38 BC40 FG26 GG10 GG12 GG28 JJ03 JJ13 JJ15 JJ23 PP09

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 上面、下面、一対の側面及び一対の端面
を有するセラミック焼結体と、 前記セラミック焼結体内に形成されており、前記セラミ
ック焼結体の一方の端面に引き出された内部電極と、 導電ペーストの塗布・焼付けにより形成されており、か
つセラミック焼結体の一方の端面を覆い、かつ上面、一
対の側面及び下面に至る電極延長部を有する外部電極と
を備え、 前記セラミック焼結体の端面の外周のエッジ部が曲率半
径Rとなるように丸められており、前記外部電極を構成
している導電ペースト中のガラスフリットの平均粒径
が、前記曲率半径の5.7%未満であることを特徴とす
る、積層セラミック電子部品。
1. A ceramic sintered body having an upper surface, a lower surface, a pair of side surfaces, and a pair of end surfaces, and an internal electrode formed in the ceramic sintered body and drawn to one end surface of the ceramic sintered body. And an external electrode formed by applying and baking a conductive paste, covering one end surface of the ceramic sintered body, and having an electrode extension extending to an upper surface, a pair of side surfaces, and a lower surface. The outer peripheral edge of the end face of the unit is rounded so as to have a radius of curvature R, and the average particle size of the glass frit in the conductive paste constituting the external electrode is 5.7% of the radius of curvature. The multilayer ceramic electronic component is characterized by being less than.
【請求項2】 前記エッジ部の曲率半径が70μm以下
である、請求項1に記載の積層セラミック電子部品。
2. The multilayer ceramic electronic component according to claim 1, wherein the edge has a radius of curvature of 70 μm or less.
【請求項3】 前記セラミック焼結体内に、複数の内部
電極がセラミック焼結体層を介して重なり合うように配
置されており、 前記複数の内部電極がセラミック焼結体のいずれかの端
面に引き出されており、 前記一対の端面のそれぞれを覆うように第1,第2の外
部電極がそれぞれ形成されており、それによって積層コ
ンデンサが構成されている、請求項1または2に記載の
積層セラミック電子部品。
3. A plurality of internal electrodes are arranged in the ceramic sintered body so as to overlap with each other via a ceramic sintered body layer, and the plurality of internal electrodes are drawn out to any one end face of the ceramic sintered body. 3. The multilayer ceramic electronic device according to claim 1, wherein the first and second external electrodes are formed so as to cover each of the pair of end surfaces, thereby forming a multilayer capacitor. 4. parts.
JP2000091808A 2000-03-29 2000-03-29 Multilayer ceramic electronic components Expired - Fee Related JP3460669B2 (en)

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100616677B1 (en) 2005-04-11 2006-08-28 삼성전기주식회사 Glass frit for dielectric ceramic composition, dielectric ceramic composition, multilayer laminated ceramic capacitor and method for manufacturing the same
US7113389B2 (en) * 2004-07-07 2006-09-26 Tdk Corporation Surface mounted electronic component
US7133274B2 (en) 2005-01-20 2006-11-07 Matsushita Electric Industrial Co., Ltd. Multilayer capacitor and mold capacitor
JP2007149990A (en) * 2005-11-28 2007-06-14 Kyocera Corp Electronic part and circuit module
US7333318B2 (en) 2005-09-13 2008-02-19 Matsushita Electric Industrial Co., Ltd. Multilayer capacitor and mold capacitor
US20150116901A1 (en) * 2013-10-29 2015-04-30 Murata Manufacturing Co., Ltd. Ceramic electronic component
US9123472B2 (en) 2011-03-09 2015-09-01 Samsung Electro-Mechanics Co., Ltd. High capacity multilayer ceramic capacitor and method of manufacturing the same
CN105222811A (en) * 2014-06-25 2016-01-06 株式会社村田制作所 The manufacture method of the direction recognizing method of laminated ceramic capacitor, the direction recognition device of laminated ceramic capacitor and laminated ceramic capacitor

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH097877A (en) * 1995-04-18 1997-01-10 Rohm Co Ltd Multilayered ceramic chip capacitor and manufacture thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH097877A (en) * 1995-04-18 1997-01-10 Rohm Co Ltd Multilayered ceramic chip capacitor and manufacture thereof

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7113389B2 (en) * 2004-07-07 2006-09-26 Tdk Corporation Surface mounted electronic component
US7133274B2 (en) 2005-01-20 2006-11-07 Matsushita Electric Industrial Co., Ltd. Multilayer capacitor and mold capacitor
KR100616677B1 (en) 2005-04-11 2006-08-28 삼성전기주식회사 Glass frit for dielectric ceramic composition, dielectric ceramic composition, multilayer laminated ceramic capacitor and method for manufacturing the same
US7333318B2 (en) 2005-09-13 2008-02-19 Matsushita Electric Industrial Co., Ltd. Multilayer capacitor and mold capacitor
JP2007149990A (en) * 2005-11-28 2007-06-14 Kyocera Corp Electronic part and circuit module
US9123472B2 (en) 2011-03-09 2015-09-01 Samsung Electro-Mechanics Co., Ltd. High capacity multilayer ceramic capacitor and method of manufacturing the same
US20150116901A1 (en) * 2013-10-29 2015-04-30 Murata Manufacturing Co., Ltd. Ceramic electronic component
US9552927B2 (en) * 2013-10-29 2017-01-24 Murata Manufacturing Co., Ltd. Ceramic electronic component
US20170092422A1 (en) * 2013-10-29 2017-03-30 Murata Manufacturing Co., Ltd. Ceramic electronic component
CN105222811A (en) * 2014-06-25 2016-01-06 株式会社村田制作所 The manufacture method of the direction recognizing method of laminated ceramic capacitor, the direction recognition device of laminated ceramic capacitor and laminated ceramic capacitor

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