JP2001282650A - Data-buffering device and decentralized control system using the data-buffering device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a data-buffering device and a decentralized control system which guarantee the concurrency of data, generates no wait time when data are read and written, and provides latest data at the start of the read of the data. SOLUTION: Three physical buffers 222, 224, and 226 are provided in the data buffering device 200, which stores data provided from a data providing part 100 to a data reference part 110, and the numbers of the physical buffers corresponding to a buffer (write buffer) to that the data providing part 100 writes data to, a buffer (read buffer) cut of which the data reference part 110 reads data, and a buffer (storage buffer) that is disabled in access from either of them is held in a buffer information register 211. A buffer controller 217 replaces the values in the buffer information register 211, to replaces the physical buffers corresponding to the write buffer, read buffer, an storage buffers.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data buffering device for temporarily storing data and a distributed control system using the data buffering device. A plurality of control nodes each having the data buffering device described above are connected via a network such as a transmission line, and an onboard electronic control system configured as a distributed system will be described as an example.

[0002]

2. Description of the Related Art Communication media and processors (central processing units)
With respect to a communication data buffering device for communication with the Japanese Patent Application Laid-Open Nos. 4-282938 and 11-65,
No. 974 was disclosed. In each of these devices, there is provided a mechanism in which three buffers are provided inside the device, and a device that performs data writing and a device that performs reading do not simultaneously access the same buffer (or block). The data synchronization was guaranteed, and the speed of data transfer was increased.

FIG. 11 shows a representative diagram of the former disclosed in Japanese Patent Application Laid-Open No. 4-282938. In the figure, 1000 is a communication medium, 1001 is an access control unit,
1002 is a buffer composed of three blocks, 1003
Is a register, 1004 is a data transmission / reception function unit, 1005
Is a communication control function unit, 1006 is a communication control device, 1007
Is an information processing device. In this conventional example, each block 1
002 has a register 1003 indicating which of the access control unit 1001 and the data transmission / reception function unit 1004 can access. This register 100
If 3 is 0, it can be accessed from the data transmission / reception function unit 1004, and if it is 1, it can be accessed from the access control unit 1001.

The access control unit 1001 and the data transmission / reception function unit 1004 are configured to perform exclusive control of the buffer by releasing the buffer that has been processed by itself to the other party. Even if there is a difference in processing speed, not all buffers are filled by one side (that is, register 1
003 is not all 0 or all 1), there is always one buffer to access.

FIG. 12 shows a representative view of the latter one disclosed in Japanese Patent Application Laid-Open No. 11-65974. In the figure, 1100 is a communication medium, 1101 is a central control device, 1
102 is a buffer access end determination unit of the central control unit,
1103 is a communication control device, 1104 is a buffer access end unit of the communication control device, 1105 is BUFF # 1, BU
3 buffers composed of FF # 2 and BUFF # 3, 11
Reference numeral 06 denotes an empty buffer detection unit, and reference numeral 1107 denotes a transition condition determination unit.

In this conventional example, an empty buffer detecting unit 1106
From the communication control device 1103 to the central processing unit 11
01, a buffer that has not been accessed is detected, and from the detected buffer and the buffer currently being used, the transition condition determination unit 1107 determines that a buffer to be used next time is determined according to the state transition diagram shown in FIG. Features.

The numbers in the transition diagram represent the central processing unit 110.
1 accesses BUFF # 1 and the communication control device 1103
Access to BUFF # 3, and the state where BUFF # 2 is empty is shown as 123. Communication control device 110
3 and the central processing unit 1101 are characterized in that they only need to make an inquiry to the transition condition determination unit 1107 when using the next buffer, and can perform high-speed processing.

As a communication data buffering device between a communication medium and a processor (central processing unit), there is one disclosed in Japanese Patent Application Laid-Open No. 9-269934. This is a shared memory system that guarantees data simultaneity for each area, and a typical diagram is shown in FIG. In the figure, 1
200 is a communication medium, 1201 is a communication control device, 1202
Is a shared memory access control means, 1203 is an internal path arbitration means, 1204 is a shared memory, 1205 is a system path I / F means, 1206 is a system path, and 1207 is a computer.

In this method, the system bus I / F means 1
This is a method for controlling access to the shared memory 1204 from both means 205 and the communication control means 1201 and controlling access to the shared memory 1204 using the shared memory access control means 1202 and the internal bus arbitration means 1203. As shown in FIG.
4) has a shared memory having the same memory area, and each node transmits data to be provided by itself via a network (communication medium). Each node can share the same memory map by expanding the received node to an appropriate area.

[0010]

The conventional communication data buffering apparatus is constructed as described above. Japanese Patent Application Laid-Open Nos. 4-282938 and 11-65974 disclose three buffers. (Or block)
Is a data transmission means that guarantees data synchronization for each buffer, but each has its own problems.

Japanese Patent Application Laid-Open No. 4-282938 (FIG. 11) discloses that when the time interval at which the access control unit 1001 reads data is significantly longer than the time interval at which the data transmission / reception function unit 1004 writes data, The latest data may not be read. It is assumed that new data is sequentially written from the data transmission / reception function unit 1004 to the second block and the third block while the access control unit 1001 uses the first block.

At this point, the second block is already accessible from the access control unit 1001. However, in this invention, all buffers are biased to either side (register 1
003 becomes all 0 or all 1), the register 1003 is not rewritten, and the third block is the data transmission / reception function unit 1004
Remains available from.

Thereafter, when further writing is performed, the third
Is overwritten on the newest data written in the block, and the latest data that has been written so far is lost. If the access control unit 1001 switches blocks during the overwriting of the latest data, the third block being overwritten cannot be used, so the second block having data that is one cycle older is used. When the operation speeds of the access control unit 1001 and the data transmission / reception function unit 1004 cannot be specified, such a phenomenon occurs.
In some cases, out-of-date data was used.

[0014] Similarly, the one disclosed in JP-A-11-65974 (FIG. 12) may not refer to the latest data. In this conventional device, the empty buffer detecting means 1106
Thus, the central processing unit 1
Detect a buffer that has not been accessed from 101,
The buffer to be used next time. But this method
If the central processing unit 1101 is much faster than the communication control unit 1103, there is a possibility that old data will be referred to. Consider a case where the communication control unit 1103 does not switch the buffer while the central processing unit 1101 switches the buffer twice (that is, no new data is written).

The central processing unit converts certain data A into Buff #
1, the buffer A is switched and the newer data B is referred to from Buff # 2. If the buffer is further switched, the data A is read again from Buff # 1. Meanwhile, Buff # 3 is used by the communication control device 1103. When the switching of the buffer occurs continuously from one device, if the operation is performed according to the state transition diagram, the switching of the two buffers is continued. Therefore, this conventional device does not have a flag indicating that data has been updated, and is not a device that can always refer to the latest data.

Japanese Patent Application Laid-Open No. 9-269934 (FIG. 14), which guarantees data simultaneity for each predetermined area, has a communication control means 1201 or a system bus I / F.
While the means 1205 is accessing the predetermined area, the access from the other side is prohibited, thereby guaranteeing the data synchronization. Therefore, if the areas to be accessed overlap, the user must wait until one series of accesses is completed.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and a device that refers to data even when a device that provides data (communication control device) writes data. There is no waiting time when the (central processing unit) reads data, and the central processing unit tries to acquire data without being aware of which of the plurality of buffers in the data buffering device is being accessed. At the time when buffer switching is prohibited, it is possible to refer to the latest buffer among the buffers written so far, and to provide a data buffering device in which data is guaranteed to be synchronized at the buffer level. The purpose is to: Further, by using a plurality of data buffering devices, a distributed control system capable of sharing data provided by each node while maintaining synchronization at each node is provided.

[0018]

A data buffering device according to a first configuration of the present invention is a data buffering device for storing data to be provided from a data providing unit to a data reference unit. A physical buffer having a size, a write buffer for accessing to write the data provided by the data providing unit, a read buffer for accessing the data reference unit to read the written data, and the data providing unit and the data reference As one of the storage buffers that are inaccessible from either
A buffer information register for holding information for causing each of the two physical buffers to function, a physical buffer accessed by the data providing unit and a physical buffer accessed by the data reference unit based on the information held in the buffer information register And a request to switch the physical buffer accessed by the data providing unit to another physical buffer after the data providing unit has finished accessing the physical buffer corresponding to the write buffer. When a write buffer switching request register and the data reference unit start accessing a physical buffer corresponding to a read buffer, the physical buffer accessed by the data reference unit is switched to another physical buffer during access to the physical buffer. A buffer switching prohibition register for writing a request for prohibiting the storage, and first storage means for storing a storage buffer valid flag indicating whether data to be accessed by the data reference unit is stored in a physical buffer corresponding to the storage buffer. In the case where a request to switch a physical buffer is written in the buffer switching request register and the request to inhibit switching to another physical buffer is not written in the buffer switching prohibition register, the data provision is performed. Sending a command to switch the physical buffer accessed by the unit and the physical buffer accessed by the data reference unit to the buffer information register, and writing a request to switch the physical buffer to the buffer switching request register; and Buffer switching When a request to prohibit switching to another physical buffer is written in the prohibition register, the buffer information register is configured to switch between the physical buffer accessed by the data providing unit and the physical buffer corresponding to the storage buffer. Information is changed, and the storage buffer valid flag stored in the first storage means is a case where data to be accessed by the data reference unit is stored in a physical buffer corresponding to the storage buffer; and If a request to prohibit switching to another physical buffer is not written in the buffer switch prohibition register, the buffer information register is configured to switch between the physical buffer accessed by the data reference unit and the physical buffer corresponding to the storage buffer. Buffer information register control to change information in the buffer And a step.

The data buffering device according to the second configuration of the present invention is the same as the data buffering device according to the first configuration, wherein reading and clearing are possible from a data reference section, and a reading indicating whether or not the reading buffer has been updated. A second storage means for storing a buffer update flag is provided.

The distributed control system according to the first configuration of the present invention is a distributed control system in which N (N: an integer equal to or greater than 2) node devices are connected via a transmission line. A communication control device for controlling transmission of data by the node device and reception of data from another node device, and N-1 data buffers of the first configuration provided corresponding to the other node devices, respectively. A ring device (first data buffering device) receives data from another node device sent to the communication control device, checks a source node device from the sent data, and A first data providing unit for sending to the first data buffering device, a first data reference unit for accessing the first data buffering device, and information corresponding to the own node device A transmitting node register for storing, a second data providing unit for providing data transmitted from the own node device, and a data buffering device of the first configuration provided corresponding to the own node device (A second data buffering device) and a second data reference unit for referring to data of the second data buffering device.

A distributed control system according to a second configuration of the present invention is the distributed control system according to the first configuration, wherein N-1 buffer switching prohibition registers included in each of the first data buffering devices are set to N. One buffer switch prohibition register composed of -1 bits, and N-
Switching prohibition can be simultaneously set for one first data buffering device.

A distributed control system according to a third configuration of the present invention is the distributed control system according to the first or second configuration, wherein the N-1 first data buffering devices include N-1 first data buffering devices. Buffer switch request register
A single buffer switch request register composed of N-1 bits is provided, so that a switch request can be simultaneously set for N-1 first data buffering devices.

A distributed control system according to a fourth configuration of the present invention is the distributed control system according to any one of the first to third configurations, wherein N-1 first data buffering devices share a write buffer. When data is written from the first data providing unit to the physical buffer corresponding to the write buffer, a buffer switch request is written only to the buffer switch request register of the node device that has transmitted the data. , N node devices transmit their own node device data to other node devices according to a predetermined order.

A distributed control system according to a fifth configuration of the present invention is the distributed control system according to the fourth configuration, wherein N-1
The first data buffering devices share a storage buffer, and the first data reference unit sends a buffer switching prohibition register to one of N-1 other node devices. In this case, the buffer switching prohibition is written.

A distributed control system according to a sixth configuration of the present invention is the distributed control system according to the fifth configuration, wherein N-1
The first data buffering devices include M (M: an integer smaller than N) write buffers, M storage buffers, N-1 read buffers, and N-1 read buffers.
And a receiving node number register having a number for allocating another node device corresponding to each of the read buffers. If the number of node devices connected to the transmission path is less than N, the receiving node number In the register,
The configuration is such that no more than M consecutive physical buffers are allocated to the same node device.

A distributed control system according to a seventh configuration of the present invention is the distributed control system according to the sixth configuration, wherein M reception write buffers, M transmission read buffers, and M reception storages are provided. A buffer, M transmission storage buffers, N transmission / reception read / write buffers, and a node number register for setting a node number corresponding to the transmission / reception read / write buffer; Set your own node number in
Among the N read / write buffers for transmission / reception accessible from the central processing unit, M or less buffers are used as write buffers for transmission.

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, Embodiment 1 of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a physical configuration of the data buffering device according to the first embodiment of the present invention, and FIG. 2 is a block diagram showing a logical configuration of the data buffering device according to the first embodiment. is there.

1 and 2, reference numeral 100 denotes a data providing unit for providing data, 110 denotes a data reference unit for referring to data, and 200 denotes a data reference unit 1 from the data providing unit 100.
10 is a data buffering device for storing data to be provided to the data buffer 10. The data buffering device has three physical buffers 222 to 224 having the same size. Each of these physical buffers 222 to 224 functions as one of a write buffer, a read buffer, and a storage buffer according to information stored in a buffer information register described later. Reference numeral 202 denotes a write buffer accessed to write data provided by the data providing unit 110, and 204 denotes a data buffer
0 is a storage buffer that is inaccessible from either the data reference unit 110 or the data reference unit 110.
Reference numeral 10 denotes a read buffer accessed to read the written data.

Reference numeral 211 denotes three physical buffers 222 to 22
4 is information (eg, the write buffer 202, the read buffer 206, and the storage buffer 204) for functioning as one of the write buffer 202, the read buffer 206, and the storage buffer 204.
(A number corresponding to each of the above).

Reference numeral 208 denotes a write buffer selector for causing any of the physical buffers 222 to 224 to function as the write buffer 202 according to the information held in the buffer information register 211. Reference numeral 209 denotes a physical buffer 222 according to the information held in the buffer information register 211.
To 224 function as a read buffer 206.

Reference numeral 210 denotes a buffer control unit. The buffer control unit 210 includes a buffer information register 211, a buffer switch request register 214 described later, first storage means for storing a storage buffer valid flag 215, a buffer switch prohibition register 216, a buffer switch Control device 217,
It has a second storage means for storing the buffer update flag 218.

At 214, after the data providing unit 100 has finished accessing the physical buffer corresponding to the write buffer,
This is a buffer switching request register for writing a request to switch the physical buffer accessed by the data providing unit 100 to another physical buffer.

215 is a storage buffer valid flag.
When the storage buffer switching flag 215 is set, it means that valid data to be referred to by the data reference unit 110 is stored in the physical buffer functioning as the storage buffer. The storage buffer switching flag 215 is stored in a first storage unit (not shown) having a storage medium such as a memory, for example.

At 216, when the data reference unit 110 starts accessing the physical buffer corresponding to the read buffer 206, the physical buffer accessed by the data reference unit 110 is switched to another physical buffer while accessing the physical buffer. This is a buffer switching prohibition register for writing a request to prohibit the operation.

Reference numeral 218 denotes a read buffer update flag indicating whether the read buffer has been updated. The read buffer update flag 218 is stored in a second storage means (not shown) having a storage medium such as a memory. Have been.

Reference numeral 217 denotes a buffer control device corresponding to the buffer information register control means. Buffer control device 2
Reference numeral 17 denotes a case where a request for switching a physical buffer is written in the buffer switching request register 214 and a request for prohibiting switching to another physical buffer is not written in the buffer switching prohibition register 216; The buffer information register 211 switches between the physical buffer accessed by the providing unit 100 and the physical buffer accessed by the data reference unit 110.
Change the information in Also, the buffer control device 217
Is a case where a request to switch the physical buffer is written in the buffer switching request register 214, and
When a request to prohibit switching to another physical buffer is written in the buffer switching prohibition register 216, the buffer information is switched to switch between the physical buffer accessed by the data providing unit 100 and the physical buffer corresponding to the storage buffer 110. The information in the register 211 is changed. If the storage buffer valid flag 218 is set and a request to prohibit switching to another physical buffer is not written in the buffer switching prohibition register 216, the data reference unit 1
Physical buffer and storage buffer 204 accessed by 10
The information in the buffer information register 211 is changed so as to switch to the physical buffer corresponding to.

The operation of the first embodiment will be described.
In the first embodiment, a data buffering device 2 is provided between a data providing unit 100 that writes data to be provided and a data reference unit 110 that refers to the data.
00, the data buffering device 20
In 0, three physical buffers 222, 224, 226
And two buffer selectors 208 and 209 and a buffer control unit 210 are provided. Although there are three physical buffers, the data provision unit 100 or the data reference unit 110
Can access only one different buffer. A buffer that can be written from the data providing unit 100 is called a write buffer 202, a buffer that can be read from the data reference unit 110 is a read buffer 206, and a buffer that is inaccessible to both is called a storage buffer.
These are the physical buffers 222, 224, and 226, respectively.
, But the assignment changes depending on the situation.

These are conceptually shown in FIG. The logical buffers 202, 204, and 206 in FIG.
The physical buffers 222, 224, and 226 are associated with each other. The register that holds the information on the association is the buffer information register 211 in FIG. The physical buffer number corresponding to the write buffer 202 is the write buffer number, the physical buffer number corresponding to the read buffer 206 is the read buffer number, and the physical buffer number corresponding to the storage buffer 204 is the storage buffer number as buffer information. It is stored in the register 211. Referring to this value, the buffer selector 208,
Reference numeral 209 distributes accesses of the data providing unit 100 and the data reference unit 110 to corresponding physical buffers.

Next, a method of realizing buffer switching will be described. It is assumed that each buffer information register 211 is given a non-overlapping initial value such as 1 for write buffer information, 2 for storage buffer information, and 3 for read buffer information. By exchanging the value of the buffer information on a one-to-one basis, the data providing unit 100 and the data reference unit 1 are exchanged.
The physical buffer accessed from 10 can be changed instantaneously. For example, when the above value is stored in the buffer information register 211, the data providing unit 100 writes data to the physical buffer 1 allocated to the write buffer 202. When the writing is completed, the buffer is switched, and the read buffer information and the write buffer information are exchanged. Then, the buffer information register 2
Reference numeral 11 indicates that the write buffer information is 3, the storage buffer information is 2, and the read buffer information is 1, and the physical buffer 1 in which the data is written is allocated to the read buffer 206. The switching of the physical buffer is performed based on such a principle. The buffer control unit 210 switches the value of each buffer information.

The algorithm for buffer exchange will be described. FIG. 3 is a control flowchart for explaining the operation of the buffer control device. Hereinafter, description will be made using conceptual buffers such as a write buffer and a read buffer. The physical buffer switching may be performed when the data providing unit 100 issues a buffer switching request and the data reference unit 110 releases the buffer switching prohibition (write 0). This will be specifically described with reference to FIG. When a buffer switching request occurs (step 10 → step 12 in FIG. 3), information (for example, a flag) in the buffer switching prohibition register 216 is confirmed (step 12). If the flag in the buffer switching prohibition register 216 is 0, the read buffer is not used, and the read buffer 206 is replaced with the write buffer 202 in which the latest data is written (step 14).

The information (for example, a flag) in the buffer switching request register 214 requests switching of the physical buffer, and the buffer switching inhibition register 2
If the information (for example, a flag) in 16 is to release the prohibition of switching of the physical buffer, an operation of switching the write buffer 202 and the read buffer 206 is performed. At this time, even if there is data in the storage buffer 204, the data in the storage buffer 204 is discarded because the data in the physical buffer that has been written by the data providing unit 100 is newer. Therefore, when the write buffer 202 and the read buffer 206 are exchanged (Step 14), the storage buffer valid flag 215 is always reset to 0.

The buffer switching prohibition register 216
If the flag is 1, the read buffer 206 is being used, so that the read buffer 206 cannot be switched to guarantee the data synchronization. Therefore, the storage buffer 204 and the write buffer 202 are exchanged,
The storage buffer valid flag 215 indicating that the storage buffer 204 contains newer data than the current read buffer 206 is set to 1 (step 16).

When 0 is written to the flag of the buffer switching prohibition register 216 and the value changes from 1 to 0 (step 10 → step 18), if the storage buffer valid register 215 is 1 (step 18 → step 2)
0), the read buffer 206 and the storage buffer 204 are exchanged, and the storage buffer valid flag 215 is set to 0. If the storage buffer valid flag 215 is 0, the buffer is not replaced because the current read buffer 206 is the latest.

The buffer control unit 210 has a read buffer update flag 218, and becomes 1 when the read buffer 206 is actually switched by the buffer control unit 217. This flag can be cleared by writing 0 from the data reference unit 110. When the buffer update flag 218 is used, the buffer update flag 218 is cleared before canceling the buffer switching prohibition when referring to data with the buffer switching prohibited.

Subsequently, when the buffer switching prohibition is released, the next time an attempt is made to refer to the buffer, by checking the value of the buffer update flag 218, it is possible to confirm whether or not the buffer has been updated since the previous reference. It is.

Since the data buffering device according to the first embodiment is configured as described above,
When 00 accesses the physical buffer, the data reference unit 110 does not execute access to this physical buffer, so that the data synchronization is guaranteed.

Furthermore, since a physical buffer to be accessed is always allocated to the data providing unit 100 and the data reference unit 110, there is no need to wait for access to allocate a physical buffer during access. Further, at the time when the access is started, the data reference unit 110 can access the physical buffer that stores the latest data that has been written to the physical buffer.

Further, the read buffer update flag 218
Since the data reference unit 110 checks the information of the read buffer update flag 218, the data reference unit 110 can check whether the accessed physical buffer has been switched with the previously accessed physical buffer. 110 can check whether the physical buffer storing the latest data has been accessed.

Embodiment 2 In the second embodiment, a distributed control system using a data buffering device will be described. Here, a distributed control system is configured using a plurality of node devices having a data buffering device connected to a transmission path such as a network, and guarantees the synchronization of data provided for each node device, and A description will be given of a distributed control system capable of preventing waiting for writing time and referring to the latest data received so far at the start of data reading.

FIG. 4 is a block diagram showing the configuration of one node device in the distributed control system according to the second embodiment. In the figure, 1 is a network, 300
Is a communication data buffering apparatus provided with a plurality of data buffering apparatuses according to the first embodiment for sharing data with a plurality of nodes. Data transmission 350 is performed by its own node apparatus (referred to as its own node). , And a communication control device that controls reception of data from other node devices,
360 is a central processing unit in each node device.

The communication data buffering device 300
It is assumed that its own node device transmits data, and includes a transmission data buffering device 315 and a reception data buffering device 316. FIG. 4 shows a case where the number of node devices connected to the network and sharing data is a maximum of four nodes.
The reception data buffering device 316 includes three first data bases corresponding to each of the other three node devices except the own node.
The data buffering devices 302, 304, and 306, which are the data buffering devices, are provided. The transmission data buffering device 315 includes the data buffering device 308, which is the second data buffering device corresponding to the own node. . At least one of the four node devices may not have the transmission data buffering device 315.

Data buffering devices 302 and 30
Regarding 4,306, a communication control device 350 or a reception data distribution device 312 described later corresponds as a data providing unit (first data providing unit) corresponding to the data providing unit 100 in the first embodiment. The central processing unit 360 corresponds to a data reference unit (first data reference unit) corresponding to the data reference unit 110 in No. 1. As for the data buffering device 308, the central processing unit 36 serves as a data providing unit (second data providing unit) corresponding to the data providing unit 100 in the first embodiment.
0 corresponds to the data reference unit 110 in the first embodiment.
The communication control device 350 corresponds to a data reference unit (second data reference unit) corresponding to.

The communication data buffering device 300
Are the respective data buffering devices 302, 304, 30
6 is a receiving node number register 310 that holds information (for example, a number assigned to each node device) about which node device stores data from the receiving device. A receiving data distribution device 312 having a function of distributing to each data buffering device is provided.

The transmission data buffering device 315 is provided with a transmission node number register 311 indicating the node number of the own node. The communication control device 350 refers to the transmission node number register 311 to generate a packet from the transmission data of the own node. The packet contains the number of the node that transmitted the packet. When data is transmitted after being divided into a plurality of packets, the communication control device 350 performs the assembly division of the packets.

The communication control device 350 acquires the node number and the data from the received packet, and the reception data distribution device 312 receives the reception node number indicating the correspondence between the received node number and the data buffering devices 302, 304, and 306. A data buffering device for storing data is determined using the number register 310. Then, writing is performed to the determined receiving data buffering devices 302 to 306, and when the writing is completed, a buffer switching request is issued to the same data buffering device.

The transmission data buffering device 315 buffers data updated by the central processing unit 360. The central processing unit 360 collects data in the operation cycle of its own node device, and stores data to be provided to another node device (referred to as another node) in the data buffering device 3.
08 is written. When the writing is completed, a buffer switching request is issued.

Although the operation of the communication control device 350 is not particularly defined here, a method of monitoring the buffer update flag of the data buffering device 308 and reading out the data when the buffer is updated and transmitting the data to another node, a communication control It is conceivable that the device extracts data from the data buffering device at a unique timing (timer, network status, instruction from master, etc.). When data is read, data is read after the corresponding buffer is prohibited from being switched, and the prohibition of switching is released when the process is completed.

In the distributed control system according to the second embodiment, each node device includes N data buffering devices described in the first embodiment, and a reception data distribution device 312 that distributes data sent from another node according to the node number. As well as guaranteeing data concurrency for each node,
There is no need to wait for data reading and writing, and the latest data can be provided at the start of data reading.

Furthermore, if the reception data buffering device 316 is configured so that the buffer switch prohibition registers of each data buffering device are combined into one register of N-1 bits, all receptions can be performed by one write access. Since the buffer switching prohibition can be issued to the data buffering device at the same time, the trouble of issuing the switching prohibition for a plurality of buffers can be omitted, and
It is possible to leave the state of the buffer at a certain point in time in the data buffering devices in all the receiving data buffering devices 316.

Further, if the buffer switching request register of each data buffering device is configured to be integrated into one register of N-1 bits in the receiving data buffering device 316, data to be stored in a plurality of buffers can be stored. When the data is stored in one packet, it is possible to simultaneously issue a buffer switching request after writing data to each buffer.

Embodiment 3 In the present embodiment, a mechanism for reducing a buffer is provided for a triple buffer having a low memory use efficiency. It is noted that a write buffer is required for each node device when there is a high degree of freedom that data for various node devices is received out of order. A master (not shown) manages the operation on the network, and each node device performs transmission according to the instruction of the master, and when one node device starts transmission, another node device does not transmit until it ends. In the system, it is possible to reduce the number of write buffers to one by sharing the write buffer among the data buffering devices in the receiving data buffering device.

FIG. 5 shows this example. FIG. 5 is a block diagram showing a configuration of one node device in the distributed control system according to the third embodiment of the present invention. In the figure, reference numeral 400 denotes a communication data buffering device provided with a plurality of data buffering devices for sharing data with a plurality of nodes, and includes a transmission data buffering device 315 and a reception data buffering device 416.
Is provided. In the figure, the number N of connected nodes is illustrated as 4 (including the own node). As for the reception data buffering device 416, the communication control device 350 corresponds as a first data providing unit, and the central processing unit 360 corresponds as a first data reference unit. As for the transmission data buffering device 315, the central processing unit 360 corresponds as a second data providing unit, and the communication control device 350 corresponds as a second data reference unit.

The received data buffering device 416 of this embodiment operates under the condition that the communication control device 350 writes data for each node device.
This condition is not a problem when the data transmitted from each node device is transmitted in one packet on the network 1. Even when the packet is divided into a plurality of packets, the data transmission order is managed such that a plurality of node devices transmit data of their own node device to another node device in a predetermined order by turning a token. A network system or a buffer in the communication controller, and write the data to the corresponding data buffering device of the receiving data buffering device when the data from each node device is completely prepared. After this, the present embodiment becomes operable.

The difference between the receiving data buffering device 316 shown in the second embodiment and the receiving data buffering device 416 according to the present embodiment will be described with reference to FIG. The reception data buffering device 416 of FIG. 5 includes one write buffer 202, N-1 storage buffers 204, and N-1 read buffers 206. Therefore, when N = 4, a total of 7
Physical buffers. And these buffers are all the same size. The reception data buffering device 416 has the same function as the reception data buffering device 316 shown in the second embodiment, and
The physical buffer to be used is exchanged by the method of exchanging buffer information described in (1). That is, the buffers 202, 204, and 206 depicted in FIG.
The corresponding physical buffer number is stored in the buffer information register in 0, and the buffer can be exchanged across nodes by switching these.

The buffer switching request register 214 and the buffer switching prohibition register 2
16, a storage buffer valid flag 215, a buffer update flag 218, and a buffer control circuit 217 are provided in the buffer control unit 210 for each node.

The receiving data buffering device 316 according to the second embodiment
The difference is that in the case of the receiving data buffering device 416 of the present embodiment, only one common write buffer 202 exists in the write buffer. In the present embodiment, since data written from communication control section 350 is always for each node device, it suffices that a buffer for writing data transmitted from one node device exists.

The operation principle will be described below. Communication control unit 350
Writes the received data into the shared write buffer 202. When the writing is completed, a buffer switching request is issued. When the switching request is received, the common write buffer 202 is replaced with a read buffer 206 or a storage buffer 204 for the corresponding node device according to the situation, and a shared write buffer 202 having a new writable physical buffer is generated. The next data to be received is stored in this new shared write buffer 202,
Thereafter, the buffer is exchanged in the same manner. The operation principle of the exchange is the same as the method described in the first and second embodiments, but only the exchange with the write buffer uses the shared write buffer 202 for all nodes. Buffer switching request register 21 in buffer controller 210
It is possible to instruct one node whether to perform buffer switching in one writing by using No.4.

The receiving data buffering device 316 of the second embodiment can be used under the same restrictions as in the present embodiment. However, the N-1 write buffers are used sequentially and do not store data at the same time. The reception data buffering device 416 according to the present embodiment is obtained by reducing the unused buffers.

Embodiment 4 The data buffering device according to the present embodiment is obtained by reducing the number of buffers further used from the data buffering device 400 according to the third embodiment. When the central processing unit 360 refers to the data, the data buffering device 400 sequentially uses one node at a time. It is assumed that buffer switching prohibition is issued and data is referenced. That is, in the present embodiment, the processor limits the number of nodes that declare buffer switching prohibition to one, and pays attention to the fact that only one storage buffer is used at the same time, and reduces the number of storage buffers to one. It is characterized by the following. When using data from a plurality of nodes, a copy of the data is created in the work area of the central processing unit 360.

FIG. 6 is a block diagram showing the configuration of one node device in the distributed control system according to the fourth embodiment. In the figure, reference numeral 500 denotes a communication data buffering device provided with a plurality of data buffering devices for sharing data with a plurality of nodes, and a transmission data buffering device 315 and a reception data buffering device 516 are provided. Prepare. As for the reception data buffering device 516, the communication control device 350 corresponds as a first data providing unit, and the central processing unit 360 corresponds as a first data reference unit. As for the transmission data buffering device 315, the central processing unit 360 corresponds as a second data providing unit, and the communication control device 350 corresponds as a second data reference unit. Receiving data buffering device 516 of the present embodiment
Has the same mechanism as the receiving data buffering devices 316 and 416 shown in the second and third embodiments, but improves the use efficiency of buffers by reducing the number of buffers not used at the same time. I have.

FIG. 6 illustrates the case where the number N of connected nodes is 4 (including the own node). The reception data buffer device 516 for three nodes (for N-1 nodes) includes a common write buffer 202, a common storage buffer 204, and a read buffer 206 for each node. Although the buffer control unit 210 exists, the storage buffer valid flag has only one bit because the common storage buffer 204 is common as compared with the third embodiment.

The method of using this device from the central processing unit 360 is the same as the method shown in the third embodiment, except that a part related to data access from the central processing unit 360 has been changed. Although the buffer switching prohibition register can operate on all the flags at once, the buffer switching prohibition register described in the fourth embodiment has a mechanism for validating the buffer switching prohibition flag for only one node.

The storage buffer plays the role of the central processing unit 360.
Is a buffer for storing the latest data received while any one of the read buffers is prohibited from being switched. When the central processing unit 360 prohibits the switching of a plurality of buffers, it is necessary to store the latest data in a plurality of storage buffers. There is. However, if the central processing unit 360 prohibits the switching of only one buffer at a time, only one storage buffer 204 is used at a time. In the present embodiment, unnecessary storage buffers are reduced, and the use efficiency of the buffers is increased.

The operation flow of the buffer control unit 210 is shown in FIG.
Shown in As compared with the operation flow of FIG. 3 described in the first embodiment, the buffer switching request, the buffer switching prohibition flag, and the read buffer are distinguished by N−1 nodes. It is shown in the form of node A in the figure. Fig. 3
7 and FIG. 7 show the same operation.

In this embodiment, the storage buffer is shared in the reception data buffer device 516, but it is not necessary to have a register indicating which node stores data. There is only one buffer for which switching is prohibited by the central processing unit 360, and the storage buffer valid flag 2
If 15 is valid, it is clear that the storage buffer is for the read buffer which is prohibited from being switched, and when the buffer switching of the read buffer is released, the read buffer and the common storage buffer may be exchanged. .

Embodiment 5 In this embodiment, when a buffering device corresponding to N nodes is used by M nodes less than N, a plurality of buffers (maximum M) are used.
Is configured to be used for one node. Here, when the node number corresponding to the read buffer is set in the reception node number register, the same node number is set continuously so that one node can use a plurality of buffers. It is.

FIG. 8 shows this example. In the figure, 600
Is a communication data buffering device including a plurality of data buffering devices for sharing data with a plurality of nodes.
And a reception data buffering device 616. Regarding the reception data buffering device 616, the first
The communication control unit 350 corresponds to the data providing unit, and the central processing unit 360 corresponds to the first data reference unit. As for the transmission data buffering device 315, the central processing unit 360 corresponds as a second data providing unit, and the communication control unit 350 as a second data reference unit.
Correspond respectively. The reception data buffering device 616 has N read buffers 206, M (smaller than N) common write buffers 202, and M common storage buffers 204. In this figure, N = 8, M = 4
FIG.

The communication control device can write data of one node device into a plurality of buffers for the M common write buffers 202 prepared. When the writing by the node device is completed and a buffer switching request is issued, when switching the common write buffer 202 to the common storage buffer 204, all M buffers are switched.

When switching between the read buffer 206 and the write buffer 202 (or the storage buffer 204) for the corresponding node device, the following procedure is followed. The read buffer 20 in which the same node number is assigned to the receiving node number register 310 with respect to the node number for which the communication control device 350 issues the buffer switching request (or for the node number for which the switching prohibition is canceled).
6 is replaced with the common write buffer 202 (or the common storage buffer 204). The same node number is always set consecutively. At this time, the write buffer 202 and the read buffer 206 are selected and exchanged from the one with the smallest number (from the top in the figure).

The above operation will be specifically described. FIG. 9 shows the setting state of the receiving node number register 310, the allocation state of the read buffer 206, and the allocation state of the exchanged write buffer 202. The node numbers 1, 2, 3, and 4 are used, and the node number register 310 is set as shown in FIG. The read buffer 20 assigned to each node device by setting this register
6 is determined as shown in FIG. 9B, and the write buffer to be replaced with the write buffer 202 is determined as shown in FIG. 9C. For example, the first node device (referred to as node 1)
Read buffer 206 and write buffer 2
When exchanging 02, the read buffers 1 and 2, which are the read buffers set for the node 1, and the write buffers 1 and 2 are exchanged. Similarly, in the second node device (referred to as node 2), the read buffer 3 and the write buffer 3 are exchanged, and the third node device (node 3
), The write buffers 1, 2, 3, and 4 are exchanged with the read buffers 4, 5, 6, and 7, and the fourth node device (called the node 4) exchanges the read buffer 8 and the write buffer 1.

By such processing, it is possible to switch to a plurality of continuous buffers in response to a buffer switching request for one node device, and it is possible to allocate a plurality of buffers to a specific node device.

Embodiment 6 FIG. This embodiment addresses a problem that occurs when the data buffering device is applied to a system. In the fifth embodiment, the number of buffers allocated to each node for reception is variable.
It was necessary to change the size of the transmission buffer accordingly. Focusing on a node with a large amount of transmission data, the reception data is smaller than other nodes, and the number of unused reception buffers increases. Although the amount of data provided in the entire network is constant, each node device is divided into one used for transmission and one used for reception. Therefore, in the present embodiment, all the node devices have the same number of read buffers, and a part of them is used as a transmission write buffer for transmitting own data. This allows the devices to use the same device.

FIG. 10 is a block diagram showing a configuration of one node device in the distributed control system according to the sixth embodiment of the present invention. In the figure, 700 is a communication data buffering device for sharing data with a plurality of nodes, 710 is a reception buffer control unit, 712 is a transmission buffer control unit 712, and 207 is a transmission / reception read / write buffer. . Regarding the communication data buffering device 700, when receiving data from another node, the communication control device 350 corresponds as a first data providing unit, and the central processing unit 360 as a first data reference unit.
Corresponds. When transmitting data from the own node, the central processing unit 360 corresponds to the second data providing unit, and the communication control unit 350 corresponds to the second data reference unit.

FIG. 10 illustrates the case where the total number of nodes N = 8 and the number of buffers M that can be used by the nodes M = 2. The communication data buffering device 700 includes a common write buffer (reception write buffer) and a common storage buffer. (Reception storage buffer), M (= 2) storage buffers for transmission, and N (= 8) read / write buffers for transmission and reception. Also, the communication data buffering device 700
Is a reception node number register 310 for storing assignment information between the transmission / reception read / write buffer 207 and the node number, a transmission node number register 311 for storing the number of the own node, and a transmission side buffer for switching the transmission side. It has a buffer control section 712 and a reception buffer control section 710 for performing buffer exchange on the receiving side.

The operation principle on the receiving side is as described in the fifth embodiment. The difference is that the node number of the own node can be set in the receiving node number register 310, and the read buffer in which the own node number is set is used as a write buffer for transmission and is not used for reception.

The operation principle of the transmission side is basically the same as that of the transmission data buffering device 31 used so far.
It is not different from 5. Since the write buffer for transmission and the read buffer for reception are assigned to a common read / write buffer, when a buffer switching request is issued from the central processing unit 360, which read / write buffer is used for writing for transmission. It is necessary to search using the transmission node number register 311 and the reception node number register 310 to determine whether the buffer is set as a buffer. However, there is an advantage that the number of buffers used for transmission can be changed using the same device. As a result, considering a data sharing system in which multiple nodes are connected,
Each node uses the same device, N buffers are allocated to each node, and the transmission node number register 311 in one device without distinguishing between the transmission data buffering device and the reception data buffering device. The system can be configured only by setting the reception node number register 310 for each node.

[0087]

As described above, according to the data buffering device of the first configuration of the present invention, there is provided a data buffering device for storing data provided from a data providing unit to a data reference unit, Three physical buffers of the same size, a write buffer for accessing to write the data provided by the data providing unit, a read buffer for accessing the data reference unit to read the written data, and the data providing unit A buffer information register that holds information for causing each of the three physical buffers to function as one of the storage buffers that cannot be accessed from either of the data reference unit; The data providing unit accesses based on the information held A buffer selector for allocating a physical buffer and a physical buffer to be accessed by the data reference unit from the three physical buffers, and the data providing unit accessing the physical buffer corresponding to the write buffer after the data providing unit has finished accessing the physical buffer. A buffer switching request register for writing a request to switch a physical buffer to another physical buffer to be written, and when the data reference unit starts accessing a physical buffer corresponding to the read buffer, the data reference unit A buffer switch prohibition register for writing a request for prohibiting a physical buffer to be accessed from being switched to another physical buffer; and indicating whether data to be accessed by the data reference unit is stored in a physical buffer corresponding to the storage buffer. A first storage unit for storing a storage buffer valid flag; and a case where a request for switching a physical buffer is written to the buffer switching request register and the buffer switching prohibition register switches to another physical buffer. If the prohibition request has not been written, a command to switch between the physical buffer accessed by the data providing unit and the physical buffer accessed by the data reference unit is sent to the buffer information register, and the physical buffer is sent to the buffer switching request register. If a request to switch is written and if a request to prohibit switching to another physical buffer is written to the buffer switch prohibition register, the physical buffer and storage buffer accessed by the data providing unit Corresponding physical buffer The data in the buffer information register is changed so as to switch between the data buffer and the storage buffer valid flag stored in the first storage means. Is stored, and if the request to prohibit switching to another physical buffer is not written in the buffer switch prohibition register, the buffer corresponds to the physical buffer and the storage buffer accessed by the data reference unit. Buffer information register control means for changing the information in the buffer information register so as to switch between the physical buffer and the data buffer. Does not execute access, which has the effect of guaranteeing data concurrency. . In addition, since a physical buffer to be accessed is always allocated to the data providing unit and the data reference unit, there is no need to wait for access to allocate a physical buffer during access. Also,
The data reference unit can access the physical buffer that stores the latest data that has been written to the physical buffer when access is started.

According to the data buffering device of the second configuration of the present invention, in the data buffering device of the first configuration, reading and clearing are possible from the data reference section, and whether or not the read buffer is updated is determined. The data referencing unit checks the information of the read buffer update flag, so that the accessing physical buffer is switched with the previously accessed physical buffer. Since it can be checked whether or not the data buffer is accessed, the data reference unit can check whether or not the physical buffer storing the latest data is accessed.

The distributed control system according to the first configuration of the present invention is a distributed control system in which N (N: an integer of 2 or more) node devices are connected via a transmission line. 2. A communication control device for controlling transmission of data by one of the node devices and reception of data from another node device, and N-1 first communication devices provided for each of the other node devices. A data buffering device;
A first data providing device that receives data from another node device sent to the communication control device, checks a source node device from the sent data, and sends the data to the corresponding first data buffering device; Unit, a first data reference unit for accessing the first data buffering device, a transmission node register for storing information corresponding to the own node device, and data transmitted from the own node device. A second data providing unit for providing the data, a transmission data buffering device according to claim 1 provided corresponding to the own node device, and a second data providing unit for referring to data of the second data buffering device. 2 and a data reference unit, so that data synchronization is assured for each node, and there is no time waiting for data reading and writing. It is possible to obtain a distributed control system which can provide the latest data at the start of the read data.

According to the distributed control system of the second configuration of the present invention, in the distributed control system of the first configuration,
, The N-1 buffer switching prohibition registers included in each of the data buffering devices are configured as one buffer switching prohibition register composed of N-1 bits.
Since the switching prohibition can be simultaneously set for one first data buffering device, the buffer switching prohibition can be simultaneously issued to all the reception data buffering devices by one write access. This eliminates the need to issue the switching prohibition for the buffer.

According to the distributed control system of the third configuration of the present invention, in the distributed control system of the first or second configuration, the N-1 first data buffering devices each include N-1 The number of buffer switch request registers is one buffer switch request register composed of N-1 bits, and a switch request can be simultaneously set for the N-1 first data buffering devices. When data to be stored in one buffer is stored in one packet, it is possible to simultaneously issue a buffer switching request after writing data to each buffer.

According to the distributed control system having the fourth configuration of the present invention, in the distributed control system having any one of the first to third configurations, the (N-1) first data buffering devices are provided with a write buffer. When writing data from the first data providing unit to the physical buffer corresponding to the write buffer, a buffer switch request is written only to the buffer switch request register of the node device that transmitted the data. And N
Since the plurality of node devices are configured to transmit the data of their own node devices to other node devices in accordance with a predetermined order, the buffer of the buffer used while providing the same function as the distributed control system of the first configuration is provided. The number can be reduced, and the buffer can be used effectively.

According to the distributed control system of the fifth configuration of the present invention, in the distributed control system of the fourth configuration, N-
One first data buffering device shares a storage buffer, and the first data reference unit sends a buffer switching prohibition register to one of N-1 other node devices. Since the buffer switching prohibition is written only to the buffer, the number of buffers to be used can be further reduced while providing the same function as the distributed control system of the first configuration, and the buffers can be used effectively. .

According to the distributed control system of the sixth configuration of the present invention, in the distributed control system of the fifth configuration, N-
One first data buffering device is M (M: N
N) write buffers, M storage buffers, N-1 read buffers, and N-
A receiving node number register having a number for allocating another node device corresponding to each one read buffer; and when the number of node devices connected to the transmission path is less than N, the receiving node Since the number register is configured so that no more than M consecutive physical buffers are allocated to the same node device, even if data transmitted from a certain node device cannot be stored in one physical buffer, It is possible to do.

According to the distributed control system of the seventh configuration of the present invention, in the distributed control system of the sixth configuration, M reception write buffers, M transmission read buffers, and M reception buffers are provided. A transmission storage buffer, M transmission storage buffers, N transmission / reception read / write buffers, and a node number register for setting a node number corresponding to the transmission / reception read / write buffer. Since the own node number is set in the number register and no more than M buffers are used as transmission write buffers from among the N transmission / reception read / write buffers accessible from the central processing unit. It is possible to use the buffer efficiently without making it.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a physical configuration of a data buffering device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a logical configuration of the data buffering device according to the first embodiment of the present invention.

FIG. 3 is a control flowchart for explaining the operation of the buffer control device according to the first embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of one node device in a distributed control system according to a second embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of one node device in a distributed control system according to a third embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of one node device in a distributed control system according to a fourth embodiment of the present invention.

FIG. 7 is a control flowchart for explaining an operation of the buffer control device according to the fourth embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of one node device in a distributed control system according to a fifth embodiment of the present invention.

FIG. 9 is a diagram for explaining setting of a receiving node number register and assignment of a buffer according to the fifth embodiment of the present invention.

FIG. 10 is a block diagram showing a configuration of one node device in a distributed control system according to a sixth embodiment of the present invention.

FIG. 11 is a block diagram showing a conventional communication data buffering device (Japanese Patent Laid-Open No. 4-282938).

FIG. 12 is a block diagram showing another conventional communication data buffering device (JP-A-11-65974).

13 is a diagram illustrating a buffer transition condition of the conventional device shown in FIG.

FIG. 14 is a block diagram showing still another conventional communication data buffering device (Japanese Patent Application Laid-Open No. 9-269934).

15 is a diagram illustrating a memory map of the conventional device shown in FIG.

[Explanation of symbols]

1 network, 100 data providing unit, 110 data reference unit, 200 data buffering device, 202
Write buffer, 204 storage buffer, 206
Read buffer, 207 transmit / receive read / write buffer, 208 write buffer selector, 2
09 buffer selector for reading, 210 buffer controller, 211 buffer information register, 214 buffer switching request register, 215 storage buffer valid flag, 216 buffer switching prohibition register, 21
7 buffer controller, 218 buffer update flag,
222 Physical buffer 1, 224 Physical buffer 2, 2
26 physical buffers 3, 300, 400, 500, 60
0,700 Communication data buffering device, 302
Data buffering device 1, 304 Data buffering device 2, 306 Data buffering device 3,
308 Data buffering device 4, 310 Node number register for reception, 311 Node number register for transmission, 312 received data distribution device, 315 Data buffering device for transmission, 316, 416, 516, 616
Data buffering device for reception, 350 communication control device, 360 central processing unit, 710 reception buffer control unit, 712 transmission buffer control unit, 1000, 1
100, 1200 communication medium, 1001 access control unit, 1002 buffer composed of three blocks, 10
03 register, 1004 data transmission / reception function unit, 10
05 communication control function unit, 1006 communication control device, 10
07 Information processing device, 1101 Central control device, 110
2. Buffer access end determination unit of central control unit, 11
03 Communication control device, 1104 Buffer access end unit of communication control device, 1105 BUFF # 1, BUFF
# 2, three buffers consisting of BUFF # 3, 1106
Empty buffer detector, 1107 transition condition determiner, 1
201 communication control device, 1202 shared memory access control means, 1203 internal path arbitration means, 1204 shared memory, 1205 system path I / F means, 120
6 System path, 1207 computer.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5B077 DD02 DD06 DD22 MM03 5B089 GA04 KD01 KD07 5K034 AA03 HH17 HH27 HH42 HH48 HH49 HH50 HH53

Claims (9)

[Claims] 1. A data buffering device for storing data provided from a data providing unit to a data reference unit, comprising: three physical buffers of the same size; Any of a write buffer to be accessed, a read buffer to be accessed to read the written data by the data reference unit, and a storage buffer to be inaccessible from either the data providing unit or the data reference unit A buffer information register that holds information for causing each of the three physical buffers to function as a buffer, and information stored in the buffer information register.
A buffer selector for allocating a physical buffer accessed by the data providing unit and a physical buffer accessed by the data reference unit from among the three physical buffers; and after the data providing unit has finished accessing the physical buffer corresponding to the write buffer. A buffer switching request register for writing a request to switch the physical buffer accessed by the data providing unit to another physical buffer; and an access to the physical buffer when the data reference unit starts accessing the physical buffer corresponding to the read buffer. A buffer switch prohibition register for writing a request to prohibit a physical buffer accessed by the data reference unit from being switched to another physical buffer, and the data reference unit to access a physical buffer corresponding to the storage buffer. First storage means for storing a storage buffer valid flag indicating whether or not data is stored; and when a request to switch a physical buffer is written in the buffer switching request register, and If a request to inhibit switching to another physical buffer has not been written, send a command to the buffer information register to switch between the physical buffer accessed by the data providing unit and the physical buffer accessed by the data reference unit, When a request to switch a physical buffer is written to the buffer switching request register and when a request to inhibit switching to another physical buffer is written to the buffer switching prohibition register,
The information in the buffer information register is changed so as to switch between the physical buffer accessed by the data providing unit and the physical buffer corresponding to the storage buffer, and the storage buffer valid flag stored in the first storage means is stored in the first storage unit. When the data to be accessed by the data reference unit is stored in the physical buffer corresponding to the buffer, and a request to prohibit switching to another physical buffer is not written in the buffer switching prohibition register. A buffer information register control means for changing information in the buffer information register so as to switch between a physical buffer accessed by the data reference unit and a physical buffer corresponding to a storage buffer. Ring device. 2. The apparatus according to claim 1, further comprising a second storage unit that can be read and cleared from a data reference unit and stores a read buffer update flag indicating whether or not the read buffer has been updated. Data buffering equipment. 3. A distributed control system in which N (N: an integer equal to or greater than 2) node devices are connected via a transmission line, wherein each node device transmits data by its own node device and transmits data to another node device. 2. A communication control device for controlling reception of data from a device, N-1 first data buffering devices according to claim 1, provided for each of said other node devices, and said communication control device A first data providing unit that receives data from another node device transmitted to the first device, checks a source node device from the transmitted data, and transmits the data to the corresponding first data buffering device; A first data reference unit that accesses the first data buffering device; a transmission node register that stores information corresponding to the own node device; and a transmission node register that is transmitted from the own node device. A second data providing unit for providing data; a second data buffering device according to claim 1 provided corresponding to the own node device; and data of the second data buffering device. And a second data reference unit. 4. The method according to claim 1, wherein the N-1 buffer switching inhibit registers included in each of the first data buffering devices are one buffer switching inhibiting register composed of N-1 bits. 4. The distributed control system according to claim 3, wherein switching prohibition can be set simultaneously for one data buffering device. 5. The method according to claim 1, wherein the N-1 buffer switching request registers included in the N-1 first data buffering devices are one buffer switching request register composed of N-1 bits. 5. The distributed control system according to claim 3, wherein a switching request can be simultaneously set for one first data buffering device. 6. The N-1 first data buffering devices share a write buffer, and write data from a first data providing unit to a physical buffer corresponding to the write buffer. Is written only into the buffer switching request register of the node device that has transmitted the N, and the N node devices transmit their own node device data to the other node devices in a predetermined order. The distributed control system according to any one of claims 3 to 5, wherein the distributed control system is configured as described above. 7. The N-1 first data buffering devices share a storage buffer, and the first data reference unit sends N-1 other node devices to a buffer switch prohibition register. 7. The distributed control system according to claim 6, wherein the buffer switching prohibition is written to only one of the node devices. 8. The N-1 first data buffering devices include: M (M: an integer smaller than N) write buffers; M storage buffers; N-1 read buffers; A receiving node number register having a number for allocating another node device corresponding to each of the N-1 read buffers, and when the number of node devices connected to the transmission path is less than N,
8. The distributed control system according to claim 7, wherein the receiving node number register is configured to allocate consecutive M or less physical buffers to the same node device. 9. M reception write buffers, M transmission read buffers, M reception storage buffers, M transmission storage buffers, and N transmission / reception read / write buffers. And a node number register for setting a node number corresponding to the transmission / reception read / write buffer. The node number register is set to its own node number, and N transmission / reception reads accessible from the central processing unit. /
9. The distributed control system according to claim 8, wherein M or less buffers among the write buffers are used as write buffers for transmission.