JP2001275133A - Three-dimensional image detector - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a three-dimensional image detector utilizing the operation of an electronic shutter that can accurately detect the distance up to an object without being effected by the temperature of the circuit of the detector. SOLUTION: A CCD drive circuit 30 receives a pulse signal Pd0 from a system control circuit. A circuit in the CCD drive circuit 30 not used for driving a CCD is used to generate a pulse signal Pd1 corresponding to the pulse signal Pd0 and the pulse signal Pd1 is outputted to a waveform shaping circuit 22. The waveform shaping circuit shapes the level of the pulse signal Pd1 and its waveform and outputs the resulting pulse signal Pd3 to an LD pulse generating circuit 22. The LD pulse generating circuit 22 generates pulse signal Pd4 having a pulse width enough to control a light emitting element control circuit 44 on the basis of the pulse signal Pd3 is generated and outputted to the light emitting element control circuit 44. The light emitting element control circuit 44 outputs a pulse signal ϕ Pd to control a light emitting element (LD).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a three-dimensional image detecting apparatus for detecting a three-dimensional shape of a subject using a light propagation time measuring method.

[0002]

2. Description of the Related Art Conventionally, as a three-dimensional image detecting apparatus for detecting a distance to a subject for each pixel, a "Measurement Scienc"
e and Technology "(S. Christie et al., vol. 6, p1301-1
308, 1995) and the three-dimensional image detection device disclosed in WO 97/01111. In these three-dimensional image detection devices, the subject is irradiated with pulse-modulated laser light, and the reflected light is received by a two-dimensional CCD sensor and converted into an electric signal. At this time, by controlling the shutter operation of an electro-optical shutter including a mechanical or liquid crystal element combined with the two-dimensional CCD, an electric signal corresponding to the distance to the subject can be detected for each pixel of the CCD. From this electric signal, the distance to the subject corresponding to each pixel of the CCD is detected.

[0003]

SUMMARY OF THE INVENTION The present invention relates to a three-dimensional image detecting apparatus for detecting a three-dimensional image by using an electronic shutter operation, and is capable of accurately detecting a subject without being affected by a temperature in a circuit. An object is to obtain a three-dimensional image detection device capable of detecting a distance.

[0004]

A three-dimensional image detecting apparatus according to the present invention outputs a light source driving pulse signal based on a first control pulse signal and a light source for irradiating a subject with distance measuring light. A light emitting operation control means for controlling a light emitting operation of the light source, and an image sensor which operates based on an image sensor driving pulse signal, receives reflected light from a subject, and can accumulate signal charges according to the received light amount. Control means for interlocking the light emission operation of the light source and the electronic shutter operation in the image sensor,
An image sensor driving circuit for outputting a first control pulse signal and an image sensor driving pulse signal based on the control means is provided.

[0005] The light emission operation control means preferably outputs a second control pulse signal obtained by shaping the waveform of the first control pulse signal, and controls the light emission operation of the light source based on the second control pulse signal. And a light source driving circuit for controlling.

When the driving speed of the image sensor driving circuit is slow and the signal of the pulse width of the light source driving pulse signal cannot be processed, the light emission operation control means preferably adjusts the pulse width based on the second control pulse signal. A light source control pulse generation circuit that generates a third control pulse signal adjusted to a pulse width of the light source drive pulse signal; and the light source drive circuit is controlled based on the third control pulse signal. At this time, the light source control pulse generation circuit includes, for example, a delay circuit that delays the phase of the second control pulse signal by a predetermined time, an inversion circuit that inverts the pulse signal whose phase is delayed by the delay circuit, and a second control pulse. A NOR circuit for calculating a negative sum of the signal and the pulse signal inverted by the inverting circuit.

[0007] The waveform shaping circuit preferably includes a voltage dividing circuit for adjusting the signal level of the first control pulse signal. Thereby, the first signal output from the image sensor driving circuit is output.
Can be converted into the signal level of the light emission operation control means.

If the driving speed of the image sensor driving circuit is high and a pulse signal having a narrow pulse width used for controlling the light source driving circuit can be processed by the image sensor driving circuit, the fourth pulse having the same pulse width as the light source driving pulse signal is used. From the control means, and based on this pulse signal,
A first control pulse signal is output from the image sensor driving circuit.

[0009]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view of a camera-type three-dimensional image detection device according to a first embodiment of the present invention.
A camera-type three-dimensional image detection device used in the second embodiment will be described with reference to FIG.

On the front of the camera body 10, a finder window 12 is provided at the upper left of the taking lens 11, and a flash 13 is provided at the upper right. A light emitting device (light source) 14 for irradiating a laser beam, which is a distance measuring light, is provided on the upper surface of the camera body 10 and directly above the taking lens 11. On the left side of the light emitting device 14, a release switch 15,
A liquid crystal display panel 16 is provided, and a mode change dial 17 and a V / D mode change switch 18 are provided on the right side. On the side surface of the camera body 10, a card insertion slot 19 for inserting a recording medium such as an IC memory card is formed, and a video output terminal 20 and an interface connector 21 are provided.

FIG. 2 is a block diagram showing a circuit configuration of the camera shown in FIG. An aperture 25 is provided in the taking lens 11. The opening of the aperture 25 is determined by the iris drive circuit 2.
Adjusted by 6. The focus adjustment operation and the zooming operation of the taking lens 11 are controlled by a lens drive circuit 27.

A CCD (image pickup device) 28 is provided on the optical axis of the taking lens 11. A subject image is formed on the CCD 28 by the photographing lens 11, and charges corresponding to the subject image are generated. Operations such as a charge accumulation operation and a charge readout operation in the CCD 28 are performed by the system control circuit 35 by a CCD driving circuit (imaging element driving circuit) 30.
Is controlled by a CCD driving pulse signal output to the CPU. The charge signal, that is, the image signal, read from the CCD 28 is amplified by the amplifier 31 and the A / D converter 3
At 2, the analog signal is converted to a digital signal. The digital image signal is subjected to processing such as gamma correction in the imaging signal processing circuit 33 and is temporarily stored in the image memory 34. The iris drive circuit 26, the lens drive circuit 27, and the imaging signal processing circuit 33 are controlled by a system control circuit 35.

The image signal is read from the image memory 34 and supplied to the LCD drive circuit 36. The LCD drive circuit 36 operates in accordance with the image signal, and thereby the image display L
An image corresponding to the image signal is displayed on the CD panel 37.

The image signal read from the image memory 34 is sent to a TV signal encoder 38 and can be transmitted via a video output terminal 20 to a monitor device 39 provided outside the camera body 10. The system control circuit 35 is connected to the interface circuit 40, and the interface circuit 40 is connected to the interface connector 21.
It is connected to the. Therefore, the image signal read from the image memory 34 can be transmitted to the computer 41 connected to the interface connector 21. The system control circuit 35 includes a recording medium control circuit 42
Is connected to the image recording device 43 via the. Therefore, the image signal read from the image memory 34 can be recorded on a recording medium M such as an IC memory card mounted on the image recording device 43.

The light emitting device 14 is provided with a light emitting element 14a and an illumination lens 14b, and the light emitting operation of the light emitting element 14a is controlled based on a pulse signal output from a system control circuit 35. The pulse signal output from the system control circuit 35 for controlling the light emitting element 14a is supplied to the waveform shaping circuit 22 via the CCD driving circuit 30.
And the waveform is adjusted. Waveform shaping circuit 22
The pulse signal shaped in is input to an LD pulse generation circuit (light source control pulse generation circuit) 23, and the LD pulse generation circuit 23 outputs L based on the input pulse signal.
Generate a D pulse. The light emitting element control circuit (light source driving circuit) 44 controls the light emitting element 14a based on the LD pulse signal.
Is controlled. The light emitting element 14a irradiates a laser beam, which is a distance measuring light, and the laser beam irradiates the entire subject through the illumination lens 14b. Light reflected by the subject enters the photographing lens 11. By detecting this light by the CCD 28, distance information of the subject is measured as described later.

The system control circuit 35 is connected to a switch group 45 including a release switch 15, a mode switching dial 17, and a V / D mode switching switch 18, and a liquid crystal display panel (display element) 16.

Next, the principle of distance measurement in the first embodiment will be described with reference to FIGS. In FIG. 4, the horizontal axis is time t.

The distance measuring light output from the distance measuring device B is reflected by the subject S and received by a CCD (not shown). The distance measuring light is a pulsed light having a predetermined pulse width H, and therefore, the reflected light from the subject S is also a pulsed light having the same pulse width H. The rise of the reflected light pulse is delayed by a time δ · t (δ is a delay coefficient) from the rise of the distance measuring light pulse. Since the ranging light and the reflected light have traveled twice the distance r between the distance measuring device B and the subject S, the distance r is given by r = δ · t · C / 2 (1) can get. Where C is the speed of light.

For example, a state in which reflected light can be detected from the rise of the pulse of the distance measuring light is determined, and the state is changed to an undetectable state before the reflected light pulse falls, that is, a reflected light detection period T is provided. And the received light amount A during the reflected light detection period T is a function of the distance r. That is, the light receiving amount A decreases as the distance r increases (the time δ · t increases).

In the first embodiment, by utilizing the above-described principle, a plurality of photodiodes provided in the CCD 28 and arranged two-dimensionally detect the amount of received light A. The distance to each point on the surface is detected, and data of a three-dimensional image showing the three-dimensional shape of the subject S is input collectively.

FIG. 5 is a diagram showing the arrangement of the photodiode 51 and the vertical transfer unit 52 provided on the CCD 28.
FIG. 6 is a cross-sectional view of the CCD 28 cut along a plane perpendicular to the substrate 53. This CCD 28 is a conventionally known interline type CCD, and uses a VOD for sweeping out unnecessary charges.
(Vertical overflow drain) method.

The photodiode 51 and the vertical transfer section 52 are formed along the surface of the n-type substrate 53. The photodiodes 51 are two-dimensionally arranged in a lattice, and the vertical transfer units 52 are provided adjacent to the photodiodes 51 arranged in a line in a predetermined direction (vertical direction in FIG. 5). The vertical transfer section 52 has four vertical transfer electrodes 52a, 52b, 52c, and 52d for one photodiode 51. Vertical transfer electrodes 52a, 52b, 52c, 5
The potentials of φV1, φV2, φV3, and φV4 are applied to 2d as vertical transfer signals, and four potential wells can be formed. By controlling the depth of these wells, the signal charge is reduced to C
It can be output from CD28. The number of vertical transfer electrodes can be freely changed according to the purpose.

A photodiode 51 is formed in a p-type well formed on the surface of the substrate 53, and the p-type well is completely depleted by a reverse bias voltage applied between the p-type well and the n-type substrate 53. You. In this state, charges corresponding to the amount of incident light (reflected light from the subject) are accumulated in the photodiode 51. When the substrate voltage Vsub is increased to a predetermined value or more, the electric charge accumulated in the photodiode 51 is discharged to the substrate 53 side. On the other hand, when a charge transfer signal (voltage signal) is applied to the transfer gate unit 54, the charges accumulated in the photodiode 51 are transferred to the vertical transfer unit 52. That is, after the charges are swept to the substrate 53 side by the charge sweeping signal, the signal charges accumulated in the photodiode 51 are changed by the charge transfer signal to the vertical transfer unit 5.
It is transferred to the two sides. By repeating such an operation, signal charges are integrated in the vertical transfer unit 52, and a so-called electronic shutter operation is realized.

FIG. 7 is a timing chart in the distance information detecting operation. The distance information detecting operation in the first embodiment will be described with reference to FIGS. 1, 2, and 5 to 7. In the distance information detecting operation of the first embodiment, unlike the description of the principle of the distance measurement performed with reference to FIG. 4, the falling of the pulse of the distance measuring light is used to reduce noise due to the influence of external light. Determined to be able to detect reflected light from
Although the timing chart is configured to switch to the undetectable state after the pulse of the reflected light has fallen, there is no difference in principle.

A charge discharge signal (pulse signal) S1 is output in synchronization with the output of the vertical synchronization signal (not shown), whereby unnecessary charges accumulated in the photodiode 51 are discharged in the direction of the substrate 53. Then, the accumulated charge amount in the photodiode 51 becomes zero (reference S2). After the start of output of the charge sweeping signal S1, pulse-shaped ranging light S3 having a constant pulse width is output. The period (pulse width) during which the ranging light S3 is output can be adjusted.
The adjustment is performed so that the distance measurement light S3 is turned off simultaneously with the output of the charge sweeping signal S1.

The distance measuring light S3 is reflected by the object, and
It is incident on D28. That is, although the reflected light S4 from the subject is received by the CCD 28, the charge sweeping signal S1
Is not stored in the photodiode 51 (reference S2). Charge sweep signal S1
Is stopped, the photodiode 51 starts to accumulate charges by receiving the reflected light S4, and the reflected light S4
4 and the external light generate signal charges S5. When the reflected light S4 disappears (reference S6), the photodiode 51 ends the charge accumulation based on the reflected light (reference S7).
Charge accumulation due to only external light continues (reference S8).

Thereafter, when the charge transfer signal S9 is output, the charges accumulated in the photodiode 51 are transferred to the vertical transfer section 52. This charge transfer is completed when the output of the charge transfer signal ends (reference S10). In other words, the charge accumulation in the photodiode 51 continues due to the presence of external light, but the signal charge S1 accumulated in the photodiode 51 until the output of the charge transfer signal ends.
1 is transferred to the vertical transfer unit 52. The charge S14 accumulated after the output of the charge transfer signal ends remains in the photodiode 51 as it is.

As described above, the period T from the end of the output of the charge sweeping signal S1 to the end of the output of the charge transfer signal S9.
_{During U1} , the photodiode 51 accumulates signal charges corresponding to the distance to the subject. Then, the reflected light S4
Until the end of light reception (reference S6), the charges accumulated in the photodiode 51 are transferred to the vertical transfer unit 52 as signal charges S12 (hatched portion) corresponding to the distance information of the subject,
Other signal charges S13 are caused only by external light.

After a predetermined time has elapsed from the output of the charge transfer signal S9, the charge sweeping signal S1 is output again, and after the transfer of the signal charge to the vertical transfer unit 52, the photodiode 51
Unnecessary charges accumulated in the substrate 53 are swept toward the substrate 53.
That is, accumulation of signal charges in the photodiode 51 is newly started. Then, as described above, when the charge accumulation period T _U1 has elapsed, the signal charge is transferred to the vertical transfer unit 52.

The vertical transfer section 5 of such signal charges S11
2 is repeatedly executed until the next vertical synchronization signal is output. As a result, in the vertical transfer unit 52, the signal charge S11 is integrated, and the signal charge S11 integrated in a period of one field (a period sandwiched between two vertical synchronization signals) is regarded as a period in which the subject is stationary. If possible, it corresponds to distance information to the subject. Since the signal charge S13 is smaller than the signal charge S12, the signal charge S11 can be regarded as being equal to the signal charge S12.

The detection operation of the signal charge S11 described above relates to one photodiode 51, and such a detection operation is performed in all the photodiodes 51. As a result of the detection operation in the period of one field, the vertical transfer unit 52 adjacent to each photodiode 51
The distance information detected by the photodiode 51 is held in each of the parts. This distance information is output from the CCD 28 by a vertical transfer operation in the vertical transfer unit 52 and a horizontal transfer operation in a horizontal transfer unit (not shown).

FIG. 8 is a flowchart of a program of a distance information detecting operation according to the first embodiment. The distance information detecting operation in the first embodiment will be described with reference to FIG.

In step 101, it is determined whether the video (V) mode or the distance measurement (D) mode is selected. Switching between these modes is performed by V / D
This is performed by operating the mode changeover switch 18.

When the D mode is selected, in step 102, a vertical synchronizing signal is output, and distance measuring light control is started. That is, the light emitting device 14 is driven, and the pulse-shaped ranging light S3 is output intermittently. Next, step 103 is executed, and the detection control by the CCD 28 is started. That is, the distance information detection operation described with reference to FIG. 7 is started, and the charge sweeping signal S1 and the charge transfer signal S9 are alternately output, and the signal charge S1 of the distance information is output.
1 is integrated in the vertical transfer unit 52.

In step 104, it is determined whether one field period has elapsed from the start of the distance information detection operation, that is, whether a new vertical synchronizing signal has been output.
When one field period ends, the process proceeds to step 105,
The signal charge of the distance information integrated in the vertical transfer unit 52 is output from the CCD 28. This signal charge is temporarily stored in the image memory 34 in step 106.

In step 107, the distance measuring light control is switched to the off state, and the light emitting operation of the light emitting device 14 is stopped. In step 108, arithmetic processing of distance data is performed,
The program for the distance information detection operation ends.

On the other hand, if it is determined in step 101 that the V mode has been selected, the control of the distance measuring light is set to off in step 109. Step 11
In the case of 0, the normal photographing operation (CCD video control) by the CCD 28 is set to the ON state, the image information on the subject is detected, and the program of the distance information detecting operation ends.

Next, the contents of the arithmetic processing executed in step 108 will be described with reference to FIG.

It is assumed that a subject having a reflectance R is illuminated, and the subject is regarded as a secondary light source having a luminance I and is imaged on a CCD. At this time, the output S obtained by integrating the charge generated in the photodiode during the charge storage time t is obtained.
n is represented by: Sn = k · R · I · t (2) Here, k is a proportionality constant, which varies depending on the F number, magnification, and the like of the taking lens.

As shown in FIG. 7, the charge accumulation time is T _U1 , the pulse width of the distance measurement light S3 is T _S , and the pulse width of the signal charge S12 of the distance information is T _D, and the charge accumulation during one field period. When the time is to be repeated N times, the output SM _{10 obtained, SM 10 = Σk · R ·} I · T D = k · N · R · I · T D ··· (3) and composed. The pulse width T _D can be expressed as T _D = δ · t = 2r / C (4) At this time, the distance r to the subject can be expressed as follows: r = C · SM ₁₀ / (2 · k · N · R · I) (5) Therefore, if the proportional constant k, the reflectance R, and the luminance I are obtained in advance, the distance r can be obtained.

Next, the CCD drive circuit 30 according to the first embodiment will be described with reference to FIGS.

FIG. 9 is a block diagram showing a circuit configuration for detecting distance information using an electronic shutter operation in a conventional three-dimensional image detecting apparatus. In this figure, only blocks related to the control of the CCD drive circuit 30 and the light emitting element control circuit 44 are shown.

The pulse signal SUB, the pulse signals Vt, V1
Is a control signal output from the system control circuit 35 to the CCD drive circuit 30;
Are pulse signals φSUB, φV1 corresponding to these signals.
To control the driving of the CCD 28. Pulse signal φ
SUB corresponds to the charge sweeping signal (signal S1 in FIG. 7),
The pulse signal φV1 corresponds to the charge transfer signal (S9 in FIG. 7) and the vertical transfer signal applied to the vertical transfer electrode 52a in FIG. In this figure, the vertical transfer electrodes 52b-52
The vertical transfer signals φV2 to φV4 applied to d are omitted.

On the other hand, the pulse signal Pd0 (fourth control pulse signal) is a control signal output from the system control circuit 35 to the light emitting element control circuit 44. As shown in the figure, in the conventional method, the pulse signal Pd0 is directly output from the system control circuit to the light emitting element control circuit 44.

FIG. 10 partially shows the circuit configuration of the CCD drive circuit 30. In the figure, only the circuit configuration related to the output of φSUB as the charge sweeping signal, and the charge transfer signal and φV1 as the vertical transfer signal is shown.
That is, a circuit for outputting the vertical transfer signals φV2, φV3, φV4 to the vertical transfer electrodes 52b to 52d is omitted.

From the system control circuit 35 to the CCD
Pulse signals SUB, Vt, and V1 having a reference potential of 0 V and a pulse height of 5 V are input to the drive circuit 30. The pulse signals SUB, Vt, and V1 are voltage conversion circuits (MOS driver circuits) 60, 61, and 6 for converting voltages, respectively.
2 is input.

When the pulse signal SUB is input to the voltage conversion circuit 60, a pulse signal having a low level of -9V and a high level of 15V (pulse height 24V _Pp ) is correspondingly input.
Is output. This pulse signal is applied to the +
It is sent to the CCD 28 as a charge sweep signal φSUB biased to 10V. That is, the charge sweeping signal φS
UB is a CCD signal having a low level of +10 V and a high level of +34 V as a pulse signal (pulse height 24 V _PP ).
Output to

When the pulse signal Vt is input to the voltage conversion circuit 61, the reference potential is 0 V and the pulse height is 1
A 5 V pulse signal is output. The voltage conversion circuit 6
When the pulse signal V1 is input to 2, a low-level pulse signal of -9V and a high-level pulse signal of 0V are output. These pulse signals output from the voltage conversion circuits 61 and 62 are combined in an adder 64, and are converted into a charge transfer signal and a vertical transfer signal φV1 by the CCD2.
8 is output. That is, φV1 is -9V, 0V, +
A pulse signal having three potential levels of 15 V,
Repetitive pulses of V and + 15V correspond to the charge transfer signal, and repetitive pulses of 0V and -9V correspond to the vertical transfer signal.

FIG. 11 is a block diagram showing a configuration of the light emitting element control circuit 44. The light emitting element control circuit 44 includes a current switching circuit 64 and a current bias circuit 65. The current bias circuit 65 includes a light emitting element (L
D) A bias current slightly lower than a threshold value at which light is emitted from the light emitting element 14a (see FIG. 2) is supplied to the light emitting element 14a. When a pulse signal Pd0 having a reference potential of 0 V and a pulse height of 5 V is input from the system control circuit 35 to the current switching circuit 64, the pulse signal φPd (light source driving pulse) is correspondingly output from the light emitting element control circuit 44 to the light emitting element. 14
output to a.

FIG. 12 is a timing chart when a distance information detecting operation is performed in the conventional circuit configuration shown in FIG. 9, and shows pulse signals SUB, Pd0, inputted to the CCD driving circuit 30 and the light emitting element control circuit 44. Vt timing and pulse signals φSUB, φPd, φ output from the CCD drive circuit 30 and the light emitting element control circuit 44
The timing of V1 is shown.

The CCD driving circuit 30 includes a light emitting element control circuit 4
4, the driving speed is slower (the pulse width that can be handled is larger), and the input / output propagation delay time, which is the time from signal input to signal output, is longer. The input / output propagation delay time Td1 of the CCD driving circuit 30 is several hundred nanoseconds (for example, 100 n
s), whereas the light emitting element control circuit 4
4 is several nanoseconds (for example, 1
ns). Input / output propagation delay time Td1,
Since Td2 has temperature dependency, the input / output propagation delay time also changes when the temperature changes. For example, Td1 is 100 ns
It fluctuates between ± 50 ns, and Td2 is 1 ns ± 0.5 ns
Fluctuate between Therefore, when the temperature in the circuit is not stable, the input / output propagation delay time is not stable. The temperature in the CCD drive circuit 30 and the light emitting element control circuit 44 greatly fluctuates immediately after the power is turned on or when the pulse frequency of the input signal changes rapidly. Therefore, the input / output propagation delay times Td1 and Td2 also fluctuate, and the driving speed of the circuit becomes unstable.

The input / output propagation delay time Td1 of the CCD drive circuit 30 and the input / output propagation delay time T of the light emitting element control circuit 44
Since the order of d2 differs from that of d2 by approximately two orders of magnitude, a change in input / output propagation delay time due to a temperature change also differs by approximately two orders of magnitude. For example, if the input / output propagation delay time of the CCD drive circuit 30 and the light emitting element control circuit 44 varies by several percent due to a temperature change, the CCD drive circuit 30 varies on the order of nanoseconds, and the light emitting element control circuit 44 10
Variations on the order of picoseconds occur.

The variation of the input / output propagation delay time Td1 is represented by ΔT
Assuming that the amount of change in d1 and the input / output propagation delay time Td2 is ΔTd2, the output of the charge sweeping signal φVt and the output of the charge transfer signal φV1 change by ΔTd1, and the output of the light emitting pulse φPd changes by ΔTd2. Therefore, the light emission timing of the distance measuring light (the output timing of φPd) and C
Timing of accumulation of signal charge in CD28 (φVS
UB and the output timing of φV1) relative to | Δ
Td1−ΔTd2 |. Where ΔT
Since the order of two digits differs between d1 and ΔTd2, | Δ
Td1−ΔTd2 | is approximately equal to | ΔTd1 |.

Variation ΔTd of input / output propagation delay time Td1
1 varies depending on the temperature in the circuit, so that the relative timing | ΔTd1 | of light emission and charge accumulation differs depending on the temperature in the circuit. As described above, the distance to the subject is calculated based on the amount of reflected light from the subject received by the CCD 28 during the charge accumulation period between the charge sweep signal and the charge transfer signal. In a circuit in which the relative timing | ΔTd1 | has a temperature dependency, the distance cannot be calculated correctly until the temperature in the circuit is stabilized.

FIG. 13 is a block diagram showing the circuit configuration of the three-dimensional image detecting apparatus according to the first embodiment (FIG. 2), and shows only blocks related to driving of the light emitting element control circuit 44.

The pulse signal SUB, the pulse signals Vt, V1, and the pulse signal Pd0 output from the system control circuit 35 are all input to the CCD drive circuit 30, and the CCD drive circuit 30 generates a pulse signal φSUB corresponding to these signals. φV1 (imaging element drive pulse signal),
And Pd1 (first control pulse signal). The pulse signals φSUB and φV1 are output to the CCD 28, and the pulse signal Pd1 is output to the waveform shaping circuit 22. The pulse signal Pd1 is the signal level of the CCD drive circuit 30,
This is a pulse signal whose low level is 0V and whose high level is + 15V. In the waveform shaping circuit 22, the pulse signal Pd1 is converted into a pulse signal Pd2 (low level 0V, high level + 5V) which is an operation level of the CMOS driver circuit 69 by a voltage divider including resistors R1 and R2. The shaped pulse signal Pd3 is output from the CMOS driver circuit 69.
The (second control pulse signal) is output to the LD pulse generation circuit 23 as a low level of 0 V and a high level of +5 V.
The LD pulse generation circuit 23 generates and outputs a pulse signal Pd4 (third control pulse signal) for controlling the light emitting element control circuit 44 based on the pulse signal Pd3 by a method described later. The light emitting element control circuit 44 outputs the pulse signal Pd4 (P in FIG. 11) as described with reference to FIG.
The pulse signal φPd corresponding to d) is supplied to the light emitting element (LD) 1
4a. Note that, in this figure, the vertical transfer signals φV ₂ to φV ₂ to
φV ₄ is omitted.

FIG. 14 partially shows a circuit configuration of the CCD drive circuit 30. Referring to FIG. 14, pulse signal Pd output from system control circuit 35
A method in which the CCD drive circuit 30 outputs the pulse signal Pd1 corresponding to 0 will be described. In FIG. 14, circuits relating to the vertical transfer signals φV2, φV3, φV4 are omitted as in FIG. Further, the voltage conversion circuits 60 to
Since the contents related to 62 have already been described with reference to FIG. 10, only the circuits related to the pulse signals Pd0 and Pd1 will be described here.

A number of voltage conversion circuits and adders are provided in the CCD drive circuit 30. Normally, to drive the CCD 28, only a part of these many voltage conversion circuits and adders is used. Therefore, the CCD
The drive circuit 30 includes unused voltage conversion circuits and adders. The voltage conversion circuit 66 shown in FIG.
The reference numeral 67 and the adder 68 indicate a voltage conversion circuit and an adder which are not used for driving the CCD 28 in this manner.

The voltage conversion circuit 66 has a low level of 0 V,
When a pulse signal having a high level of +5 V is input, a pulse signal having a low level of 0 V and a high level of +15 V is output. The voltage conversion circuit 67 sets the low level to 0.
When a pulse signal of V and a high level of +5 V is input,
A pulse signal having a low level of -9 V and a high level of 0 V is output. However, the voltage conversion circuit 67 always supplies +5 V
Is applied as an input signal, so that the voltage conversion circuit 67 always outputs a signal voltage of 0V. Therefore, the pulse signal Pd1 obtained by combining the signals output from the voltage conversion circuits 66 and 67 by the adder 68 is output as a pulse signal having a low level of 0V and a high level of + 15V corresponding to the pulse signal Pd0.

Next, the LD pulse generation circuit 23 will be described with reference to FIGS.

As described above, the pulse signal Pd3 whose low level is 0V and whose high level is + 5V is input to the LD pulse generation circuit 23. Since the pulse signal Pd3 is obtained by shaping the pulse signal Pd1 output from the CCD drive circuit 30, the pulse width is larger than the pulse signal for controlling the light emitting element 14a. Therefore, in the LD pulse generation circuit 23, a pulse signal Pd4 having a small pulse width for controlling the light emitting element (LD) 14a is generated based on the pulse signal Pd3. That is, the pulse signal Pd3 input to the LD pulse generation circuit 23 is input to the delay circuit 55 and the NOR circuit 57. In the delay circuit 55, the pulse signal Pd3 is delayed by Td4 and output as a pulse signal Pd3 '. Pulse signal Pd
3 ′ is inverted in the inverting circuit 56, and the pulse signal Pd
3 ”is output to the NOR circuit 57. The NOR circuit 5
7, a negative sum of the pulse signal Pd3 and the pulse signal Pd3 ″ is obtained, and the pulse signal is output as a pulse signal Pd4 having a pulse width of Td4. The delay time Td4 is, for example, 20 nanoseconds.

The pulse signal Pd4 generated by the LD pulse generation circuit 23 is output to the light emitting element control circuit 44, and the light emitting element control circuit outputs the pulse signal φPd corresponding to the pulse signal Pd4 as described above. (L
D) Output to 14a.

FIG. 17 is a timing chart when the distance information detecting operation is performed in the first embodiment. FIG. 17 shows pulse signals SUB, Vt, Pd0 output from the system control circuit 35 and the CCD drive circuit 3
0, pulse signals φSUB, φV1, Pd1
And the pulse signal φ output from the light emitting element control circuit 44
The output timing of Pd is shown.

The charge discharge signal φSUB and the charge transfer signal φV1 are the same as those in the timing chart of FIG. 12, and the input and output propagation delay times are both Td1. The pulse signal Pd1 is supplied to the voltage conversion circuit 6 not used for driving the CCD 28 in the CCD drive circuit 30.
6, 67 and the adder 68,
The input / output propagation delay time from the input of the pulse signal Pd0 to the output of the pulse signal Pd1 is also Td1.
The variation of the input / output propagation delay time due to the temperature is the same as that of the charge sweeping signal φSUB and the charge transfer signal φV1.

The pulse signal Pd1 from the CCD drive circuit 30
Is output until the pulse signal φPd is output from the light emitting element control circuit 44, that is, the waveform shaping circuit 22, the LD pulse generation circuit 23, and the light emitting element control circuit 4
4, the time Td1 ′ from when the pulse signal Pd0 is output to when the pulse signal φPd is output from the light emitting element control circuit 44 is Td3.
It is represented by Td1 + Td3. However, Td3 is on the order of a few nanoseconds (eg, 2 ns ± 1 ns) and Td3
3 is about two orders of magnitude smaller than Td1. Therefore, Td3 can be ignored in Td1 + Td3, and Td1 'can be regarded as Td1.

The variation ΔTd of Td1 ′ due to temperature variation
1 ′ can also be regarded as ΔTd1, since the order of the variation ΔTd3 of Td3 is about two orders of magnitude smaller than ΔTd1. That is, when the temperature in the CCD drive circuit changes, both the timing of the emission of the ranging light (the timing of the output of φPd) and the timing of the accumulation of the signal charge in the CCD 28 (the timing of the output of φSUB and φV1) are ΔTd1. Therefore, the relative timing of the emission of the distance measurement light and the accumulation of the signal charge is substantially constant even if the temperature in the CCD drive circuit 30 changes. Therefore,
The distance to the subject can always be accurately detected without being affected by the temperature in the circuit.

As described above, according to the first embodiment,
By using a circuit in the CCD drive circuit that is not used for driving the CCD to output a pulse signal for controlling the light emitting operation of the light source, the subject can always be accurately detected without being affected by the temperature in the CCD drive circuit. The distance to can be detected.

Next, a camera type three-dimensional image detecting apparatus according to a second embodiment of the present invention will be described with reference to FIGS. The configuration of the three-dimensional image detection device according to the second embodiment is substantially the same as the configuration of the three-dimensional image detection device according to the first embodiment. However, in the second embodiment, unlike the first embodiment, a CCD driving circuit having a high driving speed is used. Therefore, unlike the first embodiment, it is not necessary to include the LD pulse generation circuit 23, and the process of processing the pulse signal output to the light emitting element control circuit is different from that of the first embodiment. Since other configurations are the same as those of the first embodiment, the description overlapping with the first embodiment will be omitted, and only the portions different in the configuration from the first embodiment will be described.

FIG. 18 is a block diagram showing a circuit configuration of a three-dimensional image detection device according to the second embodiment. CC
Only the waveform shaping circuit 22 is provided between the D drive circuit 30 'and the light emitting element control circuit 44, and the LD pulse generating circuit 23 is not provided as in the first embodiment.

FIG. 19 shows only blocks related to driving of the light emitting element control circuit 44 in the block diagram shown in FIG.

The pulse signal SUB, the pulse signals Vt, V1, and the pulse signal Pd0 output from the system control circuit 35 are all input to the CCD driving circuit 30 ', and the CCD driving circuit 30' outputs the pulse signals corresponding to these signals. φSUB, φV1, and Pd1 are output. The pulse signals φSUB and φV1 are output to the CCD 28, and the pulse signal Pd1 is output to the waveform shaping circuit 22. The pulse level of the pulse signal Pd1 is shaped by the waveform shaping circuit as described with reference to FIG. 19, and is output to the light emitting element control circuit 44 as the pulse signal Pd3 (low level 0V, high level + 5V). . As described with reference to FIG. 11, the light emitting element control circuit 44 outputs the pulse signal φPd to the light emitting element (LD) 14a based on the input pulse signal Pd3 (Pd0 in FIG. 11). Note that, in this figure, the vertical transfer signals φV _{2 to} φV ₂ applied to the vertical transfer electrodes 52b to 52d are similar to FIGS.
₄ has been omitted.

The input / output propagation delay time of the CCD drive circuit 30 'used in the second embodiment is substantially the same as that of the CCD drive circuit 30 used in the first embodiment. The driving speed of the circuit 30 'is higher than that of the CCD driving circuit 30. That is, the CCD drive circuit 30 '
Can process a pulse signal having the same pulse width as the pulse signal φPd for controlling the light emitting element (LD) 14a. Therefore, the CCD drive circuit 30 'includes
Pulse signal Pd having the same pulse width as pulse signal φPd
When 0 is input, the pulse width of the pulse signal Pd1 output from the CCD drive circuit 30 'and the pulse width of the pulse signal Pd3 output from the waveform shaping circuit 22 are the same as the pulse signal φPd. Thus, in the second embodiment, there is no need to provide the LD pulse generation circuit 23.

In the second embodiment, a timing chart of the distance information detecting operation is shown in FIG. 17 as in the first embodiment. Note that in the second embodiment,
Td3 in FIG. 17 corresponds to the time spent in the waveform shaping circuit 22 and the light emitting element control circuit 44.

As described above, the same effects as those of the first embodiment can be obtained in the second embodiment.

In this embodiment, the description has been made using the normal rotation pulse as the signal pulse input to the CCD driving circuit and the light emitting element control circuit. However, the signal input to these circuits is the inverted pulse. It may be.

[0076]

As described above, according to the present invention, there is provided a three-dimensional image detecting apparatus for detecting a three-dimensional image by using an electronic shutter operation, and accurately detects an object without being affected by a temperature in a circuit. A three-dimensional image detecting device capable of detecting the distance to the three-dimensional image detecting device can be obtained.

[Brief description of the drawings]

FIG. 1 is a perspective view of a camera-type three-dimensional image detection device used in a first embodiment of the present invention.

FIG. 2 is a block diagram showing a circuit configuration of the camera shown in FIG.

FIG. 3 is a diagram for explaining the principle of distance measurement using ranging light.

FIG. 4 Distance measuring light, reflected light, gate pulse, and CCD
FIG. 4 is a diagram showing a distribution of the amount of light received by the light source.

FIG. 5 is a diagram showing an arrangement of a photodiode and a vertical transfer unit provided in a CCD.

FIG. 6 is a cross-sectional view of the CCD cut along a plane perpendicular to the substrate.

FIG. 7 is a timing chart of a distance information detecting operation.

FIG. 8 is a flowchart of a program of a distance information detecting operation.

FIG. 9 is a diagram illustrating a circuit configuration when distance information is detected by an electronic shutter using a conventional CCD drive circuit.

FIG. 10 is a block diagram illustrating a configuration of a CCD drive circuit.

FIG. 11 is a block diagram illustrating a configuration of a light emitting element control circuit.

FIG. 12 is a timing chart in consideration of an input / output propagation delay time when a distance information detection operation is performed by a conventional method.

FIG. 13 is a block diagram illustrating a circuit configuration when a distance information detection operation is performed in the first embodiment.

FIG. 14 is a block diagram showing a configuration when a pulse signal Pd1 is generated from a pulse signal Pd0 using a part of the CCD drive circuit.

FIG. 15 is a block diagram illustrating a circuit configuration of an LD pulse generation circuit.

FIG. 16 shows a pulse signal Pd in an LD pulse generation circuit.
4 is a timing chart when generating No. 4;

FIG. 17 is a timing chart in consideration of an input / output propagation delay time when a distance information detection operation is performed in the first embodiment.

FIG. 18 is a block diagram illustrating a circuit configuration of a three-dimensional image detection device according to a second embodiment.

FIG. 19 is a block diagram illustrating a circuit configuration when a distance information detection operation is performed in the second embodiment.

[Explanation of symbols]

 Reference Signs List 14 light emitting device 28 CCD 22 waveform shaping circuit 30, 30 'CCD driving circuit 44 light emitting element control circuit

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference) G03B 7/093 H04N 5/335 P 5J084 H04N 5/225 G01B 11/24 K 5/335 G01S 17/88 Z F-term (reference) 2F065 AA06 AA53 DD11 EE00 FF12 FF42 GG04 GG06 GG08 GG12 JJ03 JJ18 JJ26 LL04 LL06 LL30 NN02 NN11 QQ03 QQ11 QQ14 QQ24 QQ32 QQ47 SS02 SS13 2H002 CC00 JA00A11 ACA 5C061 AA20 AB03 AB06 AB08 5J084 AA05 AD01 BA04 BA36 BB02 BB35 CA03 CA31 CA61 CA70 EA04

Claims (6)

[Claims] A light source for irradiating a subject with distance measuring light; a light emitting operation control means for outputting a light source driving pulse signal based on a first control pulse signal to control a light emitting operation of the light source; An image sensor that operates based on an image sensor drive pulse signal, receives reflected light from the subject, and can accumulate signal charges according to the amount of received light; a light emitting operation of the light source; and an electronic shutter in the image sensor A three-dimensional image detection apparatus, comprising: a control unit for linking operations; and an image sensor driving circuit that outputs the first control pulse signal and the image sensor driving pulse signal based on the control unit. 2. A waveform shaping circuit for outputting a second control pulse signal obtained by shaping a waveform of the first control pulse signal, wherein the light emitting operation control means includes: a light source based on the second control pulse signal; The three-dimensional image detection device according to claim 1, further comprising: a light source driving circuit that controls a light emission operation of the three-dimensional image. 3. A light source control pulse for generating a third control pulse signal having a pulse width adjusted to a pulse width of the light source drive pulse signal, based on the second control pulse signal, The three-dimensional image detection device according to claim 2, further comprising a generation circuit, wherein the light source drive circuit is controlled based on the third control pulse signal. 4. A delay circuit for delaying a phase of the second control pulse signal by a predetermined time, an inversion circuit for inverting a pulse signal whose phase is delayed by the delay circuit, 4. The three-dimensional image detection device according to claim 3, further comprising a NOR circuit that performs a negative sum of the second control pulse signal and the pulse signal inverted by the inversion circuit. 5. 5. The three-dimensional image detection device according to claim 2, wherein the waveform shaping circuit includes a voltage dividing circuit for adjusting a signal level of the first control pulse signal. 6. The first control pulse signal is output based on a fourth control pulse signal output from the control means, the pulse width being equal to the light source drive pulse signal. 3. The three-dimensional image detection device according to 1.