JP2001217333A - Hermetically sealed semiconductor package - Google Patents
Hermetically sealed semiconductor packageInfo
- Publication number
- JP2001217333A JP2001217333A JP2000027458A JP2000027458A JP2001217333A JP 2001217333 A JP2001217333 A JP 2001217333A JP 2000027458 A JP2000027458 A JP 2000027458A JP 2000027458 A JP2000027458 A JP 2000027458A JP 2001217333 A JP2001217333 A JP 2001217333A
- Authority
- JP
- Japan
- Prior art keywords
- hermetically sealed
- metal frame
- semiconductor package
- metal base
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 43
- 239000002184 metal Substances 0.000 claims abstract description 57
- 229910052751 metal Inorganic materials 0.000 claims abstract description 57
- 239000000463 material Substances 0.000 claims abstract description 30
- 239000000919 ceramic Substances 0.000 claims abstract description 24
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 21
- 229910052802 copper Inorganic materials 0.000 claims abstract description 21
- 239000010949 copper Substances 0.000 claims abstract description 21
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910052742 iron Inorganic materials 0.000 claims abstract description 7
- 238000010438 heat treatment Methods 0.000 claims abstract description 3
- 238000001816 cooling Methods 0.000 claims abstract 2
- 238000005219 brazing Methods 0.000 claims description 13
- 230000000149 penetrating effect Effects 0.000 abstract 4
- 239000000126 substance Substances 0.000 abstract 3
- 229910000679 solder Inorganic materials 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 7
- 229910000833 kovar Inorganic materials 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- 238000001465 metallisation Methods 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- XEEYBQQBJWHFJM-YPZZEJLDSA-N iron-54 Chemical compound [54Fe] XEEYBQQBJWHFJM-YPZZEJLDSA-N 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は半導体素子を中空で
収納する気密封止型半導体パッケージに関し、特に放熱
性に優れた気密封止型半導体パッケージに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hermetically sealed semiconductor package for housing a semiconductor element in a hollow state, and more particularly to a hermetically sealed semiconductor package having excellent heat dissipation.
【０００２】[0002]
【従来の技術】従来から、半導体素子を収納する半導体
パッケージとして、樹脂封止型パッケージと気密封止型
パッケージが主に知られている。2. Description of the Related Art Conventionally, as a semiconductor package for accommodating a semiconductor element, a resin sealing type package and an airtight sealing type package are mainly known.
【０００３】前者は、リードフレームなどに搭載した半
導体素子を樹脂モールドしたものであり、大量生産に向
きコストが安いという利点から広く採用されている。後
者は金属基体やセラミック基体に搭載した半導体素子を
中空で気密封止したものであり、樹脂封止型パッケージ
に比べてコストは高くなるが気密性に優れるため、高信
頼性が要求される場合に採用されている。The former is a semiconductor element mounted on a lead frame or the like, which is resin-molded, and is widely adopted because of its advantage of low cost for mass production. The latter is a semiconductor element mounted on a metal substrate or ceramic substrate, which is hollow and hermetically sealed.The cost is higher than that of a resin-sealed package, but the airtightness is excellent, so high reliability is required. Has been adopted.
【０００４】図３は、従来の気密封止型半導体パッケー
ジの一例を示す断面図及び上面図である。鉄系材料から
なる金属基体１０上に環状の金属枠体３０を接合し、こ
の内側に半導体素子５０を搭載している。金属枠体３０
には切り欠き部（図示せず）を形成し、この切り欠き部
内に金属枠体３０と絶縁状態を保ちつつ金属枠体３０の
内外を導通するセラミック端子４０を接合している。２
段構造のセラミック端子４０の下段にはメタライズ層４
１を形成し、金属枠体３０内側のメタライズ層４１上に
は半導体素子５０と結線したボンディングワイヤ６０を
結線し、金属枠体３０外側のメタライズ層４１上には外
部リード７０を接合している。金属枠体３０上には、平
板状の金属蓋体８０をろう付けやシーム溶接などの方法
で接合し、半導体素子５０を中空９０で気密封止してい
る。FIG. 3 is a sectional view and a top view showing an example of a conventional hermetically sealed semiconductor package. An annular metal frame 30 is joined to a metal base 10 made of an iron-based material, and a semiconductor element 50 is mounted inside the annular metal frame 30. Metal frame 30
Is formed with a notch (not shown), and a ceramic terminal 40 that is electrically connected to the inside and outside of the metal frame 30 while being insulated from the metal frame 30 is joined in the notch. 2
A metallized layer 4 is provided below the stepped ceramic terminal 40.
1, a bonding wire 60 connected to the semiconductor element 50 is connected to the metallized layer 41 inside the metal frame 30, and an external lead 70 is bonded to the metalized layer 41 outside the metal frame 30. . A flat metal lid 80 is joined onto the metal frame 30 by a method such as brazing or seam welding, and the semiconductor element 50 is hermetically sealed with a hollow 90.
【０００５】[0005]
【発明が解決しようとする課題】上記説明した従来の気
密封止型半導体パッケージにおいて、金属枠体にはコバ
ール材などの鉄系材料を用いている。セラミック端子に
用いるセラミックの熱膨張係数は、６．７×１０-6／Ｋ
（ａｔ８５０℃）であるため、金属基体としてセラミッ
クと熱膨張係数が近い値の材料を用いないと製造工程中
にセラミック端子が割れることがあるからである。コバ
ール材の熱膨張係数は、５．３×１０-6／Ｋ（ａｔ８５
０℃）であり、この程度の差であれば製造工程中にセラ
ミック端子が割れることがない。しかしながらコバール
材の熱伝導率は１７Ｗ／ｍ・Ｋと悪いため、半導体素子
で発生する熱を十分に放熱することができない。近年、
ガリウム・ヒ素電界効果トランジスタ（ＧａＡｓＦＥ
Ｔ）など半導体素子の大型化、高密度化及び高集積化が
進み、半導体素子の動作時に発生する発熱量が急激に増
大してきたため、十分な放熱性を備えたパッケージが要
求されている。このため、例えば金属基体を銅材で形成
した場合、銅の熱伝導率は３９４Ｗ／ｍ・Ｋと良好であ
るが、熱膨張係数が１７．０×１０-6／Ｋ（ａｔ８５０
℃）とセラミックと大きな差があるため、製造工程中に
セラミック端子が割れることがある。In the above-described conventional hermetically sealed semiconductor package, an iron-based material such as a Kovar material is used for the metal frame. The coefficient of thermal expansion of the ceramic used for the ceramic terminal is 6.7 × 10 −6 / K
(At 850 ° C.), the ceramic terminal may be broken during the manufacturing process unless a material having a coefficient of thermal expansion close to that of ceramic is used as the metal substrate. The thermal expansion coefficient of Kovar material is 5.3 × 10 −6 / K (at 85
0 ° C.), and if the difference is about this degree, the ceramic terminal will not crack during the manufacturing process. However, since the thermal conductivity of the Kovar material is as poor as 17 W / m · K, the heat generated in the semiconductor element cannot be sufficiently dissipated. recent years,
Gallium arsenide field effect transistor (GaAsFE)
T) and the like, semiconductor devices have become larger, denser, and more integrated, and the amount of heat generated during the operation of the semiconductor devices has increased sharply. Therefore, a package having sufficient heat radiation is required. Therefore, for example, when the metal substrate is formed of a copper material, the thermal conductivity of copper is as good as 394 W / m · K, but the thermal expansion coefficient is 17.0 × 10 −6 / K (at 850).
° C) and ceramic, so that the ceramic terminal may crack during the manufacturing process.
【０００６】本発明は上記問題点を解決するものであ
り、金属基体上に接合したセラミック端子が割れること
なく、半導体素子から発生する熱を十分に放熱すること
ができる気密封止型半導体パッケージを提供することを
目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and an airtightly sealed semiconductor package capable of sufficiently radiating heat generated from a semiconductor element without breaking a ceramic terminal bonded on a metal substrate. The purpose is to provide.
【０００７】[0007]
【課題を解決するための手段】上記課題を解決するため
に本発明は、鉄系材料からなる金属基体上に環状の金属
枠体及び前記金属枠体と絶縁しつつ前記金属枠体の内外
を導通するセラミック端子を接合した気密封止型半導体
パッケージにおいて、前記金属基体の半導体素子を搭載
する領域に貫通孔を形成し、この貫通孔内に銅系材料か
らなる放熱体を埋め込んだものである。SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides an annular metal frame on a metal base made of an iron-based material and the inside and outside of the metal frame while insulating the metal frame from the metal frame. In a hermetically sealed semiconductor package in which conductive ceramic terminals are joined, a through hole is formed in a region of the metal substrate on which a semiconductor element is mounted, and a heat radiator made of a copper-based material is embedded in the through hole. .
【０００８】これによれば、熱伝導性の良好な銅材から
なる放熱体上に半導体素子を搭載するため、半導体素子
からの発熱を十分に放熱することができる。また、セラ
ミック端子を搭載する金属基体には、セラミックと熱膨
張係数が近いコバール材などの鉄系材料を用いているた
め、製造工程中にセラミック端子が割れることがない。According to this, since the semiconductor element is mounted on the heat radiator made of a copper material having good thermal conductivity, heat generated from the semiconductor element can be sufficiently radiated. In addition, since the metal base on which the ceramic terminals are mounted is made of an iron-based material such as Kovar having a thermal expansion coefficient close to that of ceramics, the ceramic terminals do not break during the manufacturing process.
【０００９】また、本発明は金属基体に形成した貫通孔
内に２枚の銅板及びこの銅板間に挟んだろう材をセット
して加熱、徐冷して、貫通孔内に放熱体を接合したもの
である。これによれば、金属基体上にろう材をセットす
ることなく放熱体を接合できるため、金属基体上の半導
体素子搭載領域にろう材が付着し、ダイボンディングに
悪影響を与えることがない。According to the present invention, two copper plates and a brazing material sandwiched between the copper plates are set in a through-hole formed in a metal substrate, heated and gradually cooled, and a radiator is joined in the through-hole. Things. According to this, the heat radiator can be joined without setting the brazing material on the metal base, so that the brazing material does not adhere to the semiconductor element mounting region on the metal base and does not adversely affect die bonding.
【００１０】[0010]
【発明の実施の形態】以下、本発明の一実施形態による
気密封止型半導体パッケージについて図面を参照しなが
ら詳しく説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a hermetically sealed semiconductor package according to an embodiment of the present invention will be described in detail with reference to the drawings.
【００１１】図１は、ＧａＡｓＦＥＴを搭載した気密封
止型半導体パッケージの断面図である。用途としては携
帯電話の無線基地局用のパワーアンプモジュールなどに
用いられる。コバール材（鉄５４％−ニッケル２８％−
コバルト１８％）からなる金属基体１０上には、同じく
コバール材からなる環状の金属枠体３０をろう付けによ
り接合している。金属基体１０の中央部には貫通孔（図
示せず）を形成し、ここに放熱体２０を埋め込み、この
上に半導体素子５０を搭載している。放熱体２０は２枚
の銅板２１，２１からなり、この２枚の銅板２１，２１
間及びその周辺に備えた銀ろう材２２を介して金属基体
１０と接合している。放熱体２０は金属基体１０の上面
と同一面上か図面記載のように若干突出していてもよ
い。FIG. 1 is a sectional view of a hermetically sealed semiconductor package on which a GaAs FET is mounted. It is used as a power amplifier module for a wireless base station of a mobile phone. Kovar material (iron 54% -nickel 28%-
An annular metal frame 30 also made of Kovar material is joined to the metal base 10 made of cobalt (18%) by brazing. A through hole (not shown) is formed in the center of the metal base 10, and the radiator 20 is buried therein, and the semiconductor element 50 is mounted thereon. The radiator 20 includes two copper plates 21 and 21, and the two copper plates 21 and 21.
It is joined to the metal base 10 via the silver brazing material 22 provided between and around the metal base. The heat radiator 20 may be flush with the upper surface of the metal base 10 or slightly project as shown in the drawing.
【００１２】金属基体１０上に接合した金属枠体３０に
は切り欠き部（図示せず）を形成し、この切り欠き部内
に金属枠体３０と絶縁状態を保ちつつ金属枠体３０の内
外を導通するセラミック端子４０を接合している。セラ
ミック端子４０に２段構造とし、その下段にはメタライ
ズ層４１を形成している、金属枠体３０内側のメタライ
ズ層４１上には半導体素子５０と結線したボンディング
ワイヤ６０を結線し、金属枠体３０外側のメタライズ層
４１上には外部リード７０を接合している。金属枠体３
０上には金属蓋体８０を接合し、半導体素子５０を中空
９０で気密封止している。A notch (not shown) is formed in the metal frame 30 joined to the metal base 10, and the inside and outside of the metal frame 30 are kept in the notch while maintaining the metal frame 30 in an insulated state. Conductive ceramic terminals 40 are joined. The ceramic terminal 40 has a two-stage structure, and a metallization layer 41 is formed below the ceramic terminal 40. A bonding wire 60 connected to the semiconductor element 50 is connected on the metallization layer 41 inside the metal frame 30 to form a metal frame. External leads 70 are joined to the metallized layer 41 outside the outer side 30. Metal frame 3
A metal lid 80 is joined on the top of the semiconductor chip 0, and the semiconductor element 50 is hermetically sealed with a hollow 90.
【００１３】図２は金属基体に放熱体を接合する際の説
明図である。金属基体１０の中央部に形成した貫通孔１
１に２枚の銅板２１，２１及びこの銅板２１，２１間に
挟んだ銀ろう材２２をセットし、銀ろうが溶融する約８
３０℃に加熱することにより、銀ろう材２２が溶融して
銅板２１，２１の周辺にも行き渡り、この後徐冷して銀
ろう材が固化することにより、銅板２１，２１と金属基
体１０とを接合している。FIG. 2 is an explanatory view when a heat radiator is joined to a metal base. Through hole 1 formed in the center of metal base 10
1, two copper plates 21 and 21 and a silver brazing material 22 sandwiched between the copper plates 21 and 21 are set, and approximately 8
By heating to 30 ° C., the silver brazing material 22 melts and spreads to the periphery of the copper plates 21 and 21, and then is gradually cooled to solidify the silver brazing material, whereby the copper plates 21 and 21 and the metal base 10 are solidified. Are joined.
【００１４】[0014]
【発明の効果】以上説明したように本発明によれば、金
属基体をセラミックと熱膨張係数の近い鉄系材料で形成
したため、セラミック端子が製造工程中に割れることが
ない。As described above, according to the present invention, since the metal substrate is formed of an iron-based material having a thermal expansion coefficient close to that of ceramic, the ceramic terminal does not crack during the manufacturing process.
【００１５】また、半導体素子は金属基体に埋め込んだ
銅材からなる放熱体上に搭載するため、半導体素子から
の発熱を十分に放熱することができる。Further, since the semiconductor element is mounted on a radiator made of a copper material embedded in a metal base, heat generated from the semiconductor element can be sufficiently radiated.
【００１６】さらに、放熱体を２枚の銅板で形成し、こ
の間にろう材を挟んだ状態でろう材を溶融、固化して放
熱体を接合するため、ろう材が半導体素子搭載領域に及
ぶことがない。Further, the heat dissipating body is formed of two copper plates, and the brazing material is melted and solidified with the brazing material interposed therebetween to join the heat dissipating body. There is no.
【図１】本発明の一実施形態による気密封止型半導体パ
ッケージの断面図FIG. 1 is a cross-sectional view of a hermetically sealed semiconductor package according to an embodiment of the present invention.
【図２】本発明の一実施形態による気密封止型半導体パ
ッケージを製造する際の説明図FIG. 2 is an explanatory diagram for manufacturing a hermetically sealed semiconductor package according to one embodiment of the present invention;
【図３】（ａ）従来の気密封止型半導体パッケージの断
面図 （ｂ）従来の気密封止型半導体パッケージの上面図3A is a cross-sectional view of a conventional hermetically sealed semiconductor package. FIG. 3B is a top view of a conventional hermetically sealed semiconductor package.
１０ 金属基体 １１ 貫通孔 ２０ 放熱体 ２１ 銅板 ２２ 銀ろう材 ３０ 金属枠体 ４０ セラミック端子 ４１ メタライズ層 ５０ 半導体素子 ６０ ボンディングワイヤ ７０ 外部リード ８０ 金属蓋体 ９０ 中空 DESCRIPTION OF SYMBOLS 10 Metal base 11 Through-hole 20 Heat radiator 21 Copper plate 22 Silver brazing material 30 Metal frame 40 Ceramic terminal 41 Metallization layer 50 Semiconductor element 60 Bonding wire 70 External lead 80 Metal cover 90 Hollow
Claims (2)
属枠体及び前記金属枠体と絶縁しつつ前記金属枠体の内
外を導通するセラミック端子を接合した気密封止型半導
体パッケージにおいて、前記金属基体の半導体素子を搭
載する領域に貫通孔を形成し、この貫通孔内に銅系材料
からなる放熱体を埋め込んだことを特徴とする気密封止
型半導体パッケージ。1. An airtightly sealed semiconductor package in which an annular metal frame and a ceramic terminal that is insulated from the metal frame and conducts inside and outside of the metal frame are joined on a metal base made of an iron-based material. A hermetically sealed semiconductor package, wherein a through-hole is formed in a region of the metal base on which the semiconductor element is mounted, and a radiator made of a copper-based material is embedded in the through-hole.
間に挟んだろう材をセットして加熱、徐冷し、前記貫通
孔内に放熱体を接合したことを特徴とする請求項１記載
の気密封止型半導体パッケージ。2. A heat radiator is joined in the through hole by setting two copper plates and a brazing material sandwiched between the copper plates in the through hole, heating and gradually cooling the copper plate. 2. The hermetically sealed semiconductor package according to 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000027458A JP3165139B1 (en) | 2000-02-04 | 2000-02-04 | Hermetically sealed semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000027458A JP3165139B1 (en) | 2000-02-04 | 2000-02-04 | Hermetically sealed semiconductor package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP3165139B1 JP3165139B1 (en) | 2001-05-14 |
| JP2001217333A true JP2001217333A (en) | 2001-08-10 |
Family
ID=18553024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000027458A Expired - Fee Related JP3165139B1 (en) | 2000-02-04 | 2000-02-04 | Hermetically sealed semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3165139B1 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004179309A (en) * | 2002-11-26 | 2004-06-24 | New Japan Radio Co Ltd | Heat dissipating structure for printed circuit board and method for manufacturing the same |
| JP2008218958A (en) * | 2007-03-07 | 2008-09-18 | Everlight Electronics Co Ltd | Socket-type led device |
| JP2008288379A (en) * | 2007-05-17 | 2008-11-27 | Toshiba Corp | Semiconductor package |
| JP2011135110A (en) * | 2011-04-05 | 2011-07-07 | Nissan Motor Co Ltd | Joint structure |
| JP2018157201A (en) * | 2017-03-16 | 2018-10-04 | 三菱マテリアル株式会社 | Resistance device and manufacturing method of resistance device |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8533307B2 (en) | 2002-07-26 | 2013-09-10 | Robert Bosch Gmbh | Method and device for monitoring a data transmission |
| US10910326B2 (en) | 2016-11-17 | 2021-02-02 | Mitsubishi Electric Corporation | Semiconductor package |
-
2000
- 2000-02-04 JP JP2000027458A patent/JP3165139B1/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004179309A (en) * | 2002-11-26 | 2004-06-24 | New Japan Radio Co Ltd | Heat dissipating structure for printed circuit board and method for manufacturing the same |
| JP2008218958A (en) * | 2007-03-07 | 2008-09-18 | Everlight Electronics Co Ltd | Socket-type led device |
| JP2008288379A (en) * | 2007-05-17 | 2008-11-27 | Toshiba Corp | Semiconductor package |
| JP2011135110A (en) * | 2011-04-05 | 2011-07-07 | Nissan Motor Co Ltd | Joint structure |
| JP2018157201A (en) * | 2017-03-16 | 2018-10-04 | 三菱マテリアル株式会社 | Resistance device and manufacturing method of resistance device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3165139B1 (en) | 2001-05-14 |
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