JP2001054022A - Solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To pick up an image with a wide dynamic range. SOLUTION: A pixel 10 has a photoelectric conversion element 11 converting light into an electric signal, a comparison/judgement circuit 13 comparing output voltage from the photoelectric conversion element 11 with a threshold 18 and outputting a judgement signal when output voltage crosses the threshold, a control signal generation circuit 14 outputting a control signal 19 when the judgment signal and a reset signal 20 being the pulse signal of a prescribed period, which is previously decided, are inputted, a reset circuit 15 resetting the photoelectric conversion element 11 to the initial state of an operation when the control signal 19 is inputted and a counting circuit counting the number of times that the control signal 19 is outputted and outputting a counting result. A pixel value is constituted of the number of times that the output voltage of the photoelectric conversion element 11 exceeds the threshold and from the output voltage value of the photoelectric conversion element 11. Thus, a dynamic range can be enlarged.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device and, more particularly, to a photoelectric conversion device in which the output voltage of a photoelectric conversion unit exceeds a threshold value within a certain period and the storage time is changed according to the amount of incident light. The present invention relates to a solid-state imaging device capable of imaging in a wide dynamic range by forming a pixel signal from an output voltage of a unit.

[0002]

2. Description of the Related Art Two techniques will be described as conventional techniques. One is a method of counting the number of times that the output voltage of the photoelectric conversion unit has crossed a threshold, and forming a pixel value from the counted number. For example, "A Wide-Dyna
mic-Range, Low-Power Photo
sensor Array ", IEEE International
Tional Solid-State Circuit
ts Conference, TP 13.7, 1994
There is. FIG. 7 shows an example of a basic configuration of a pixel for realizing this method.

When the output voltage of the photodiode 71 crosses the threshold voltage 72, the comparison circuit 73 outputs one pulse.
Output 74. This pulse turns on the reset transistor 75 and resets the photodiode. The above operation is repeated many times in one field period, for example, as shown in the operation waveform of FIG. The output of the pixel is obtained as the number of pulses in one field period or the frequency of the pulses. If the amount of incident light is large, the output voltage of the photodiode immediately reaches the threshold value, so that the number of pulses in one field period increases. Conversely, if the amount of incident light is small, the number of pulses will be small. In this method, for example, if the threshold value is set to a value close to the output voltage value when the photodiode is saturated, the dynamic range determined by the ratio of the output voltage at reset to the output voltage at saturation usually becomes It is expanded beyond the output voltage.

Next, there is a method of changing the exposure time depending on the amount of incident light to widen the dynamic range of the video signal. This is described, for example, in "Multi-accumulation time light receiving element", Journal of the Institute of Image Information and Television Engineers, Vol. 51, No. 2, pp. 2
56-262 (1997). FIG. 9 schematically shows the relationship between the accumulation time and the photocharge output in the photodiode. The basic concept of the second technique will be described with reference to FIG.

The accumulation time is 1, 1/2, 1/4, 1/8,
‥‥, 1/128 is changed discretely. One point in the figure is the photocharge output during a certain accumulation time, and the slope connecting the point and the origin corresponds to the incident light intensity. When it is completely dark, it is A0. When the light is intensified, the light travels in the Al direction. A
When 1 is reached, the photodiode saturates, but moves to the position B0 and does not saturate, the accumulation time is reduced by half and the output is halved. When the light intensity further increases, Bl
When it reaches Bl, it moves to C0 and the accumulation time is 1 /
It becomes 4. Similarly, when the light intensity increases, the accumulation time changes to 1/128. As a result, the dynamic range can be expanded to 128 times as long as the storage time is fixed at one.

FIG. 10 shows a circuit configuration of this element. The circuit has two photodiodes, a photodiode a used for detecting saturation for controlling the accumulation time and a photodiode b used for detecting photocharges as signal charges. The output of the photodiode a is connected to the inverter, and the output of the inverter is latched. The latch output changes only when the accumulation time control pulse is at a high level. The accumulation time control pulse is set to a high level for about 1 μs at a time when 2 ⁿ⁻⁸ times of one frame period has elapsed from the start of the frame. At this time, n is 1 to 8. It is assumed that the ramp waveform takes a different value at the time when each accumulation time control pulse becomes high level. When the output voltage of the photodiode exceeds the threshold value of the inverter, the output of the inverter goes high. The inverter output is latched by the accumulation time control pulse immediately after this, and the latch output turns off the gates a and b. As a result, the charge stored in the photodiode b at the time when the storage time control pulse is input immediately after the inverter output becomes high level is stored in the capacitor a, and the charge stored by the ramp waveform voltage is stored in the capacitor b. Is done. These are read out via the cell selection transistor to obtain a photocharge output and its accumulation time output.

[0007]

However, in the method of counting the number of times that the output voltage of the photoelectric conversion section crosses a threshold value and forming a pixel value from the counted number, the number of pulses is counted. In order to increase the number of brightness gradations that can be expressed by a video signal, a counter having a scale corresponding to the number of gradations is required. For example, it is assumed that the brightness of a video signal output by the imaging device is expressed in 256 gradations. At this time, 100
In order to obtain a video signal having twice the dynamic range and having 100 times the number of gradations, that is, 25600 gradations, a counter of at least 15 bits is required. When such a large-scale counter is integrated on the same silicon chip as the sensor array, it causes an increase in the chip area of the sensor chip. It may also be impossible to increase the size. Further, this type of method has a disadvantage that the minimum detection level of the incident light amount becomes large and the sensitivity becomes low due to the offset voltage of the comparator.

In the method of changing the exposure time depending on the amount of incident light to widen a video signal, two photodiodes are required in a pixel. Therefore, the area of the photodiode which accumulates photocharges as signal charges is required. It is difficult to increase the aperture ratio with respect to the pixel area.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has been made in consideration of the number of times that the output voltage of the photoelectric conversion unit exceeds a threshold value and the output read by changing the accumulation time depending on the amount of incident light. By forming a pixel signal from the voltage, the number of gray scales of brightness is increased while the number of bits of the counter is reduced, the minimum detection level of the incident light amount is reduced, and the photoelectric conversion within one pixel is performed. An object of the present invention is to provide a solid-state imaging device capable of imaging in a wide dynamic range without sacrificing an aperture ratio by using one unit.

[0010]

According to a first aspect of the present invention, there is provided a solid-state imaging device comprising: a plurality of pixels arranged in a two-dimensional array; Pixel signal forming means for forming an image signal based on the output voltage of the photoelectric conversion means and the count result of the number of control signals output by the control signal generating means, respectively, each of which includes a plurality of pixels; Each of the pixels: photoelectric conversion means for converting light into an electric signal; comparing the output voltage from the photoelectric conversion means with a threshold having a predetermined value, and the output voltage has crossed the threshold Comparing and judging means for outputting a judging signal at the time;
Control signal generating means for outputting a control signal when both the determination signal and a reset signal which is a pulse signal having a predetermined period are input; and the photoelectric conversion means when the control signal is input. And a counting means for counting the number of times the control signal is output and outputting a counting result.

According to a second aspect of the present invention, in the solid-state imaging device according to the first aspect, the device further comprises: a coefficient calculating means for calculating a weighting factor α from the counting result; And a multiplying means for multiplying the output voltage of the photoelectric conversion means.

According to a third aspect of the present invention, there is provided the solid-state imaging device according to the third aspect, wherein the photoelectric conversion unit, the comparison determination unit,
The first invention or the second invention, wherein the control signal generation means and the reset means are a photoelectric conversion element, a comparison / determination circuit, a control signal generation circuit, and a reset circuit, respectively.
In the invention, the counting means is a counter circuit for counting the number of times that each pixel outputs a control signal in a unit time, and the counter circuit has the same number of columns and the same number of rows as the two-dimensional pixel array. A counter signal array configured in a two-dimensional array, wherein the pixel signal configuration means includes a pixel signal configuration circuit that configures a pixel value from an output from the photoelectric conversion element of each pixel and an output from the counter circuit array. It is characterized by.

According to a fourth aspect of the present invention, there is provided the solid-state imaging device according to the fourth aspect, wherein the photoelectric conversion unit, the comparison determination unit,
The first invention or the second invention, wherein the control signal generation means and the reset means are a photoelectric conversion element, a comparison / determination circuit, a control signal generation circuit, and a reset circuit, respectively.
In the invention, the plurality of pixels each further include a voltage / current conversion circuit for converting a control signal output voltage of the pixel into a current, and the apparatus further includes: a row direction and a column of the voltage / current conversion circuit output. A row-direction total reading circuit and a column-direction total reading circuit for respectively reading the sum of the directions; a total analyzing circuit for estimating a pixel that has output a control signal from the outputs of the two total reading circuits; and each pixel from the output of the total analyzing circuit. A counter circuit that counts the number of times the control signal is output to the two-dimensional pixel array.
A counter circuit array configured in a dimensional array; and a pixel signal configuration circuit configured to form a pixel value from an output from the photoelectric conversion element of each pixel and an output from the counter circuit array.

According to a fifth aspect of the present invention, there is provided the solid-state imaging device according to the fifth aspect, wherein the photoelectric conversion unit, the comparison determination unit,
The first invention or the second invention, wherein the control signal generation means and the reset means are a photoelectric conversion element, a comparison / determination circuit, a control signal generation circuit, and a reset circuit, respectively.
In the invention, the plurality of pixels each further include a voltage / current conversion circuit for converting a control signal output voltage of the pixel into a current, and the apparatus further includes: a row direction and a column of the voltage / current conversion circuit output. A row direction total readout circuit and a column direction totality readout circuit for reading the sum of the directions respectively; a column direction adder circuit for adding and storing respective outputs of the row direction total readout circuit and the column direction total readout circuit for a predetermined period; A row direction addition circuit; a total output circuit for estimating and outputting how many times each pixel has output the control signal within the predetermined period from the outputs of the two direction addition circuits; and the photoelectric conversion of each pixel A pixel signal configuration circuit that configures a pixel value from an output from the element and an output from the sum output circuit.

According to a sixth aspect of the present invention, there is provided a solid-state image pickup device in which a large number of pixels are arranged in a two-dimensional array; A pixel signal forming unit configured to form an image signal based on a result of counting the number of steps of the control signal output by the control signal generating unit, wherein each of the plurality of pixels includes: a photoelectric conversion unit that converts light into an electric signal; Means for comparing the output voltage from the photoelectric conversion means with a threshold value which increases by one step in synchronization with a reset signal which is a pulse signal having a predetermined cycle, and the output voltage crosses the threshold value Comparison / determination means for outputting a determination signal when the control signal is generated; control signal generation means for outputting a control signal when both the determination signal and the reset signal are input; Reset means for resetting the photoelectric conversion means to an initial state of operation when the control signal is input; and counting means for counting the number of steps of a threshold value at which the control signal is output and outputting a count result. It is characterized by having.

[0016]

FIG. 1 shows an example of the configuration of one pixel according to the present invention. The pixel 10 has a two-dimensional array structure, and the figure shows one pixel. The pixels are a photodiode 11, a readout transistor 12, a comparison circuit 1
3, an AND circuit 14, and a reset transistor 15. The counter circuit for counting the pulses of the control signal and the pixel configuration circuit are provided outside the pixel array for the purpose of increasing the aperture ratio of the pixel.

In FIG. 1, an output voltage of a photodiode 11 is supplied to a read transistor 12 by a vertical scanning signal 1.
When 6 is input, it is output 17 outside the pixel. The comparator 13 constantly compares the output voltage of the photodiode 11 with the threshold 18, and outputs a high-level signal when the output voltage exceeds the threshold. The AND circuit 14 outputs a high-level control signal when both the output of the comparison circuit and the reset signal 20 are at a high level. When the control signal is at a high level, the reset transistor 15 is turned on. When the reset transistor is turned on, the photodiode 11 is reset, and is set to the output voltage in the initial state of the photoelectric conversion operation. The control signal 19 is output outside the pixel as a control signal output. The threshold value 18 is given within a pixel, but can be set from outside the pixel.

FIG. 2 shows an example of an operation waveform of a pixel according to the present invention. The reset signal 20 is a pulse signal having a constant period. The control signal is output at the same timing as the reset pulse immediately after the time when the output voltage of the photodiode exceeds the threshold. The vertical scanning signal is input only once, for example, at the end of one frame period. The voltage output thereby is based on the optical signal charge accumulated from the time when the photodiode is reset by the last control signal of one frame period to the time when the output voltage is read at the end of one frame period, or When no control signal is generated, it is due to the optical signal charges accumulated during one frame period. The exposure time of the output voltage changes depending on the cycle of the reset signal pulse and the number of generations of the control signal pulse, that is, the amount of incident light. With such an operation,
For example, when the subject is bright 21, many control signal pulses are output and an output voltage is output. Dark 2
2 has no or few control signal pulses and outputs an output voltage.

FIG. 3 shows an example of the overall configuration of the image pickup apparatus 30 of the present invention. In this configuration, the pixel array includes two of the pixels 10.
It is configured in a dimensional array. First vertical scanning circuit 31, first switching circuit 32, and first horizontal scanning circuit 3
Numeral 3 is for reading out the output voltage of the photodiode 11 once from the pixels in the pixel array by raster scan at the end of one frame. The first reset signal scanning circuit 34 sequentially supplies a reset signal to the pixels from the first row to the last row for each row.

The counter circuit 35 counts the number of pulses of the control signal for the pixel array when the reset signal is at a high level. In the counter circuit array, the counter circuit 35 is configured in a two-dimensional array having the same number of rows and the same number of columns as the pixel array. The control signal outputs of the pixels in the same column and the control signal inputs of the counter circuit are all connected.
The second vertical scanning circuit 36, the second switch circuit 37, and the second horizontal scanning circuit 38 read the count result of the control signal pulse from the counter circuit 35 in the counter circuit array once by the raster scan at the end of one frame. is there. The second reset signal scanning circuit 39 is for sequentially supplying a reset signal to the counter circuit from the first row to the last row for each row.

The first reset signal scanning circuit 34 and the second reset signal scanning circuit 39 output reset pulses to the same row of the pixel array and the counter circuit array at the same time. By this operation, the control signal is counted by the column parallel processing. That is, the control signals of a plurality of pixels in the same row in the pixel array are simultaneously counted by a plurality of counter circuits in the same row as the row of the pixel array in the counter circuit array. Since the control signals of a plurality of pixels are counted in parallel, there is an advantage that the control signals can be read at high speed.

The pixel signal forming circuit 40 forms and outputs a pixel signal from the output voltage of the photodiode at the reading time and the number of pulses of the control signal in one frame period. FIG. 4 shows an example of the configuration. Coefficient calculation circuit 41
Calculates the weighting coefficient α from the output voltage v42 of the photodiode and the pulse number n43 of the control signal. The multiplication circuit 44 multiplies the weight coefficient α by the output voltage v to obtain a pixel signal P
(= Α · v) 45 is output.

An example of a method of calculating the coefficient α in the coefficient calculation circuit will be described below. It is assumed that the number of reset pulses within one frame period is N, and the threshold value is Q. Here, it is assumed that the amount of incident light within one frame period does not change. The weighting coefficient α is set to α = 1 when n = 0. When n> 0, α is obtained from Table 1. In Table 1, k = 0, 1,
2, ‥‥, N−1, a is too much obtained by dividing N by N−k, and is expressed as a = N% (N−k). At this time, since the number n of pulses of the control signal can be considered as a quotient obtained by dividing N by N−k, n = N / (N−k). Also, a = 0
It is assumed that v is not reset at the time of reading v. From Table 1, k that satisfies both the obtained n and v
To determine α.

[0024]

[Table 1]

FIG. 5 shows a second configuration example of the solid-state imaging device according to the present invention. In FIG. 5, the pixel is the pixel shown in FIG. 1, and the configuration and operation are the same as in the above embodiment.
The operations of the horizontal scanning circuit 53, the vertical scanning circuit 51, and the switch circuit 52 are the same as those in the above-described embodiment. The control signal output of each pixel is connected to a voltage / current conversion circuit 54. The pixel array includes a pixel 10 and a voltage / current conversion circuit 5
The four units are one constituent unit, and the constituent units are arranged in a two-dimensional array.

In the pixel array, reset signals are input to reset signal inputs 20 of all the pixels at the same timing. For example, one pixel array
It has one reset signal input and the wiring from this input connects to the reset signal inputs of all the pixels in the pixel array. With such a reset signal timing, the timing at which the output of the control signal 19 is permitted is the same for all pixels. When the control signal is output from the pixel, each of the voltage / current conversion circuits 54 outputs a current of a certain magnitude to the column-wise total reading circuit 55 and the row-wise total reading circuit 56, respectively. Since the timing at which the output of the control signal 19 is permitted is the same, currents are output from the plurality of voltage / current conversion circuits at the same timing, and the currents are added. As a result, every time the reset signal is input, the column direction sum readout circuit 55 obtains, for each column, a current value corresponding to the sum of the pixels that output the control signal among the pixels arranged in the same column. The sum reading circuit 56 obtains, for each row, a current value corresponding to the sum of the pixels that output the control signal among the pixels arranged in the same row.

In the column summation read circuit 55 and the row summation readout circuit 56, the magnitude of the current is converted into the magnitude of the electric current and then output. The sum total analyzing circuit 57 includes a column sum total reading circuit 55 and a row sum total reading circuit 5.
Based on the output from 6, an XY address on the pixel array of the pixel that has output the control signal is estimated and output. The counter circuit array 58 counts and outputs the number of times each pixel outputs a control signal within one frame period from the output from the sum analysis circuit 57. The pixel signal configuration circuit 59 is the same as the pixel signal configuration circuit 40 described above.

FIG. 11 shows a third configuration example of the solid-state imaging device according to the present invention. 11, a pixel 10, a voltage / current conversion circuit 54, a horizontal scanning circuit 53, a switch circuit 52,
The vertical scanning circuit 51, the column sum total reading circuit 55, the row sum total reading circuit 56, and the pixel signal configuration circuit 59 are shown in FIG.
This is the same as the second configuration example shown. Column direction addition circuit 111
The row direction addition circuit 112 adds the outputs of the column direction total reading circuit 55 and the row direction total reading circuit 56 for a certain period of time, and outputs the result. The sum analysis circuit 113 estimates and outputs the number of times that each pixel has output a control signal within a certain period based on the outputs from the column direction addition circuit 111 and the row direction addition circuit 112.

One of the factors that determines the difficulty of the estimation performed by the sum analysis circuit 113 is the input timing of the reset signal. As the input timing of the reset signal, for example,
A pulsed reset signal is given at a constant frequency. At this time, the column-direction addition circuit obtains, for each column, a value obtained by adding the sum of the control signal output pixels among the pixels arranged in the same column for one frame period, and the row-direction addition circuit obtains the control value of the pixels arranged in the same row. It is assumed that a value obtained by adding the sum total of the pixels that output signals for one frame period is obtained for each row.
The sum analysis circuit estimates the number of outputs of the control signal of each pixel within one frame period from these, and outputs it once in one frame period.

As another reset signal input timing, for example, in the first 1/120 second of one frame period (1/30 second), a reset pulse is input only once at the end of the period, and the remaining three pulses are input. For / 120 seconds, a pulse-like reset signal is given at a constant frequency. At this time, the column direction addition circuit subtracts the sum of the pixels that output the control signal among the pixels arranged in the same column from the first 1/1.
Get the value added for 20 seconds for each column and output it,
In addition, a value obtained by adding the remaining 3/120 seconds is obtained for each column and output. The same applies to the row direction addition circuit. The value obtained by the column-direction addition circuit and the row-direction addition circuit in the first 1/120 second is the sum of pixels that output pixel signals that are four times or more the threshold level. The sum analysis circuit roughly estimates whether the threshold level is four times or more using the value of the first 1/120 second, and then performs detailed estimation using the remaining value of 3/120 second.

Next, the photoelectric conversion characteristics obtained by the solid-state imaging device of the present invention were obtained by computer simulation. At this time, the number N of reset pulses in one frame period was N = 100, and the threshold value Q was Q = 1. Further, the output voltage when the accumulated charge of the photodiode was eroded was 1, and the amount of incident light at that time was 1. As an example, calculation was performed up to an incident light amount of 100. FIG. 6 shows the simulation results. The pixel signal value also increases when the incident light amount increases to 100, and it can be seen that a dynamic range 100 times that of the related art is realized.

In the above-described configuration example of the solid-state imaging device of the present invention, the threshold value is fixed during operation, and is preferably set near the output voltage at the time of saturation of the accumulated charge of the photodiode. Then, the following inconvenience arises. That is, the output voltage when the photodiode is in a saturated state is 1, and the voltage when the photodiode is reset is 0. Here, for example, as shown in FIG. 12A, it is assumed that a threshold value is set to 1 and a pulse-shaped reset signal is applied 10 times per unit accumulation time. At this time, if the control signal output during the unit accumulation time is added, it is possible to know how many times the threshold value has been exceeded during the unit accumulation time, that is, the pixel has saturated in each pixel. FIG. 12 shows the relationship between the brightness of the subject and the number of saturations at this time.
(B). It is stated that the photodiode is saturated once per unit storage time when the brightness is 1. From FIG. 12B, when the brightness of the subject changes from 1 to 10, the number of saturations obtained by adding the control signal is 1, 2, 3, 5,
It turns out that it changes only 10 times. This means that when the threshold value is constant, the number of brightness gradations that can be expressed is smaller than the number of brightness gradations of the subject.

To solve the above-mentioned problem, the following configuration in which the threshold value is made variable during operation is proposed. FIG.
As shown in (a), when a pulse-like reset signal is applied ten times during the unit accumulation time, the threshold value is 1/10 for the first pulse and 2/100 for the second pulse.
10. Similarly, the ratio is set to 10/10 at the tenth time. At this time, the pixels that output the control signal of the logical value “1” in the first pulse include all the pixels that are saturated at least once in the unit accumulation time. Similarly, the second pulse includes all pixels that are saturated twice or more in the unit accumulation time. The third pulse includes a pixel saturated three or more times and a part of the pixel saturated only once. In this way, it is possible to know in advance how many times or how many times the pixel that outputs the control signal of the logical value "1" in each pulse saturates in the unit accumulation time. Therefore, by integrating the output state of the control signal in each pulse, the number of saturations of the unit accumulation time of each pixel can be obtained. FIG. 13B shows the relationship between the brightness of the subject and the number of times of saturation obtained in this way. From FIG. 13B, it can be seen that when the brightness of the subject changes from 1 to 10, the number of saturations also changes from 1 to 10 in accordance with the brightness.

FIG. 14 shows a circuit configuration example for realizing this method. In FIG. 14, a pixel 10, a pixel array,
Vertical scanning circuit 31, horizontal scanning circuit 33, switch circuit 3
2 and the reset signal scanning circuit 34 are similar to the configuration example of FIG. When the first reset pulse is input,
The selector is switched to the input of the memory 1. The memory 1 stores a control signal output from each pixel in the first reset pulse as a logical value “0” or “1”.
Similarly, in the case of the second reset pulse, the selector is switched to the input of the memory 2, and in the case of the tenth reset, the selector is switched to the input of the memory 10, and each memory stores the control signal output at that time for all the pixels. I do. The saturation count calculation circuit 140 calculates and outputs how many times each pixel has saturated in the unit accumulation time while referring to the contents of the memories 1 to 10. The pixel signal forming circuit 40 forms and outputs a pixel signal from the number of saturations in the unit storage time and the output voltage of the photodiode read once at the end of the unit storage time.

Although the present invention has been described with reference to several embodiments, the present invention is not limited to these embodiments, and various modifications and changes can be made within the scope of the invention defined in the appended claims.
Variations will be obvious to those skilled in the art.

[0036]

According to the conventional technique of forming a pixel value from the number of times that the output voltage of the photoelectric conversion unit has crossed the threshold value, a counter having a scale capable of counting a number equivalent to the number of brightness gradations is required. However, in the present invention, the counter circuit only needs to be able to count from 0 to 100 under the above conditions, so that 7
A bit is fine. At this time, the number of brightness gradations depends on the resolution at the time of reading the output voltage of the photodiode,
By using a high-performance A / D converter, a sufficient number of gradations can be obtained. Further, since the counter circuit is arranged outside the pixel array, it is expected that the aperture ratio of the pixel can be increased. Further, in the present invention, when the subject is dark, no pulse of the control signal is generated, and the output voltage of the photodiode is read out in the same manner as in a conventional CMOS image sensor, and the read voltage is used as a pixel value. Therefore, since the sensitivity is equivalent to that of the conventional type, there is no disadvantage that the sensitivity is reduced.

In the present invention, when the number of reset pulses is fixed, the time from the generation time of the control pulse immediately before the read time of the output voltage of the photodiode to the read time of the output voltage changes when the amount of incident light changes. This means that in Table 1, the time from the generation time of the control pulse immediately before the read time of the output voltage of the photodiode to the read time of the output voltage is a. It can be seen from the fact that when the number N of reset pulses is constant, a changes with the change in k. Considering only this behavior,
The present invention is similar to the above-described technique of changing the exposure time depending on the amount of incident light to widen the dynamic range of a video signal. However, since only one photodiode is arranged in one pixel, the above problem of the aperture ratio of the pixel does not occur.

[Brief description of the drawings]

FIG. 1 is a diagram showing one configuration example of one pixel according to the present invention.

FIG. 2 is a diagram showing an operation waveform of a pixel according to the present invention.

FIG. 3 is a diagram illustrating a configuration example of a solid-state imaging device according to the present invention.

FIG. 4 is a diagram showing a configuration example of a pixel signal configuration circuit according to the present invention.

FIG. 5 is a diagram showing a second configuration example of the solid-state imaging device according to the present invention.

FIG. 6 is a diagram illustrating a photoelectric conversion characteristic of the solid-state imaging device according to the present invention.

FIG. 7 is a diagram illustrating a configuration example of one pixel of a conventional solid-state imaging device.

FIG. 8 is a diagram showing operation waveforms of a conventional solid-state imaging device pixel.

FIG. 9 is a diagram illustrating the concept of the operation principle of a conventional solid-state imaging device.

FIG. 10 is a diagram illustrating a configuration of a conventional solid-state imaging device.

FIG. 11 is a diagram showing a third configuration example of the solid-state imaging device according to the present invention.

FIG. 12 is a diagram for explaining the operation of the solid-state imaging device of the present invention when the threshold value is constant.

FIG. 13 is a diagram for explaining the operation of the solid-state imaging device of the present invention when the threshold is variable.

FIG. 14 is a diagram showing a configuration of the solid-state imaging device of the present invention when a threshold value is varied.

[Explanation of symbols]

 Reference Signs List 10 pixel 11 photodiode 12 readout transistor 13 comparison circuit 14 AND circuit 15 reset transistor 16 vertical scanning signal 17 output voltage 18 threshold 19 control signal 20 reset signal 21 data when subject is bright 22 data when subject is dark 30 solid-state imaging device of the present invention 31 first vertical scanning circuit 32 first switching circuit 33 first horizontal scanning circuit 34 first reset signal scanning circuit 35 counter circuit 36 second vertical scanning circuit 37 second switching circuit 38 second horizontal scanning circuit 39 second reset signal scanning circuit 40 pixel signal configuration circuit 41 coefficient calculation circuit 42 output voltage (v) of photodiode 43 pulse number of control signal (n) 44 multiplication circuit 45 pixel signal (P = α · v) 51 vertical scanning Circuit 52 Switch circuit 53 Horizontal scanning Path 54 voltage / current conversion circuit 55 column summation readout circuit 56 row summation readout circuit 57 summation analysis circuit 58 counter circuit array 59 pixel signal configuration circuit 71 photodiode 72 threshold 73 comparison circuit 74 pulse output 75 reset transistor 111 column Direction addition circuit 112 Row direction addition circuit 113 Summation analysis circuit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Toshihisa Watanabe 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside the Japan Broadcasting Research Institute (72) Inventor Yuichi Ishiguro 1-110-11 Kinuta, Setagaya-ku, Tokyo Japan F-term in Japan Broadcasting Research Institute (reference) 4M118 AA02 AB01 BA06 CA02 DD01 DD12 5C024 AA01 CA15 FA01 GA01 GA31 HA14 HA18 HA20

Claims (6)

[Claims] 1. A solid-state imaging device in which a large number of pixels are arranged in a two-dimensional array, an output voltage of a photoelectric conversion unit of each of the pixels, and a count result of the number of control signals output by a control signal generation unit. A plurality of pixels each comprising: a photoelectric conversion unit for converting light into an electric signal; and an output voltage from the photoelectric conversion unit. Comparing means for comparing a threshold value having a predetermined value and outputting a determination signal when the output voltage crosses the threshold value; and a reset signal which is a pulse signal having a predetermined cycle with the determination signal. Control signal generating means for outputting a control signal when both are inputted; and resetting means for resetting the photoelectric conversion means to an initial state of operation when the control signal is inputted. DOO means and; solid-state imaging apparatus characterized by comprising a counting means for outputting a counted number of times said control signal is output counted results. 2. The apparatus according to claim 1, further comprising: coefficient calculating means for calculating a weight coefficient from the counting result; and multiplying means for multiplying the weight coefficient by an output voltage of a photoelectric conversion means. A solid-state imaging device characterized by the above-mentioned. 3. The photoelectric conversion unit, the comparison determination unit,
3. The apparatus according to claim 1, wherein the control signal generation unit and the reset unit are a photoelectric conversion element, a comparison determination circuit, a control signal generation circuit, and a reset circuit, respectively. A counter circuit for counting the number of times a control signal is output, the counter circuit having a counter circuit array configured in a two-dimensional array having the same number of columns and the same number of rows as the two-dimensional pixel array, The solid-state imaging device according to claim 1, wherein the configuration unit includes a pixel signal configuration circuit configured to configure a pixel value from an output from the photoelectric conversion element of each pixel and an output from the counter circuit array. 4. The photoelectric conversion unit, the comparison determination unit,
3. The device according to claim 1, wherein the control signal generation unit and the reset unit are a photoelectric conversion element, a comparison determination circuit, a control signal generation circuit, and a reset circuit, respectively. The apparatus further comprises a voltage-current conversion circuit for converting an output voltage into a current, and the apparatus further comprises: a row-direction total reading circuit and a column-direction total reading circuit for respectively reading row-wise and column-wise sums of the voltage-current conversion circuit output. A total sum analysis circuit for estimating a pixel that has output a control signal from the outputs of the two sum total readout circuits; and a counter circuit for counting the number of times the control signal is output for each pixel from the output of the total sum analysis circuit. A counter circuit whose counter circuit is formed in a two-dimensional array having the same number of columns and the same number of rows as the two-dimensional pixel array. A solid-state imaging apparatus characterized by comprising a pixel signal configuration circuit constituting an output from the photoelectric conversion element of each pixel of the pixel values from the output from the counter circuit array; a capacitor circuit array. 5. The photoelectric conversion unit, the comparison determination unit,
3. The device according to claim 1, wherein the control signal generation unit and the reset unit are a photoelectric conversion element, a comparison determination circuit, a control signal generation circuit, and a reset circuit, respectively. The apparatus further comprises a voltage-current conversion circuit for converting an output voltage into a current, and the apparatus further comprises: a row-direction total reading circuit and a column-direction total reading circuit for respectively reading row-wise and column-wise sums of the voltage-current conversion circuit output. A circuit; a column-direction addition circuit and a row-direction addition circuit for adding and storing outputs of the row-direction totalization readout circuit and the column-direction totalization readout circuit for a predetermined period; A total sum that estimates and outputs how many times the pixel has output the control signal within the predetermined period. A solid-state imaging apparatus characterized by comprising a pixel signal configuration circuit constituting the pixel values from the output from the output and the sum output circuit from the photoelectric conversion element of each pixel; and power circuit. 6. A solid-state imaging device in which a large number of pixels are arranged in a two-dimensional array, an output voltage of photoelectric conversion means of each of the pixels, and counting of steps of a control signal output by a control signal generation means. A pixel signal forming unit configured to form an image signal based on a result, wherein each of the plurality of pixels includes: a photoelectric conversion unit that converts light into an electric signal; and an output voltage from the photoelectric conversion unit. Comparing and comparing means for comparing with a threshold value which rises by one step in synchronization with a reset signal which is a pulse signal having a predetermined period, and outputs a determination signal when the output voltage crosses the threshold value; Control signal generating means for outputting a control signal when both the signal and the reset signal are input; and operating the photoelectric conversion means when the control signal is input. And resetting means for resetting the initial state; the control signal the solid-state imaging device, wherein a comprises a counting means for outputting the counted count result the number of steps of the output threshold.