JP2000278176A - Delay profile measurement device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the power consumption in the case of measuring a delay profile. SOLUTION: First fluctuation observation circuits 44a, 44b observe a synchronization sum result by a synchronization sum circuit, that is variation in an instantaneous delay profile, an intermittent operation control circuit 54 controls averaging circuits 46a, 46b every time the result of synchronization sum is outputted when the variation exceeds a prescribed range, and the intermittent operation control circuit 54 control the averaging circuits 46a, 46b so that the averaging processing is conducted intermittently when the variation within a prescribed range is consecutive. Moreover, the control circuit 54 stops a 2nd variation observation circuit 52 in this case. When the 2nd variation observation circuit 52 detects the variation in excess of a prescribed range the circuit 52 stops the 1st variation observation circuits 44a, 44b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a code division multiple access system (CDMA: Code) using direct spread spectrum.
Division Multiple Access)
And more particularly to a delay profile measuring device.

[0002]

2. Description of the Related Art A spread spectrum communication system has been adopted in a CDMA system or the like which has recently attracted attention as a telephone system. In this spread spectrum communication system, a pseudo random code is used as a spread code,
The transmission signal is spread spectrum and transmitted, and the pattern and phase of the code sequence of the spread code are changed to enable multi-dimensional connection. Furthermore, in this spread spectrum communication system, in order to reduce the influence of fading due to multipath, diversity RAKE
It employs a composition method. The diversity RAKE combining method detects a timing (delay time) of each spatial path from a delay profile obtained based on a received signal and, based on the timing, detects a signal component transmitted from the received signal via each spatial path. It is taken out and subjected to in-phase synthesis.

Here, the delay profile indicates the relationship between the signal strength of the received wave and the delay time in a multipath environment. The delay profile is obtained by synchronously adding pilot symbols included in the received signal at a predetermined period. , A so-called instantaneous delay profile is calculated, and then the instantaneous delay profile is moving-averaged for a certain period to obtain an averaged delay profile. That is, this averaged delay profile is also calculated for each predetermined period.

[0004]

However, if the averaging delay profile is always calculated every predetermined period, the circuit for performing the moving averaging process always operates, and power consumption is required. I will.

It is an object of the present invention to provide a delay profile measuring device capable of reducing power consumption when measuring a delay profile.

[0006]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems. First, a received signal, which is a signal spread spectrum by a spread code, and a despread code are used. A delay profile measuring device that measures a delay profile for a correlation signal derivable from a delay profile generation unit that generates a delay profile at a generation timing for each predetermined cycle based on the correlation signal, and detects a variation in the correlation signal. A delay detecting unit that performs the delay profile generation so as to intermittently generate a delay profile by thinning out a delay profile generation timing when the fluctuation detector does not detect a variation exceeding a predetermined range. And a control unit that controls the generation unit.

[0007] In the first configuration, the fluctuation detecting section detects whether or not the correlation signal has fluctuated. Then, in the normal operation, the delay profile generation unit generates a delay profile at a generation timing for each predetermined cycle based on the correlation signal, but when the fluctuation detection unit does not detect a fluctuation exceeding a predetermined range. In other words, when the fluctuation is not detected or when the detected fluctuation is within a predetermined range, the control unit causes the delay profile generation unit to intermittently generate the delay profile by thinning out the generation timing of the delay profile. The delay profile generator is controlled. As a result, the delay profile generator intermittently generates a delay profile. As a result, the operation speed of the delay profile generation unit can be reduced, so that power consumption can be reduced.

A second aspect of the present invention is a delay profile measuring apparatus for measuring a delay profile of a correlation signal derivable from a received signal, which is a signal spread spectrum by a spreading code, and a despreading code. A synchronous addition unit for synchronously adding one part and outputting a synchronous addition result as an instantaneous delay profile; and a synchronous addition result output from the synchronous addition circuit, averaging the synchronous addition result at a timing of a predetermined cycle, and An averaging unit that outputs a profile; a fluctuation detecting unit that detects a fluctuation in a synchronous addition result output by the synchronous adding unit; and an averaging unit that detects the fluctuation when the fluctuation detecting unit does not detect a fluctuation exceeding a predetermined range. A control unit that controls the averaging unit so that the unit thins out the timing and performs averaging intermittently.

In the second configuration, the synchronous addition section synchronously adds at least a part of the correlation signal and outputs a synchronous addition result as an instantaneous delay profile. Further, the fluctuation detecting section detects a fluctuation in the synchronous addition result output from the synchronous adding section. Then, in the case of normal operation, the averaging unit averages the synchronous addition result at a timing of a predetermined cycle and outputs an averaged delay profile. If the fluctuation is not detected, the control section controls the averaging section so that the averaging section thins out the timing and performs intermittent averaging. As a result, the operation speed of the averaging unit can be reduced, so that power consumption can be reduced.

[0010] Thirdly, in the second configuration, the delay profile measuring device further includes a second variation detecting unit for detecting a variation of the averaged delay profile output by the averaging unit. When the second fluctuation detecting section detects a fluctuation exceeding a predetermined range, the control section stops the operation of the fluctuation detecting section for detecting the fluctuation of the instantaneous delay profile. That is, when the second fluctuation detecting unit detects a fluctuation exceeding a predetermined range,
Since the averaged delay profile is fluctuating, it is in the high-speed movement state. In this case, the operation of the fluctuation detection unit that detects the low-speed movement, that is, detects the fluctuation of the instantaneous delay profile is a kind of operation. Since it is not necessary, the fluctuation detecting unit is stopped. Therefore, since the fluctuation detecting unit is stopped, the power consumption can be further reduced.

A fourth aspect of the present invention is a delay profile measuring apparatus for measuring a delay profile of a correlation signal derivable from a received signal which is a signal spread spectrum by a spreading code and a despread code, and receives the received signal. A processing unit provided for each of the plurality of antennas,
A synchronous addition unit for synchronously adding at least a part of the correlation signal and outputting a synchronous addition result as an instantaneous delay profile; and averaging the synchronous addition result output from the synchronous addition circuit at a timing of a predetermined cycle. A processing unit having an averaging unit that outputs an averaged delay profile, a peak detection unit that detects a peak based on the averaged delay profile, and a peak detection unit in the plurality of processing units. A peak comparing section that compares peaks and extracts a predetermined number of peaks; a fluctuation detecting section that detects fluctuations in a synchronous addition result output by the synchronous adding section; and a fluctuation detecting section that detects fluctuations in the instantaneous delay profile. Controlling the averaging unit so that the averaging unit thins out the timing and performs intermittent averaging when the fluctuation is not detected beyond the predetermined range. A control unit that, and having a.

In the fourth configuration, first, the synchronous addition section synchronously adds at least a part of the correlation signal and outputs a synchronous addition result as an instantaneous delay profile. At this time, the fluctuation detecting section detects a fluctuation in the synchronous addition result output from the synchronous adding section. The averaging unit averages the synchronous addition result output from the synchronous addition circuit at a timing of a predetermined period, and outputs an averaged delay profile. The peak detector detects a peak based on the averaged delay profile, and the peak comparator compares the peaks detected by the peak detector to extract a predetermined number of peaks. Then, the control unit controls the averaging unit so that the averaging unit thins out the timing and performs intermittent averaging when the fluctuation detecting unit does not detect a fluctuation exceeding a predetermined range. . As a result, the operation speed of the averaging unit, the peak detecting unit, and the peak comparing unit can be reduced, and the power consumption can be reduced.

Fifthly, in the fourth configuration, the delay profile further includes a second variation detection unit that detects a variation of the peak extracted by the peak comparison unit, The control unit stops the operation of the fluctuation detecting unit when the detecting unit detects a fluctuation exceeding a predetermined range. That is, when the second fluctuation detecting unit detects a fluctuation exceeding a predetermined range,
Since the averaged delay profile is fluctuating, the mobile terminal or the like equipped with the delay profile measuring device is in a high-speed moving state. Since the operation of the section is not required, the fluctuation detecting section is stopped. Therefore,
Since the fluctuation detecting unit is stopped, the power consumption can be further reduced.

Sixth, in the third or fifth configuration, a state in which the fluctuation detecting section for detecting a fluctuation in the synchronous addition result does not detect a fluctuation exceeding the predetermined range continues for a predetermined period. In this case, the control unit stops the operation of the second fluctuation detecting unit. If the state in which the fluctuation detecting unit does not detect the fluctuation beyond the predetermined range continues for a predetermined period, the mobile terminal or the like having the delay profile measuring device is in a so-called stationary state, in this case, Since the operation of the second fluctuation detecting unit for detecting the high-speed movement is not required, the second fluctuation detecting unit is stopped. Therefore, the power consumption can be further reduced.

Seventh, in any one of the above-described second to sixth configurations, the fluctuation detecting section for detecting fluctuation of the synchronous addition result includes a synchronous addition result for detecting fluctuation,
It is characterized in that a fluctuation is detected by comparing with the latest averaged delay profile.

Eighth, in any one of the first to seventh configurations, the fluctuation detecting section detects fluctuation based on a synchronous addition result obtained by synchronously adding correlations of arbitrary symbols in the received signal. Is performed.

Ninth, in any one of the first to eighth configurations, if a state in which a fluctuation exceeding a predetermined range is not detected continues for a predetermined period, the averaging process is intermittently performed. It is characterized by performing.

In a tenth aspect, in any one of the first to ninth configurations, the fluctuation detecting section outputs a signal indicating no fluctuation detection when the fluctuation detecting section does not detect a fluctuation exceeding a predetermined range. The signal is output to the control unit. In accordance with this signal, the control unit performs an intermittent operation for intermittently performing the averaging process.

Eleventh, in any one of the first to tenth configurations, the predetermined range in the fluctuation is a fluctuation allowable amount of the correlation power value at a predetermined number of peaks included in the correlation signal. And the allowable amount of delay time variation at the predetermined number of peaks.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings. As shown in FIG. 1, a mobile terminal A according to the present invention includes receiving antennas 10a,
0b, the receiving amplifiers 20a and 20b, the matched filters 30a and 30b, and the delay profile measuring circuit 40
A despreading code generation / rake synthesis circuit 60, an error correction / frame processing circuit 70, a transmission processing circuit 80,
And a transmission amplifier 90.

Here, the receiving amplifier 20a amplifies the received signal received by the receiving antenna 10a and down-converts the signal to a baseband. Similarly, the reception amplifier 20b amplifies a reception signal received by the reception antenna 10b and downconverts the reception signal to a baseband. The matched filters 30a and 30b are
An impulse response of the received signal, that is, a correlation signal is generated based on the correlation between the received signal and the despread code. As shown in FIG. 3, the matched filters 30a and 30b each include a delay unit for delaying a received signal as a spread spectrum signal and a multiplication for multiplying a signal output from each delay unit by a despreading code. And an adder for adding the outputs of the respective multipliers. This despreading code is sent from the despreading code generation / RAKE combining circuit 60.

The delay profile measuring circuit 40 as the delay profile measuring device of the present invention generates a delay profile based on the correlation signals sent from the matched filters 30a and 30b. The delay profile 40 also detects a valid path based on the generated delay profile. The specific configuration of the delay profile measurement circuit 40 is configured as shown in FIG. Details will be described later.

The despreading code generating / RAKE combining circuit 60 generates a despreading code and sends it to the matched filters 30a and 30b, and also performs RAKE combining. That is, a process of calculating demodulation (despreading) based on the detected delay time of the effective path, a process of compensating the amount of phase rotation for each effective path and in-phase the signal of each path,
Processing for synthesizing the signals of the respective paths corrected in phase is performed. The error correction / frame processing circuit 70 performs various processes such as error correction, error detection, and interleaving.
Further, the transmission processing circuit 80 performs processing for transmission such as spread modulation. In this portable terminal A, as shown in FIG. 1, there are two systems of receiving circuits for performing antenna diversity.

Next, the details of the delay profile measuring circuit 40 will be described. As shown in FIG. 2, synchronous adding circuits 42a and 42b as the synchronous adding section, a first fluctuation observing circuit 44a as the fluctuation detecting section, 44b, averaging circuits 46a and 46b as the averaging unit, peak detection circuits 48a and 48b as the peak detection unit, a peak value comparison circuit 50 as the peak comparison unit, and a second variation detection unit It has a second fluctuation observation circuit 52 and an intermittent operation control circuit 54 as the control unit.

Here, the synchronous addition circuit 42a is for synchronously adding the correlation of pilot symbols included in the correlation signal sent from the matched filter 30a at a predetermined period for one unit period. Similarly, the synchronous addition circuit 42b synchronously adds the correlation of the pilot symbols included in the correlation signal sent from the matched filter 30b at a predetermined period for one unit period. Specifically, the synchronous addition circuit 42a performs synchronous addition on the correlation signal from the matched filter 30a,
2b performs synchronous addition on the correlation signal from the matched filter 30b. The one unit period will be described later. The synchronous addition result obtained by performing the synchronous addition process is a so-called instantaneous delay profile.

The first variation observation circuit 44a observes the variation of the instantaneous delay profile output from the synchronous addition circuit 42a and detects whether the portable terminal A is in a moving state. Similarly, the first fluctuation observation circuit 44
“b” observes the fluctuation of the instantaneous delay profile output from the synchronous addition circuit 42b and detects whether or not the portable terminal A is in a moving state. Specifically, the instantaneous delay profile of this time is compared with the latest (for example, previous time) averaged delay profile before that, and whether any of the paths exceeds a preset level allowable range, Alternatively, it is determined whether or not any of the paths is in a moving state by determining a movement detection condition as to whether or not any of the paths exceeds a preset time allowable range. The details of the movement detection condition will be described later. Further, the first fluctuation observation circuit 44a,
When it is detected that 44b is in the moving state, the information is transmitted to the intermittent operation control circuit 54.

The averaging circuit 46a averages the instantaneous delay profile output from the synchronous addition circuit 42a. Similarly, the averaging circuit 46b
A process for averaging the instantaneous delay profile output from the synchronous addition circuit 42b is performed. A specific method of the averaging process will be described later. The averaging circuit 46
The switches a and b switch between normal operation and intermittent operation in accordance with a control signal from the intermittent operation control circuit. That is, in the normal operation, the predetermined period, that is, the synchronous addition circuit 4
The averaging process is performed every time the instantaneous delay profile is output from 2a and 42b. In the intermittent operation, the averaging process is performed intermittently. The detailed operation will be described later. The data obtained by averaging by the averaging circuits 46a and 46b is an averaging delay profile. This averaged delay profile is generally called a delay profile.

The peak detecting circuit 48a detects a peak based on the averaged delay profile sent from the averaging circuit 46a. Similarly, the peak detection circuit 48
b detects a peak based on the averaging delay profile sent from the averaging circuit 46b. That is, a peak exceeding a predetermined reference level is detected, and predetermined information about the peak is output. Examples of the predetermined information include data of a correlation power value of the peak and data of a delay time.

The peak value comparing circuit 50 compares the peak information sent from the peak detecting circuit 48a with the peak information sent from the peak detecting circuit 48b to extract a predetermined number of peaks, Outputs predetermined information. Examples of the predetermined information include data of the correlation power value of the peak, delay time, and antenna information.

The second fluctuation observing circuit 52 observes the fluctuation of each of the predetermined number of peaks extracted by the peak value comparing circuit 50, and determines whether the portable terminal A is in a high-speed moving state. Is determined. Specifically, the peak extracted by the current peak value comparison circuit 50 is compared with the most recently extracted peak (for example, the previous one), and one of the peaks, that is, the path is set in advance. It is determined whether or not the vehicle is in a high-speed moving state by determining a movement detection condition of whether the level exceeds a level allowable range and whether any path exceeds a preset time allowable range. I do. The details of the movement detection condition will be described later. When the second fluctuation observation circuit 52 detects that the vehicle is moving at a high speed, the information is transmitted to the intermittent operation control circuit 54.

The intermittent operation control circuit 54 controls switching between the normalizing operation and the intermittent operation of the averaging circuits 46a and 46b. The first fluctuation observation circuits 44a and 44b When the mobile terminal A is detected to be in a moving state by the averaging circuits 46a and 46
b is set to the normal operation, and if the mobile terminal A is detected to be in the stationary state, the averaging circuit 46
a and 46b are controlled to be intermittent operations. The intermittent operation control circuit 54 controls the first fluctuation observation circuits 44a and 44b to be in a stopped state when the second fluctuation observation circuit 52 detects that the mobile terminal A is in a high-speed moving state. And the first fluctuation observation circuits 44a, 44a
When it is detected by b that the mobile terminal A is in the stationary state, control is performed so that the second fluctuation observation circuit 52 is stopped. Details of the operation of the intermittent operation control circuit 54 will be described later.

Next, the operation of the portable terminal A having the above configuration will be described with reference to FIGS. Receiving amplifier 20a
Amplifies a received signal received via the receiving antenna 10a, down-converts the signal to a baseband, and transmits it to the matched filter 30a and the despreading code generation / RAKE combining circuit 60. Similarly, the receiving amplifier 20b amplifies the received signal received via the receiving antenna 10b, down-converts the signal to a baseband, and transmits the converted signal to the matched filter 30b and the despreading code generation / RAKE combining circuit 60.

Then, the matched filter 30a generates an impulse response of the received signal, that is, a correlation signal based on the correlation between the received signal and the despread code. Similarly, the matched filter 30b generates a correlation signal of the received signal based on the correlation between the received signal and the despread code.

Then, the delay profile measuring circuit 40
Generates a delay profile according to the correlation signal. That is, the correlation signal from the matched filter 30a is sent to the synchronous addition circuit 42a, and the synchronous addition circuit 42a synchronously adds the correlation of the pilot symbols included in the received signal at a predetermined cycle. For example, the waveform shown in “Waveform of One Symbol Period” in FIG. 8 indicates a correlation power value waveform of one arbitrary symbol. In the “waveform of one symbol period” in FIG. 8, the upper side is based on the received signal received by the receiving antenna 10a, and the lower side is based on the received signal received by the receiving antenna 10b. Then, a pilot symbol is used as one of the arbitrary symbols. The pilot symbols exist in a predetermined cycle, and a predetermined number of pilot symbols exist in one unit period. The period of the pilot symbol is called a time slot interval. That is, the synchronous addition circuit 42a synchronously adds the correlation of the pilot symbols for the one unit period. The result of the synchronous addition is the instantaneous delay profile. The instantaneous delay profile is sent to the averaging circuit 46a and the first fluctuation observation circuit 44a. The one unit period may be variable instead of being fixed.

The synchronous addition circuit 42b performs the same processing as the synchronous addition circuit 42a. FIG. 8 shows a comparison between each pilot symbol and data obtained by synchronously adding each pilot symbol. One pilot symbol has a low signal strength as shown in FIG. 8, but is synchronized by the synchronous addition circuits 42a and 42b. The addition increases the signal strength.

The averaging circuits 46a and 46b are
A process for averaging the instantaneous delay profile is performed.
Specifically, an exponential averaging method is used. That is, as shown in FIGS. 4 to 6, the result of the synchronous addition is multiplied by 1-α, and the multiplication result L1 is added to the initial value × α. This addition result is defined as M1. Here, α is called a forgetting coefficient. As for the initial value, the peak detection circuit 48a, 48b detects a peak whose correlation value exceeds a predetermined reference level. Is provided. Then, the addition result L1 is further multiplied by a forgetting coefficient α. This multiplication result is defined as N1.

Then, when the next one unit period elapses, the next synchronous addition result is sent to the averaging circuits 46a and 46b.
1 is added to obtain an addition result M2. Hereinafter, the exponential averaging process is similarly repeated. The result of averaging the instantaneous delay profile in this way becomes the averaged delay profile. The averaging circuit 46a sends the data after the exponential averaging process to the peak detection circuit 48a.
The averaging circuit 46b sends the result of the exponential averaging process to the peak detection circuit 48b in the same manner as described above.

The waveform of the received signal that has been subjected to the moving average processing as described above is the "waveform of one symbol period after averaging" in FIG.
Becomes "Waveform of one symbol period after averaging" in FIG.
In the figure, the upper side is based on the received signal received by the receiving antenna 10a, and the lower side is based on the received signal received by the receiving antenna 10b. The above-described averaging process is performed each time the result of the synchronous addition is output from the synchronous addition circuits 42a and 42b. The averaging process is performed within the section u in FIG. For example, in FIG. 4, when the first addition result is output, processing until the multiplication result L1, the addition result M1, and the multiplication result N1 are calculated is performed in the section u. Then, processing until the multiplication result L2, the addition result M2, and the multiplication result N2 are calculated in the section u of the next one unit section. Note that the synchronous addition circuits 42a, 42b,
FIG. 7 shows the functions of the averaging circuits 46a and 46b.

As described above, when the averaging processing result is sent to the peak detection circuits 48a and 48b, the peak detection circuit 4
8a and 48b perform peak detection. That is, a peak exceeding a predetermined reference level is detected, and peak information is output. The peak information includes the data of the delay time and the correlation power value. For example, when the result of the averaging process as shown in FIG. 8 is obtained, the peaks exceeding the reference level for the receiving antenna 10a are delayed for the delay times t1, t1.
It is assumed that the values are obtained for 2, t3 and t4. Then, the peak detection circuit 48a detects these four peaks,
The data of the delay time and the correlation power value are compared with the peak value comparing circuit 5
Send to 0. That is, in the result obtained from the receiving antenna 10a in the averaging process result of FIG.
Peaks are obtained at 1, t2, t3, and t4, and their correlation power values are H1, H2, and H2, respectively, as shown in FIG.
When H3 and H4 are set, information on these values is sent to the peak value comparison circuit 50. On the other hand, in the result obtained from the receiving antenna 10b, the delay times t1, t2, t3, t
4 and their correlated power values are shown in FIG.
When H5, H6, H7, and H8 are respectively set as shown in (1), information of these values is sent to the peak value comparison circuit 50. The peak detection performed by the peak detection circuit 48a includes peak position detections O1, O2, O3,.
・ Equivalent to

Then, the peak value comparing circuit 50 extracts a predetermined number of the transmitted peak information from the higher correlation power value and outputs multipath delay information. The multipath delay information includes information on delay time, antenna type, and correlation power value. For example, in the example of FIG. 9, when six peaks are extracted from eight peaks detected in the peak detection, the delay times t1, t2, and t3 for the reception antenna 10a and the delay times for the reception antenna 10b are determined. The times t1, t2, and t3 are extracted, and the information of the delay time, the antenna type, and the correlation power value is used as multipath delay information to generate the despreading code / RAKE combining circuit 60.
Output to

Next, the despreading code generation / RAKE combining circuit 60 performs RAKE combining on the received signal from the receiving amplifier 20a based on the multipath delay information from the delay profile measuring circuit 40. The error correction / frame processing circuit 70 performs various processes such as error correction, error detection, and interleaving. Further, the transmission processing circuit 80 performs processing for transmission such as spread modulation.

Here, the first fluctuation observation circuit 44
a, 44b, the second fluctuation observation circuit 52, and the operation of the intermittent operation control circuit 54 will be described. In FIGS. 4 to 6, “fluctuation observation (first)” means fluctuation observation of the first fluctuation observation circuits 44 a and 44 b, and “fluctuation observation (second)” means This means the fluctuation observation of the second fluctuation observation circuit 52.

When the synchronous addition result is sent from the synchronous addition circuit 42a, the first variation observation circuit 44a observes the variation and determines whether there is a variation detection. That is,
It is determined whether the mobile terminal A is in a moving state.

The determination is made as follows. That is, the peak of the latest averaged delay profile is compared with the peak of the current synchronous addition result, and it is determined whether or not the level exceeds the level allowable range or the time allowable range. That is, when the averaged delay profile shown in FIG. 11 is the latest delay profile, the level allowable range R1 having a predetermined width is set centering on the peak correlation power value obtained in the averaged delay profile. Similarly, a time allowable range R2 of a predetermined width is set around the peak delay time. Then, it is determined whether or not the peak obtained in the target synchronous addition result exceeds the level allowable range or the time allowable range. Actually, each allowable range is set based on the information of the peak value and the delay time from the peak value comparison circuit 50, that is, the multipath delay information.

Then, the first fluctuation observation circuits 44a, 44b
If at least one of the level allowable range and the time allowable range is exceeded, it is determined that fluctuation has been detected.
If at least one of a plurality of paths, that is, at least one of the peaks exceeds the allowable range in at least one of the level allowable range and the time allowable range, it is determined that the fluctuation is detected. The number of the plurality of peaks may be limited to a predetermined number. On the other hand, when there is no change in the peak of the synchronous addition result or when the change is within a predetermined range, it is determined that there is no change detection. That is, when no fluctuation exceeding the predetermined range is detected, it is determined that no fluctuation is detected. The result of the determination as to whether or not there is a fluctuation detected by the first fluctuation observation circuits 44a and 44b is sent from the first fluctuation observation circuits 44a and 44b to the intermittent operation control circuit 54 as a fluctuation detection signal. The fluctuation detection signal in the case where there is no fluctuation detection corresponds to the signal indicating that there is no fluctuation detection.

For example, the previous multipath delay information is shown in FIG.
1 and the result of this synchronous addition is shown in FIG.
In the case shown in (a), since both the level allowable range and the time allowable range fall within the allowable range, it is determined that there is no fluctuation detection.

In the case of FIG. 12B, the delay time itself is within the time allowable range for both the delay times T0 and T1, but the delay time T0 exceeds the level allowable range R1. The case where it is determined to be present is shown. In the case of FIG. 12B, in the synchronous addition result K7 of FIG.
This corresponds to the case where b is detected to have changed. In FIG. 5, the synchronous addition result K6 is compared with the multipath delay information P3.
The delay profile after the latest averaging becomes the multipath delay information P3, and is compared with this. FIG.
In the synchronous addition result in 2 (c), when the delay profile after the previous averaging, that is, the case where the multipath delay information is as shown in FIG. 12 (b), the peak of the multipath delay information is centered. This indicates that the level is out of the allowable range.

In FIGS. 12 and 13, the allowable range indicated by the double-headed arrow in the synchronous addition result indicates the allowable range based on the peak of the latest averaged delay profile. In FIGS. 12 and 13, the allowable range indicated by a double-headed arrow after averaging also indicates the allowable range based on the latest peak of the averaged delay profile.

When the multi-path delay information is sent from the peak value comparing circuit 50, the second fluctuation observation circuit 52 observes the fluctuation and determines whether or not the fluctuation is detected. That is, it is determined whether the mobile terminal A is in a high-speed moving state.

The determination is made as follows. That is, the latest (for example, the previous) multipath delay information is compared with the current multipath delay information, and a determination is made as to whether or not the level exceeds the level allowable range or the time allowable range. That is, what is shown in “after averaging” in FIGS. 12 and 13 is a schematic representation of the multipath delay information in the form of a delay profile.

When the multipath delay information shown in FIG. 13A is the previous time, a level allowable range R1 of a predetermined width is set centering on the peak correlation power value obtained by the multipath delay information. . Similarly, a time allowable range R2 of a predetermined width is set around the peak delay time. Then, it is determined whether or not the peak obtained in the current multipath delay information exceeds the level allowable range or the time allowable range. When at least one of the level allowable range and the time allowable range is exceeded, the second fluctuation observation circuit 52 determines that fluctuation has been detected. That is, at least one of a plurality of paths, that is,
If at least one of the level allowable range and the time allowable range exceeds the allowable range, it is determined that the fluctuation has been detected. The number of the plurality of peaks may be limited to a predetermined number. On the other hand, if there is no change in the peak or if the change is within a predetermined range, it is determined that no change is detected. That is, when no fluctuation exceeding the predetermined range is detected, it is determined that no fluctuation is detected. The result of the determination as to whether or not the fluctuation has been detected by the second fluctuation observation circuit 52 is sent from the second fluctuation observation circuit 52 to the intermittent operation control circuit 54 as a fluctuation detection signal.

For example, the last time (ie, one unit period ago)
13A is shown in FIG. 13A and the result of this time is shown in FIG. 13B, both the level allowable range and the time allowable range are within the allowable range.
In (c), the delay time itself is compared with the previous time in FIG.
Although both are within the time allowable range, since the delay time T0 exceeds the level allowable range R1, it is determined that the fluctuation has been detected.

That is, the multipath delay information generated by the peak value comparison circuit 52 is compared with the previous one, and the fluctuation between the delay time and the correlation power value is checked. If any of the correlation power values exceeds the allowable range, it is determined that the fluctuation has been detected. As described below, if there is no multipath delay information one unit period before by performing the intermittent operation, the multipath delay information is compared with the latest one. For example, when comparing the multipath delay information P4 in FIG. 5, the comparison is performed with the multipath delay information P3.

Here, in FIG.
(A) indicates that the mobile terminal A is in a low-speed moving state,
FIG. 13B shows that the mobile terminal A is in a high-speed movement start state, and FIG. 13C shows that the mobile terminal A is in a high-speed movement state.

Although FIG. 9 shows an example in which multipath delay information is extracted for a total of six peaks, FIGS. 11 to 13 show an example in which the number is two. . Note that the second fluctuation observation circuit 52 may detect fluctuations for peaks smaller than the number of peaks extracted as multipath delay information.

Further, the intermittent operation control circuit 54 calculates the fluctuation detection results of the first fluctuation observation circuits 44a and 44b and the second
Control is performed as follows based on the fluctuation detection result of the fluctuation observation circuit 52. That is, the first fluctuation observation circuits 44a, 44
If it is determined that “b” has fluctuation detection, the averaging circuit 46
When the first fluctuation observation circuits 44a and 44b determine that there is no fluctuation for a certain period, the averaging circuits 46a and 46b are operated intermittently, and the second fluctuation observation circuit 52 Stop the operation. Also,
When the second fluctuation observation circuit 52 detects a fluctuation,
The operation of the first fluctuation observation circuits 44a and 44b is stopped.

The specific operation of the intermittent operation control circuit 54 will be described with reference to the flowchart of FIG.
First, the first fluctuation observation circuits 44a and 44b and the second fluctuation observation circuit 52 are activated. That is, immediately after the delay profile measurement circuit 40 is activated, it is not possible to determine whether the mobile terminal A is in the stationary state, the low-speed moving state, or the high-speed moving state, so that the first fluctuation observation circuits 44a and 44b and the second fluctuation observation circuit The circuit 52 is activated. However, if the averaged delay profile is not generated as described above, the fluctuation detection of the first fluctuation observation circuits 42a and 42b cannot be performed. It will be activated at the timing when the information is generated. That is, in the example of FIG. 4, when the multipath delay information P1 is generated, the first variation observation circuits 44a, 44a,
4b, Activate the second fluctuation observation circuit 52. That is, when the synchronous addition result K4 in FIG. 4 is output, the first variation observation circuit 44a, 44b compares the multipath delay information P1 with the multipath delay information P1 to detect variation, and the second variation observation circuit 52 performs multipath detection. Fluctuation detection is performed by comparing the delay information P1 with the multipath delay information P2. In this case, naturally, the level allowable range and the time allowable range are set based on the peak in the multipath delay information P1. That is, when the synchronous addition results K1, K2, and K3 are output, since the multipath delay information has not been generated yet, the fluctuation detection of the first fluctuation observation circuits 44a and 44b is not performed.

Then, the first fluctuation observation circuits 42a, 42b
Performs fluctuation detection, and it is determined whether or not at least one of the first fluctuation observation circuits 42a and 42b determines that fluctuation has been detected (S11, S12). That is, it is determined whether at least one of the first fluctuation observation circuits 42a and 42b has transmitted a fluctuation detection signal indicating that fluctuation has been detected or has transmitted a fluctuation detection signal indicating that no fluctuation has been detected. When performing the fluctuation detection, the first fluctuation observation circuit 4 must be used in advance.
2a and 42b are activated. If there is a change detection, the process proceeds to step S13. If no change is detected, the process proceeds to step S12.

Then, in step S13, the intermittent operation control circuit 54 controls the averaging circuits 46a and 46b to operate normally (S13). That is, in the case of the normal operation, the averaging circuits 46a and 46b perform the averaging process each time the synchronous addition result is transmitted from the synchronous addition circuits 42a and 42b at a predetermined cycle, that is, at each unit period. I do. For example, in the case shown in FIG.
When the synchronous addition results K1, K2, K3, and K4 are output,
Since the averaging circuit 46a performs averaging each time,
This means that normal operation is being performed. That is, the averaging circuit 46a calculates the multiplication result L1 (L2, L3, L4), the addition result M1 (M2, M3, M4), and the multiplication result N1 (N2, N
3, N4).

Next, the second fluctuation observation circuit 52 is started (S14). Specifically, it is determined whether or not the operation of the second fluctuation observation circuit 52 is stopped. If the operation is stopped, the second fluctuation observation circuit 52 is activated. Then, it is determined whether or not the second variation observation circuit 52 has determined that variation has been detected (S15, S16). That is, it is determined whether a change detection signal indicating that a change has been detected or a change detection signal indicating that no change has been detected has been sent from the second change observation circuit 54. If there is a change detection, the process proceeds to step S17. If no change is detected, the process proceeds to step S17.
Move to 19.

If there is fluctuation detection in step S16, the first fluctuation observation circuits 44a and 44b are stopped (S17). That is, since the high-speed movement is detected, the operation of the first fluctuation observation circuits 44a and 44b is stopped on the assumption that the fluctuation detection is unnecessary. FIG. 13 (c)
State is a high-speed movement state, and indicates that the first fluctuation observation circuits 44a and 44b are stopped. In FIGS. 5 and 6, it is described that the fluctuation detection is performed by the first fluctuation observation circuits 44a and 44b when each synchronous addition result is output.
When the operations of the first fluctuation observation circuits 44a and 44b are stopped, fluctuation detection is not performed. After waiting for one unit period (S18), the process returns to step S15.

On the other hand, if there is no fluctuation detection in step S16, the flow shifts to step S19 to activate the first fluctuation observation circuits 44a and 44b (S19). Specifically, it is determined whether or not the operation of the first fluctuation observation circuits 44a and 44b is stopped.
The first variation observation circuits 44a and 44b are activated. In other words, if it has already been activated, it keeps its activated state. Then, after waiting for one unit period (S20), the process returns to step S11.

If there is no change in step S12, it is determined whether or not the state determined to have no change is continuous (S21). That is, it is determined whether or not a continuous non-fluctuation state exists. This determination is made by the intermittent operation control circuit 54. This is determined, for example, based on whether or not a change detection signal indicating that no change has been detected continuously for a predetermined number of times has been sent from the first change detection circuits 44a and 44b. When the fluctuation detection signal indicating that there is no fluctuation detection is continuously transmitted a predetermined number of times, it is determined that the state is the continuous non-variation state. The continuous non-fluctuation state basically indicates that the state where the portable terminal A is stationary continues.

When it is determined that the state is the continuous non-fluctuation state, control is performed so that the averaging circuits 46a and 46b operate intermittently (S22). That is, the intermittent operation control circuit 54 transmits an intermittent operation instruction signal for performing the intermittent operation to the averaging circuits 46a and 46b. Then, upon receiving the intermittent operation instruction signal, the averaging circuits 46a and 46b intermittently perform the averaging process. That is, when the result of the synchronous addition is output from the synchronous addition circuits 42a and 42b, the averaging is performed instead of averaging each time.

That is, in the example shown in FIG. 5, although the synchronous addition results K5, K6, and K7 are sequentially output, the averaging process is performed only on the synchronous addition results K5 and K7. K6 has been thinned out. In this case, the averaging process is thinned out every other time.
That is, the period of the averaging process in the intermittent operation is twice as long as the period of the averaging process in the normal operation. FIG.
In other words, in the example of (1), that is, when the process of step S21 is performed on the synchronous addition result K5, it is determined that the state is the continuous non-fluctuation state, and the intermittent operation is started.
It should be noted that FIG. 5 can be considered to be continuous from FIG. 4, and in the case following FIG. 4 to FIG. 5, there is no variation in two consecutive times of the synchronous addition results K4 and K5. This indicates that intermittent operation has started. In addition, the number of times of continuation when it is determined that there is no continuous fluctuation can be arbitrarily set. In this case, assuming that the state when the synchronous addition result K4 is output is shown in FIG. 11, the state when the synchronous addition result K5 is output corresponds to FIG.
FIG. 4 may also lead to FIG. That is, this case corresponds to a case where the normal operation is continued. Further, the example of FIG. 5 may follow the example of FIG. 5 or the example of FIG. 6 may follow. After the example of FIG.
May be continued, or the example of FIG. 6 may be continued.

Note that the switching control between the normal operation and the intermittent operation is simultaneously performed on the two averaging circuits 46a and 46b. Note that, as shown in FIG. 5, the forgetting coefficient used in the averaging process is changed as compared with the case of the normal operation. That is, in order to make the averaging time, that is, one unit period constant between the intermittent operation and the normal operation, the forgetting coefficient α ′ at the time of the intermittent operation is set to the forgetting coefficient α at the time of the normal operation.
And a different value.

If it is determined that the state is the continuous non-fluctuation state, the intermittent operation is performed and the second fluctuation observation circuit 54 is stopped (S23). That is, since the first variation observation circuits 44a and 44b can detect whether the vehicle is in the moving state, particularly the low-speed movement state, the second variation observation circuit 54 is stopped. The state of FIG. 12A indicates that there is no continuous fluctuation, and indicates that the second fluctuation observation circuit 54 is stopped. In FIG. 5, when the synchronous addition result K5 is output, it is determined that there is no variation, and further, it is determined that there is no continuous variation, and an intermittent operation is performed. Information P3
Is output, the operation of the second fluctuation observation circuit 52 is stopped. In FIG. 5, the multipath delay information P4
Is output, it is shown that the second fluctuation observation circuit 52 is detecting fluctuation, but this is determined to be fluctuation detection when a fluctuation of the synchronous addition result K7 is detected. In the case where the fluctuation is not detected, the operation of the second fluctuation observation circuit 52 is stopped and remains in the state. In addition,
In the case of FIG. 5, when it is determined that the fluctuation is detected in the synchronous addition result K6 between the intermittent operations, there is a method of switching to the normal operation and performing the averaging process as shown in the flowchart of FIG. Since the intermittent operation is started by detecting the fluctuation of the synchronous addition result K5, in this case, if it is determined that the next synchronous addition result K7 has the fluctuation detection,
It is preferable to return to normal operation. Then, after waiting for one unit period (S24), the process returns to step S11. On the other hand, if it is determined in step S21 that the variation is not continuous, the process proceeds to step S24.

It is to be noted that, unlike the above, each of the first fluctuation observation circuits 44a and 44b and the second fluctuation observation circuit 52 may transmit a fluctuation detection signal only when it is determined that there is fluctuation. Or vice versa. Also, unlike the above, the first fluctuation observation circuits 44a, 44b, the second
The fluctuation observation circuit 52 observes only the fluctuation amount, and determines whether or not the fluctuation is within an allowable range.
May be performed. The first fluctuation observation circuit 44
The level allowable range and the time allowable range may be the same or different values for a and 44b and the second fluctuation observation circuit 52. In addition, in FIGS. 12 and 13, the case where it is within the level allowable range has been described as an example, but it is needless to say that the present invention is also applied to the case of the time allowable range.

As described above, in the portable terminal A of the present embodiment, the averaging circuits 46a, 46a
6b are operated intermittently, so that the averaging circuits 46a and 46b
, And the power consumption can be reduced. By reducing the operation speed of the averaging circuits 46a and 46b, the peak detection circuits 48a and
8b, the operation speed of the peak value comparison circuit 50 can be reduced. When it is determined that the vehicle is in the high-speed movement state, the first fluctuation observation circuits 44a and 44b are stopped,
Further, when it is determined that the vehicle is in the continuous non-fluctuation state, the second fluctuation observation circuit 54 is stopped, so that the power consumption can be further reduced.

In the above example, the second fluctuation observation circuit 5
4, when the fluctuation is detected, the operation of the first fluctuation observing circuits 44a and 44b is stopped. However, the operation may be continued without stopping the operation. Further, in the above example, when the continuous non-variation is detected, the operation of the second fluctuation observation circuit 54 is described as being stopped. However, the operation may be performed without stopping the operation. Good.

In the intermittent operation, in the above example,
Although the averaging process is described as being thinned out every other time,
Other thinning methods such as thinning once every three times, thinning twice every three times, or randomizing the averaging process may be used.

In the above example, the delay profile measuring circuit 40 has been described as having a series of circuits connected to the peak value comparing circuit 50, that is, a synchronous adding circuit, an averaging circuit, and a peak detecting circuit. Or three or more systems. In that case, the first fluctuation observation circuits for the number of systems are provided. Further, the series of circuits may be one system. In that case, the peak value comparison circuit can be omitted, and the second fluctuation observation circuit checks the fluctuation of the output of the peak detection circuit.

[0073]

According to the delay profile measuring apparatus according to the present invention, when the predetermined fluctuation is not detected, the averaged delay profile is generated intermittently, so that the operation speed of the averaging circuit is suppressed. Thus, power consumption can be reduced.

When the second fluctuation detecting section for detecting the fluctuation of the averaged delay profile detects a predetermined fluctuation, the operation of the fluctuation detecting section for detecting the fluctuation of the instantaneous delay profile is stopped. Can be reduced. In addition, when the state in which the fluctuation detecting unit does not detect the predetermined fluctuation continues for a predetermined period, the operation of the second fluctuation detecting unit is stopped, so that the power consumption can be further reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a circuit configuration of a portable terminal according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a circuit configuration of a delay profile measurement circuit.

FIG. 3 is a circuit diagram showing a configuration of a matched filter.

FIG. 4 is an explanatory diagram for explaining an operation of the delay profile measurement circuit.

FIG. 5 is an explanatory diagram for explaining an operation of the delay profile measurement circuit.

FIG. 6 is an explanatory diagram for explaining an operation of the delay profile measurement circuit.

FIG. 7 is an explanatory diagram for explaining synchronous addition and averaging.

FIG. 8 is an explanatory diagram for explaining synchronous addition and averaging.

FIG. 9 is an explanatory diagram for explaining a peak detection process and a peak value comparison process.

FIG. 10 is a flowchart illustrating the operation of the delay profile measurement circuit, particularly, the operation of the intermittent operation control circuit.

FIG. 11 is a flowchart illustrating the operation of the delay profile measurement circuit, particularly the operation of the first variation observation circuit and the second variation observation circuit.

FIG. 12 is a flowchart illustrating the operation of the delay profile measurement circuit, particularly the operation of the first variation observation circuit and the second variation observation circuit.

FIG. 13 is a flowchart illustrating the operation of the delay profile measurement circuit, particularly the operation of the first variation observation circuit and the second variation observation circuit.

[Explanation of symbols]

 A mobile terminal 40 delay profile measurement circuit 42a, 42b synchronous addition circuit 44a, 44b first variation observation circuit 46a, 46b averaging circuit 48a, 48b peak detection circuit 50 peak value comparison circuit 52 second variation observation circuit 54 intermittent operation control circuit

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5K022 EE02 EE31 5K042 BA00 BA11 CA02 CA12 CA17 CA23 DA01 DA15 EA03 FA06 FA08 FA11 GA01 GA12 GA14 GA15 5K059 DD35 DD41 EE02 5K067 BB04 CC10 CC24 DD47 EE02 EE32 LL11

Claims (11)

[Claims] 1. A delay profile measuring device for measuring a delay profile of a correlation signal derivable from a received signal, which is a signal spread spectrum by a spreading code, and a despreading code, wherein a delay profile is measured every predetermined period based on the correlation signal. A delay profile generation unit that generates a delay profile at the generation timing, a fluctuation detection unit that detects a fluctuation in the correlation signal, and a delay profile generation unit that does not detect a fluctuation exceeding a predetermined range. A control unit for controlling the delay profile generation unit so as to intermittently generate a delay profile by thinning out the generation timing of the delay profile. 2. A delay profile measuring device for measuring a delay profile of a correlation signal derivable from a received signal, which is a signal spread spectrum by a spreading code, and a despreading code, wherein at least a part of the correlation signal is synchronously added. A synchronous addition unit that outputs a synchronous addition result as an instantaneous delay profile; and an averaging unit that averages the synchronous addition result output from the synchronous addition circuit at a timing of a predetermined cycle to output an averaged delay profile. An averaging unit, a fluctuation detecting unit that detects a fluctuation of a synchronous addition result output by the synchronous adding unit, and when the fluctuation detecting unit does not detect a fluctuation exceeding a predetermined range, the averaging unit determines the timing. A control unit for controlling the averaging unit so as to perform intermittent averaging by thinning out. Measuring device. 3. The delay profile measurement device further includes a second variation detection unit that detects a variation in the averaged delay profile output by the averaging unit, wherein the second variation detection unit determines a predetermined range. 3. The delay profile measuring device according to claim 2, wherein when detecting a fluctuation exceeding the threshold, the control unit stops an operation of a fluctuation detection unit that detects a fluctuation of the instantaneous delay profile. 4. A delay profile measuring apparatus for measuring a delay profile of a correlation signal derivable from a received signal, which is a signal spread spectrum by a spreading code, and a despreading code, wherein each of the plurality of antennas receives the received signal. A synchronous adder that synchronously adds at least a part of the correlation signal and outputs a synchronous addition result as an instantaneous delay profile; and a synchronous addition result output from the synchronous addition circuit. A processing unit having an averaging unit that outputs an averaged delay profile by averaging at a timing of a predetermined cycle, and a peak detection unit that detects a peak based on the averaged delay profile; A peak comparing section that compares peaks detected by a peak detecting section in the section and extracts a predetermined number of peaks; A fluctuation detection unit that detects a fluctuation in the synchronous addition result output by the period addition unit; and a fluctuation detection unit that detects a fluctuation in the instantaneous delay profile, when the fluctuation detection unit does not detect a fluctuation beyond a predetermined range, the averaging unit. A delay profile measuring device, comprising: a control unit that controls the averaging unit so as to intermittently perform averaging by thinning out the timing. 5. The delay profile measuring device further comprises:
A second variation detection unit configured to detect a variation of the peak extracted by the peak comparison unit; and when the second variation detection unit detects a variation exceeding a predetermined range, the control unit performs the variation. The delay profile measurement device according to claim 4, wherein the operation of the detection unit is stopped. 6. When the fluctuation detecting section for detecting a fluctuation of the synchronous addition result does not detect a fluctuation exceeding the predetermined range for a predetermined period, the control section controls the second fluctuation detecting section. The delay profile measuring apparatus according to claim 3 or 5, wherein the operation of (1) is stopped. 7. A variation detection unit for detecting variation in the synchronous addition result, wherein the variation detection unit performs variation detection by comparing the synchronous addition result for performing variation detection with the latest averaged delay profile. The delay profile measurement device according to claim 2, 3, 4, 5, or 6. 8. The fluctuation detecting section according to claim 1, wherein the fluctuation detecting section performs fluctuation detection based on a synchronous addition result obtained by synchronously adding correlations of arbitrary symbols in the received signal. 8. The delay profile measuring device according to 6 or 7. 9. The averaging process is intermittently performed when a state in which a fluctuation exceeding a predetermined range is not detected continues for a predetermined period, wherein 1 or 2 or 3 or 4 or 5 or 6 is performed.
Or the delay profile measuring device according to 7 or 8. 10. The apparatus according to claim 1, wherein the fluctuation detecting section outputs a signal indicating that no fluctuation is detected to the control section when the fluctuation exceeding a predetermined range is not detected. Or the delay profile measuring device according to 5 or 6 or 7 or 8 or 9. 11. The predetermined range of the fluctuation is determined by an allowable fluctuation amount of a correlation power value at a predetermined number of peaks included in the correlation signal and an allowable fluctuation amount of a delay time at the predetermined number of peaks. The delay profile measuring device according to claim 1, 2 or 3 or 4 or 5 or 6 or 7 or 8 or 9 or 10.