JP2000277542A5 - - Google Patents

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Publication number
JP2000277542A5
JP2000277542A5 JP1999081786A JP8178699A JP2000277542A5 JP 2000277542 A5 JP2000277542 A5 JP 2000277542A5 JP 1999081786 A JP1999081786 A JP 1999081786A JP 8178699 A JP8178699 A JP 8178699A JP 2000277542 A5 JP2000277542 A5 JP 2000277542A5
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Japan
Prior art keywords
semiconductor chip
semiconductor device
semiconductor
back surface
external connection
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JP1999081786A
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Japanese (ja)
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JP3895884B2 (en
JP2000277542A (en
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Priority to JP08178699A priority Critical patent/JP3895884B2/en
Priority claimed from JP08178699A external-priority patent/JP3895884B2/en
Publication of JP2000277542A publication Critical patent/JP2000277542A/en
Publication of JP2000277542A5 publication Critical patent/JP2000277542A5/ja
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Publication of JP3895884B2 publication Critical patent/JP3895884B2/en
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Claims (16)

半導体チップと、
前記半導体チップ裏面が電気的に固着される搭載部と前記搭載部の周囲から上方に延在する延在部とを備えた導電手段とを有し、
前記導電手段が前記半導体チップ裏面の導出電極として用いられ、前記導電手段を構成する前記延在部の端部が、半導体チップの表面電極が設けられる側に位置する事を特徴とした半導体装置。
A semiconductor chip;
A conductive means having a mounting portion to which the back surface of the semiconductor chip is electrically fixed and an extending portion extending upward from the periphery of the mounting portion;
A semiconductor device characterized in that the conductive means is used as a lead-out electrode on the back surface of the semiconductor chip, and an end portion of the extending portion constituting the conductive means is located on a side where a surface electrode of the semiconductor chip is provided.
表面に外部接続端子を有する半導体チップと、
前記半導体チップ裏面が電気的に固着される搭載部と前記搭載部の周囲から一体で上方に延在する延在部とを備えた導電板とを有し、
前記導電板が前記半導体チップ裏面の導出電極および放熱手段として用いられ、前記導電板を構成する前記延在部の端部が、半導体チップの外部接続端子と実質同一面に位置する事を特徴とした半導体装置。
A semiconductor chip having external connection terminals on the surface;
A conductive plate having a mounting portion to which the back surface of the semiconductor chip is electrically fixed and an extending portion integrally extending from the periphery of the mounting portion;
The conductive plate is used as a lead-out electrode on the back surface of the semiconductor chip and a heat radiating means, and an end portion of the extending portion constituting the conductive plate is located substantially on the same plane as an external connection terminal of the semiconductor chip. Semiconductor device.
前記半導体チップの周辺部に封止用の樹脂が設けられる請求項1または請求項2に記載の半導体装置。    The semiconductor device according to claim 1, wherein a sealing resin is provided in a peripheral portion of the semiconductor chip. 前記延在部は、前記半導体チップの周囲から離間して設けられる請求項1または請求項2に記載の半導体装置  The semiconductor device according to claim 1, wherein the extending portion is provided apart from the periphery of the semiconductor chip. 前記導電手段または前記導電板の裏面形状が平面的に見てその外形寸法として決定される請求項1または請求項2に記載の半導体装置。    3. The semiconductor device according to claim 1, wherein a shape of a back surface of the conductive means or the conductive plate is determined as an external dimension thereof when viewed in a plan view. 前記導電手段または前記導電板の裏面は、吸着・保持または機種名の印字のため、実質平坦に形成される請求項1または請求項2に記載の半導体装置。  3. The semiconductor device according to claim 1, wherein the back surface of the conductive means or the conductive plate is formed substantially flat for adsorption / holding or printing of a model name. 前記延在部と前記導電手段または前記延在部と前記導電板は、L字型に折り曲げられる請求項1または請求項2に記載の半導体装置。    The semiconductor device according to claim 1, wherein the extending portion and the conductive means or the extending portion and the conductive plate are bent in an L shape. 前記導電手段または前記導電板に実装される前記半導体チップは、前記半導体チップの裏面も含めて3端子型の半導体素子である請求項1または請求項2記載の半導体装置。  3. The semiconductor device according to claim 1, wherein the semiconductor chip mounted on the conductive means or the conductive plate is a three-terminal type semiconductor element including a back surface of the semiconductor chip. 前記導電手段または前記導電板に実装される前記半導体チップは、前記半導体チップの裏面も含めて2端子型の半導体素子である請求項1または請求項2記載の半導体装置。  3. The semiconductor device according to claim 1, wherein the semiconductor chip mounted on the conductive means or the conductive plate is a two-terminal type semiconductor element including a back surface of the semiconductor chip. 前記延在部が設けられる前記導電手段または前記導電板の一側辺と対向する他側辺に、共通細条の一側辺と一体で成る接続部が設けられ、前記接続部が切断されることで、前記延在部と前記搭載部が一体で成る前記導電手段または導電板と成る事を特徴とした請求項1または請求項2に記載の半導体装置。  On the other side opposite to one side of the conductive means or the conductive plate provided with the extension, a connection unit integrated with one side of the common strip is provided, and the connection unit is cut. The semiconductor device according to claim 1, wherein the extending portion and the mounting portion form the conductive means or the conductive plate. 半導体チップを搭載する基板と、前記半導体チップの表面側に形成した第1の外部接続端子と、前記第1の外部接続端子とその高さを合致させるように、前記基板に形成した第2の外部接続端子とを具備し、
前記半導体基板の裏面側の電極を前記基板と前記第2の外部接続端子を介して前記半導体基板の表面側に導出し、 前記第1と第2の外部接続端子を対向接着可能なように構成したことを特徴とする半導体装置。
A substrate on which a semiconductor chip is mounted, a first external connection terminal formed on the surface side of the semiconductor chip, and a second external connection formed on the substrate so as to match the height of the first external connection terminal. An external connection terminal,
An electrode on the back surface side of the semiconductor substrate is led out to the front surface side of the semiconductor substrate via the substrate and the second external connection terminal, and the first and second external connection terminals can be bonded to each other. A semiconductor device characterized by that.
前記基板と前記第2の外部接続端子とが一体化してL字型に折り曲げられていることを特徴とする請求項11記載の半導体装置。  12. The semiconductor device according to claim 11, wherein the substrate and the second external connection terminal are integrated and bent into an L shape. 前記半導体チップが3端子素子であることを特徴とする請求項11記載の半導体装置。  The semiconductor device according to claim 11, wherein the semiconductor chip is a three-terminal element. 前記半導体チップが2端子素子であることを特徴とする請求項11記載の半導体装置。  The semiconductor device according to claim 11, wherein the semiconductor chip is a two-terminal element. 前記基板の裏面側の形状が平面視での外形寸法を決定することを特徴とする請求項11記載の半導体装置。  The semiconductor device according to claim 11, wherein the shape of the back surface side of the substrate determines an external dimension in a plan view. 前記半導体チップが露出していることを特徴とする請求項11記載の半導体装置。  12. The semiconductor device according to claim 11, wherein the semiconductor chip is exposed.
JP08178699A 1999-03-25 1999-03-25 Semiconductor device Expired - Lifetime JP3895884B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP08178699A JP3895884B2 (en) 1999-03-25 1999-03-25 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP08178699A JP3895884B2 (en) 1999-03-25 1999-03-25 Semiconductor device

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2004285690A Division JP4017625B2 (en) 2004-09-30 2004-09-30 Manufacturing method of semiconductor device
JP2006311131A Division JP2007073987A (en) 2006-11-17 2006-11-17 Semiconductor module

Publications (3)

Publication Number Publication Date
JP2000277542A JP2000277542A (en) 2000-10-06
JP2000277542A5 true JP2000277542A5 (en) 2005-06-23
JP3895884B2 JP3895884B2 (en) 2007-03-22

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JP08178699A Expired - Lifetime JP3895884B2 (en) 1999-03-25 1999-03-25 Semiconductor device

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JP (1) JP3895884B2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7595547B1 (en) 2005-06-13 2009-09-29 Vishay-Siliconix Semiconductor die package including cup-shaped leadframe
US6744124B1 (en) * 1999-12-10 2004-06-01 Siliconix Incorporated Semiconductor die package including cup-shaped leadframe
JP2002252318A (en) 2001-02-27 2002-09-06 Nec Kansai Ltd Chip-type semiconductor device
JP3942500B2 (en) 2002-07-02 2007-07-11 Necエレクトロニクス株式会社 Manufacturing method of semiconductor device
JP3853263B2 (en) * 2002-07-08 2006-12-06 Necエレクトロニクス株式会社 Semiconductor device
DE10249205B3 (en) * 2002-10-22 2004-08-05 Siemens Ag Power component arrangement for the mechatronic integration of power components
DE10249206B3 (en) * 2002-10-22 2004-07-01 Siemens Ag Method of assembling a power device
US6841865B2 (en) * 2002-11-22 2005-01-11 International Rectifier Corporation Semiconductor device having clips for connecting to external elements
JP4222092B2 (en) 2003-05-07 2009-02-12 富士電機デバイステクノロジー株式会社 Semiconductor wafer, semiconductor device, and semiconductor device manufacturing method
US20070215997A1 (en) * 2006-03-17 2007-09-20 Martin Standing Chip-scale package
EP4044226A1 (en) * 2021-02-16 2022-08-17 Nexperia B.V. A semiconductor device and a method of manufacturing of a semiconductor device

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