JP2000235542A - Data processor and recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To speedily transfer data transfer between plural peripheral equipments while utilizing the functions of a file management system. SOLUTION: A 1st address conversion means 3 converts a physical address of a peripheral equipment 1 into a logical address of a system virtual address space 4a formed in a virtual address space 4. A 2nd address conversion means 5 converts the logical address converted by the means 3 into a logical address in a user processor virtual address space 4b corresponding to a specific user process 6 executed on an OS. A data transfer means 7 executes data transfer based on a direct memory access between a memory 1a of the equipment 1 and another peripheral equipment 8 based on a data transfer request outputted from the user process 6 and specifying the logical address converted by the means 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing device for transferring data between a plurality of boards, and more particularly to a data processing device requiring a large amount of data transfer.

[0002]

2. Description of the Related Art Improvements in computer performance have made it possible to replace tasks conventionally performed by dedicated devices with general-purpose computers. One such device is a video editor. That is, VTR (Video T
It is now possible to use a computer to edit images and sounds such as ape recorders. In this case, image information and audio information are stored in a hard disk device of a computer, and editing is performed using an application program of the computer. Such a video editing system is called a non-linear editing machine.

A non-linear editing machine is superior to a conventional editing system in that it can freely deform and compose an image and there is no deterioration in image quality even when editing is repeated. For example, CG (Computer Graphics)
Is also easy to synthesize. By the way, in a non-linear editing machine, moving image data and the like are stored in a hard disk device.
Another board (for example, a CODEC (coder-decoder)) via an I (Peripheral Component Interconnect) bus
Transfer to the board). When data is transferred between the boards as described above, basically, the data is transferred via a system memory in a personal computer part (non-real-time control unit) in the nonlinear editing machine. That is, two transfer processes are performed: transfer from the board serving as the data source to the system memory and transfer from the system memory to the board serving as the data target. This method is referred to as a first conventional method.

There is also a method of directly transferring data between boards without being affected by software such as an OS (Operating System). This is because DMA (Direct Memory A
ccess) using transfer. DMA transfer is a function basically used when data is transferred from a main storage device (system memory) to a secondary storage device. By applying this function to data transfer between boards, high-speed data transfer can be achieved. Is possible. This method is referred to as a second conventional method.

[0005]

However, any of the conventional methods has the following problems.

In the first conventional method, services (especially file management and memory management, etc.) provided by software (especially OS) can be received, but data transfer must be performed twice, resulting in lower performance. .

The second conventional method has high transfer performance because of direct transmission, but cannot receive services (especially file management) provided by software (especially OS). Therefore, it is effective for data transfer that does not require file management (for example, when image data is transferred to a graphic control board), but cannot be applied when saving data to a hard disk.

For this reason, the first conventional method is used in a system in which software (particularly, OS) service is essential. However, since a non-linear editing machine or the like requires extremely high transfer performance in terms of transferring video data, the first conventional method is inappropriate. That is, in a system that performs video processing such as a non-linear editing machine, it is desired that services of software (especially OS) can be used and high-speed transfer between boards can be performed.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has as its object to provide a data processing apparatus capable of performing high-speed data transfer between peripheral devices while providing the functions of a file management system. I do.

[0010]

According to the present invention, in order to solve the above-mentioned problems, in a data processing apparatus to which a peripheral device equipped with a memory is connected, a physical address of a memory of the peripheral device is replaced by a virtual address for system control. First address conversion means for converting the logical address into a logical address in the address space, and a logical address converted by the first address conversion means into a unique virtual address corresponding to a specific user process running on the operating system. Second address translation means for translating to a logical address in the address space;
Data transfer is performed by direct memory access between the memory of the peripheral device and another peripheral device based on a data transfer request specifying the logical address translated by the second address translation means from the user process. And a data transfer unit.

According to such a data processing apparatus, the physical address of the memory of the peripheral device is converted into the logical address in the virtual address space for system control by the first address conversion means. Next, the logical address converted by the first address conversion means is converted by the second address conversion means into a logical address in a unique virtual address space corresponding to a specific user process running on the operating system. Is converted. When a data transfer request specifying the logical address converted by the second address conversion unit is issued from the user process, the data transfer unit performs direct memory access between the memory of the peripheral device and another peripheral device. Is performed.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram illustrating the principle of the present invention. A peripheral device 1 having a memory 1a is connected to the data processing device of the present invention. An address in the physical address space 2 is assigned to the memory 1a. The first address conversion means 3 converts a physical address of the memory 1a of the peripheral device 1 into a logical address of the system virtual address space 4a provided in the virtual address space 4. The second address translation unit 5 translates the logical address converted by the first address translation unit 3 into a logical address in the user process virtual address space 4b corresponding to the specific user process 6 running on the OS. Convert to The data transfer means 7 receives the second
Based on the data transfer request specifying the logical address converted by the address conversion means 5, the data transfer between the memory 1a of the peripheral device 1 and the other peripheral device 8 is performed by direct memory access. In the example of the figure, a hard disk drive (HDD) 9 is connected to the peripheral device 8, and a process of writing data in the memory 1a to the HDD 9 is performed.

According to such a data processing device, the address of the memory 1a of the peripheral device 1 is defined in the user process virtual address space. Therefore, a data transfer request that directly specifies the address of the memory 1a of the peripheral device 1 from the user process 6 is possible. User process 6
If the data transfer is based on the address designation from the OS, the function on the OS on which the user process is executed can be enjoyed. For example, when data is stored in the HDD 9 as in the example in the figure, the transferred data is saved under the management of the file management system of the OS. Further, since the data transfer means 7 performs the DMA transfer directly from the memory 1a of the peripheral device 1 (not through the main memory of the system), high data transfer efficiency can be obtained.

By applying the present invention to a non-linear editing machine, high-speed transfer of image data becomes possible. Thus, an example in which the present invention is applied to a non-linear editing machine will be described below. The following example will be described while showing a specific example in the case where Windows NT (registered trademark of Microsoft Corporation, USA) is used as the OS.

FIG. 2 is a diagram showing an example of a hardware configuration of the nonlinear editing system. CPU (Central Process
ing Unit) 11 includes other peripheral devices and the system memory 13.
Controls the OS to execute the functions of the OS.
And executes application software executed on the OS. The CPU 11 refers to the address conversion table, and stores the logical address of the virtual memory space in the system memory 1.
3 and a function of converting the physical address of the memory 41a in the CODEC board 41.

The PCI bus controller 12 includes a CPU 1
This is a controller for controlling the PCI bus 21 from the first side. The system memory 13 is a main storage device of the system, and temporarily stores programs executed by the CPU 11 and various data necessary for processing.

The PCI bus 21 is a PCI bus bridge 3
1 to 33 are connected to a plurality of PCI buses 22 to 24. The plurality of PCI buses 21 to 24 are connected to the CPU 1
1 is a bus for performing data transfer between the peripheral device 1 and peripheral devices and data transfer between peripheral devices.

The PCI bus bridges 31 to 33 have a function of electrically connecting individual PCI buses to each other. Further, when data is transferred between devices in one PCI bus, control is performed so that no signal is output to the other PCI bus.

The CODEC board 41 is a PCI bus 2
2. Local CPU bus 51 and DAV (Digital Audio
Visual) bus 52. The CODEC board 41 has a function of compressing and expanding image data. The CODEC board 41 is provided with a memory 41a, and stores image data after processing such as compression and decompression in the memory 41a. CODEC board 41
The output video of DME (Distribut
ed Management Environment) / SW (Switch)
r) Hand over to board 45.

SCSI HBA (Small Computer System I)
An interface host bus adapter) card 42 is connected to the PCI bus 22, and stores data transmitted via the PCI bus 22 in the HDD 43 and transfers data in the HDD 43 to another device via the PCI bus 22. Or to The SCSI HBA card 42 becomes a host of the PCI bus at the time of data transfer, and can control DMA transfer.

The HDD 43 holds data such as video data. The local CPU board 44 is connected to the PCI bus 2
3 and a local CPU bus 51, and has a local CPU. The local CPU controls the operation of a device (in the example shown, the CODEC board 41) connected via the local CPU bus 51 in real time.

The DME / SW board 45 is connected to the PCI bus 2
4 and to a plurality of input / output devices. The DME / SW board 45 performs a process of applying an effect to video data and switching an output destination. Also, the video input set on this board is CODEC
The data is input to the board 41 via the DAV bus 52. The image data sent from the CODEC board 41 is
The video is output via the DME / SW board 45.

The local CPU bus 51 is connected to a local CP
All boards controlled by U and local CPU board 4
4 is connected. The local CPU is used for command transmission for controlling other peripheral devices.

The DAV bus 52 is a bus for transferring video data and audio data converted into digital signals, and is connected to all boards for processing video and audio data. In the illustrated example, the CODEC board 41 and the DME
/ SW board 45 is connected to the DAV bus 52.

Although the non-linear editing machine has an audio board and the like in addition to the elements shown in the figure, it is not shown in FIG.

Next, an outline of the upload process will be described. Here, upload means that video and audio are input from the input device (camera, VCR, etc.) to the HDD 4.
3 is recorded. The data flow at the time of upload will be briefly described as follows.

The video input via the DAV bus 52 is compressed (or uncompressed) by the CODEC board 41 and stored in the memory 41a in the CODEC board 41. Data in the memory 41 a on the CODEC board 41 is recorded on the HDD 43 via the SCSI HBA card 42. The HDD 43 is formatted by the OS, and data to be recorded is recorded on the HDD 43 as contents according to the file management system of the OS.

Further, an outline of the download process will be described. Here, downloading means reproducing the video and audio data recorded on the HDD 43 to a recording device (video deck or monitor) connected to the system. The data flow at the time of downloading will be briefly described as follows.

The data recorded in the HDD 43 is O
From S, it is managed and processed as a file. When playing back the recorded video data using the CODEC board 41,
The contents of the file are read from the HDD 43. The read data is stored in the memory 41a on the CODEC board 41. Then, when the CODEC board 41 is compressed data, it performs a decompression process and sends the data to the DAV bus 52. The data is received by the DME / SW board 45. DME / S
The W board 45 sends the received video data to an output device.

Next, when data is uploaded or downloaded, the CODEC board 41 and the SCSIH
Processing for transferring data to and from the BA card 42 will be described.

In the conventional method, for example, when uploading, the memory 41a of the CODEC board 41
Was transferred to the system memory 13, and then the data was transferred to the SCSIHDA card 42. That is, the data of the CODEC board 41 was recorded in the HDD 43 by the two transfers. That is, in the exchange with the HDD 43,
This is because there is no way to specify the physical address of the memory 41a on the C board 41. When an OS (especially a file system in this case) that manages the HDD 43 is used, a logical address for storing data to be I / O with the HDD 43 is required. Since the OS manages the memory using the virtual address space for the system and the virtual address space for each application, the logical address exists independently for each application. The memory 41a on the CODEC board 41 has a physical address, but is usually mapped in a system (kernel) virtual address space by a driver and is used as a kernel mode logical address. Further, the application has its own logical address space prepared by the OS, and cannot directly access the kernel mode logical address.

Therefore, according to the present invention, the following three processes are prepared as programs constituting the system.
Data transfer from the CODEC board 41 to the SCSIHDA card 42 is realized. (1) Processing for converting a physical address of a memory mounted on a board to a logical address (2) Processing for converting a logical address in one logical address space to another logical address space (3) Reading or writing to a file These processing functions are performed by executing predetermined software on the CPU 11.
It is realized by having

FIG. 3 is a diagram showing processing functions necessary for realizing data transfer. The processing functions necessary for realizing the present invention are provided by the OS 60, the device driver 70, and the application 80.

The OS 60 manages the virtual address space by dividing it into an address space for system control (kernel mode virtual address space) and an address space unique to the process in which the user application is being executed (user mode virtual address space). I have. The OS 60 has a multitasking function for simultaneously executing a plurality of processes (tasks). Each process running simultaneously is given a user mode virtual address space, and each process is free to use the user mode virtual address.

The OS 60 is provided with a memory map management section 61 and a file management system 62. The memory map management unit 61 manages mapping of physical addresses of a real memory onto a virtual address space. Such a mapping can be executed in response to a request from the device driver 70. The file management system 62 includes an HDD
It manages the input and output of files to 43 and so on. For example, operations such as managing a directory (folder) structure and adding a file name and an update time (time stamp) to a file to be stored are performed. NTF on WindowsNT
S (NT File System) corresponds to the file management system.

The device driver 70 has a first address conversion request section 71 and a second address conversion request section 72. The first address translation request unit 71
A processing request for converting a physical address of the memory 41a mounted on the C board 41 into a logical address is output.
This is executed, for example, when the device driver 70 is incorporated into the OS 60. Normally, this corresponds to a process of registering the memory 41a existing on the CODEC board 41 in the OS 60. At this stage, the data is mapped to the kernel mode virtual address space of the OS 60. In this state, the memory 41 existing on the CODEC board 41 directly from the application executed in the user mode.
The logical address of a cannot be specified.

The second address translation request section 72 sends a request for translating a logical address in the kernel mode virtual address space to a user mode virtual address space in the OS6.
Perform for 0. Specifically, the memory space of the memory 41a mapped to the kernel mode virtual address space is converted to a user mode virtual address space that can be used by the application 80. As a result of the processing, the application 80 knows the address of the memory 41a on the CODEC board 41.

The application 80 performs non-linear editing of video data. As a part of the function, a transfer request unit 81 for requesting data transfer is provided. The transfer request unit 81 is realized by, for example, a thread. File read and write timings are performed in accordance with the flow of operation of the entire system. For example, when uploading,
If writing to the HDD 43 at the time when the video data is accumulated in the memory 41a on the CODEC board 41,
The request is notified to the device driver 70 by a hardware interrupt. By notifying the details in the form of a message, the application 80
Know from what address and how much you need to read. At the time of downloading, it is known from the data of the message which data of which position of which file needs to be written to which address. Based on the message,
The application 80 calls a file I / O function such as “ReadFile writeFile”. As the buffer address, the address obtained by the second address translation request unit 72 of the device driver 70 and the address calculated from the message content are used.

The flow of these processes will be described below. FIG.
FIG. 9 is a diagram showing a data transfer processing procedure. [S1] The memory map management unit 61 that has received a request from the first address translation request unit 71 of the device driver 70
Converts the physical address of the memory on the board into a kernel mode virtual address of the OS 60. FIG. 5 shows the flow of the function call of this processing. [S2] The file management system 62 that has received the request from the transfer request unit 81 of the application 80 opens the device object. If the OS 60 is Windows NT, this can be realized by the transfer request unit 81 calling the “CreateFile” function. [S3] The file management system 62, which has received the request from the transfer request unit 81 of the application 80, opens a file object for performing I / O. This is the OS
If Windows 60 is Windows NT, the transfer requesting unit 81 sets “CreateF
You can do this by calling the "ile" function. [S4] The memory map management unit 61 receiving the request from the second address translation request unit 72 of the device driver 70
Converts the logical address in the kernel mode virtual address space into a logical address in the user mode virtual address space that the application 80 can refer to. FIG. 6 shows a flow of a function call of this processing. [S5] The file management system 62, which has received the request from the transfer request unit 81 of the application 80, instructs the SCSI HBA card 42 to actually transfer the data. FIG. 7 shows a flow of a function call for this processing. [S6] The file management system 62 that has received the request from the transfer request unit 81 of the application 80 releases the address. This is because if the OS 60 is Windows NT, the "Device 60"
The “control” function can be realized by the transfer request unit 81 calling. [S7] The memory map management unit 61 receiving the request from the second address translation request unit 72 of the device driver 70
Releases the acquired on-board memory logical address. If the OS 60 is Windows NT, this can be realized by the address conversion request unit 72 calling the “ZnUnmapViewOfSection” function. [S8] The file management system 62, which has received the request from the transfer request unit 81 of the application 80, closes the device object. This is because OS60 is Window
sNT can be realized by the transfer request unit 81 calling a “CloseHandle” function. [S9] The file management system 62, which has received the request from the transfer request unit 81 of the application 80, closes the file object. This is because OS60 is Window
sNT can be realized by the transfer request unit 81 calling a “CloseHandle” function.

FIG. 5 is a diagram showing a procedure for converting to a kernel mode virtual address space. In addition, this processing is all
First address translation request unit 71 of device driver 70
This is a process executed by the memory map management unit 61 having received the request from. [S11] A board is detected. This is because OS60 is Wind
owsNT, the first address translation request unit 71 sets “Hal
You can do this by calling the GetBusData function. [S12] The physical address is converted to a logical address. If the OS 60 is Windows NT, this can be realized by the first address translation request unit 71 calling the “HalTranslateBusAddress” function. [S13] The logical address and size are registered in the OS 60. This can be realized when the OS 60 is Windows NT by the first address conversion request unit 71 calling the “loReportResourceUsage” function.

FIG. 6 is a diagram showing a procedure for converting to a user mode virtual address space. Note that this process is all executed by the memory map management unit 61 that has received a request from the second address translation request unit 72 of the device driver 70. [S21] A new section object is created. This can be realized when the OS 60 is Windows NT by the second address translation request unit 72 calling the “ZwOpenSection” function. [S22] The section is incorporated into the memory map. If the OS 60 is Windows NT, the second address conversion request unit 72 can call the “ZwMapViewOfSection” function. [S23] The section object is released. If the OS 60 is Windows NT, this can be realized by the second address conversion request unit 72 calling the “ZwClose” function.

FIG. 7 is a diagram showing a data transfer processing procedure. Note that this process is all executed by the file management system 62 that has received a request from the transfer request unit 81 of the application 80. [S31] Inquire about the converted address. This can be realized when the transfer request unit 81 calls the "DeviceloControl" function when the OS 60 is Windows NT. [S32] File I / O is performed using the acquired address as a buffer address. This is because OS60 is Wind
owsNT can be realized by the transfer request unit 81 calling a “ReadFile” or “WriteFile” function.

By performing the above processing, CO 2
DMA transfer can be performed between the memory 41a in the DEC board 41 and the HDD 43. Here, the state of the address conversion will be described conceptually.

FIG. 8 is a diagram showing an image of the address space. OS installed in this non-linear editing machine
Has the following three address spaces. -Physical address space representing Physical Memory-System space (kernel mode virtual address space) used by OS kernel (basic part of OS)-Virtual address space of each application (user mode virtual address space) These three address spaces Of these, the actual memory is only in the physical address space. The other two spaces are virtual memory spaces, which are mapped to physical address spaces as entities.

The buffer (in the user mode virtual address space) acquired by an application is scattered in segments (fixed length blocks transferred in units) in the physical address space. This is because the virtual memory system that maps the physical memory to each virtual memory manages and allocates it in a certain segment unit.
This one segment is called a page. Buffers having consecutive virtual addresses (for example, CODEC board 41
Actually, the memory 41a) is distributed on a page basis and exists on a physical address.

In the present invention, in order to define the physical address of the memory 41a of the CODEC board 41 in the user mode virtual address space, a Section object prepared in Windows NT is used. The Section object is a structure serving as management information for allocating a memory in the kernel mode virtual address space to a user mode virtual address space of a certain application.
Although a plurality of applications are running in the user mode virtual address space, a Section object can be allocated to the user mode virtual address space for one of the applications. When the kernel mode virtual address space is used, even if the space is mapped to the user mode virtual address space, the physical addresses are scattered in the physical address space in page units. This means that data that cannot be stored in memory
This is because a process (swap) of storing only necessary data in the memory in units of pages is performed.

However, in the memory 41a on the board such as the CODEC board 41, since all necessary data is stored in the memory 41a, there is no need to perform swap. Therefore, a continuous physical address is allocated to the memory on the board, and a continuous address can be allocated in the kernel mode virtual address space. Therefore, by using the Section object, the physical address of the memory on the card can be mapped as a continuous address in the kernel mode virtual address space. If it is mapped as a continuous address in the user mode virtual address space of the application,
From the application, it is possible to designate the start of the address and the data amount, and issue a transfer request for all data with one command. If a large amount of data is transferred at a continuous address, the DMA of the SCSI HBA card 42
DMA transfer between boards is performed using the transfer function.

As described above, by converting the address of the memory on the board from the kernel mode virtual address space to the user mode virtual address space, a data transfer request directly specifying the data of the memory on the board from the application 80 can be obtained. Can be put out. Then, it becomes possible to execute the DMA transfer between the boards while providing the management function of the file management system 62. As a result, data transfer can be performed efficiently.

The opening of a file for data transfer is executed, for example, at a stage before real-time processing or the like is performed. In the case of WindowsNT4.0, "NO # BUFFER" must be specified as the specification at the time of opening. This is the default (NO # BUFFER not specified), file I / O
In this case, the OS exchanges data with the HDD via the internally prepared memory.

Next, application examples of the present invention will be described.
FIG. 9 is a diagram illustrating another example of a hardware configuration of the nonlinear editing machine. This is to improve the data transfer efficiency by providing individual SCSI HBA cards on a bus separated by a bus bridge.

In this example, the CPU 101 connects the system memory 103 and the PC via the PCI bus controller 102.
It is connected to the I bus 121. The PCI bus 121
It is connected to another PCI bus 122 via the bus bridge 104. Further, the PCI bus 122 is connected to the PCI buses 123 and 12 via separate bus bridges 105 and 106.
4 is connected. The CODE is connected to the PCI bus 123.
The C board 107 and the SCSI HBA card 108 are connected.
10 and the SCSI HBA card 111 are connected. An HDD 109 storing video data is connected to the SCSI HBA card 108,
A card 111 stores the HDD 1 in which audio data is stored.
12 are connected.

By devising the layout of the boards in the system in this way, the bus bandwidth of the entire system can be used efficiently. Specifically, a layout that does not affect each other between data transfer performed in parallel can be realized. In the layout diagram in FIG. 9, the blocks surrounded by broken lines form one data transmission unit.

In a situation where two or more sets of data transfer are performed to the secondary bus side of a certain bus bridge (or PCI bus controller), extra time such as bus arbitration is consumed, and as a result, the data transfer rate is adversely affected. give. Therefore, in this example, the CODEC board 107 and the SCSI HBA card 1 are used as data transfer units.
08, two units of the audio board 110 and the SCSI HBA card 111 are considered. Audio board 1 for uploading and downloading in nonlinear editing
10 and CODEC board 107, respectively,
Data is read or written from the DDs 109 and 112.

In the case of audio and video, the timing of data request cannot be synchronized at all, and it is requested at the required timing in each processing and needs to be processed. Therefore,
HD with CODEC board 107 and video data
SCSI HBA card 108 to which D109 is connected
The layout is devised as one unit, and the SCSI HBA card 111 to which the audio board 110 and the HDD 112 containing the audio data are connected is defined as one unit, and the transmission method using the present invention is used, so that each unit has a bus. Can be used to the fullest. As a result, there are the following advantages. -Between certain boards (in the implementation example, the CODEC board and the SCS)
In data transfer between IHBA cards), the bandwidth of the bus can be used to the maximum. -The time required for transfer can be reduced (realized in less than 1/2 time). The computer resources required for data transfer (specifically, the computational power of the CPU and the system memory) are reduced. In a system in which N sets of data transfer processes are performed in parallel, the maximum data transfer capability is the bus bandwidth * N, and the data transfer capability is improved.

The processing contents of the functions that the above-mentioned nonlinear editing machine should have are described in a program recorded on a computer-readable recording medium, and this program is executed by a computer (non-linear editing machine). Thereby, the above processing is realized by a computer.
Examples of the computer-readable recording medium include a magnetic recording device and a semiconductor memory. When distributing to the market, CD-ROM (Compact Disk Read Only Memor
y) or a program is stored and distributed on a portable recording medium such as a floppy (registered trademark) disk, or stored in a storage device of a computer connected via a network, and transferred to another computer via the network. You can also. When the program is executed by the computer, the program is stored in a hard disk device or the like in the computer, and is loaded into the main memory and executed.

[0056]

As described above, in the present invention, since the address of the memory of the peripheral device is defined in the virtual address space for the user process, the data transfer in which the address of the memory of the peripheral device is directly specified from the user process. Request is possible. As a result, it becomes possible to transfer data by direct memory access between peripheral devices while enjoying the function of the operating system in which the user process is being executed.

[Brief description of the drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is a diagram illustrating an example of a hardware configuration of a nonlinear editing system.

FIG. 3 is a diagram showing processing functions required to realize data transfer.

FIG. 4 is a diagram showing a data transfer processing procedure.

FIG. 5 is a diagram showing a conversion procedure to a kernel mode virtual address space.

FIG. 6 is a diagram showing a conversion procedure to a user mode virtual address space.

FIG. 7 is a diagram showing a data transfer processing procedure.

FIG. 8 is a diagram showing an image of an address space.

FIG. 9 is a diagram illustrating another example of a hardware configuration of the nonlinear editing machine.

[Explanation of symbols]

1 peripheral device, 1a memory, 2 physical address space,
3 ... first address conversion means, 4 ... virtual address space,
4a: System virtual address space; 4b: User process virtual address space; 5: Second address conversion means; 6: User process; 7: Data transfer means; 8: Peripheral equipment; 9: Hard disk drive (HDD)

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G11B 20/10 G11B 20/10 DF Term (Reference) 5B005 JJ12 KK16 LL15 MM31 RR01 TT11 5B014 EA03 HB27 5B060 AB26 AC11 5B061 BA03 DD01 DD11 GG02 5D044 AB01 AB05 BC01 CC04 HL02 HL11

Claims (3)

[Claims] 1. A data processing device to which a peripheral device equipped with a memory is connected, wherein a physical address of a memory of the peripheral device is converted into a logical address in a virtual address space for system control.
And a second for converting the logical address converted by the first address converting means into a logical address in a unique virtual address space corresponding to a specific user process executed on the operating system. And a direct memory between the memory of the peripheral device and another peripheral device based on a data transfer request from the user process that specifies the logical address converted by the second address conversion device. A data processing device, comprising: data transfer means for performing data transfer by access. 2. The peripheral device is mounted on a secondary bus connected to a processor via a bus bridge chip, and the data transfer unit is connected to another peripheral mounted on the secondary bus. 2. The data processing device according to claim 1, wherein data transfer is performed to a device. 3. A recording medium on which a data transfer control program for performing data transfer for a peripheral device equipped with a memory is recorded, wherein a physical address of a memory of the peripheral device is stored in a virtual address space for system control. A first address translation unit that translates the logical address into a logical address, and converts the logical address converted by the first address translation unit into a logical address in a unique virtual address space corresponding to a specific user process executed on an operating system. A second address translation unit for translating to an address, a memory of the peripheral device and another peripheral device, based on a data transfer request from the user process that specifies a logical address translated by the second address translation unit. Data transfer means for performing data transfer by direct memory access during A computer-readable recording medium data transfer control program for causing a computer to function.