JP2000115508A - Picture processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To save power consumption by omitting processing in a case when processing such as the processing of the background of an original can be omitted in the picture data processing of a picture processor. SOLUTION: Picture data ID for the portion of one line inputted from a picture inputting device is stored in a line memory 26 and picture data of an address designated by an address control part 27 is outputted to a same signal judging part 28. The part 28 judges whether this-time input picture data (IDn) is the same as last-time input picture data (IDn-1), and in the case of being not the same, picture-processes it to output as print data PD. In the case of being the same, picture data is not processed but data (PDn-1) processed and outputted last time (this data is held on the outputted side of a binarization circuit 25) is outputted as print data PD of this time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for performing predetermined image processing on image data obtained by scanning a document and then recording the image data on a recording medium.

[0002]

2. Description of the Related Art In a conventional image processing apparatus, an original is scanned by an image input device including a line sensor composed of a CCD or the like and a driving system for scanning the line sensor, and the read image data is transferred to an image processing circuit. After performing desired image processing, the image is recorded on a recording medium by an image recording device.

In scanning of a document, scanning in the main scanning direction is performed by a line sensor, and scanning in the sub-scanning direction is performed by the operation of a driving system. Therefore, image data read by one-line scanning in the main scanning direction is obtained. Are sequentially transferred to the image processing circuit for each scan.

FIG. 17 is a block diagram schematically showing an example of the configuration of the above-mentioned conventional image processing apparatus. The image processing apparatus 100 comprises a line sensor composed of a CCD and a drive system for scanning the line sensor. Image input device 101, image processing circuit 1 for performing desired processing on read image data
02, and an image recording apparatus 103 for printing the processed image data on a recording medium.

FIG. 18 is a block diagram showing details of the configuration of the image processing circuit 102.
U, and a Log conversion circuit 10 therein.
5, MTF correction circuit 106, gamma correction circuit 107,
A value conversion circuit 108 is configured.

The image input device 101 scans a mixed document in which, for example, a continuous tone image and a line image are mixed to generate an analog signal for one line in the main scanning direction, and A / D converts the analog signal. A circuit for quantizing as continuous tone reflectance data in which one pixel has a value of, for example, 8 bits (256 tones).

As shown in a timing chart of FIG. 19, the signals output from the CCD are sequentially output one pixel at a time when a vertical effective area signal indicating a valid image area of a document and a horizontal effective area signal are activated.

The log conversion circuit 105 converts the continuous tone reflectance data into a logarithmic relationship with the data.
It is converted into bit continuous tone density data. The MTF correction circuit 106 is also called a sharpness correction circuit, and is a circuit for performing the sharpness correction of the continuous tone density data using a digital filter such as a Laplacian filter.

The gamma correction circuit 107 is provided in the image input device 1
In order to correct the difference between the gradation curve of the image recording apparatus 103 and that of the image recording apparatus 103 to realize the desired gamma characteristic of the entire image processing apparatus, the gradation density is corrected based on the preset gamma correction data. This is a correction circuit to be performed. In this case, in order to set the gamma characteristic which the scanner considers to be desirable, for example, the gamma correction data is set to a look-up table (LUT) of about 256 words and 8 bits and RA is set.
When stored in M, correction can be performed based on the gamma correction data.

A binarization circuit 108 uses the area gradation binarization method such as an error diffusion binarization method to convert the above-mentioned gamma-corrected 8-bit continuous gradation density data into light and dark. This circuit converts 1-bit binary data, that is, black / white binary data. The converted binary data is output to an image recording device 103, for example, an electrophotographic printer or an ink jet printer, and printed on a recording medium.

FIG. 19 is a timing chart for explaining a state in which an original is scanned and image data is output from the CCD. A vertical effective area signal indicating an effective image area in the sub-scanning direction of the original is provided. When the horizontal effective area signal indicating the effective image area in the main scanning direction becomes enable (L), the scanning line L0 is output from the CCD.
Image data of pixel units D0, D1, D2 to Dn-1, D
Output sequentially with n. Thereafter, when the horizontal effective area signal of the next scanning line becomes enable (L), the image data D0, D1, D2 in the pixel unit of the scanning line L1 are similarly provided.
... Dn-1 and Dn are sequentially output, and when scanning up to the scanning line Ln is completed, scanning of the entire surface of one document is completed.

[0012]

In the conventional image processing apparatus described above, an image input circuit 101 is provided in an image processing circuit 102.
, The quantized image signals for one line are sequentially input, and the processing by the image processing circuit is executed for all the input data. Thus, for example,
When a general business document consisting of characters and line images is scanned, image processing is performed on image data such as the background of a document, which may be omitted. There is a problem that the power consumption is increased.

An object of the present invention is to provide an image processing apparatus capable of solving the above-mentioned problems.

[0014]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an image input means for scanning a document and outputting it as image data of a digital signal.
Image processing means for sequentially performing predetermined image processing in predetermined image processing units on input image data input from the image input means, and outputting as output image data;
This time input image data input to the image processing means is:
Determining means for determining whether the input image data is the same as the previous input image data input to the image processing means, wherein the determination means determines whether the current input image data input to the image processing means is the last input image data; When it is determined that the input image data is the same as the input image data, the image processing of the current input image data by the image processing means is prohibited, and the previously processed output image data is used as the current output image data. The output is controlled.

The image processing means includes at least a Log conversion circuit, an MTF correction circuit, a gamma correction circuit, and a binarization circuit.

If the judging means judges that the current input image data inputted to the image processing means is the same as the previous input image data, the log of the image processing means is determined.
The conversion circuit, the MTF correction circuit, the gamma correction circuit, and the binarization circuit are deactivated.

Further, the determination means can determine the identity of the current input image data with the previous input image data on a pixel basis or on a scan line basis.

According to a sixth aspect of the present invention, there is provided an image input means for scanning a document and outputting it as image data of a digital signal, and input image data input from the image input means being provided in a predetermined manner. Image processing means for sequentially performing predetermined image processing for each image area and outputting as output image data;
A document background determination unit for determining whether a density value of the current input image data in image area units input to the image processing unit is equal to or less than a predetermined threshold value indicating a document background; The means prohibits the image processing of the current input image data by the image processing means when the current input image data in image area units input to the image processing means is determined to be the original background. Is controlled so as to output a constant value as the output image data.

The image processing means, when it is determined that the input image data of the predetermined image area unit is the background of the original, stores the input image data in the memory storing the input image data. The address is changed in units of the predetermined image area.

Further, the predetermined image area unit processed by the image processing means is an image area composed of a plurality of scanning lines and a plurality of pixels.

According to a ninth aspect of the present invention, there is provided an image input means for scanning a document and outputting it as image data of a digital signal, and input image data input from the image input means being provided in a predetermined manner. Image processing means for sequentially performing predetermined image processing for each image area and outputting as output image data;
Uniform density area determining means for determining whether or not the predetermined image area is a uniform density area based on a variation in density values of current input image data in image area units input to the image processing means; Wherein the uniform density region determination means comprises:
When it is determined that the current input image data in the image area unit input to the image processing means is a uniform density area, the image processing of the current input image data by the image processing means is prohibited, and the predetermined processing is performed. It is characterized in that a constant value is controlled to be output as output image data.

The image processing means stores the input image data when it is determined that the input image data of the predetermined image area unit is a uniform density area. The address of the memory is changed in the predetermined image area unit.

Further, the predetermined image area unit processed by the image processing means is an image area composed of a plurality of scanning lines and a plurality of pixels.

[0024]

Embodiments of the present invention will be described below.

[First Embodiment] First, a first embodiment will be described. In the first embodiment, image data to be processed (hereinafter referred to as “currently input image data”) obtained by scanning a manuscript with an image input device.
Is the same as the previously input image data (hereinafter, referred to as the previous input image data), the image data previously processed and output without performing the image processing on the current input image data. The data (hereinafter referred to as previously output image data) is output to the image recording apparatus as image data to be output this time (hereinafter referred to as current output image data), and the image processing is omitted. The determination of whether the current input image data is the same as the previous input image data and the image processing are performed in pixel units.
It can also be performed in units of scanning lines.

FIG. 1 is a block diagram for explaining the configuration of the image processing apparatus according to the first embodiment.
Like the conventional image processing apparatus 100 described above with reference to FIG. 17, the image processing apparatus includes an image input device 11, an image processing circuit 12, and an image recording device 13.

Image input device 11 constituting image input means
Has a line sensor composed of a CCD and a drive system for scanning the line sensor. The signal ID output from the image input device 11 is image data input from the image input device 11 to the image processing circuit 12, and the signals IR and IA are image data between the image input device 11 and the image processing circuit 12. This is a control signal for controlling transfer of data. The signal PD is image data (print data) output from the image processing circuit 12 to the image recording device 13.

Image processing apparatus 10 constituting image processing means
The outline of the process will be described. The image input device 11 scans a document and outputs an image data ID for one scanning line (hereinafter referred to as one line) to the image processing circuit 12, and the image data is valid image data. Signal I indicating that there is
An ON signal of R is output to the image processing circuit 12.

The image processing circuit 12 performs predetermined processing described later on the input image data ID for one line, outputs the processed image data PD to the image recording device 13, The processing of the image data ID for the line is completed, and an ON signal of the signal IA indicating the end of the processing and prompting the input of the next image data ID is output to the image input device 11.

When receiving the ON signal of the signal IA, the image input device 11 stops outputting the image data ID (at this point, the image data ID is not valid data),
Turn off R. Then, for the next scanning line, the image data is read, and the image data ID for one line and the ON signal of the signal IR are output to the image processing circuit 12 in the same manner as described above. Hereinafter, the above-described image processing and image recording are repeatedly performed on the entire surface of the document.

FIG. 2 is a block diagram showing the details of the circuit configuration of the image processing circuit 12. As shown in FIG. In FIG. 2, an image processing circuit 12 is constituted by a CPU and controls the input of image data by switching the address of a line memory in which image data input from an image input device is stored. Also, an input control unit 21 having an identical signal determination unit for determining whether or not the current input image data is the same as the previous input image data, a Log conversion circuit 22, and an MTF correction circuit 2
3, a gamma correction circuit 24 and a binarization circuit 25. The Log conversion circuit 22, the MTF correction circuit 23, the gamma correction circuit 24, and the binarization circuit 25 include the Log conversion circuit 105 of the conventional image processing circuit described with reference to FIG.
These correspond to the MTF correction circuit 106, the gamma correction circuit 107, and the binarization circuit 108, respectively, and the functions of the respective circuits are the same.

A signal EN input to each circuit from the input control unit 21 indicates the result of the determination by the same signal determination unit 28 constituting the determination means described later, that is, whether or not the image data is the same signal. Based on the determination result, a Log conversion circuit 22, an MTF correction circuit 23, a gamma correction circuit 2
4, a control signal for controlling the operation of the binarization circuit 25 to be permitted or prohibited. The signal CON input from the input control unit 21 to the binarization circuit 25 is
The signal LD input from the input control unit 21 to the log conversion circuit 22 is image data output as data to be processed based on the determination result of the same signal determination unit 28. .

FIG. 3 is a block diagram for explaining the details of the configuration of the input control unit 21.
6, an address control unit 27 and an identical signal determination unit 28. The line memory 26 stores one line of image data. An address is assigned to the stored image data in units of pixels for the image data to be stored, and the image data can be read in units of pixels by designating the address.

The address control unit 27 includes a line memory 26
This is a circuit for switching the address so that the image data ID stored in the same is output to the same signal determination unit 28 described later.

The same signal judging section 28 includes a line memory 26
Is a circuit for determining whether or not the current input image data is the same as the previous input image data by referring to the pixel-based image data stored in the image data.

Next, the input control unit 21 of the image processing circuit 12
, In particular, the operation of the same signal determination unit 28 constituting the determination means will be described.

The image data ID for one line input from the image input device 11 is stored in the line memory 26.
Here, an image data composed of n pixels in one line
Data is stored. When the image data (one pixel) is read out by specifying the memory address by the address control unit 27 and can be referred to by the same signal determination unit 28, the same signal determination unit 28 I
Dn) is determined to be the same as the previous input image data (IDn-1). It is assumed that the same signal judging section 28 holds the previous input image data (IDn-1).

If the current input image data is not the same as the previous input image data (IDn ≠ IDn-1), the signal EN and the signal CON are turned on and the log conversion circuit 22 and the MTF are turned on.
The correction circuit 23, the gamma correction circuit 24, and the binarization circuit 25 are set to the operating state, and these circuits sequentially process the input image data (IDn) as image data LD to be processed. The processed image data (PDn) is output to the image recording device 13 as the currently output image data PD.

At this time, when the signal MA output from the same signal judging section 28 is turned on, the address control section 27 outputs an address switching signal MC to the line memory 26, and performs processing for the next image data. The image data is output from the line memory 26 to the same signal determination unit 28 one pixel at a time.

If the current input image data is the same as the previous input image data, the signal EN and the signal CON are turned off and the Log conversion circuit 22, MTF correction circuit 23, gamma correction circuit 24 and binarization are performed. The circuit 25 is turned off to prohibit the processing of the current input image data (IDn), and the previous output image data (PDn-1) processed and output the last time (this data is binarized even after the output. 25) is output to the image recording device 13 as the current output image data PD.

At this time, when the address control section 27 receives the OFF signal MA output from the same signal determination section 28, the address control section 27 outputs an address switching signal MC to the line memory 26 to process the next image data. The image data is output from the line memory 26 to the same signal determination unit 28 one pixel at a time.

FIG. 4 shows an example of a circuit when the same signal judging section 28 is configured as hardware.
a and a determination circuit 28b. Same signal determination unit 2
Reference numeral 8 denotes a current input image data (IDn) and a latch circuit 28a.
Is compared with the previous input image data (IDn-1) held by the determination circuit 28b. If they match, 1 is output, and if they do not match, 0 is output.

When the signal is 0, the current input image data
Data (IDn) is processed, and the processed image data (PD
n) is output as the present output image data PD, and when it is 1, the processing of the present input image data (IDn) is not performed, and the data (PDn-1) processed last time is output as the present output image data. TA PD
Output as

FIG. 5 is an example of a flowchart for explaining the judgment processing executed by the CPU when the same signal judgment section 28 is constituted by a CPU. First, the input image data
The data (IDn) is read (step P1), the previous input image data (IDn-1) is read (step P2), and it is determined whether or not the data (IDn) is equal to (IDn-1). (Step P3). If the result of the judgment is (IDn ≠ IDn-
In the case of 1), the input image data (IDn) is processed this time (step P4), and the processed image data (PDn) is processed.
Is output as the output image data PD this time (step P
5). If the result of the determination is (IDn = IDn-1), the processing of the current input image data (IDn) is prohibited (step P6), and the previously processed data (PDn-1) is replaced with the current output image data. -Output as data PD (step P7).

FIGS. 6A to 6E are timing charts for explaining the state of each signal in the image processing apparatus. FIG. 6A shows an effective image area of one scan line to be subjected to image processing. (D) is the input image data ID input from the image input device 11, and (e) is the output image data output from the image processing circuit 12.
3 shows the data PD. 4B shows a control signal IR indicating that the image data ID output from the image input device 11 is valid data, and FIG. 4C shows the control signal IR from the image processing circuit 12 to the image input device 11. A signal IA indicating the end of the image processing to be output and requesting the output of the next image data ID.

When the horizontal effective area signal becomes enable (L), the image input device 11 outputs image data IDn (n: 0).
To n) are sequentially output to the image processing circuit 12, and at the same time, (L) of the control signal IR is output. The image processing circuit 12 determines whether or not the current input image data (IDn) is the same as the previous input data.
Dn-1) is output as the current output image data PD. If they are not the same, the currently processed data (PDn) is output as the current output image data PD. That is, for example,
In FIG. 6, if the last input data (IDn) is the same as the previous input data (IDn-1), the current output image data (PDn)
n) is the same data as the previous output image data (PDn-1).

In the example described above, the image data is processed on a pixel-by-pixel basis. However, this processing can be performed on a line-by-line basis as well as on a pixel-by-pixel basis.

FIG. 7 is a timing chart for explaining a state in which an original is scanned and image data is output from the CCD in units of one line. FIG. A vertical effective area signal indicating an effective image area in the scanning direction is shown, and FIG. 2B is a horizontal effective area signal indicating an effective image area of one scan line to be processed. (C) shows an image signal output from the CCD.

When the vertical effective area signal becomes enable (L) and the horizontal effective area signal becomes enable (L), the CCD outputs image data (D0) of the scanning line L0.
, D1, D2 to Dn-1, Dn) are output. Less than,
When the horizontal effective area signal of the next scanning line becomes enable (L), the image data (D0, D1, D2 to Dn-1, Dn) of line L1 is output as before, and up to line Ln. Is completed, scanning of one original is completed.

FIGS. 8A to 8E are timing charts for explaining the state of each signal in the image processing apparatus. FIG. 8A shows the effective image area of the original in the sub-scanning direction. (D) indicates the input image data ID input from the image input device 11, and (e) indicates the output image data output from the image processing circuit 12.
3 shows the data PD. 2B shows a control signal IR indicating that the image data ID (scan line unit) input from the image input device 11 is valid data, and FIG. 2C shows the control signal IR from the image processing circuit 12. A signal IA indicating the end of image processing output to the image input device 11 and requesting the output of the next image data (scan line unit).

First, when the horizontal effective area signal indicating the effective image area of one scan line to be subjected to image processing becomes enable (L), the image input device 11 sends the scan line Ln.
The image data IDn (line) (n: 0 to n) of (n: 0 to n) are sequentially output to the image processing circuit 12, and the control signal IR indicating that this data is valid data. (L) is output. The image processing circuit 12 determines whether or not the current input image data IDn (line) of the scanning line Ln is the same as the previous input image data. If the same, the previously processed data (PD
n-1 (line)) is output as the current output image data PD (line), and if not the same, the data (PD
n (line)) is output as the current output image data PD (line).

That is, for example, the last input image data in FIG.
When the data IDn (line) is the same as the previous input image data IDn-1 (line), the current output image data (PD (line)) is the previous output image data (PDn-1 (line)). Is the same data as

[Second Embodiment] Next, a second embodiment of the present invention will be described. In the second embodiment, when image data of a specific area obtained by scanning a document is determined to be the background of the document, the image data of the specific area is not subjected to image processing. The image data of the adjacent area processed before that is output to the image recording apparatus as the image data of the specific area to be processed this time, and the image processing is omitted.

FIG. 9 shows the configuration of an image processing device 30 according to the second embodiment, which comprises an image input device 31, an image processing circuit 32, and an image recording device 33. This configuration corresponds to the image processing apparatus of the first embodiment described with reference to FIG.
2. The image recording device 33 corresponds to the image input device 11, the image processing circuit 12, and the image recording device 13 of FIG.
Since their functions are similar, detailed description is omitted.

FIG. 10 is a block diagram showing details of the circuit configuration of the image processing circuit 32. In FIG. 10, an image processing circuit 32 is constituted by a CPU, and switches the address of a line memory in which image data input from an image input device is stored, and inputs image data. An input control unit 41 having an identical signal determination unit for controlling and determining whether the current input image data is the same as the previous input image data, a Log conversion circuit 42, an MTF correction circuit 43, A gamma correction circuit 44 and a binarization circuit 45 are configured. Log conversion circuit 42, MTF correction circuit 4
3. The gamma correction circuit 44 and the binarization circuit 45
The log conversion circuit 22, M of the first embodiment described in
TF correction circuit 23, gamma correction circuit 24, binarization circuit 2
5 respectively, and the function of each circuit is the same.

The signal EN input from the input control unit 41 to each circuit is supplied to a base determination unit 48 constituting a determination unit.
(See FIG. 11), that is, a Log conversion circuit 42, MTF correction circuit 43, gamma correction circuit 44,
This signal controls the operation of the value conversion circuit 45. Also, the signal CON input from the input control unit 41 to the binarization circuit 45
Is a signal for controlling the output of the binarization circuit 45, and the input control unit 4
The signal LD input from 1 to the log conversion circuit 42 is image data output as data to be processed based on the determination result of the background determination unit 48.

FIG. 11 is a block diagram for explaining details of the configuration of the input control unit 41. The input control unit 41 includes a line memory 46, an address control unit 47, and a background determination unit 48. The line memory 46 is composed of a plurality of memory blocks 46a to 46n which are continuously connected in series.
Image data for n lines is stored. An address is assigned to the image data to be stored in the memory in units of pixels, and the image data can be read in units of pixels by designating the address.

It should be noted that in FIG.
Although an example is shown in which the memory blocks 46a to 46e are used, the number is not limited to five, and the required number n can be set arbitrarily. The line memory 46 stores image data I of a plurality of scan lines (n lines) sequentially input from the image input device with a delay of one scan line.
D is stored in memory blocks 46a-46n.

The address controller 47 converts the image data ID stored in the plurality of memory blocks 46a to 46n into
This is a circuit that switches the address so that the address is output to the background determination unit 48 described below or to the Log conversion circuit 42.

The background determining section 48 is a circuit which determines whether or not the image area is the background of the document by referring to the image data stored in the line memory 46.

Next, the operation of the input control unit 41, in particular, the operation of the background judgment unit 48 constituting the judgment means will be described.

The image data ID for a plurality of lines input from the image input device 31 (see FIG. 9) is stored in the line memory 4.
6 are stored in a plurality of memory blocks 46a to 46n. Here, it is assumed that n lines of image data are stored. The n-line image data is sent to the address control unit 4
In FIG. 7, image data in an area consisting of n lines × m pixels can be simultaneously referred to. The background determination unit 48 determines whether or not the image area composed of n lines × m pixels is the background of the document.

The determination as to whether or not the background is made is made by comparing the density values of all the pixels in the area of n lines × m pixels which can be referred to simultaneously by the address control section 47 with a predetermined threshold value indicating the background of the document. If the pixel density value is equal to or less than a predetermined threshold value, it is determined to be “background”. In other words, if a threshold value is set to a level that allows even a small amount of dirt or the like to adhere to a white background portion of a document image, it is determined whether the image data is a base portion or an image portion of the document. It can be easily identified and determined.

The background determination section 48 outputs the following three control signals based on the determination result as to whether or not the image data is the background.

The first signal is generated by the Log conversion circuit 42, MT
F correction circuit 43, gamma correction circuit 44, binarization circuit 45
When the determination result is "not the background", the signal EN is output and the circuits are set to be operable. When the determination result is "the background", the signal EN is output.
Is output to prohibit the operation of these circuits.

The second signal is a signal CON for controlling the output of the binarization circuit 45. When the judgment result is "not the background", the signal CON is turned on to output a normal binary value (1 or 0). The signal CON is turned off and the binary output is fixed to zero (0), that is, fixed to white, which is the color of the background.

The third signal is a signal MA for notifying the address control section 47 of the determination result. When the determination result is "not the background", the signal MA is output to indicate that the determination result is not the background. If the judgment result is “underground”, the signal M
A is output to indicate that it is the background.

The fourth signal switches an address of the line memory 46 by an address switching signal MC output from the address control unit 47 in response to the signal MA notifying the determination result output from the background determination unit 48. That is, when the determination result is "not the background" (signal MA on), the switching signal MC is turned on and the output of one pixel is permitted.

If the result of the determination by the background determination section 48 is "not a background", the signals EN, CON, MA, M
All of C are turned on. First, when the signal EN is turned on, L
The og conversion circuit 42, the MTF correction circuit 43, the gamma correction circuit 44, and the binarization circuit 45 are set to be operable. At the same time, the signal MC from the address control unit 47 is turned on, and the first line from the line memory 46 is The image data is output as image data LD to be processed to the Log conversion circuit 42 one pixel at a time, and is processed. The MTF correction circuit 43, the gamma correction circuit 44, and the binarization circuit 45 sequentially perform predetermined processing. Done.

When the signal CON is turned on, the processed image data PD is output to the image recording apparatus. The above processing is not different from the processing in the conventional image processing apparatus.

Further, the address control section 47 outputs an address switching signal MC to the line memory 46 when receiving the signal MA for informing the judgment result outputted from the background judgment section 48, and processes the next image data. Line memory 4 for
6 outputs the image data one pixel at a time to the background determination section 48.

As a result of the determination by the background determination section 48, if the background is "background", all of the signal EN, the signal CON, the signal MA, and the signal MC are turned off. First, when the signal EN is turned off, Log
Conversion circuit 42, MTF correction circuit 43, gamma correction circuit 4
The operation of the binarization circuit 45 is prohibited, and the output of the binarization circuit 45 is forcibly set to 0 and output when the signal CON is turned off.

Further, the address control unit 47 turns off the signal MA indicating the determination result output from the background determination unit 48 (this signal corresponds to the area of the image data n lines × m pixels stored in the line memory 46). Means that the area stored in the line memory 46 is a background. When the signal MA indicating that the area stored in the line memory 46 is the background is turned off, it is determined that the area is the background of the line memory. An address switching signal MC for jumping over the area (n lines × m pixels) is output to the line memory 46, and the reference address is shifted by n lines and m pixels to jump over the base area and the next n lines × m The address is controlled so as to proceed to the processing of the image data of the pixel area.

FIGS. 12 and 13 are diagrams schematically illustrating the address shift in the address control unit 47. In this example, the area of n lines × m pixels is changed to 5 lines × m.
It is shown as image data of 5 pixels.

That is, FIG. 12 shows a case where it is determined to be “underground”. When the signal MC output from the address control unit 47 is turned off, the reference address is shifted by 5 lines × 5 pixels, and This shows a state in which the user jumps over the area determined to be. FIG. 13 shows a case where it is determined that the pixel is “not a base”, and shows a state in which the reference address is shifted by one pixel for each of the five lines when the signal MC output from the address control unit 47 is turned on. ing.

In the above description, n lines of image data are divided into m pixels each and are simultaneously referred to. In the description of FIGS. 12 and 13, n is a reference area.
The description has been made assuming that the line × m pixels are 5 lines × 5 pixels. However, the reference area is not limited to 5 lines × 5 pixels, and it goes without saying that an appropriate number can be set as needed.

FIG. 14 is a flowchart for explaining the outline of the operation of the input control unit 41. First, the image input device 3
The image data IDs for n lines from 1 (see FIG. 9) are stored in the line memory 46 (step P11).
A determination operation for comparing the area of m pixels with a predetermined threshold value is performed (step P12), and it is determined whether or not the area is the background (step P13).

If the result of the determination in step P13 is "background", the control signal EN is turned off, and the operations of the Log conversion circuit 42, the MTF correction circuit 43, the gamma correction circuit 44, and the binarization circuit 45 are performed. It is prohibited (step P14).
Further, the control signal CON is turned off, and the binarization circuit 4
The output of No. 5 is forcibly set to 0 (step P15).
Further, the control signals MA and MC are turned off, and the address of the line memory is shifted by m pixels (step P1).
6).

It is determined whether the processing of the image data in the n-th line of the line memory is completed (step P17). If the processing is not completed, the process returns to the step P12 in order to perform the processing for the next area of n lines × m pixels. If the processing has been completed, it is determined that the processing of all image data has been completed (step P18). If the processing has not been completed, the processing returns to step P11 to proceed to the processing of the next n-line image data. If the processing has ended, the control operation ends.

If the result of the determination in step P13 is "not the background", the control signal EN is turned on, and the log conversion circuit 42, the MTF correction circuit 43, the gamma correction circuit 44,
And the operation of the binarization circuit 45 is permitted (step P2).
1). Further, the control signal CON is turned on, and the output of the binarization circuit 45 is permitted (step P22). Further, the control signals MA and MC are turned on, and the memory address is shifted by one pixel (step P23).
The process proceeds to step 17 and subsequent steps.

[Third Embodiment] Next, a third embodiment of the present invention will be described. In the third embodiment, it is determined whether or not image data of a specific area obtained by scanning a document is a uniform density area, and if it is determined that the image data is a uniform density area, Without performing image processing on the image data of the specific area, the image data of the adjacent area processed earlier is output to the image recording apparatus as the image data of the specific area to be processed this time, and the image processing is performed. It is omitted.

The configuration of the image processing apparatus according to the third embodiment is composed of an image input device, an image processing circuit, and an image recording apparatus. Basically, the image processing apparatus 3 according to the second embodiment is used.
Since the configuration is the same as that of the image processing apparatus 30 of the second embodiment, the illustration and the description are omitted assuming that the image processing apparatus 30 of the second embodiment is referred to. The image processing circuit according to the third embodiment includes an input control unit that controls the input of an image by switching an address of image data input from an image input device, a Log conversion circuit,
An MTF correction circuit, a gamma correction circuit, and a binarization circuit, and basically, the image processing circuit 32 according to the second embodiment.
Since the configuration is the same as that of the first embodiment, the illustration and the description are omitted assuming that the image processing circuit 32 of the second embodiment is referred to.

FIG. 15 is a block diagram for explaining the details of the configuration of the input control unit 51. The configuration is basically similar to the configuration of the input control unit 41 of the second embodiment. The difference is that the background determination unit 48 of the embodiment is replaced with a uniform density region determination unit 58. Note that various signals IR, ID, IA, LD, EN, CO
N, MA, and MC are the same as the signals with the same symbols in the second embodiment, and thus description thereof is omitted.

The input control section 51 comprises a line memory 56, an address control section 57, and a uniform density area determination section 58. The line memory 56 is composed of a plurality of memory blocks 56a to 56n which are continuously connected in series, and stores image data for n lines. An address is assigned to the image data stored in the line memory in units of pixels, and the image data can be read in units of pixels by designating the address.

In FIG. 11, the line memory 56
An example is shown in which the memory blocks 56a to 56e are used. However, the number is not limited to five, and the required number n can be set arbitrarily. In the line memory 56, image data I of a plurality of scan lines (n lines) sequentially input from the image input device with a delay of one scan line are input.
D is stored in the memory blocks 56a to 56n.

The address control unit 57 converts the image data ID stored in the plurality of memory blocks 56a to 56n into
Output to a uniform density area determination unit 58 described later,
This is a circuit for switching an address so as to output to the conversion circuit 42.

The uniform density area judging section 58 refers to the image data stored in the line memory 56 and judges whether or not the image area is an area of uniform density. The determination process will be described later in detail.

Next, an outline of the operation of the input control unit 51 will be described. The image data IDs of a plurality of lines input from the image input device 31 (see FIG. 9) are stored in a plurality of memory blocks 56a to 56n of the line memory 56. Here, it is assumed that n lines of image data are stored. With respect to the image data of n lines, the image data of an area composed of n lines × m pixels can be simultaneously referred to in the address control unit 57. The uniform density area determination unit 58 determines whether or not the image area composed of n lines × m pixels is an area of uniform density.

The determination as to whether or not the area is the uniform density area is made by determining that the variation of the density values of all the pixels in the area of n lines × m pixels which can be referred to simultaneously by the address control unit 57 is within a predetermined range. It is determined whether or not. If the pixel density value is within a predetermined variation range, it is determined to be “uniform density area”, and if it is out of the predetermined density range, it is determined to be “non-uniform density area”. In other words, if there is no line drawing and the variation of the density value is within a predetermined range, the area is determined to be a uniform density area regardless of the magnitude of the density value.

The uniform density area determining section 58 outputs the following three control signals based on the result of determination as to whether or not the image data is a uniform density area.

The first signal is supplied to the Log conversion circuit 42, MT
F correction circuit 43, gamma correction circuit 44, binarization circuit 45
In the case of the signal EN for performing the operation control (see FIG. 10), if the determination result is "not in the uniform density region", the signal EN is output and these circuits are set to be operable. In the case of the "uniform density region", the signal EN is turned off to stop these circuit operations.

The second signal is a signal CON for controlling the output of the binarization circuit 45 (see FIG. 10). If the result of the determination is "not in the uniform density region", the signal CON is turned on to output a normal signal. A binary value (1 or 0) is output, and when the result of the determination is the "uniform density region", the signal CON is turned off and the binary output is fixed to zero (0), that is, fixed to white.

The third signal is a signal MA for notifying the address control section 57 of the determination result. If the determination result is "not in the uniform density region", the signal MA is output and the determination result indicates the uniform density region. If the determination result is "uniform density area", the signal MA is turned off to indicate that the area is a uniform density area.

The fourth signal is an address switching signal MC output from the address control unit 57 in response to the signal MA notifying the determination result output from the uniform density area determination unit 58, Switch.

That is, the judgment result is “not in a uniform density area”.
In the case of (signal MA ON), ON of the switching signal MC is output to allow output of one pixel.

As a result of the determination by the uniform density area determination section 58,
In the case of "not in the uniform density region", the signal EN and the signal CO
N, the signal MA, and the signal MC are all turned on. First, when the signal EN is turned on, the Log conversion circuit 42, the MTF correction circuit 43, the gamma correction circuit 44, and the binarization circuit 45 (see FIG. 10) are set to be operable. The MC is turned on, and the image data ID of the first line is output from the line memory 56 as the image data LD to be processed to the Log conversion circuit 42 one pixel at a time and processed. Predetermined processing is performed in the correction circuit 44 and the binarization circuit 45 (Log conversion circuit 42, MTF correction circuit 4
3. For the gamma correction circuit 44 and the binarization circuit 45, refer to the circuit of the second embodiment shown in FIG. 10).

When the signal CON is turned on, the processed image data PD is output to the image recording apparatus. The above processing is not different from the processing in the conventional image processing apparatus.

Further, the address control unit 57 outputs a signal M indicating the determination result output from the uniform density region determination unit 58.
When A is turned on, an address switching signal MC is output to the line memory 56, and the image data is output one pixel at a time from the line memory 56 to the uniform density area determination unit 58 for the next image data processing. I do.

As a result of the determination by the uniform density area determination section 58,
In the case of the “uniform density region”, all of the signal EN, the signal CON, the signal MA, and the signal MC are turned off. First, the signal EN
Is turned off, the Log conversion circuit 42 and the MTF correction circuit 4
3, the operations of the gamma correction circuit 44 and the binarization circuit 45 (see FIG. 10) are prohibited, and the output of the binarization circuit 45 is forcibly set to 0 by turning off the signal CON. Is done.

Further, the address control unit 57 outputs a signal M indicating the determination result output from the uniform density region determination unit 58.
A is turned off (this signal means that the area of n lines × m pixels of image data stored in the line memory 56 is a uniform density area), that is, the address control unit 57 When the signal MA indicating that the area stored in the line memory is the uniform density area is turned off, an address switching signal for skipping over the area (n lines × m pixels) determined to be the uniform density area in the line memory. MC is output to the line memory 56, and the reference address for n lines and the pixel m
The address is controlled so that the image data is shifted by one and jumps over the uniform density area, and the process proceeds to the processing of the image data of the next area of n lines × m pixels.

FIG. 16 is a flowchart for explaining the outline of the operation of the input control unit 51. First, the image input device 3
1 (see FIG. 9), the image data IDs for n lines are stored in the line memory 56 (step P31), and n lines x
It is calculated whether or not the density variation is within a predetermined allowable range for the area of m pixels (step P32), and it is determined whether or not the area is a uniform density area (step P33).

If the result of the determination in step P33 is in the "uniform density region", the control signal EN is turned off and the log signal is output.
Conversion circuit 42, MTF correction circuit 43, gamma correction circuit 4
The operation of the binarization circuit 45 (see FIG. 10) is inhibited (step P34). Further, the control signal CON is turned off, and the output of the binarization circuit 45 (see FIG. 10) is forcibly set to 0 (step P35). Further, the control signals MA and MC are turned off, and the memory address is set to m.
The image is shifted by the number of pixels (step P36).

It is determined whether the processing of the image data in the n-th line of the line memory is completed (step P37). If the processing is not completed, the process returns to the step P32 to perform the processing for the next area of n lines × m pixels. If the processing has been completed, it is determined that the processing of all the image data has been completed (step P38). If the processing has not been completed, the processing returns to step P31 to proceed to the processing of the next n-line image data. If the processing has ended, the control operation ends.

If the result of determination in step P33 is "not in a uniform density region", the control signal EN is turned on, and L
The operations of the og conversion circuit 42, the MTF correction circuit 43, the gamma correction circuit 44, and the binarization circuit 45 (see FIG. 10) are permitted (step P41). Further, the control signal CO
N is output, and the output of the binarization circuit 45 (see FIG. 10) is permitted (step P42). Further, the control signal M
A and MC are turned on, the memory address is shifted by one pixel (step P43), and the process proceeds to step P37 and subsequent steps.

In the third embodiment described above, when the variation of the pixel density value is within the predetermined range, it is determined that the pixel is in the “uniform density area”, and the signal CON is turned off. The binary output is fixed to zero (0), that is, white. This is because a general document assumes that white paper is used.

Therefore, for example, when a process such as an inverted image recorded with white characters on a black background is included, the color of an area determined as a “uniform density area” is checked, and a binary output is performed based on the result. Is fixed at “0” (white) or “1” (black).

[0107]

As described above, according to the first aspect of the present invention,
According to the invention, it is determined whether or not the current input image data input to the image processing means is the same as the previous input image data previously input to the image processing means, and determines that the input image data is the same. In this case, image processing of the current input image data by the image processing means is prohibited, and control is performed so that the previously processed output image data is output as the current output image data. Image processing can be omitted, and power consumption for image processing can be saved.

According to the sixth aspect of the present invention, it is determined whether or not the current input image data input to the image processing means is a document base. Since the image processing of the input image data this time is prohibited and the output image data processed last time is controlled to be output as the current output image data, the image processing of the original background which does not need to be processed is performed. Can be omitted, and power consumption for image processing can be saved.

Further, according to the ninth aspect of the present invention, it is determined whether or not the current input image data input to the image processing means is a uniform density area. Since the image processing of the current input image data by the image processing means is inhibited and the output image data processed last time is controlled to be output as the current output image data, there is no need for processing. Image processing of the same density region can be omitted, and power consumption for image processing can be saved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an image processing apparatus according to a first embodiment.

FIG. 2 is a block diagram showing details of the circuit configuration of the image processing circuit according to the first embodiment;

FIG. 3 is a block diagram illustrating details of a configuration of an input control unit according to the first embodiment.

FIG. 4 is a diagram illustrating an example of a circuit configuration when the same signal determination unit according to the first embodiment is configured as hardware.

FIG. 5 is a diagram illustrating the same signal determination unit according to the first embodiment as C
7 is a flowchart for explaining an example of a determination process executed by a CPU when a PU is used.

FIG. 6 is a timing chart illustrating the state of each signal in the image processing apparatus according to the first embodiment.

FIG. 7 illustrates a CC in the image processing apparatus according to the first embodiment.
A timing chart for explaining the state of image data output from D in units of lines.

FIG. 8 is a timing chart illustrating the state of each signal of the image processing apparatus according to the first embodiment.

FIG. 9 is a block diagram illustrating a configuration of an image processing apparatus according to a second embodiment.

FIG. 10 is a block diagram illustrating details of a circuit configuration of an image processing circuit according to a second embodiment.

FIG. 11 is a block diagram illustrating details of the configuration of an input control unit according to the second embodiment.

FIG. 12 is a diagram (part 1) schematically illustrating an address shift in the address control unit according to the second embodiment.

FIG. 13 is a diagram (part 2) schematically illustrating an address shift in the address control unit according to the second embodiment.

FIG. 14 is a flowchart for explaining the outline of the operation of the input control unit according to the second embodiment;

FIG. 15 is a block diagram illustrating details of the configuration of an input control unit according to the third embodiment.

FIG. 16 is a flowchart for explaining the outline of the operation of an input control unit according to the third embodiment;

FIG. 17 is a block diagram illustrating an example of a schematic configuration of a conventional image processing apparatus.

18 is a block diagram showing details of the configuration of the conventional image processing circuit shown in FIG.

19 is a diagram illustrating a conventional image processing circuit shown in FIG.
7 is a timing chart illustrating a state in which image data is output from a CD.

[Explanation of symbols]

 10, 30 Image processing device 11, 31 Image input device 12, 32 Image processing circuit 13, 33 Image recording device 21, 41 Input control unit 22, 42 Log conversion circuit 23, 43 MTF correction circuit 24, 44 Gamma correction circuit 25, 45 Binarization circuit 26, 46, 56 Line memory 27, 47, 57 Address control unit 28 Same signal judgment unit 48 Base judgment unit 58 Uniform density area judgment unit

 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Mitsuru Ohara 2-3-1-13 Azuchicho, Chuo-ku, Osaka-shi, Osaka F-term in Osaka International Building Minolta Co., Ltd. 5C076 AA01 AA40 BA03 BA04 BA08 CA10

Claims (11)

[Claims] An image data of a digital signal is scanned by scanning a document.
Image input means for outputting as image data, and image processing for sequentially performing predetermined image processing in predetermined image processing units on input image data input from the image input means and outputting the output image data as output image data Means, and the current input image data input to the image processing means,
Determining means for determining whether or not the input image data is the same as the previous input image data input to the image processing means, wherein the determining means determines whether the current input image data input to the image processing means is the same as the previous input image data; When it is determined that the input image data is the same as the input image data, the image processing of the current input image data by the image processing means is prohibited, and the previously processed output image data is used as the current output image data. An image processing apparatus that controls output. 2. The image processing means according to claim 1, wherein at least
2. The image processing apparatus according to claim 1, further comprising a conversion circuit, an MTF correction circuit, a gamma correction circuit, and a binarization circuit. 3. The image processing means according to claim 1, wherein said determination means determines that the current input image data input to the image processing means is the same as the previous input image data. 3. The image processing apparatus according to claim 2, wherein the correction circuit, the gamma correction circuit, and the binarization circuit are disabled. 4. The image processing apparatus according to claim 1, wherein said determining means determines the identity of the current input image data and the previous input image data on a pixel-by-pixel basis. 5. The image processing apparatus according to claim 1, wherein said determination means determines the identity of the current input image data and the previous input image data for each scanning line. 6. An image data of a digital signal is scanned by scanning a document.
Image input means for outputting as image data, and image processing for sequentially performing predetermined image processing on input image data input from the image input means in a predetermined image area unit and outputting as output image data Processing means; and document base determination means for determining whether or not the density value of the current input image data in image area units input to the image processing means is equal to or less than a predetermined threshold value indicating the document base, When the original base image determining unit determines that the current input image data in image area units input to the image processing unit is the original base, the image processing unit performs image processing of the current input image data by the image processing unit. Forbids and outputs a predetermined constant value to the output image data.
An image processing apparatus that controls output as data. 7. The image processing means according to claim 1, wherein when the input image data in the unit of the predetermined image area is determined to be the base of the original, the image processing means stores the input image data in the memory storing the input image data. 7. The image processing apparatus according to claim 6, wherein an address is changed for each of the predetermined image areas. 8. The image processing apparatus according to claim 6, wherein said predetermined image area unit processed by said image processing means is an image area composed of a plurality of scanning lines and a plurality of pixels. . 9. An image data of a digital signal is scanned by scanning a document.
Image input means for outputting as image data, and image processing for sequentially performing predetermined image processing on input image data input from the image input means in a predetermined image area unit and outputting as output image data Processing means; and determining whether or not the predetermined image area is a uniform density area, based on a state of variation in density values of current input image data in image area units input to the image processing means. A uniform-density area determining means, wherein the uniform-density area determining means determines that the current input image data in image area units input to the image processing means is a uniform-density area; An image processing apparatus wherein image processing of current input image data by an image processing means is prohibited, and control is performed so as to output a predetermined constant value as output image data. 10. The image processing means stores the input image data when it is determined that the input image data of the predetermined image area unit is a uniform density area. The image processing apparatus according to claim 9, wherein an address of a memory is changed in units of the predetermined image area. 11. The image processing apparatus according to claim 9, wherein said predetermined image area unit processed by said image processing means is an image area composed of a plurality of scanning lines and a plurality of pixels. .