JP2000111867A - Liquid crystal driving power source circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to switch an output impedance of an liquid crystal drive voltage output according to a load condition of a liquid crystal panel. SOLUTION: This liquid crystal driving power source circuit is composed of a reference voltage generation circuit 101 for forming driving voltages at plural levels, voltage-follower type buffer amplifiers 102, 107, 111 for converting V1, V2, and V3 in impedance, comparators 103, 106, 110 provided with input offsets for comparing the outputs of the buffer amplifiers with the inputs of the buffer amplifiers, and load circuits to the driving voltages controlled by the outputs from the comparators. In such a manner, there is the effect of realizing a low current consumption in a liquid crystal driving voltage output circuit by reducing the output impedance of the liquid crystal driving circuit only in a necessary case according to a load of an arbitrary size of a liquid crystal panel. Moreover, it is unnecessary to connect a capacitor for stabilizing the liquid crystal output, and also it becomes possible to reduce the number of parts and the number of terminals of the semiconductor integrated circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a liquid crystal drive power supply circuit for a semiconductor integrated circuit.

[0002]

2. Description of the Related Art In a conventional liquid crystal driving voltage generating circuit, as shown in FIG. 2, the output of a liquid crystal driving voltage VL1 on the VDD side is reduced by a P-type MO as shown in FIG.
The output of the liquid crystal drive voltage VL2 on the VSS side is constituted by the N-type MOS output 308 and the internal load 307 on the VDD side as shown in FIG. . The built-in load is formed by a MOS transistor or a resistance component. At this time, the built-in load of each liquid crystal drive output circuit functions to stabilize the liquid crystal drive voltage output. As shown in FIG. 2, V1 is a liquid crystal reference voltage, and VL1 is an output obtained by impedance-converting the liquid crystal reference voltage V1 by a buffer amplifier circuit connected in a voltage follower. When the size of the liquid crystal panel is large and the load on the liquid crystal driving voltage output VL1 is large, the output of VL1 is pulled to the + potential side or the-potential side. In the case of the VL1 output, since the output stage of the buffer amplifier is composed of a Pch transistor and a load on the VSS side, it is easy to cope with a load on the + potential side. However, depending on the timing of the liquid crystal drive waveform, the output of VL1 may be loaded on the + potential side. At this time, in order to stabilize the output of VL1 and maintain the quality of the liquid crystal display, the output of the buffer amplifier, that is, Ideally, the built-in load on the VSS side built in the power supply circuit has low impedance. However, since current always flows through the built-in load, it is necessary to raise the impedance to some extent in consideration of current consumption in the liquid crystal drive voltage generation circuit. Similarly, the liquid crystal drive voltage VL on the VSS side
Output 2 is composed of an N-type MOS output and a built-in load on the VDD side. Therefore, it is easy to cope with a load change of the VL2 output to the + potential side, but it is possible to cope with a load on the-potential side. Therefore, it is desirable that the internal load on the VDD side has low impedance.

If the size of the liquid crystal panel to be driven is constant, the internal load on the VDD side and the VSS
Although it is possible to design the optimal power supply circuit by setting the internal built-in load, in a general-purpose liquid crystal drive circuit incorporated in a one-chip microcomputer or the like, the size of the liquid crystal panel to be driven is undefined, It has been difficult to provide a liquid crystal drive voltage generation circuit suitable for loads of various liquid crystal panels.

Therefore, in the prior art, as shown in FIG. 4, in order to cope with a load fluctuation at the time of driving waveform switching when a load to the liquid crystal driving voltage output changes greatly during driving of the liquid crystal panel, liquid crystal driving is performed. This was addressed by switching the load in accordance with the timing of the waveform switching.

By increasing the built-in load at the timing of switching of the liquid crystal driving waveform, the output impedance of the buffer amplifier is lowered to cope with fluctuations in the load on the liquid crystal panel. Alternatively, a dedicated terminal for outputting a liquid crystal drive voltage is provided on the semiconductor integrated circuit, a capacitor for stabilizing the drive voltage is connected between the dedicated terminal and a power supply ground, and charge is accumulated in the capacitor. It corresponds to a sudden change in the driving load of the liquid crystal panel when the liquid crystal driving waveform is switched.

[0006]

In the conventional method, it was necessary to connect a capacitor outside the semiconductor integrated circuit in order to stabilize the liquid crystal driving voltage. Therefore, the number of components to be mounted increases, which leads to an increase in mounting cost. On the other hand, since it is necessary to provide a liquid crystal drive output terminal for the semiconductor integrated circuit, there is a problem that the chip size of the semiconductor integrated circuit cannot be reduced.

As a method of reducing the capacitance for stabilizing the liquid crystal driving voltage outside the semiconductor integrated circuit, as shown in FIG. 4, a built-in load current of the liquid crystal driving voltage output is switched at the time of switching of the liquid crystal driving waveform. There is a method to increase the response of the LCD drive voltage output to the LCD panel load by increasing the output impedance and increasing the output impedance.However, since the load current flows regularly regardless of the LCD panel size and load conditions, Power consumption in the liquid crystal drive voltage generation circuit increases. Furthermore, when the size of the liquid crystal panel becomes large and the load for driving the liquid crystal is large, depending on the timing of supplying the internal load current, the time is too short to deteriorate the quality of the liquid crystal display.

[0008]

SUMMARY OF THE INVENTION In a semiconductor integrated circuit, a liquid crystal reference voltage generating circuit for forming a plurality of levels of driving voltages, and impedance conversion of each liquid crystal driving reference voltage formed by the liquid crystal reference voltage generating circuit. A voltage follower type buffer amplifier, and an input offset voltage for comparing the liquid crystal drive voltage output from the buffer amplifier with the liquid crystal drive reference voltage input to the non-inverting input of the buffer amplifier. And a load circuit for the drive voltage controlled by an output from the comparator.

[0009]

According to the present invention, as shown in FIG. 5, a liquid crystal reference voltage V1 and V1 are set to 501 to 507 and 51.
The liquid crystal drive voltage output VL1 whose impedance has been converted by the buffer amplifier composed of
The N-type M connected to the load on the VSS side when the output potential of VL1 is shifted to the VDD side due to the load of the liquid crystal panel.
By turning on the OS transistor 509 to increase the internal load 508 on the VSS side, the liquid crystal driving voltage output VL1
, The output potential VL1 from the buffer amplifier is stabilized. The output voltage of VL1 is V1
If the voltage converges to the same voltage as described above, the N-type MOS transistor 509 is turned off and the internal load is made only the MOS transistor 507, thereby reducing the current consumed in the output stage of the buffer amplifier.

Regarding the liquid crystal drive voltage output VL2 on the VSS side, the output impedance of the buffer amplifier of the liquid crystal drive output VL2 is controlled in the same manner, and the output voltage of VL2 is stabilized.

Further, the MOS transistor 501 and the MOS transistor 514 in the operation amplification stage of the comparator circuit shown in FIG. 5 are formed so that the channel lengths of the transistors are different from each other, whereby the input offset voltage VOF is intentionally provided. ing. The channel length of the MOS transistor 514 is
By making it longer than, the judgment voltage = VL1 + VOF
The positive offset voltage is given. As a result, the N-type MOS transistor connected to the load on the VSS side in the stable state of V1 = VL1 is always ON.
And prevents an increase in current consumption.

As described above, by adopting a similar configuration for each liquid crystal drive voltage output, the above-described effects can be obtained for each voltage output.

[0013]

FIG. 1 is a diagram corresponding to claim 1 of the present invention. In the figure, reference numeral 101 denotes a reference voltage generation circuit for generating a reference voltage for driving a liquid crystal. This reference voltage generation circuit outputs a plurality of levels of reference voltages according to the driving bias of the liquid crystal panel. FIG. 6 shows one example of the reference voltage generating circuit. FIG. 6 shows an example in which a 1/3 bias liquid crystal driving reference voltage is output. The + power supply VDD and the − power supply VSS are divided by fixed resistors R1, R2, R3 and a variable resistor R4, and reference voltages V1 and V for driving the liquid crystal are divided.
2, V3. By making the resistor R4 in the semiconductor device a variable resistor, the liquid crystal drive voltage can be adjusted,
The contrast of the liquid crystal display can be adjusted. In order to reduce the current consumption, the resistance values of R1 to R4 need to be set relatively high, so that the output impedances of V1, V2, and V3 increase.

Reference numerals 102 and 103 in FIG. 1 denote buffer amplifiers for impedance-converting the liquid crystal driving reference voltages V1, V2, and V3 from the liquid crystal driving reference voltage generating circuit, and are connected by voltage followers. VL1,
VL2, VL3 are buffer amplifiers 102, 106, 11
This is the output of the liquid crystal drive voltage whose impedance has been converted by 0. As the load on the liquid crystal panel of VL1, which is an output close to VDD, is mainly the load on the minus side of VL2 and VL3, a P-type MOS output buffer as shown in FIG. 2 is selected. On the contrary, since the load on the liquid crystal panel to the drive voltage output of VL2 and VL3 is mainly on the plus side,
An N-type MOS output buffer as shown in FIG. 3 is selected.

Here, VL1 having a P-type MOS output buffer will be described. Reference numeral 103 in FIG. 1 denotes a comparator for comparing the output VL1 of the buffer amplifier 102 and the voltage level of the non-inverting input V1 of the buffer amplifier. The output of this comparator is connected to the gate of an N-type MOS that controls the internal load of VL1 on the VSS side of 104, and controls the internal load current to VL1. If the voltage level of VL1 input to the non-inverting input of the comparator 103 is higher than the voltage level of V1 input to the inverting input of the comparator 103, the comparator 10
The output of No. 3 is at a high level, and the N-type MOS for controlling the load on VL1 of 105 is turned on. Conversely, the level of VL1 is V1 input to the inverting input of the comparator 103 and the offset voltage VOF applied to the operation stage of the comparator 103.
105 when the voltage is lower than the judgment voltage of the comparator.
N-type MOS is turned off to reduce current consumption. 105
The load of 104 controlled by the N-type MOS transistor is determined in consideration of the manufacturing cost, the area occupied by the load, and the like, and may be formed by a diffusion resistance or a resistance component of ion-implanted POLY. It may be composed of a transistor. Also, depending on the situation, the MOS that controls the load of 104 and the load on VL1 of 104 may be 10
5 is inserted into the VL1 side, and the load of 104 is
It is easily imagined that there is no problem in obtaining the effects of the present invention even if inserted on the S side.

FIG. 5 shows the transistor level 1 according to the present invention.
Two examples are shown. In the figure, VG is an intermediate voltage having a certain value generated by the constant current circuit. This voltage controls the current consumed by the buffer amplifier and the comparator. The buffer amplifier unit that includes the MOS transistors 501 to 507 and the resistor 510 converts the input of V1 into VL1. The N-type MOS transistor 507 is a minimum load for stabilizing VL1. In the present invention, the value of this load current is several microamperes or less, and there is no problem. 5
The comparator is composed of 11 to 515 MOS transistors. The voltage level of V1 and the voltage level of VL1 are compared, and the result is used to control the 509 MOS transistors. The MOS transistors 513 and 514 constituted by the mirror circuit are formed in different sizes so as to have different capabilities in order to have an input offset voltage.

In the case of FIG. 5, the capacity of the MOS transistor 514 is set to be smaller than the capacity of the MOS transistor 513. Thus, the comparator composed of the MOS transistors 511 to 515 has a positive input offset voltage. 514 M
As a method of adjusting the capability of the OS transistor to a small value, it can be easily realized by setting the channel length to be longer than that of the 513 MOS transistor. In addition, it is possible to cope by reducing the channel width. And 513
It can also be realized by adjusting the threshold voltages of 514 and 514 in manufacturing. The output of this comparator is connected to the MOS transistor 509 and the ON / O of the load 508 is turned on.
The FF is controlled. When the MOS 509 is turned on by the output from the comparator, the load current to the VL1 flowing through the load 508 needs to be set to a relatively large value. Of course, in the embodiment of FIG. 5, there is no problem even if the load of 507 is eliminated, but in consideration of the response speed of the comparator, it is more stable to apply a certain load current as configured in 507. Realizes low current consumption operation. VL2,
The same effect can be obtained by configuring a circuit for the output of VL3 in the same manner. However, regarding the VL2 and VL3 outputs of the 1/3 bias liquid crystal drive circuit, the outputs are N-type MOS outputs. As described above, by controlling the load current of the output of the liquid crystal drive voltage according to the load condition of the liquid crystal panel, it is possible to automatically change the output impedance and output a stable liquid crystal drive voltage.

[0018]

According to the present invention, the liquid crystal driving reference voltage is compared with the liquid crystal driving voltage output after the liquid crystal driving reference voltage is subjected to impedance conversion, and the load of the liquid crystal driving voltage output is automatically controlled based on the comparison result. As a result, the output impedance of the liquid crystal drive voltage output can be switched according to the load condition of the liquid crystal panel. This makes it possible to provide optimal liquid crystal drive power supply circuits for a single liquid crystal drive voltage output circuit, from a small liquid crystal panel with a small load to a large liquid crystal panel. Current consumption. Also,
Since the output impedance of the liquid crystal drive voltage output is automatically controlled by the liquid crystal drive voltage output circuit, there is no need to connect a capacitor for stabilizing the liquid crystal drive voltage output outside the IC, and the arrangement of the capacitor connection terminals is reduced. Since it becomes unnecessary, the liquid crystal driving voltage output circuit according to the present invention can provide a small liquid crystal driving voltage output circuit.

[Brief description of the drawings]

FIG. 1 is a liquid crystal drive voltage output circuit diagram showing a circuit configuration according to claim 1 of the present invention.

FIG. 2 shows a Pch-MOS of a conventional liquid crystal drive voltage output circuit.
Output circuit diagram.

FIG. 3 shows an Nch-MOS of a conventional liquid crystal drive voltage output circuit.
Output circuit diagram.

FIG. 4 is a diagram of a conventional liquid crystal drive voltage output circuit.

FIG. 5 shows a Pch-MO of a liquid crystal drive voltage output circuit according to the present invention.
S output detailed circuit diagram.

FIG. 6 is a circuit diagram of a liquid crystal drive reference voltage generation circuit.

[Explanation of symbols]

LCD Reference Voltgen
LCD: Reference voltage generation circuit BUFFER AMP: Operation amplifier connected to a voltage follower for impedance conversion of the liquid crystal reference voltage COMPATOR: Comparator LOAD: Current load circuit for liquid crystal voltage output VDD: .. + -Side power supply VSS... --Side power supply V1... First liquid crystal reference voltage V2... Second liquid crystal reference voltage V3... Third liquid crystal reference voltage VL1. Voltage output VL2... Second liquid crystal drive voltage output VL3... Third liquid crystal drive voltage output VG... Intermediate voltage having a constant value generated by constant current circuit Pch Output... P-type MOS output Nch Output: N-type MOS output LOADResistor: Resistive load LCD Drive Waveform: Liquid crystal drive waveform Vbias: Liquid crystal drive voltage output load control signal R1: First resistance of liquid crystal reference voltage generation circuit R2: Second resistance of liquid crystal reference voltage generation circuit R3: Liquid crystal reference voltage generation Third resistor R4 of circuit R4 fourth variable resistor of liquid crystal reference voltage generating circuit

Claims (1)

[Claims] In a semiconductor integrated circuit, a liquid crystal reference voltage generating circuit for forming a plurality of levels of driving voltages, and a voltage follower for impedance-converting each liquid crystal driving reference voltage formed by the liquid crystal reference voltage generating circuit. A buffer amplifier, and a comparator having an input offset voltage artificially for comparing the liquid crystal driving voltage output from the buffer amplifier with the liquid crystal driving reference voltage input to the non-inverting input of the buffer amplifier. And a load circuit for the drive voltage controlled by an output from the comparator.