JP2000100983A - Electronic part housing package - Google Patents

Electronic part housing package

Info

Publication number
JP2000100983A
JP2000100983A JP10270005A JP27000598A JP2000100983A JP 2000100983 A JP2000100983 A JP 2000100983A JP 10270005 A JP10270005 A JP 10270005A JP 27000598 A JP27000598 A JP 27000598A JP 2000100983 A JP2000100983 A JP 2000100983A
Authority
JP
Japan
Prior art keywords
base
wiring layer
electronic component
metal layer
lid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10270005A
Other languages
Japanese (ja)
Inventor
Yoshihiro Nabe
義博 鍋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP10270005A priority Critical patent/JP2000100983A/en
Publication of JP2000100983A publication Critical patent/JP2000100983A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Abstract

PROBLEM TO BE SOLVED: To provide an electronic part housing package that is equipped with a current path which hardly receives outside noises or transmits noises to the outside and is wound in a thickness direction inside a base, effectively prevents an electronic part housed inside from malfunctioning due to its own noises, and is capable of keeping an electronic part operating normally and stably for a long term. SOLUTION: An electronic part housing package 1 is composed of a base 2 equipped with a signal wiring layer 7, ground wiring layers 8 that sandwich the wiring layer 7 between them, and an electronic part mount A and a lid 3 equipped with a recessed part B that houses electronic parts 4 and 5 mounted on the mount A, where the lid 3 is mounted on the base 2 through the intermediary of a sealer 12 so as to hermetically house the electronic parts 4 and 5 inside. A first metal layer 11 electrically connected to the ground wiring layers 8 is formed on the sides of the base 2 respectively, a second metal layer 13 where triangular prismatic projections 14 of radio wave absorbing material are arranged is provided on the inner wall of the recessed part B, and the second metal layer 13 is electrically connected to the ground wiring layers 8 of the base 2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は電子部品を収納する
ための電子部品収納用パッケージに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component storage package for storing electronic components.

【0002】[0002]

【従来の技術】従来の電子部品収納用パッケージは、内
部に互いに絶縁層を介して上下に配置された信号配線層
・グランド配線層・電源配線層を有し、かつ上面に電子
部品を搭載する搭載部を有する酸化アルミニウム質焼結
体等の電気絶縁材料より成る基体と、同じく酸化アルミ
ニウム質焼結体等の電気絶縁材料より成り、基体の搭載
部に搭載される半導体素子等の電子部品を収容する空所
を形成するための凹部を有する蓋体とから構成されてい
る。そして、基体の搭載部に半導体素子等の電子部品を
搭載固定するとともにこの電子部品の各端子を基体に設
けた信号配線層・グランド配線層・電源配線層に例えば
半田バンプを介して電気的に接続し、しかる後、基体上
に蓋体を内部に電子部品を収容するようにして銀−エポ
キシ樹脂や半田等の導電性接着剤から成る封止材により
接合させることによって、最終製品としての電子装置が
完成する。
2. Description of the Related Art A conventional package for storing electronic parts has a signal wiring layer, a ground wiring layer, and a power supply wiring layer which are disposed vertically above and below each other with an insulating layer therebetween, and mounts the electronic parts on the upper surface. A base made of an electrically insulating material such as an aluminum oxide sintered body having a mounting portion, and an electronic component such as a semiconductor element also made of an electrically insulating material such as an aluminum oxide sintered body and mounted on the mounting portion of the base. And a lid having a concave portion for forming a space for housing. Then, an electronic component such as a semiconductor element is mounted and fixed on the mounting portion of the base, and each terminal of the electronic component is electrically connected to a signal wiring layer, a ground wiring layer, and a power supply wiring layer provided on the base via, for example, a solder bump. After connection, a lid is then placed on the base such that the electronic component is housed inside and joined by a sealing material made of a conductive adhesive such as silver-epoxy resin or solder, so that the electronic product as a final product is formed. The device is completed.

【0003】しかしながら、この従来の電子部品収納用
パッケージは、基体や蓋体に使用されている酸化アルミ
ニウム質焼結体はノイズに対するシールド効果が低いこ
と、および近時の半導体素子等の電子部品は高速駆動が
行われるようになってきておりノイズの影響を受け易い
ものとなってきていること等から、外部の近接位置にノ
イズ発生源があると内部に収容する半導体素子等の電子
部品や基体に設けた信号線にノイズが極めて容易に侵入
し、その結果、侵入したノイズによって半導体素子等の
電子部品の誤動作を発生させてしまうという欠点を有し
ていた。
However, this conventional package for housing electronic parts has a problem that the aluminum oxide sintered body used for the base and the lid has a low shielding effect against noise, and recently, electronic parts such as semiconductor elements have not been used. Since high-speed driving has been performed and it is becoming susceptible to noise, etc., if there is a noise source at an external proximity position, electronic components such as semiconductor elements and bases to be housed inside However, there is a drawback that noise easily invades the signal line provided in the semiconductor device, and as a result, malfunctions of electronic components such as semiconductor elements are caused by the intruded noise.

【0004】また、高速駆動を行なう電子部品はそれ自
体がノイズを発生し易く、電子部品が発生したノイズは
他の装置に入り込んで誤動作等の悪影響を与えるという
問題も有していた。
[0004] Further, there is a problem that an electronic component that performs high-speed driving is liable to generate noise by itself, and the noise generated by the electronic component enters another device to cause adverse effects such as malfunction.

【0005】そこで、このような欠点を解消するため
に、基体に形成されている信号配線層を間に絶縁層を介
してグランド配線層で挟み、かつ蓋体の凹部内壁に金属
層を被着させるとともにこノ金属層を基体のグランド配
線層に電気的に接続させた電子部品収納用パッケージが
提案されている。
Therefore, in order to solve such a drawback, a signal wiring layer formed on a base is sandwiched between ground wiring layers with an insulating layer interposed therebetween, and a metal layer is formed on the inner wall of the concave portion of the lid. In addition, there has been proposed an electronic component housing package in which a metal layer is electrically connected to a ground wiring layer of a base.

【0006】このような電子部品収納用パッケージの例
を図3に示す。
FIG. 3 shows an example of such an electronic component storage package.

【0007】図3において21は基体、22は信号配線層、
23はグランド配線層、24は電源配線層、25は半導体素
子、26は容量素子、29は蓋体、31は金属層である。
In FIG. 3, 21 is a base, 22 is a signal wiring layer,
23 is a ground wiring layer, 24 is a power supply wiring layer, 25 is a semiconductor element, 26 is a capacitor element, 29 is a lid, and 31 is a metal layer.

【0008】基体21には、その内部および表面に信号配
線層22・グランド配線層23・電源配線層24が配設されて
いる。そして、基体21の上面中央部は半導体素子25や容
量素子26等の電子部品を搭載するための搭載部となって
おり、この搭載部には半導体素子25や容量素子26等の電
子部品が搭載される。
The base 21 is provided with a signal wiring layer 22, a ground wiring layer 23, and a power supply wiring layer 24 inside and on the surface thereof. The central portion of the upper surface of the base 21 is a mounting portion for mounting electronic components such as the semiconductor element 25 and the capacitor 26, and electronic components such as the semiconductor element 25 and the capacitor 26 are mounted on this mounting portion. Is done.

【0009】このパッケージでは信号配線層22は基体21
の平面方向に延びる帯状のパターンであり、グランド配
線層23および電源配線層24は基体21の平面方向に広がる
広面積のパターンである。そして、信号配線層22をグラ
ンド配線層23で上下から挟むことにより信号配線層22を
電磁的にシールドしている。
In this package, the signal wiring layer 22 comprises a base 21
The ground wiring layer 23 and the power supply wiring layer 24 are wide patterns extending in the plane direction of the base 21. The signal wiring layer 22 is electromagnetically shielded by sandwiching the signal wiring layer 22 between the ground wiring layer 23 from above and below.

【0010】また、信号配線層22・グランド配線層23・
電源配線層24からは、円柱状の貫通導体22a・23a・24
aがそれぞれ基体21上面の搭載部に延びており、これら
貫通導体22a・23a・24aの搭載部に導出した部位に
は、半導体素子25や容量素子26等の電子部品の各電極と
電気的に接続される接続用パッドが形成されている。そ
して、これらの接続用パッドには半導体素子25や容量素
子26等の電子部品の各電極が半田27を介して接続され
る。
The signal wiring layer 22, the ground wiring layer 23,
From the power supply wiring layer 24, the cylindrical through conductors 22a, 23a, 24
a extend to the mounting portions on the upper surface of the base 21, and the portions led out to the mounting portions of the through conductors 22 a, 23 a, and 24 a are electrically connected to the electrodes of the electronic components such as the semiconductor element 25 and the capacitance element 26. A connection pad to be connected is formed. The electrodes of electronic components such as the semiconductor element 25 and the capacitor element 26 are connected to these connection pads via the solder 27.

【0011】さらに、信号配線層22およびグランド配線
層23ならびに電源配線層24からは、円柱状の貫通導体22
b・23b・24bがそれぞれ基体21下面に延びており、こ
れら貫通導体22b・23b・24bの基体21下面に導出した
部位には、外部接続用端子28が取着される端子用パッド
が形成されている。そして、各端子用パッドには半田ボ
ールから成る外部接続用端子28が溶着されている。
Further, from the signal wiring layer 22, the ground wiring layer 23 and the power supply wiring layer 24, a cylindrical through conductor 22 is formed.
b, 23b, and 24b extend to the lower surface of the base 21, respectively, and terminal pads to which external connection terminals 28 are attached are formed at portions of the through conductors 22b, 23b, and 24b that extend to the lower surface of the base 21. ing. An external connection terminal 28 made of a solder ball is welded to each terminal pad.

【0012】またさらに、基体21の上面外周部の蓋体29
が接合される部位には枠状の封止用金属層30が被着され
ており、この封止用金属層30とグランド配線層23とが円
柱状の貫通導体23cにより電気的に接続されている。
Further, a cover 29 on the outer peripheral portion of the upper surface of the base 21 is provided.
A sealing metal layer 30 in the shape of a frame is adhered to a portion where the metal layer 30 is joined, and the sealing metal layer 30 and the ground wiring layer 23 are electrically connected by the cylindrical through conductor 23c. I have.

【0013】一方、蓋体29には凹部内壁から下面にかけ
て金属層31が被着されており、この金属層31と基体21の
封止用金属層30とを銀−エポキシ樹脂や半田等の導電性
接着剤から成る封止材32を介して接合することにより、
蓋体29が基体21上面に接合されるとともに金属層31がグ
ランド配線層23に電気的に接続される。
On the other hand, a metal layer 31 is attached to the lid 29 from the inner wall of the recess to the lower surface, and the metal layer 31 and the sealing metal layer 30 of the base 21 are formed by a conductive material such as silver-epoxy resin or solder. By joining via a sealing material 32 made of a conductive adhesive,
The lid 29 is joined to the upper surface of the base 21 and the metal layer 31 is electrically connected to the ground wiring layer 23.

【0014】かかる電子部品収納用パッケージによれ
ば、基体21の信号配線層22を上下からグランド配線層23
で挟み、かつ蓋体29の凹部内壁に金属層31を被着させる
とともにこの金属層31を前記基体21のグランド配線層23
に電気的に接続させたことから、基体21に形成した信号
配線層22およびパッケージ内部に収容する半導体素子25
等の電子部品はグランド配線層23および金属層31で電磁
的にシールドされることとなって、基体21に形成した信
号配線層22およびパッケージ内部に収容する半導体素子
25等の電子部品への外部ノイズの侵入を有効に抑制する
ことができる。その結果、内部に収容する半導体素子27
等の電子部品を正常かつ安定に作動させることが可能と
なる。
According to such an electronic component storage package, the signal wiring layer 22 of the base 21 is vertically connected to the ground wiring layer 23.
And a metal layer 31 is applied to the inner wall of the concave portion of the lid 29, and the metal layer 31 is attached to the ground wiring layer 23 of the base 21.
The semiconductor device 25 housed inside the package and the signal wiring layer 22 formed on the base 21 because of being electrically connected to the
The electronic components such as the semiconductor device are electromagnetically shielded by the ground wiring layer 23 and the metal layer 31 so that the signal wiring layer 22 formed on the base 21 and the semiconductor element housed inside the package
Intrusion of external noise into electronic components such as 25 can be effectively suppressed. As a result, the semiconductor element 27 housed inside
And the like can be operated normally and stably.

【0015】また同時に、内部に収容する半導体素子25
等の電子部品等が発生するノイズの外部への漏出が有効
に抑制される。その結果、近接して配置される他の装置
に誤動作等の悪影響を与えることもない。
At the same time, the semiconductor element 25 housed inside
The leakage of noise generated by electronic components and the like to the outside is effectively suppressed. As a result, there is no adverse effect such as erroneous operation on other devices arranged close to each other.

【0016】[0016]

【発明が解決しようとする課題】しかしながら、このよ
うな従来の電子部品収納用パッケージにおいては、基体
21の上下方向からのノイズの侵入の防止については完全
であるものの、基体21の側面方向からのノイズの侵入の
防止に対しては不完全であった。特に、図3中に破線で
示すように例えば容量素子26と半導体素子25との間等に
基体21の厚み方向に巻いた電流径路がある場合、この電
流径路が基体21の側面から侵入するノイズに対してルー
プアンテナとして作用して、基体21の側面から侵入する
ノイズを受信したり、逆に絶縁基体21の側面からノイズ
を発信したりしてしまうという解決すべき課題を有して
いた。
However, in such a conventional package for storing electronic parts, the substrate
Although the prevention of intrusion of noise from the vertical direction of 21 was perfect, the prevention of intrusion of noise from the side of base 21 was incomplete. In particular, when there is a current path wound in the thickness direction of the base 21 between, for example, the capacitive element 26 and the semiconductor element 25 as shown by a broken line in FIG. On the other hand, there is a problem to be solved that acts as a loop antenna to receive noise intruding from the side surface of the base 21 and conversely transmit noise from the side surface of the insulating base 21.

【0017】さらに、パッケージ内部に収容する半導体
素子25等の電子部品が発生したノイズの一部が蓋体29の
凹部内壁に被着させた金属層31で反射して元の電子部品
に入り込み、電子部品がそれ自身が発生したノイズで誤
動作を起こしてしまうという課題も有していた。
Further, a part of noise generated by electronic components such as the semiconductor element 25 housed in the package is reflected by the metal layer 31 attached to the inner wall of the concave portion of the lid 29 and enters the original electronic component. There has also been a problem that an electronic component malfunctions due to noise generated by itself.

【0018】本発明は、基体内部の厚み方向に巻いた電
流径路により外部のノイズを受信したり外部にノイズを
発信することがなく、内部に収容する電子部品がそれ自
身の発するノイズにより誤動作することを有効に防止
し、電子部品を長期間にわたり正常かつ安定に作動させ
ることができる電子部品収納用パッケージを提供するこ
とをその目的とするものである。
The present invention does not receive external noise or transmit noise to the outside due to the current path wound in the thickness direction inside the base, and the electronic components housed therein malfunction due to the noise generated by itself. It is an object of the present invention to provide an electronic component storage package which can effectively prevent the electronic component from operating and can operate the electronic component normally and stably for a long period of time.

【0019】[0019]

【課題を解決するための手段】本発明は、信号配線層お
よびこの信号配線層を上下から挟むグランド配線層を有
するとともに電子部品を搭載するための搭載部を有する
基体と、前記搭載部に搭載される前記電子部品を内部に
収容するための凹部を有する蓋体とから成り、前記基体
と前記蓋体とを封止材を介して接合することによって内
部に前記電子部品を気密に収容するようになした電子部
品収納用パッケージであって、前記基体の側面に前記グ
ランド配線層と電気的に接続された第1金属層を被着す
るとともに前記蓋体の凹部内壁に三角柱形状の電波吸収
材から成る突起が複数個配列された第2金属層を被着さ
せ、かつこの第2金属層を前記基体の前記グランド配線
層に電気的に接続させたことを特徴とするものである。
According to the present invention, there is provided a base having a signal wiring layer, a ground wiring layer sandwiching the signal wiring layer from above and below, and having a mounting portion for mounting an electronic component, and a base mounted on the mounting portion. And a lid having a concave portion for accommodating the electronic component therein, and the electronic component is hermetically accommodated inside by joining the base and the lid via a sealing material. An electronic component storage package, comprising: a first metal layer electrically connected to the ground wiring layer on a side surface of the base; and a triangular prism-shaped radio wave absorbing material on an inner wall of a concave portion of the lid. A second metal layer in which a plurality of protrusions are arranged, and the second metal layer is electrically connected to the ground wiring layer of the base.

【0020】また、本発明は、前記突起を底辺の長さが
0.2 〜1.0 mm、幅が0.2 〜1.0 mm、高さが0.3 〜1.
0 mmの三角柱形状となしたことを特徴とするものであ
る。
Further, according to the present invention, the protrusion has a base length.
0.2-1.0 mm, width 0.2-1.0 mm, height 0.3-1.
It has a triangular prism shape of 0 mm.

【0021】本発明の電子部品収納用パッケージによれ
ば、基体の信号配線層をグランド配線層で挟むとともに
基体側面にグランド配線層と電気的に接続させた第1金
属層を配置し、かつ蓋体の凹部内壁に第2金属層を被着
させるとともにこの第2金属層とグランド配線層とを電
気的に接続させたことから、基体に形成した信号配線層
や電流径路およびパッケージ内部に収容する電子部品は
グランド配線層・第1金属層・第2金属層で完全にシー
ルドされることとなる。その結果、基体に形成した信号
配線層や電流経路およびパッケージ内部に収容する電子
部品に外部ノイズが入り込むことはなく、内部に収容す
る電子部品を正常かつ安定に作動させることが可能とな
る。また、外部にノイズを発信することもない。
According to the electronic component housing package of the present invention, the signal wiring layer of the base is sandwiched between the ground wiring layers, the first metal layer electrically connected to the ground wiring layer is disposed on the side surface of the base, and the lid is provided. Since the second metal layer is applied to the inner wall of the concave portion of the body and the second metal layer is electrically connected to the ground wiring layer, it is accommodated in the signal wiring layer, the current path and the package formed on the base. The electronic component is completely shielded by the ground wiring layer, the first metal layer, and the second metal layer. As a result, external noise does not enter the signal wiring layer and the current path formed on the base and the electronic components housed inside the package, and the electronic components housed inside can be operated normally and stably. Also, no noise is transmitted to the outside.

【0022】さらに、本発明の電子部品収納用パッケー
ジによれば、蓋体の凹部内壁に被着させた金属層に、例
えば底辺の長さが0.2 〜1.0 mm、幅が0.2 〜1.0 m
m、高さが0.3 〜1.0 mmである三角柱形状をなす電波
吸収材から成る突起を複数個配列させたことから、パッ
ケージ内部に収容する電子部品が作動時にノイズを発生
してもそのノイズは突起で放射角度が制御されて元の電
子部品に入り込むことはない。その結果、電子部品を正
常かつ安定に作動させることが可能となる。
Further, according to the electronic component housing package of the present invention, the metal layer attached to the inner wall of the concave portion of the lid has, for example, a base length of 0.2 to 1.0 mm and a width of 0.2 to 1.0 m.
m, a plurality of projections made of a triangular prism-shaped radio wave absorbing material with a height of 0.3 to 1.0 mm are arranged, so that even if the electronic components housed inside the package generate noise during operation, the noise is reduced to the projection. The radiation angle is controlled so that it does not enter the original electronic component. As a result, the electronic component can be operated normally and stably.

【0023】[0023]

【発明の実施の形態】次に、本発明を添付の図面に基づ
き詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings.

【0024】図1は本発明の電子部品収納用パッケージ
として半導体素子を収容する半導体素子収納用パッケー
ジを例に示す断面図であり、半導体素子収納用パッケー
ジ1は、主に基体2と蓋体3とから構成されている。
FIG. 1 is a cross-sectional view showing an example of a package for housing a semiconductor device as a package for housing an electronic component according to the present invention. The package 1 for housing a semiconductor device mainly includes a base 2 and a lid 3. It is composed of

【0025】基体2は、概ね四角形の板状の部材であ
り、酸化アルミニウム質焼結体やムライト質焼結体・酸
化アルミニウム質焼結体・炭化珪素質焼結体・ガラスセ
ラミックス等の電気絶縁材料で構成されている。
The base 2 is a substantially rectangular plate-like member, and is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum oxide sintered body, a silicon carbide sintered body, a glass ceramic, or the like. It is made of material.

【0026】また、基体2の上面中央部には半導体素子
4および容量素子5を搭載する搭載部Aが形成されてお
り、この搭載部Aには半導体素子4および容量素子5が
半田6を介して取着固定される。
A mounting portion A for mounting the semiconductor element 4 and the capacitance element 5 is formed at the center of the upper surface of the base 2, and the semiconductor element 4 and the capacitance element 5 are connected to the mounting section A via the solder 6. And fixed.

【0027】基体2は、例えば酸化アルミニウム質焼結
体から成る場合であれば、酸化アルミニウムおよび酸化
珪素・酸化マグネシウム・酸化カルシウム等の原料粉末
に適当な有機バインダおよび溶剤・可塑剤等を添加混合
して泥漿状となすとともに、この泥漿物をドクターブレ
ード法やカレンダーロール法等によりシート状に成形し
て複数枚のグリーンシート(生シート)を得て、しかる
後、このグリーンシートに適当な打ち抜き加工を施すと
ともに所定の順に積層してグリーンシート積層体とな
し、最後にこのグリーンシート積層体を還元雰囲気中、
約1600℃の温度で焼成することによって製作される。
If the base 2 is made of, for example, an aluminum oxide sintered body, a suitable organic binder, a solvent, a plasticizer and the like are added to aluminum oxide and raw material powders of silicon oxide, magnesium oxide, calcium oxide and the like. The resulting slurry is formed into a sheet by a doctor blade method, a calender roll method, or the like to obtain a plurality of green sheets (raw sheets). Processed and laminated in a predetermined order to form a green sheet laminate, and finally this green sheet laminate in a reducing atmosphere,
It is manufactured by firing at a temperature of about 1600 ° C.

【0028】基体2はまた、その内部および上下面に信
号配線層7・グランド配線層8・電源配線層9が被着形
成されている。これらの信号配線層7・グランド配線層
8・電源配線層9は、半導体素子4の各電極(信号電極
・グランド電極・電源電極)を外部電気回路に接続する
ための導電路として機能する。
The base 2 has a signal wiring layer 7, a ground wiring layer 8, and a power supply wiring layer 9 formed on the inside and on the upper and lower surfaces thereof. These signal wiring layer 7, ground wiring layer 8, and power supply wiring layer 9 function as conductive paths for connecting each electrode (signal electrode, ground electrode, power supply electrode) of the semiconductor element 4 to an external electric circuit.

【0029】信号配線層7は基体2の平面方向に延びる
細い帯状のパターンであり、グランド配線層8および電
源配線層9は基体2の平面方向に広がる広面積のパター
ンである。
The signal wiring layer 7 is a narrow band-shaped pattern extending in the plane direction of the base 2, and the ground wiring layer 8 and the power supply wiring layer 9 are wide-area patterns extending in the plane direction of the base 2.

【0030】そして、信号配線層7はグランド配線層8
で上下から挟まれており、これにより電磁的にシールド
されている。
The signal wiring layer 7 is connected to the ground wiring layer 8
, And are electromagnetically shielded.

【0031】そのため、信号配線層7に上下からノイズ
が入り込もうとしてもそのノイズは上下のグランド配線
層8で遮断され、信号配線層7にノイズが入り込んで半
導体素子4を誤動作させることはない。
Therefore, even if noise enters the signal wiring layer 7 from above and below, the noise is cut off by the upper and lower ground wiring layers 8 and the noise does not enter the signal wiring layer 7 to cause the semiconductor element 4 to malfunction.

【0032】また、信号配線層7・グランド配線層8・
電源配線層9からは円柱状の貫通導体7a・8a・9a
が搭載部A上面に延びており、この貫通導体7a・8a
・9aの搭載部Aに導出した部分には、半導体素子4や
容量素子5等の電子部品の各電極と電気的に接続される
接続用パッドが形成されている。
The signal wiring layer 7, the ground wiring layer 8,
From the power supply wiring layer 9, cylindrical through conductors 7a, 8a, 9a
Extends on the upper surface of the mounting portion A, and the through conductors 7a and 8a
A connection pad electrically connected to each electrode of an electronic component such as the semiconductor element 4 and the capacitance element 5 is formed in a portion led out to the mounting portion A of 9a.

【0033】そして、これらの接続パッドには半導体素
子4の各電極(信号電極・グランド電極・電源電極)お
よび容量素子5の各電極(グランド電極・電源電極)が
半田6を介して接続される。
Each electrode (signal electrode, ground electrode, power supply electrode) of the semiconductor element 4 and each electrode (ground electrode / power supply electrode) of the capacitive element 5 are connected to these connection pads via solder 6. .

【0034】なお、容量素子5はグランド配線層8およ
び電源配線層9を介して半導体素子4と電気的に接続さ
れ、グランド電位や電源電位が過渡的に変動した場合に
この容量素子5から半導体素子4に電荷を供給すること
によりこれらの電位の変動による半導体素子5の誤動作
を防止するためのものであり、容量素子5と半導体素子
4との間には破線で示す電流径路が形成される。
The capacitance element 5 is electrically connected to the semiconductor element 4 via the ground wiring layer 8 and the power supply wiring layer 9, and when the ground potential or the power supply potential fluctuates transiently, the capacitance element 5 is connected to the semiconductor element 4. This is to prevent malfunction of the semiconductor element 5 due to these potential fluctuations by supplying charges to the element 4, and a current path indicated by a broken line is formed between the capacitive element 5 and the semiconductor element 4. .

【0035】さらに、信号配線層7・グランド配線層8
・電源配線層9からは、円柱状の貫通導体7b・8b・
9bがそれぞれ基体2下面に延びており、これら貫通導
体7b・8b・9bで基体2下面に導出した部位には、
外部接続用端子10が取着された端子用パッドが形成され
ている。
Further, the signal wiring layer 7 and the ground wiring layer 8
From the power supply wiring layer 9, cylindrical through conductors 7 b, 8 b.
9b extend to the lower surface of the base 2 respectively, and the portions led out to the lower surface of the base 2 by the through conductors 7b, 8b, 9b include:
A terminal pad to which the external connection terminal 10 is attached is formed.

【0036】なお、外部接続用端子10は、例えば半田ボ
ールからなり、外部接続パッドに溶着されている。
The external connection terminal 10 is made of, for example, a solder ball and is welded to an external connection pad.

【0037】またさらに、基体2の側面から上面外周部
にかけては、グランド配線層8に電気的に接続された第
1金属層11が被着されている。
Further, a first metal layer 11 electrically connected to the ground wiring layer 8 is applied from the side surface of the base 2 to the outer peripheral portion of the upper surface.

【0038】第1金属層11は、基体2の側面から基体2
内部にノイズが侵入するのを防止するとともに基体2の
側面からノイズが外部に放射されるのを防止する作用を
なす。
The first metal layer 11 extends from the side of the base 2
It functions to prevent noise from entering inside and to prevent noise from being radiated to the outside from the side surface of the base 2.

【0039】基体2は、その側面に第1金属層11が被着
されていることから、基体2の内部に側面からノイズが
侵入しようとしてもこのノイズは第1金属層11により遮
断されて基体2の内部に侵入することが有効に防止され
る。従って、例えば基体2内部に破線で示すように基体
2の厚み方向に巻いた電流径路があったとしても、この
電流径路がノイズを受信することは一切なく、これによ
り内部に収容する半導体素子4に誤動作を発生させるよ
うなことはない。同時に、破線で示すような基体2の厚
み方向に巻いた電流経路がノイズを発信したとしても、
このノイズは第1金属層11により遮断されるため、ノイ
ズが基体2の側面から外部に発信されることが有効に防
止され、外部に近接して配置された電子装置に誤動作等
を引き起こすようなこともない。
Since the first metal layer 11 is adhered to the side surface of the base 2, even if noise enters the inside of the base 2 from the side, the noise is blocked by the first metal layer 11 and 2 is effectively prevented from entering. Therefore, for example, even if there is a current path wound in the thickness direction of the base 2 inside the base 2 as shown by a broken line, this current path does not receive any noise, and thus the semiconductor element 4 accommodated inside the base 2 is not received. Does not cause a malfunction. At the same time, even if the current path wound in the thickness direction of the base 2 as indicated by the broken line emits noise,
Since this noise is cut off by the first metal layer 11, the noise is effectively prevented from being transmitted to the outside from the side surface of the base 2, so that an electronic device arranged close to the outside may malfunction or the like. Not even.

【0040】また、第1金属層11で基体2上面外周部に
被着された部位は、基体2に蓋体3を接合するための下
地金属として作用し、この部位には蓋体3が導電性接着
剤から成る封止材12を介して接合される。
The portion of the first metal layer 11 applied to the outer peripheral portion of the upper surface of the base 2 acts as a base metal for joining the cover 3 to the base 2, and the cover 3 is electrically conductive on this portion. It is joined via a sealing material 12 made of a conductive adhesive.

【0041】信号配線層7・グランド配線層8・電源配
線層9・および第1金属層11は、タングステンやモリブ
デン・銅・銀・金等の金属粉末メタライズによって形成
されている。これらは、例えばタングステン等の金属粉
末に適当な有機溶剤・溶媒を添加混合して得た金属ペー
ストを基体2となるグリーンシートの表面ならびにグリ
ーンシート積層体の側面に従来周知のスクリーン印刷法
等の厚膜手法を採用して印刷塗布しておくことによっ
て、基体2の内部および上下面ならびに側面に被着形成
される。
The signal wiring layer 7, the ground wiring layer 8, the power supply wiring layer 9, and the first metal layer 11 are formed by metallization of metal powder such as tungsten, molybdenum, copper, silver, and gold. For example, a metal paste obtained by adding a suitable organic solvent and a solvent to a metal powder such as tungsten is mixed on a surface of a green sheet serving as a substrate 2 and a side surface of a green sheet laminate by a conventionally known screen printing method or the like. By printing and applying the thick film method, the substrate 2 is adhered and formed on the inside, the upper and lower surfaces, and the side surfaces.

【0042】さらに基体2は、その上面に蓋体3が銀−
エポキシ樹脂等の導電性接着剤から成る封止材12を介し
て接合され、これによって基体2と蓋体3とから成る容
器内部に半導体素子4・容量素子5が気密に封止され
る。
Further, the base 2 has a cover 3 on its upper surface which is made of silver-based material.
The semiconductor element 4 and the capacitive element 5 are hermetically sealed in a container formed of the base 2 and the lid 3 through a sealing material 12 made of a conductive adhesive such as an epoxy resin.

【0043】蓋体3は、酸化アルミニウム質焼結体やム
ライト質焼結体・窒化アルミニウム質焼結体・炭化珪素
質焼結体・ガラスセラミックス焼結体等の電気絶縁材料
から成り、その下面中央部に半導体素子4を収容する空
所を形成するための凹部Bが形成された椀状となってい
る。
The lid 3 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, a glass ceramic sintered body, and the lower surface thereof. It has a bowl shape in which a concave portion B for forming a space for accommodating the semiconductor element 4 is formed at the center.

【0044】蓋体3は、例えば酸化アルミニウム質焼結
体から成る場合であれば、酸化アルミニウムおよび酸化
珪素・酸化マグネシウム・酸化カルシウム等の原料粉末
に適当な有機バインダおよび溶剤等を添加混合して得た
原料粉末を所定形状のプレス金型内に充填するとともに
一定圧力を印加して形成し、しかる後、この形成品を約
1500℃の温度で焼成することによって製作される。
If the lid 3 is made of, for example, an aluminum oxide sintered body, a suitable organic binder and a solvent are added to and mixed with aluminum oxide and raw material powders of silicon oxide, magnesium oxide, calcium oxide and the like. The obtained raw material powder is filled into a press die of a predetermined shape and is formed by applying a constant pressure.
It is manufactured by firing at a temperature of 1500 ° C.

【0045】蓋体3はまた、その凹部Bの内壁から基体
2との接合面にかけて銀−パラジウム等の金属から成る
第2金属層13が形成されており、この第2金属層13は基
体2の上面外周部に被着された第1金属層11に銀−エポ
キシ樹脂等の導電性接着剤から成る封止材12を介して電
気的に接続されている。この場合、内部に収容される半
導体素子4は、基体2に設けたグランド配線層8とこの
グランド配線層8に電気的に接続する蓋体3の第2金属
層13とで完全にシールドされ、外部ノイズが蓋体3を介
して入り込むことはなく、内部に収容する半導体素子4
を正常かつ安定に作動させることが可能となる。同時
に、内部に収容する半導体素子4が発生するノイズが蓋
体3を介して外部に漏れることもなくなり、外部装置に
悪影響を与えることもない。
The lid 3 also has a second metal layer 13 made of a metal such as silver-palladium formed from the inner wall of the recess B to the joint surface with the substrate 2. Is electrically connected to a first metal layer 11 adhered to the outer peripheral portion of the upper surface of the first metal layer 11 through a sealing material 12 made of a conductive adhesive such as silver-epoxy resin. In this case, the semiconductor element 4 housed inside is completely shielded by the ground wiring layer 8 provided on the base 2 and the second metal layer 13 of the lid 3 electrically connected to the ground wiring layer 8, The external noise does not enter through the lid 3 and the semiconductor element 4 accommodated inside.
Can be operated normally and stably. At the same time, noise generated by the semiconductor element 4 housed therein does not leak to the outside via the lid 3 and does not adversely affect external devices.

【0046】第2金属層13は、銀粉末およびパラジウム
粉末に適当な有機バインダおよび溶剤を添加混合するこ
とによって得た金属ペーストを蓋体3の凹部B内壁およ
び基体2との接合面に従来周知のスクリーン印刷法によ
り塗布させ、しかる後、これを900 ℃の温度で焼き付け
ることによって蓋体3の凹部B内壁および基体2との接
合面に被着される。
The second metal layer 13 is formed by applying a metal paste obtained by adding a suitable organic binder and a solvent to silver powder and palladium powder and mixing the silver paste and the palladium powder on the inner wall of the recess B of the cover 3 and the joint surface with the base 2. Is applied at a temperature of 900 ° C. to adhere to the inner wall of the concave portion B of the lid 3 and the joint surface with the base 2.

【0047】さらに、蓋体3の凹部B内壁に被着させた
第2金属層13には、図2に示すように三角柱形状の電波
吸収材から成る突起14が複数個配列されている。
Further, on the second metal layer 13 attached to the inner wall of the concave portion B of the lid 3, a plurality of protrusions 14 made of a triangular-prism-shaped radio wave absorbing material are arranged as shown in FIG.

【0048】突起14は、内部に収容する半導体素子4が
作動時に発するノイズの放射方向を制御するとともにノ
イズを吸収する作用をなす。これによって、半導体素子
4が作動時にノイズを発生させたとしてもそのノイズは
突起14で放射角度が制御されるとともに吸収されて元の
半導体素子4に入り込むことはなく、半導体素子4を常
に正常かつ安定に作動させることが可能となる。
The projection 14 controls the radiation direction of the noise generated when the semiconductor element 4 housed therein operates, and also functions to absorb the noise. As a result, even if the semiconductor element 4 generates noise during operation, the noise is controlled by the projection 14 and the radiation angle is controlled, and the noise is not absorbed and enters the original semiconductor element 4. It is possible to operate stably.

【0049】突起14は、例えば発泡ポリスチロールや発
泡ポリウレタン等から成る有機樹脂中に粒径が1〜5μ
m程度の黒鉛粉末を分散含有させて成り、エポキシ樹脂
等の接着剤を介して蓋体3の凹部B内壁に被着させた第
2金属層13に取着される。
The protrusions 14 are made of, for example, an organic resin made of expanded polystyrene, expanded polyurethane or the like and having a particle size of 1 to 5 μm.
About m of graphite powder is dispersed and contained, and is attached to the second metal layer 13 attached to the inner wall of the recess B of the lid 3 via an adhesive such as epoxy resin.

【0050】また突起14は、底辺の長さを0.2 〜1.0 m
m、幅を0.2 〜1.0 mm、高さを0.3 〜1.0 mmの範囲
とした三角柱形状をしており、底辺の長さを0.2 〜1.0
mm、幅を0.2 〜1.0 mm、高さを0.3 〜1.0 mmの範
囲としておくと、側面の角度が第2金属層13の面に対し
て30〜85゜となり、突起14が半導体素子4の作動時に発
したノイズの放射角度を効率よく制御し、ノイズがこの
ノイズを発した元の半導体素子4に入り込むのを完全に
防止して、半導体素子4をより正常かつ安定に作動させ
ることができる。従って、前記三角柱形状を成す突起14
は、その底辺の長さを0.2 〜1.0 mm、幅を0.2 〜1.0
mm高さを0.3 〜1.0 mmの範囲としておくことが好ま
しい。
The protrusion 14 has a base length of 0.2 to 1.0 m.
m, width 0.2-1.0 mm, height 0.3-1.0 mm, triangular prism shape, base length 0.2-1.0
If the width is 0.2 to 1.0 mm and the height is 0.3 to 1.0 mm, the angle of the side surface becomes 30 to 85 ° with respect to the surface of the second metal layer 13, and the protrusion 14 The radiation angle of the occasionally generated noise can be efficiently controlled, and the noise can be completely prevented from entering the original semiconductor element 4 that has generated the noise, so that the semiconductor element 4 can be more normally and stably operated. Therefore, the protrusion 14 having the triangular prism shape is used.
Has a base length of 0.2 to 1.0 mm and a width of 0.2 to 1.0 mm.
It is preferable that the mm height is in the range of 0.3 to 1.0 mm.

【0051】かくして上述の電子部品収納用パッケージ
によれば、基体2の搭載部Aに半導体素子4等の電子部
品を取着搭載した後、半導体素子4等の電子部品の各電
極を基体2に形成した信号配線層7・グランド配線層8
・電源配線層9に半田6を介して電気的に接続し、最後
に基体2の上面に蓋体3を、この蓋体3の凹部B内壁に
被着させた第2金属層13が基体2に形成した第1金属層
11と電気的に接続するようにして銀−エポキシ樹脂等の
導電性接着剤から成る封止材12を介して接合させ、基体
2と蓋体3とから成る容器内部に半導体素子4を気密に
封止することによって、最終製品としての半導体装置と
なる。
Thus, according to the above-mentioned electronic component housing package, after mounting the electronic component such as the semiconductor element 4 on the mounting portion A of the base 2, each electrode of the electronic component such as the semiconductor element 4 is attached to the base 2. The formed signal wiring layer 7 and ground wiring layer 8
The second metal layer 13 electrically connected to the power supply wiring layer 9 via the solder 6 and finally covering the lid 3 on the upper surface of the base 2 and the inner wall of the recess B of the lid 3 First metal layer formed on
The semiconductor element 4 is air-tightly sealed inside a container including the base 2 and the lid 3 by being electrically connected to the substrate 11 and joined via a sealing material 12 made of a conductive adhesive such as silver-epoxy resin. By sealing, a semiconductor device as a final product is obtained.

【0052】なお、本発明は上述の実施の形態の一例に
限定されるものではなく、本発明の要旨を逸脱しない範
囲であれば種々の変更は可能である。例えば、上述の実
施の形態の一例では蓋体3に被着させた第2金属層13を
銀−パラジウムの金属粉末で形成したが、これをタング
ステンやモリブデン等の他の金属粉末で形成してもよ
い。
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. For example, in the example of the above-described embodiment, the second metal layer 13 attached to the lid 3 is formed of silver-palladium metal powder, but this is formed of another metal powder such as tungsten or molybdenum. Is also good.

【0053】さらに、上述の実施の形態の一例では半導
体素子収納用パッケージを例にとって説明したが、本発
明の電子部品収納用パッケージは水晶振動子やSAWフ
ィルタ等の他の種類の電子部品を収容するパッケージに
も適用可能である。
Further, in the above-described embodiment, the package for storing a semiconductor element has been described as an example. However, the package for storing an electronic component according to the present invention accommodates another type of electronic component such as a crystal unit or a SAW filter. It is also applicable to packages that do.

【0054】[0054]

【発明の効果】本発明の電子部品収納用パッケージによ
れば、基体の信号配線層をグランド配線層で挟むととも
に基体側面にグランド配線層と電気的に接続させた第1
金属層を配置し、かつ蓋体の凹部内壁に第2金属層を被
着させるとともにこの第2金属層とグランド配線層とを
電気的に接続させたことから、基体に形成した信号配線
層や電流経路およびパッケージ内部に収容する電子部品
はグランド配線層・第1金属層・第2金属層で完全にシ
ールドされることとなる。その結果、基体に形成した信
号配線層や電流径路およびパッケージ内部に収容する電
子部品に外部ノイズが入り込むことはなく、内部に収容
する電子部品を正常かつ安定に作動させることが可能と
なる。また、外部にノイズを発信することもない。
According to the electronic component housing package of the present invention, the first signal wiring layer of the base is sandwiched between the ground wiring layers and the side surface of the base is electrically connected to the ground wiring layer.
Since the metal layer is disposed and the second metal layer is applied to the inner wall of the concave portion of the lid and the second metal layer is electrically connected to the ground wiring layer, the signal wiring layer formed on the base is The current path and the electronic components housed inside the package are completely shielded by the ground wiring layer, the first metal layer, and the second metal layer. As a result, external noise does not enter the signal wiring layer, the current path, and the electronic components housed inside the package formed on the base, and the electronic components housed inside can be operated normally and stably. Also, no noise is transmitted to the outside.

【0055】さらに、本発明の電子部品収納用パッケー
ジによれば、蓋体の凹部内壁に被着させた金属層に、例
えば底辺の長さが0.2 〜1.0 mm、幅が0.2 〜1.0 m
m、高さが0.3 〜1.0 mmである三角柱形状をなした電
波吸収材から成る突起を複数個配列したことから、パッ
ケージ内部に収容する電子部品が作動時にノイズを発し
たとしてもそのノイズは突起で放射角度が制御されて元
の電子部品に入り込むようなことはない。その結果、電
子部品を正常かつ安定に作動させることが可能となる。
Further, according to the electronic component housing package of the present invention, the metal layer attached to the inner wall of the concave portion of the lid has, for example, a base length of 0.2 to 1.0 mm and a width of 0.2 to 1.0 m.
m, a plurality of protrusions made of a triangular-prism-shaped radio-absorbing material with a height of 0.3 to 1.0 mm are arranged, so that even if the electronic components housed inside the package generate noise during operation, the noise will not Thus, the radiation angle is controlled so as not to enter the original electronic component. As a result, the electronic component can be operated normally and stably.

【0056】以上のように本発明によれば、基体内部の
厚み方向に巻いた電流径路により外部のノイズを受信し
たり外部にノイズを発信することがなく、内部に収容す
る電子部品がそれ自身の発するノイズにより誤動作する
ことを有効に防止し、電子部品を長期間にわたり正常か
つ安定に作動させることができる電子部品収納用パッケ
ージを提供することができた。
As described above, according to the present invention, the electronic component housed in the base itself does not receive external noise or transmit noise to the outside due to the current path wound in the thickness direction inside the base. Thus, it is possible to provide an electronic component storage package that can effectively prevent malfunction due to noise generated by the electronic component and can operate the electronic component normally and stably for a long period of time.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の電子部品収納用パッケージの実施の形
態の一例を半導体素子を収容する半導体素子収納用パッ
ケージを例にとって説明するための断面図である。
FIG. 1 is a cross-sectional view for explaining an example of an embodiment of an electronic component housing package of the present invention, taking a semiconductor element housing package for housing a semiconductor element as an example.

【図2】図1に示す電子部品収納用パッケージに使用さ
れる突起を説明するための斜視図である。
FIG. 2 is a perspective view illustrating a projection used in the electronic component storage package shown in FIG. 1;

【図3】従来の電子部品収納用パッケージの例を示す断
面図である。
FIG. 3 is a cross-sectional view illustrating an example of a conventional electronic component storage package.

【符号の説明】[Explanation of symbols]

1・・・・・・電子部品収納用パッケージ 2・・・・・・基体 3・・・・・・蓋体 4・・・・・・半導体素子(電子部品) 5・・・・・・容量素子(電子部品) 7・・・・・・信号配線層 8・・・・・・グランド配線層 9・・・・・・電源配線層 11・・・・・・第1金属層 12・・・・・・封止材 13・・・・・・第2金属層 14・・・・・・電波吸収材から成る突起 DESCRIPTION OF SYMBOLS 1 ... Package for electronic component storage 2 ... Base 3 ... Lid 4 ... Semiconductor element (electronic component) 5 ... Capacitance Element (electronic component) 7 Signal wiring layer 8 Ground wiring layer 9 Power wiring layer 11 First metal layer 12 ... Sealant 13 ... Second metal layer 14

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 信号配線層および該信号配線層を上下か
ら挟むグランド配線層を有するとともに電子部品を搭載
するための搭載部を有する基体と、前記搭載部に搭載さ
れる前記電子部品を内部に収容するための凹部を有する
蓋体とから成り、前記基体と前記蓋体とを封止材を介し
て接合することによって内部に前記電子部品を気密に収
容するようになした電子部品収納用パッケージであっ
て、前記基体の側面に前記グランド配線層と電気的に接
続された第1金属層を被着するとともに前記蓋体の凹部
内壁に三角柱形状の電波吸収材から成る突起が複数個配
列された第2金属層を被着させ、かつ該第2金属層を前
記基体の前記グランド配線層に電気的に接続させたこと
を特徴とする電子部品収納用パッケージ。
1. A base having a signal wiring layer, a ground wiring layer sandwiching the signal wiring layer from above and below, and having a mounting portion for mounting an electronic component, and the electronic component mounted on the mounting portion being internally provided. An electronic component housing package comprising a lid having a concave portion for housing, wherein the base and the lid are joined via a sealing material to hermetically accommodate the electronic component therein. A first metal layer electrically connected to the ground wiring layer on a side surface of the base, and a plurality of protrusions made of a triangular prism-shaped radio wave absorbing material are arranged on an inner wall of the concave portion of the lid. An electronic component storage package, wherein the second metal layer is adhered to the substrate and the second metal layer is electrically connected to the ground wiring layer of the base.
【請求項2】 前記突起は、底辺の長さが0.2〜1.
0mm、幅が0.2〜1.0mm、高さが0.3〜1.
0mmの三角柱形状をしていることを特徴とする請求項
1記載の電子部品収納用パッケージ。
2. The protrusion has a base length of 0.2 to 1.
0 mm, width 0.2-1.0 mm, height 0.3-1.
2. The electronic component storage package according to claim 1, wherein the package has a triangular prism shape of 0 mm.
JP10270005A 1998-09-24 1998-09-24 Electronic part housing package Pending JP2000100983A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10270005A JP2000100983A (en) 1998-09-24 1998-09-24 Electronic part housing package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10270005A JP2000100983A (en) 1998-09-24 1998-09-24 Electronic part housing package

Publications (1)

Publication Number Publication Date
JP2000100983A true JP2000100983A (en) 2000-04-07

Family

ID=17480235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10270005A Pending JP2000100983A (en) 1998-09-24 1998-09-24 Electronic part housing package

Country Status (1)

Country Link
JP (1) JP2000100983A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002057268A (en) * 2000-08-08 2002-02-22 Internatl Business Mach Corp <Ibm> Semiconductor integrated circuit device, electric circuit device, electronic apparatus and controller
JP2004063958A (en) * 2002-07-31 2004-02-26 Kyocera Corp High frequency oscillator
JP2006332255A (en) * 2005-05-25 2006-12-07 Alps Electric Co Ltd Electronic circuit unit and its manufacturing method
JP2018026649A (en) * 2016-08-09 2018-02-15 新日本無線株式会社 Oscillation device and manufacturing method thereof
US11152912B2 (en) 2017-09-01 2021-10-19 Murata Manufacturing Co., Ltd. Piezoelectric resonator unit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62169613A (en) * 1986-01-22 1987-07-25 Toshiba Chem Corp Mold for injection molding
JPH0653355A (en) * 1992-07-30 1994-02-25 Kyocera Corp Package for enclosing electronic part

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62169613A (en) * 1986-01-22 1987-07-25 Toshiba Chem Corp Mold for injection molding
JPH0653355A (en) * 1992-07-30 1994-02-25 Kyocera Corp Package for enclosing electronic part

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002057268A (en) * 2000-08-08 2002-02-22 Internatl Business Mach Corp <Ibm> Semiconductor integrated circuit device, electric circuit device, electronic apparatus and controller
US6803655B2 (en) 2000-08-08 2004-10-12 International Business Machines Corporation Semiconductor integrated circuit device with EMI prevention structure
JP2004063958A (en) * 2002-07-31 2004-02-26 Kyocera Corp High frequency oscillator
JP2006332255A (en) * 2005-05-25 2006-12-07 Alps Electric Co Ltd Electronic circuit unit and its manufacturing method
JP4614278B2 (en) * 2005-05-25 2011-01-19 アルプス電気株式会社 Electronic circuit unit and manufacturing method thereof
JP2018026649A (en) * 2016-08-09 2018-02-15 新日本無線株式会社 Oscillation device and manufacturing method thereof
US11152912B2 (en) 2017-09-01 2021-10-19 Murata Manufacturing Co., Ltd. Piezoelectric resonator unit

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