JP2000077600A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JP2000077600A
JP2000077600A JP24865498A JP24865498A JP2000077600A JP 2000077600 A JP2000077600 A JP 2000077600A JP 24865498 A JP24865498 A JP 24865498A JP 24865498 A JP24865498 A JP 24865498A JP 2000077600 A JP2000077600 A JP 2000077600A
Authority
JP
Japan
Prior art keywords
film
die
resin
die pad
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24865498A
Other languages
Japanese (ja)
Inventor
Katsuyuki Fukutome
勝幸 福留
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP24865498A priority Critical patent/JP2000077600A/en
Publication of JP2000077600A publication Critical patent/JP2000077600A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29005Structure
    • H01L2224/29007Layer connector smaller than the underlying bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

Abstract

PROBLEM TO BE SOLVED: To suppress package cracks by preventing peeling on the interface of a film-like die bond material between the die pad of a lead frame and a semiconductor element. SOLUTION: A die pad 2 has plural rows of plural through-holes 4, which are arranged linearly alternately to stripes of a film-like die bond material 3. The film-like die bond material 3 has a width of 1 mm or longer, and the distance 8 between the rows of the through hole 4 is set longer than the width of the film-like die bond material 3. When the film-like die bond material 3 is arranged in a region on a die pad 2 where a through-hole 4 has not been formed, strong adhesion is attained on the interface of the film-like die bond material between the die pad 2 and a semiconductor element 1. Since a sealing material 6 has a nail head shape in the through-hole 4, mechanical bonding force is generated and a significant anchor effect is attained.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、リードフレームの
ダイパッド上にフィルム状ダイボンド材を用いて半導体
素子が接着され、それらが樹脂で封止されてなる樹脂封
止型半導体装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device in which semiconductor elements are adhered on a die pad of a lead frame using a film-like die bonding material and they are sealed with a resin.

【0002】[0002]

【従来の技術】従来の樹脂封止型半導体装置では、金属
よりなるリードフレームのダイパッドと封止材との間の
剥離や、ダイパッドとフィルム状ダイボンド材界面の剥
離によるパッケージクラックが問題となっており、それ
らの対策として、従来よりさまざまな提案がなされてい
る。その一例として、ダイパッドに複数のスルーホール
を形成することにより、ダイパッドと封止材の間の機械
的な結合力を強めるアンカー効果を発揮させるようにし
た半導体装置が提案されている。図5は、スルーホール
が形成された従来の樹脂封止型半導体装置のダイパッド
周辺を示す平面図である。図において、2は半導体素子
(図示せず)を搭載するリードフレームのダイパッド、
4はダイパッド2に形成されたスルーホール、7は半導
体素子と結線されるインナーリード、9は半導体素子を
ダイパッド2に接着する材料であるペースト材または半
田などのダイボンド材をそれぞれ示している。
2. Description of the Related Art In a conventional resin-encapsulated semiconductor device, there is a problem of peeling between a die pad of a lead frame made of metal and a sealing material and a package crack due to peeling of an interface between the die pad and a film-like die bonding material. As a countermeasure, various proposals have been made. As one example, there has been proposed a semiconductor device in which a plurality of through holes are formed in a die pad so as to exert an anchor effect for enhancing a mechanical bonding force between the die pad and a sealing material. FIG. 5 is a plan view showing the periphery of a die pad of a conventional resin-encapsulated semiconductor device in which a through hole is formed. In the figure, reference numeral 2 denotes a die pad of a lead frame on which a semiconductor element (not shown) is mounted;
Reference numeral 4 denotes a through hole formed in the die pad 2, reference numeral 7 denotes an inner lead connected to the semiconductor element, and reference numeral 9 denotes a die bonding material such as a paste material or a solder for bonding the semiconductor element to the die pad 2.

【0003】[0003]

【発明が解決しようとする課題】このように、半導体素
子とダイパッド2をペースト材または半田などのダイボ
ンド材9にて接着する場合、ペースト材9または半田が
スルーホール4が形成されている箇所まで広がり、スル
ーホール4を埋めてしまい、上記のアンカー効果が得ら
れないという問題があった。
As described above, when the semiconductor element and the die pad 2 are bonded to each other with the die bonding material 9 such as a paste material or solder, the paste material 9 or the solder extends to a portion where the through hole 4 is formed. There is a problem in that it spreads and fills the through hole 4 and the above-described anchor effect cannot be obtained.

【0004】このため、最近では、図6に示すように、
ダイパッド2全面に多数のスルーホール4を形成し、半
導体素子をフィルム状ダイボンド材によりダイパッド2
に接着する方法が提案されている。図7は、図6に示す
ダイパッドに半導体素子を搭載した樹脂封止型半導体装
置を示す断面図である。図において、1は半導体素子、
3はフィルム状ダイボンド材、5は半導体素子1とイン
ナーリード7を接続する結線材、6はエポキシ樹脂等よ
りなる封止材である。この方法によれば、多数のスルー
ホール4により十分なアンカー効果が得られ、さらに、
フィルム状ダイボンド材3は樹脂性であるため封止材6
との界面接着力が良好であり、両者間の剥離の発生が減
少するという効果も得られる。しかしながら、図7に示
す半導体装置の場合、スルーホール4がダイパッド2の
全面にあるため、フィルム状ダイボンド材3とダイパッ
ド2間の接着が十分に行われず、そこが起点となってパ
ッケージクラックに至るという問題があった。また、ス
ルーホール4上のフィルム状ダイボンド材3aには荷重
がかからないため、半導体素子1の裏面との接着が十分
でないという問題もあった。
For this reason, recently, as shown in FIG.
A large number of through holes 4 are formed on the entire surface of the die pad 2, and the semiconductor element is formed on the die pad 2 using a film-like die bonding material.
There has been proposed a method of bonding to a substrate. FIG. 7 is a sectional view showing a resin-sealed semiconductor device in which a semiconductor element is mounted on the die pad shown in FIG. In the figure, 1 is a semiconductor element,
Reference numeral 3 denotes a film-like die bonding material, 5 denotes a wiring material for connecting the semiconductor element 1 and the inner lead 7, and 6 denotes a sealing material made of epoxy resin or the like. According to this method, a sufficient anchor effect can be obtained by the large number of through holes 4, and furthermore,
Since the film-like die bonding material 3 is resinous, the sealing material 6
And the effect of reducing the occurrence of peeling between the two is also obtained. However, in the case of the semiconductor device shown in FIG. 7, since the through hole 4 is present on the entire surface of the die pad 2, the bonding between the film-like die bonding material 3 and the die pad 2 is not sufficiently performed. There was a problem. Further, since no load is applied to the film-shaped die bonding material 3a on the through hole 4, there is a problem that the adhesion to the back surface of the semiconductor element 1 is not sufficient.

【0005】本発明は上記のような問題点を解消するた
めになされたもので、リードフレームのダイパッド及び
半導体素子とフィルム状ダイボンド材界面における剥離
を防止すると共に、大きなアンカー効果が得られる樹脂
封止型半導体装置を提供し、パッケージクラックの発生
を低減することを目的とするものである。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is intended to prevent separation at the interface between a die pad of a lead frame and a semiconductor element and a film-like die bonding material, and to provide a resin sealing which can provide a large anchor effect. It is an object of the present invention to provide a stop semiconductor device and reduce the occurrence of package cracks.

【0006】[0006]

【課題を解決するための手段】本発明に係わる樹脂封止
型半導体装置は、リードフレームのダイパッド上にフィ
ルム状ダイボンド材を用いて半導体素子が接着され、そ
れらが樹脂で封止されてなる樹脂封止型半導体装置であ
って、ダイパッドは、規則的に配置された複数個のスル
ーホールを有し、フィルム状ダイボンド材は、スルーホ
ールが形成されていない領域に配置されているものであ
る。また、ダイパッドは、直線状に並んだ複数個のスル
ーホールの列を複数有し、スルーホールの列と帯状のフ
ィルム状ダイボンド材が交互に配置されているものであ
る。また、スルーホールの列相互間の距離は、帯状のフ
ィルムダイボンド材の幅よりも大きいものである。ま
た、帯状のフィルム状ダイボンド材は、幅1mm以上と
するものである。さらに、スルーホールは、直径1mm
以下とするものである。
According to the present invention, there is provided a resin-encapsulated semiconductor device in which a semiconductor element is bonded onto a die pad of a lead frame using a film-like die bond material, and the semiconductor elements are sealed with a resin. In a sealed semiconductor device, the die pad has a plurality of regularly arranged through holes, and the film-like die bonding material is arranged in a region where no through holes are formed. The die pad has a plurality of rows of through holes arranged in a straight line, and the rows of through holes and the band-shaped film-like die bonding material are alternately arranged. The distance between the rows of the through holes is larger than the width of the band-shaped film die bonding material. The band-shaped film die bond material has a width of 1 mm or more. Furthermore, the through hole is 1mm in diameter
The following is assumed.

【0007】[0007]

【発明の実施の形態】実施の形態1.以下に、本発明の
実施の形態を図について説明する。図1は、本発明の実
施の形態1である樹脂封止型半導体装置のダイパッド周
辺を示す平面図、図2は図1に示すダイパッドに半導体
素子を搭載した樹脂封止型半導体装置を示す断面図であ
る。図において、1は半導体素子、2は半導体素子1を
搭載する金属製のリードフレームのダイパッド、3は半
導体素子1をダイパッド2上に接着するフィルム状ダイ
ボンド材、4はダイパッド2に規則的に配置された複数
個のスルーホール、5は半導体素子1とリードフレーム
のインナーリード7を接続する結線材、6はエポキシ樹
脂等よりなる封止材、8はスルーホール4の列相互間の
距離をそれぞれ示している。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view showing a periphery of a die pad of a resin-sealed semiconductor device according to a first embodiment of the present invention. FIG. 2 is a cross-section showing a resin-sealed semiconductor device in which a semiconductor element is mounted on the die pad shown in FIG. FIG. In the figure, 1 is a semiconductor element, 2 is a die pad of a metal lead frame on which the semiconductor element 1 is mounted, 3 is a film-like die bonding material for bonding the semiconductor element 1 on the die pad 2, and 4 is regularly arranged on the die pad 2. A plurality of through-holes, 5 is a connecting material for connecting the semiconductor element 1 and the inner lead 7 of the lead frame, 6 is a sealing material made of epoxy resin or the like, and 8 is a distance between rows of the through-holes 4. Is shown.

【0008】本実施の形態による樹脂封止型半導体装置
のダイパッド2は、直線状に並んだ複数個のスルーホー
ル4の列を複数有し、このスルーホール4の列と帯状の
フィルム状ダイボンド材3が交互に配置され、半導体素
子1をダイパッド2に接着するものである。なお、ここ
では、帯状のフィルム状ダイボンド材3は、例えば厚さ
約25μm、幅1mm以上、スルーホール4は直径1m
m以下とする。また、スルーホール4の列相互間の距離
8は、帯状のフィルム状ダイボンド材3の幅よりも大き
く形成されている。その後、ワイヤボンド工程にて半導
体素子1とインナーリード7を金線等の結線材5で接続
し、エポキシ樹脂等よりなる封止材6にて封止する。
The die pad 2 of the resin-encapsulated semiconductor device according to the present embodiment has a plurality of rows of a plurality of through holes 4 arranged in a straight line. The semiconductor elements 1 are bonded to the die pad 2 alternately. Here, the band-shaped film die bond material 3 is, for example, about 25 μm thick and 1 mm or more in width, and the through hole 4 is 1 m in diameter.
m or less. The distance 8 between the rows of the through holes 4 is formed to be larger than the width of the band-shaped film die bonding material 3. After that, in the wire bonding step, the semiconductor element 1 and the inner lead 7 are connected by a connecting material 5 such as a gold wire and sealed by a sealing material 6 made of epoxy resin or the like.

【0009】本実施の形態による樹脂封止型半導体装置
は、ダイパッド2上のスルーホール4が形成されていな
い領域にフィルム状ダイボンド材3を配置することによ
り、フィルム状ダイボンド材3とダイパッド2間の十分
な接着力が確保でき、それらの界面での剥離を防止でき
る。また、フィルム状ダイボンド材3に半導体素子1裏
面を接着する際にも十分に荷重がかけられるため、強い
接着力が得られ、半導体素子1裏面とフィルム状ダイボ
ンド材3界面での剥離も防止できる。さらに、本実施の
形態によれば、封止材6は、ダイパッド2のスルーホー
ル4に入り込み、さらに半導体素子1裏面とフィルム状
ダイボンド材3によって形成される空間にも充填され
る。樹脂性のフィルム状ダイボンド材3と封止材6の接
着力は非常に良好である上に、フィルム状ダイボンド材
3の幅がダイパッド2のスルーホール4の列相互間の距
離8よりも小さく形成されているため、封止材6がスル
ーホール4内部で釘の頭のような形状となり、機械的な
結合力が生じ、大きなアンカー効果が得られる。このた
め、本実施の形態による樹脂封止型半導体装置は、熱膨
張による横方向及び縦方向の応力に対して耐性が強く、
パッケージクラックの発生を低減することが可能であ
る。
In the resin-encapsulated semiconductor device according to the present embodiment, by disposing the film-like die bonding material 3 in a region where the through hole 4 is not formed on the die pad 2, the distance between the film-like die bonding material 3 and the die pad 2 is increased. Can secure a sufficient adhesive force and can prevent peeling at the interface between them. In addition, since a sufficient load is applied when the back surface of the semiconductor element 1 is bonded to the film-shaped die bonding material 3, a strong adhesive force is obtained, and peeling at the interface between the back surface of the semiconductor element 1 and the film-shaped die bonding material 3 can be prevented. . Further, according to the present embodiment, the sealing material 6 enters the through hole 4 of the die pad 2 and further fills the space formed by the back surface of the semiconductor element 1 and the film die bonding material 3. The adhesive strength between the resinous film-like die bond material 3 and the sealing material 6 is very good, and the width of the film-like die bond material 3 is smaller than the distance 8 between the rows of the through holes 4 of the die pad 2. As a result, the sealing material 6 has a shape like a nail head inside the through hole 4 and a mechanical coupling force is generated, so that a large anchor effect can be obtained. For this reason, the resin-encapsulated semiconductor device according to the present embodiment has high resistance to horizontal and vertical stress due to thermal expansion,
It is possible to reduce the occurrence of package cracks.

【0010】なお、図1では、ダイパッド2に、直線状
に並んだ四個のスルーホール4の列を三列形成したが、
スルーホール4と帯状のフィルム状ダイボンド材3の配
列はこれに限定するものではなく、スルーホール4が多
数形成でき、且つ半導体素子1との十分な接着力が得ら
れるフィルム状ダイボンド材3の面積を確保できる配列
であれば良い。また、本実施の形態によるフィルム状ダ
イボンド材3の幅は、特に限定するものではないが、接
着力を確保する上で1mm以上であることが望ましい。
また、フィルム状ダイボンド材3の材質は特に限定する
ものではなく、ポリイミド系樹脂やその他の樹脂を用い
ることができる。
In FIG. 1, three rows of four through holes 4 arranged in a straight line are formed on the die pad 2.
The arrangement of the through-holes 4 and the band-shaped film die-bonding material 3 is not limited to this, and the area of the film-shaped die-bonding material 3 in which a large number of through-holes 4 can be formed and sufficient adhesive strength to the semiconductor element 1 can be obtained. It is sufficient if the array can secure Further, the width of the film-shaped die bonding material 3 according to the present embodiment is not particularly limited, but is desirably 1 mm or more in order to secure the adhesive force.
In addition, the material of the film-shaped die bonding material 3 is not particularly limited, and a polyimide resin or another resin can be used.

【0011】実施の形態2及び3.図3及び図4は、本
発明の実施の形態2及び3である樹脂封止型半導体装置
のダイパッド周辺を示す平面図である。本実施の形態で
は、上記実施の形態1に示した樹脂封止型半導体装置の
変形例について説明する。なお、図中、同一、相当部分
には同一符号を付し、説明を省略する。本実施の形態に
よる樹脂封止型半導体装置は、例えば図3に示すよう
に、複数のスルーホール4をダイパッド2の対角線上に
配置し、スルーホール4が形成されていない領域に三角
形のフィルム状ダイボンド材3を配置したものである。
また、その他の例としては、図4に示すように、複数の
スルーホール4を十字型に配置し、スルーホール4が形
成されていない領域に長方形または正方形のフィルム状
ダイボンド材3を配置しても良い。
Embodiments 2 and 3 FIGS. 3 and 4 are plan views showing the periphery of the die pad of the resin-encapsulated semiconductor device according to the second and third embodiments of the present invention. In this embodiment, a modified example of the resin-encapsulated semiconductor device described in Embodiment 1 will be described. In the drawings, the same or corresponding parts have the same reference characters allotted, and description thereof will not be repeated. In the resin-sealed semiconductor device according to the present embodiment, for example, as shown in FIG. 3, a plurality of through holes 4 are arranged on a diagonal line of the die pad 2, and a triangular film shape is formed in a region where the through holes 4 are not formed. The die bond material 3 is arranged.
Further, as another example, as shown in FIG. 4, a plurality of through holes 4 are arranged in a cross shape, and a rectangular or square film-like die bonding material 3 is arranged in a region where the through holes 4 are not formed. Is also good.

【0012】本実施の形態による樹脂封止型半導体装置
のダイパッド2は、中心部から周辺部にかけて均等にス
ルーホール4が配置されているため、異なるサイズの半
導体素子1に対しても適用可能であり、汎用性が高い。
また、本実施の形態においても、ダイパッド2上のスル
ーホール4が形成されていない領域にフィルム状ダイボ
ンド材3を配置することにより、フィルム状ダイボンド
材3とダイパッド2及び半導体素子1界面において十分
な接着力が確保でき、上記実施の形態1と同様の効果が
得られる。さらに、フィルム状ダイボンド材3の面積
を、スルーホール4が形成されていない領域の面積より
も小さく形成することで、上記実施の形態1と同様に封
止材6の回り込みによるアンカー効果が得られる。
The die pad 2 of the resin-encapsulated semiconductor device according to the present embodiment has the through-holes 4 uniformly arranged from the center to the periphery, so that it can be applied to semiconductor elements 1 of different sizes. Yes, high versatility.
Also in the present embodiment, by disposing the film-shaped die bonding material 3 in a region where the through hole 4 is not formed on the die pad 2, sufficient interfacing between the film-shaped die bonding material 3, the die pad 2 and the semiconductor element 1 is possible. Adhesive strength can be secured, and the same effect as in the first embodiment can be obtained. Furthermore, by forming the area of the film-shaped die bonding material 3 smaller than the area of the region where the through holes 4 are not formed, an anchor effect by the wraparound of the sealing material 6 can be obtained as in the first embodiment. .

【0013】[0013]

【発明の効果】以上のように、本発明によれば、半導体
素子をダイパッド上に接着するためのフィルム状ダイボ
ンド材を、ダイパッドのスルーホールが形成されていな
い領域に配置するようにしたので、フィルム状ダイボン
ド材とダイパッド及び半導体素子界面において強い接着
力が得られ、それぞれの界面での剥離を防止する効果が
ある。
As described above, according to the present invention, the film-like die bonding material for bonding the semiconductor element on the die pad is arranged in the region of the die pad where no through hole is formed. Strong adhesive force is obtained at the interface between the film-shaped die bonding material, the die pad and the semiconductor element, and there is an effect of preventing separation at each interface.

【0014】また、ダイパッドに複数のスルーホールの
列と帯状のフィルム状ダイボンド材を交互に配置し、ス
ルーホールの列相互間の距離を、帯状のフィルム状ダイ
ボンド材の幅よりも大きくしたので、封止用の樹脂がダ
イパッドのスルーホールに入り込み、さらに半導体素子
裏面とフィルム状ダイボンド材によって形成される空間
にも充填されるため、大きなアンカー効果が得られ、パ
ッケージクラックの発生が低減される効果がある。
Further, a plurality of rows of through-holes and a band-like film die-bonding material are alternately arranged on the die pad, and the distance between the rows of through-holes is made larger than the width of the band-like film-like die-bonding material. The sealing resin enters the through holes of the die pad and fills the space formed by the back surface of the semiconductor element and the film-shaped die bonding material, so that a large anchor effect is obtained and the occurrence of package cracks is reduced. There is.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の実施の形態1である樹脂封止型半導
体装置のダイパッド周辺を示す平面図である。
FIG. 1 is a plan view showing a periphery of a die pad of a resin-sealed semiconductor device according to a first embodiment of the present invention.

【図2】 本発明の実施の形態1である樹脂封止型半導
体装置を示す断面図である。
FIG. 2 is a sectional view showing a resin-sealed semiconductor device according to the first embodiment of the present invention;

【図3】 本発明の実施の形態2である樹脂封止型半導
体装置のダイパッド周辺を示す平面図である。
FIG. 3 is a plan view showing a periphery of a die pad of a resin-encapsulated semiconductor device according to a second embodiment of the present invention;

【図4】 本発明の実施の形態3である樹脂封止型半導
体装置のダイパッド周辺を示す平面図である。
FIG. 4 is a plan view showing a periphery of a die pad of a resin-encapsulated semiconductor device according to a third embodiment of the present invention;

【図5】 従来の樹脂封止型半導体装置のダイパッド周
辺を示す平面図である。
FIG. 5 is a plan view showing the periphery of a die pad of a conventional resin-encapsulated semiconductor device.

【図6】 従来の他の樹脂封止型半導体装置のダイパッ
ド周辺を示す平面図である。
FIG. 6 is a plan view showing the periphery of a die pad of another conventional resin-encapsulated semiconductor device.

【図7】 従来の他の樹脂封止型半導体装置を示す断面
図である。
FIG. 7 is a sectional view showing another conventional resin-encapsulated semiconductor device.

【符号の説明】[Explanation of symbols]

1 半導体素子、2 ダイパッド、3 フィルム状ダイ
ボンド材、4 スルーホール、5 結線材、6 封止
材、7 インナーリード、8 スルーホールの列相互間
の距離、9 ペースト材または半田などのダイボンド
材。
Reference Signs List 1 semiconductor element, 2 die pad, 3 film die bonding material, 4 through hole, 5 connection material, 6 sealing material, 7 inner lead, 8 distance between rows of through holes, 9 die bonding material such as paste material or solder.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 リードフレームのダイパッド上にフィル
ム状ダイボンド材を用いて半導体素子が接着され、それ
らが樹脂で封止されてなる樹脂封止型半導体装置であっ
て、上記ダイパッドは、規則的に配置された複数個のス
ルーホールを有し、上記フィルム状ダイボンド材は、上
記スルーホールが形成されていない領域に配置されてい
ることを特徴とする樹脂封止型半導体装置。
1. A resin-encapsulated semiconductor device in which a semiconductor element is bonded onto a die pad of a lead frame using a film-like die-bonding material, and the semiconductor elements are sealed with a resin. A resin-encapsulated semiconductor device, comprising a plurality of through holes arranged, wherein the film-shaped die bonding material is arranged in a region where the through holes are not formed.
【請求項2】 ダイパッドは、直線状に並んだ複数個の
スルーホールの列を複数有し、上記スルーホールの列と
帯状のフィルム状ダイボンド材が交互に配置されている
ことを特徴とする請求項1記載の樹脂封止型半導体装
置。
2. A die pad comprising a plurality of rows of a plurality of through holes arranged in a straight line, wherein the rows of the through holes and the band-shaped film-like die bonding material are alternately arranged. Item 4. A resin-sealed semiconductor device according to Item 1.
【請求項3】 スルーホールの列相互間の距離は、帯状
のフィルム状ダイボンド材の幅よりも大きいことを特徴
とする請求項2記載の樹脂封止型半導体装置。
3. The resin-encapsulated semiconductor device according to claim 2, wherein the distance between the rows of the through holes is larger than the width of the band-shaped film die bonding material.
【請求項4】 帯状のフィルム状ダイボンド材は、幅1
mm以上とすることを特徴とする請求項2または請求項
3に記載の樹脂封止型半導体装置。
4. A belt-shaped film die bond material having a width of 1
4. The resin-sealed semiconductor device according to claim 2, wherein the thickness is not less than mm. 5.
【請求項5】 スルーホールは、直径1mm以下とする
ことを特徴とする請求項1〜請求項4のいずれか一項に
記載の樹脂封止型半導体装置。
5. The resin-encapsulated semiconductor device according to claim 1, wherein the diameter of the through hole is 1 mm or less.
JP24865498A 1998-09-02 1998-09-02 Resin-sealed semiconductor device Pending JP2000077600A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24865498A JP2000077600A (en) 1998-09-02 1998-09-02 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24865498A JP2000077600A (en) 1998-09-02 1998-09-02 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JP2000077600A true JP2000077600A (en) 2000-03-14

Family

ID=17181352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24865498A Pending JP2000077600A (en) 1998-09-02 1998-09-02 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JP2000077600A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6828661B2 (en) * 2001-06-27 2004-12-07 Matsushita Electric Industrial Co., Ltd. Lead frame and a resin-sealed semiconductor device exhibiting improved resin balance, and a method for manufacturing the same
US7414300B2 (en) 2005-09-26 2008-08-19 Mitsubishi Denki Kabushiki Kaisha Molded semiconductor package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6828661B2 (en) * 2001-06-27 2004-12-07 Matsushita Electric Industrial Co., Ltd. Lead frame and a resin-sealed semiconductor device exhibiting improved resin balance, and a method for manufacturing the same
US7414300B2 (en) 2005-09-26 2008-08-19 Mitsubishi Denki Kabushiki Kaisha Molded semiconductor package

Similar Documents

Publication Publication Date Title
US7671451B2 (en) Semiconductor package having double layer leadframe
US6664643B2 (en) Semiconductor device and method for manufacturing the same
US5888847A (en) Technique for mounting a semiconductor die
US20040046241A1 (en) Method of manufacturing enhanced thermal dissipation integrated circuit package
JP3622435B2 (en) Semiconductor device and manufacturing method thereof
JP3109847U (en) Resin package semiconductor device that can reduce characteristic impedance
JP2001298147A (en) Semiconductor device and its manufacturing method
US8101470B2 (en) Foil based semiconductor package
US6774479B2 (en) Electronic device having a semiconductor chip on a semiconductor chip connection plate and a method for producing the electronic device
JPH09129811A (en) Resin sealed semiconductor device
JPH1027880A (en) Semiconductor device
US6376916B1 (en) Tape carrier for BGA and semiconductor device using the same
JP2000077600A (en) Resin-sealed semiconductor device
JP3633364B2 (en) Manufacturing method of BGA type semiconductor device
JPS60186044A (en) Integrated circuit device
JP3899755B2 (en) Semiconductor device
US20030080405A1 (en) Semiconductor device and method for producing the same
JPH06132442A (en) Semiconductor device and its manufacture
JP3229816B2 (en) Method for manufacturing resin-encapsulated semiconductor device
JPS63293963A (en) Resin-sealed semiconductor device
JP3965767B2 (en) Semiconductor chip substrate mounting structure
KR200190144Y1 (en) Semiconductor device
JPH06177280A (en) Resin-sealed semiconductor device
JP3145892B2 (en) Resin-sealed semiconductor device
JP2001196396A (en) Semiconductor device, manufacturing method therefor and substrate